1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86MCAsmInfo.h"
15 #include "X86TargetMachine.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/MC/MCCodeEmitter.h"
21 #include "llvm/MC/MCStreamer.h"
22 #include "llvm/Support/FormattedStream.h"
23 #include "llvm/Target/TargetOptions.h"
24 #include "llvm/Target/TargetRegistry.h"
27 static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
29 switch (TheTriple.getOS()) {
31 return new X86MCAsmInfoDarwin(TheTriple);
35 if (TheTriple.getEnvironment() == Triple::MachO)
36 return new X86MCAsmInfoDarwin(TheTriple);
38 return new X86MCAsmInfoCOFF(TheTriple);
40 return new X86ELFMCAsmInfo(TheTriple);
44 static MCStreamer *createMCStreamer(const Target &T, const std::string &TT,
45 MCContext &Ctx, TargetAsmBackend &TAB,
47 MCCodeEmitter *_Emitter,
51 switch (TheTriple.getOS()) {
53 return createMachOStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
57 if (TheTriple.getEnvironment() == Triple::MachO)
58 return createMachOStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
60 return createWinCOFFStreamer(Ctx, TAB, *_Emitter, _OS, RelaxAll);
62 return createELFStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll, NoExecStack);
66 extern "C" void LLVMInitializeX86Target() {
67 // Register the target.
68 RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target);
69 RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
71 // Register the target asm info.
72 RegisterAsmInfoFn A(TheX86_32Target, createMCAsmInfo);
73 RegisterAsmInfoFn B(TheX86_64Target, createMCAsmInfo);
75 // Register the code emitter.
76 TargetRegistry::RegisterCodeEmitter(TheX86_32Target,
77 createX86_32MCCodeEmitter);
78 TargetRegistry::RegisterCodeEmitter(TheX86_64Target,
79 createX86_64MCCodeEmitter);
81 // Register the asm backend.
82 TargetRegistry::RegisterAsmBackend(TheX86_32Target,
83 createX86_32AsmBackend);
84 TargetRegistry::RegisterAsmBackend(TheX86_64Target,
85 createX86_64AsmBackend);
87 // Register the object streamer.
88 TargetRegistry::RegisterObjectStreamer(TheX86_32Target,
90 TargetRegistry::RegisterObjectStreamer(TheX86_64Target,
95 X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
96 const std::string &FS)
97 : X86TargetMachine(T, TT, FS, false),
98 DataLayout(getSubtargetImpl()->isTargetDarwin() ?
99 "e-p:32:32-f64:32:64-i64:32:64-f80:128:128-n8:16:32" :
100 (getSubtargetImpl()->isTargetCygMing() ||
101 getSubtargetImpl()->isTargetWindows()) ?
102 "e-p:32:32-f64:64:64-i64:64:64-f80:32:32-n8:16:32" :
103 "e-p:32:32-f64:32:64-i64:32:64-f80:32:32-n8:16:32"),
111 X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
112 const std::string &FS)
113 : X86TargetMachine(T, TT, FS, true),
114 DataLayout("e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-n8:16:32:64"),
121 /// X86TargetMachine ctor - Create an X86 target.
123 X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
124 const std::string &FS, bool is64Bit)
125 : LLVMTargetMachine(T, TT),
126 Subtarget(TT, FS, is64Bit),
127 FrameLowering(*this, Subtarget),
128 ELFWriterInfo(is64Bit, true) {
129 DefRelocModel = getRelocationModel();
131 // If no relocation model was picked, default as appropriate for the target.
132 if (getRelocationModel() == Reloc::Default) {
133 // Darwin defaults to PIC in 64 bit mode and dynamic-no-pic in 32 bit mode.
134 // Win64 requires rip-rel addressing, thus we force it to PIC. Otherwise we
135 // use static relocation model by default.
136 if (Subtarget.isTargetDarwin()) {
137 if (Subtarget.is64Bit())
138 setRelocationModel(Reloc::PIC_);
140 setRelocationModel(Reloc::DynamicNoPIC);
141 } else if (Subtarget.isTargetWin64())
142 setRelocationModel(Reloc::PIC_);
144 setRelocationModel(Reloc::Static);
147 assert(getRelocationModel() != Reloc::Default &&
148 "Relocation mode not picked");
150 // ELF and X86-64 don't have a distinct DynamicNoPIC model. DynamicNoPIC
151 // is defined as a model for code which may be used in static or dynamic
152 // executables but not necessarily a shared library. On X86-32 we just
153 // compile in -static mode, in x86-64 we use PIC.
154 if (getRelocationModel() == Reloc::DynamicNoPIC) {
156 setRelocationModel(Reloc::PIC_);
157 else if (!Subtarget.isTargetDarwin())
158 setRelocationModel(Reloc::Static);
161 // If we are on Darwin, disallow static relocation model in X86-64 mode, since
162 // the Mach-O file format doesn't support it.
163 if (getRelocationModel() == Reloc::Static &&
164 Subtarget.isTargetDarwin() &&
166 setRelocationModel(Reloc::PIC_);
168 // Determine the PICStyle based on the target selected.
169 if (getRelocationModel() == Reloc::Static) {
170 // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
171 Subtarget.setPICStyle(PICStyles::None);
172 } else if (Subtarget.is64Bit()) {
173 // PIC in 64 bit mode is always rip-rel.
174 Subtarget.setPICStyle(PICStyles::RIPRel);
175 } else if (Subtarget.isTargetCygMing()) {
176 Subtarget.setPICStyle(PICStyles::None);
177 } else if (Subtarget.isTargetDarwin()) {
178 if (getRelocationModel() == Reloc::PIC_)
179 Subtarget.setPICStyle(PICStyles::StubPIC);
181 assert(getRelocationModel() == Reloc::DynamicNoPIC);
182 Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
184 } else if (Subtarget.isTargetELF()) {
185 Subtarget.setPICStyle(PICStyles::GOT);
188 // Finally, if we have "none" as our PIC style, force to static mode.
189 if (Subtarget.getPICStyle() == PICStyles::None)
190 setRelocationModel(Reloc::Static);
193 //===----------------------------------------------------------------------===//
194 // Pass Pipeline Configuration
195 //===----------------------------------------------------------------------===//
197 bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
198 CodeGenOpt::Level OptLevel) {
199 // Install an instruction selector.
200 PM.add(createX86ISelDag(*this, OptLevel));
202 // For 32-bit, prepend instructions to set the "global base reg" for PIC.
203 if (!Subtarget.is64Bit())
204 PM.add(createGlobalBaseRegPass());
209 bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
210 CodeGenOpt::Level OptLevel) {
211 PM.add(createX86MaxStackAlignmentHeuristicPass());
212 return false; // -print-machineinstr shouldn't print after this.
215 bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
216 CodeGenOpt::Level OptLevel) {
217 PM.add(createX86FloatingPointStackifierPass());
218 return true; // -print-machineinstr should print after this.
221 bool X86TargetMachine::addPreEmitPass(PassManagerBase &PM,
222 CodeGenOpt::Level OptLevel) {
223 if (OptLevel != CodeGenOpt::None && Subtarget.hasSSE2()) {
224 PM.add(createSSEDomainFixPass());
230 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
231 CodeGenOpt::Level OptLevel,
232 JITCodeEmitter &JCE) {
233 // FIXME: Move this to TargetJITInfo!
234 // On Darwin, do not override 64-bit setting made in X86TargetMachine().
235 if (DefRelocModel == Reloc::Default &&
236 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
237 setRelocationModel(Reloc::Static);
238 Subtarget.setPICStyle(PICStyles::None);
242 PM.add(createX86JITCodeEmitterPass(*this, JCE));
247 void X86TargetMachine::setCodeModelForStatic() {
249 if (getCodeModel() != CodeModel::Default) return;
251 // For static codegen, if we're not already set, use Small codegen.
252 setCodeModel(CodeModel::Small);
256 void X86TargetMachine::setCodeModelForJIT() {
258 if (getCodeModel() != CodeModel::Default) return;
260 // 64-bit JIT places everything in the same buffer except external functions.
261 if (Subtarget.is64Bit())
262 setCodeModel(CodeModel::Large);
264 setCodeModel(CodeModel::Small);