1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // This file defines the X86 specific subclass of TargetMachine.
5 //===----------------------------------------------------------------------===//
7 #include "X86TargetMachine.h"
9 #include "llvm/Module.h"
10 #include "llvm/PassManager.h"
11 #include "llvm/Target/TargetMachineImpls.h"
12 #include "llvm/CodeGen/MachineFunction.h"
13 #include "llvm/CodeGen/Passes.h"
14 #include "llvm/Transforms/Scalar.h"
15 #include "Support/CommandLine.h"
16 #include "Support/Statistic.h"
21 cl::desc("Register allocator to use: (default = simple)"),
23 cl::values(clEnumVal(simple, " simple register allocator"),
24 clEnumVal(local, " local register allocator"),
28 cl::opt<bool> PrintCode("print-machineinstrs",
29 cl::desc("Print generated machine code"));
30 cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true),
31 cl::desc("Use the 'simple' X86 instruction selector"));
34 // allocateX86TargetMachine - Allocate and return a subclass of TargetMachine
35 // that implements the X86 backend.
37 TargetMachine *allocateX86TargetMachine(const Module &M) {
38 return new X86TargetMachine(M);
42 /// X86TargetMachine ctor - Create an ILP32 architecture model
44 X86TargetMachine::X86TargetMachine(const Module &M)
45 : TargetMachine("X86",
46 M.getEndianness() != Module::BigEndian,
47 M.getPointerSize() != Module::Pointer64 ? 4 : 8,
48 M.getPointerSize() != Module::Pointer64 ? 4 : 8,
49 M.getPointerSize() != Module::Pointer64 ? 4 : 8,
50 4, M.getPointerSize() != Module::Pointer64 ? 4 : 8),
51 FrameInfo(TargetFrameInfo::StackGrowsDown, 8/*16 for SSE*/, 4) {
55 // addPassesToEmitAssembly - We currently use all of the same passes as the JIT
56 // does to emit statically compiled machine code.
57 bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
59 // FIXME: Implement the switch instruction in the instruction selector!
60 PM.add(createLowerSwitchPass());
63 PM.add(createX86SimpleInstructionSelector(*this));
65 PM.add(createX86PatternInstructionSelector(*this));
67 // TODO: optional optimizations go here
69 // FIXME: Add SSA based peephole optimizer here.
71 // Print the instruction selected machine code...
73 PM.add(createMachineFunctionPrinterPass());
75 // Perform register allocation to convert to a concrete x86 representation
78 PM.add(createSimpleRegisterAllocator());
81 PM.add(createLocalRegisterAllocator());
84 assert(0 && "no register allocator selected");
88 PM.add(createMachineFunctionPrinterPass());
90 PM.add(createX86FloatingPointStackifierPass());
93 PM.add(createMachineFunctionPrinterPass());
95 // Insert prolog/epilog code. Eliminate abstract frame index references...
96 PM.add(createPrologEpilogCodeInserter());
98 PM.add(createX86PeepholeOptimizerPass());
100 if (PrintCode) // Print the register-allocated code
101 PM.add(createX86CodePrinterPass(std::cerr, *this));
103 PM.add(createX86CodePrinterPass(Out, *this));
104 return false; // success!
107 /// addPassesToJITCompile - Add passes to the specified pass manager to
108 /// implement a fast dynamic compiler for this target. Return true if this is
109 /// not supported for this target.
111 bool X86TargetMachine::addPassesToJITCompile(FunctionPassManager &PM) {
112 // FIXME: Implement the switch instruction in the instruction selector!
113 PM.add(createLowerSwitchPass());
116 PM.add(createX86SimpleInstructionSelector(*this));
118 PM.add(createX86PatternInstructionSelector(*this));
120 // TODO: optional optimizations go here
122 // FIXME: Add SSA based peephole optimizer here.
124 // Print the instruction selected machine code...
126 PM.add(createMachineFunctionPrinterPass());
128 // Perform register allocation to convert to a concrete x86 representation
131 PM.add(createSimpleRegisterAllocator());
134 PM.add(createLocalRegisterAllocator());
137 assert(0 && "no register allocator selected");
141 PM.add(createMachineFunctionPrinterPass());
143 PM.add(createX86FloatingPointStackifierPass());
146 PM.add(createMachineFunctionPrinterPass());
148 // Insert prolog/epilog code. Eliminate abstract frame index references...
149 PM.add(createPrologEpilogCodeInserter());
151 PM.add(createX86PeepholeOptimizerPass());
153 if (PrintCode) // Print the register-allocated code
154 PM.add(createX86CodePrinterPass(std::cerr, *this));
155 return false; // success!