1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86MCAsmInfo.h"
15 #include "X86TargetMachine.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/MC/MCCodeEmitter.h"
21 #include "llvm/MC/MCStreamer.h"
22 #include "llvm/Support/FormattedStream.h"
23 #include "llvm/Target/TargetOptions.h"
24 #include "llvm/Target/TargetRegistry.h"
27 static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
29 switch (TheTriple.getOS()) {
31 return new X86MCAsmInfoDarwin(TheTriple);
36 return new X86MCAsmInfoCOFF(TheTriple);
38 return new X86ELFMCAsmInfo(TheTriple);
42 static MCStreamer *createMCStreamer(const Target &T, const std::string &TT,
43 MCContext &Ctx, TargetAsmBackend &TAB,
45 MCCodeEmitter *_Emitter,
48 switch (TheTriple.getOS()) {
50 return createMachOStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
55 return createWinCOFFStreamer(Ctx, TAB, *_Emitter, _OS, RelaxAll);
57 return createELFStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
61 extern "C" void LLVMInitializeX86Target() {
62 // Register the target.
63 RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target);
64 RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
66 // Register the target asm info.
67 RegisterAsmInfoFn A(TheX86_32Target, createMCAsmInfo);
68 RegisterAsmInfoFn B(TheX86_64Target, createMCAsmInfo);
70 // Register the code emitter.
71 TargetRegistry::RegisterCodeEmitter(TheX86_32Target,
72 createX86_32MCCodeEmitter);
73 TargetRegistry::RegisterCodeEmitter(TheX86_64Target,
74 createX86_64MCCodeEmitter);
76 // Register the asm backend.
77 TargetRegistry::RegisterAsmBackend(TheX86_32Target,
78 createX86_32AsmBackend);
79 TargetRegistry::RegisterAsmBackend(TheX86_64Target,
80 createX86_64AsmBackend);
82 // Register the object streamer.
83 TargetRegistry::RegisterObjectStreamer(TheX86_32Target,
85 TargetRegistry::RegisterObjectStreamer(TheX86_64Target,
90 X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
91 const std::string &FS)
92 : X86TargetMachine(T, TT, FS, false),
93 DataLayout(getSubtargetImpl()->isTargetDarwin() ?
94 "e-p:32:32-f64:32:64-i64:32:64-f80:128:128-n8:16:32" :
95 (getSubtargetImpl()->isTargetCygMing() ||
96 getSubtargetImpl()->isTargetWindows()) ?
97 "e-p:32:32-f64:64:64-i64:64:64-f80:32:32-n8:16:32" :
98 "e-p:32:32-f64:32:64-i64:32:64-f80:32:32-n8:16:32"),
106 X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
107 const std::string &FS)
108 : X86TargetMachine(T, TT, FS, true),
109 DataLayout("e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-n8:16:32:64"),
116 /// X86TargetMachine ctor - Create an X86 target.
118 X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
119 const std::string &FS, bool is64Bit)
120 : LLVMTargetMachine(T, TT),
121 Subtarget(TT, FS, is64Bit),
122 FrameInfo(*this, Subtarget),
123 ELFWriterInfo(is64Bit, true) {
124 DefRelocModel = getRelocationModel();
126 // If no relocation model was picked, default as appropriate for the target.
127 if (getRelocationModel() == Reloc::Default) {
128 // Darwin defaults to PIC in 64 bit mode and dynamic-no-pic in 32 bit mode.
129 // Win64 requires rip-rel addressing, thus we force it to PIC. Otherwise we
130 // use static relocation model by default.
131 if (Subtarget.isTargetDarwin()) {
132 if (Subtarget.is64Bit())
133 setRelocationModel(Reloc::PIC_);
135 setRelocationModel(Reloc::DynamicNoPIC);
136 } else if (Subtarget.isTargetWin64())
137 setRelocationModel(Reloc::PIC_);
139 setRelocationModel(Reloc::Static);
142 assert(getRelocationModel() != Reloc::Default &&
143 "Relocation mode not picked");
145 // ELF and X86-64 don't have a distinct DynamicNoPIC model. DynamicNoPIC
146 // is defined as a model for code which may be used in static or dynamic
147 // executables but not necessarily a shared library. On X86-32 we just
148 // compile in -static mode, in x86-64 we use PIC.
149 if (getRelocationModel() == Reloc::DynamicNoPIC) {
151 setRelocationModel(Reloc::PIC_);
152 else if (!Subtarget.isTargetDarwin())
153 setRelocationModel(Reloc::Static);
156 // If we are on Darwin, disallow static relocation model in X86-64 mode, since
157 // the Mach-O file format doesn't support it.
158 if (getRelocationModel() == Reloc::Static &&
159 Subtarget.isTargetDarwin() &&
161 setRelocationModel(Reloc::PIC_);
163 // Determine the PICStyle based on the target selected.
164 if (getRelocationModel() == Reloc::Static) {
165 // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
166 Subtarget.setPICStyle(PICStyles::None);
167 } else if (Subtarget.is64Bit()) {
168 // PIC in 64 bit mode is always rip-rel.
169 Subtarget.setPICStyle(PICStyles::RIPRel);
170 } else if (Subtarget.isTargetCygMing()) {
171 Subtarget.setPICStyle(PICStyles::None);
172 } else if (Subtarget.isTargetDarwin()) {
173 if (getRelocationModel() == Reloc::PIC_)
174 Subtarget.setPICStyle(PICStyles::StubPIC);
176 assert(getRelocationModel() == Reloc::DynamicNoPIC);
177 Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
179 } else if (Subtarget.isTargetELF()) {
180 Subtarget.setPICStyle(PICStyles::GOT);
183 // Finally, if we have "none" as our PIC style, force to static mode.
184 if (Subtarget.getPICStyle() == PICStyles::None)
185 setRelocationModel(Reloc::Static);
188 //===----------------------------------------------------------------------===//
189 // Pass Pipeline Configuration
190 //===----------------------------------------------------------------------===//
192 bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
193 CodeGenOpt::Level OptLevel) {
194 // Install an instruction selector.
195 PM.add(createX86ISelDag(*this, OptLevel));
197 // For 32-bit, prepend instructions to set the "global base reg" for PIC.
198 if (!Subtarget.is64Bit())
199 PM.add(createGlobalBaseRegPass());
204 bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
205 CodeGenOpt::Level OptLevel) {
206 PM.add(createX86MaxStackAlignmentHeuristicPass());
207 return false; // -print-machineinstr shouldn't print after this.
210 bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
211 CodeGenOpt::Level OptLevel) {
212 PM.add(createX86FloatingPointStackifierPass());
213 return true; // -print-machineinstr should print after this.
216 bool X86TargetMachine::addPreEmitPass(PassManagerBase &PM,
217 CodeGenOpt::Level OptLevel) {
218 if (OptLevel != CodeGenOpt::None && Subtarget.hasSSE2()) {
219 PM.add(createSSEDomainFixPass());
225 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
226 CodeGenOpt::Level OptLevel,
227 JITCodeEmitter &JCE) {
228 // FIXME: Move this to TargetJITInfo!
229 // On Darwin, do not override 64-bit setting made in X86TargetMachine().
230 if (DefRelocModel == Reloc::Default &&
231 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
232 setRelocationModel(Reloc::Static);
233 Subtarget.setPICStyle(PICStyles::None);
237 PM.add(createX86JITCodeEmitterPass(*this, JCE));
242 void X86TargetMachine::setCodeModelForStatic() {
244 if (getCodeModel() != CodeModel::Default) return;
246 // For static codegen, if we're not already set, use Small codegen.
247 setCodeModel(CodeModel::Small);
251 void X86TargetMachine::setCodeModelForJIT() {
253 if (getCodeModel() != CodeModel::Default) return;
255 // 64-bit JIT places everything in the same buffer except external functions.
256 if (Subtarget.is64Bit())
257 setCodeModel(CodeModel::Large);
259 setCodeModel(CodeModel::Small);