1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86MCAsmInfo.h"
15 #include "X86TargetMachine.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/MC/MCCodeEmitter.h"
21 #include "llvm/MC/MCStreamer.h"
22 #include "llvm/Support/FormattedStream.h"
23 #include "llvm/Target/TargetOptions.h"
24 #include "llvm/Target/TargetRegistry.h"
27 static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
29 switch (TheTriple.getOS()) {
31 return new X86MCAsmInfoDarwin(TheTriple);
36 return new X86MCAsmInfoCOFF(TheTriple);
38 return new X86ELFMCAsmInfo(TheTriple);
42 static MCStreamer *createMCStreamer(const Target &T, const std::string &TT,
43 MCContext &Ctx, TargetAsmBackend &TAB,
45 MCCodeEmitter *_Emitter,
48 switch (TheTriple.getOS()) {
50 return createWinCOFFStreamer(Ctx, TAB, *_Emitter, _OS, RelaxAll);
52 return createMachOStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
56 extern "C" void LLVMInitializeX86Target() {
57 // Register the target.
58 RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target);
59 RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
61 // Register the target asm info.
62 RegisterAsmInfoFn A(TheX86_32Target, createMCAsmInfo);
63 RegisterAsmInfoFn B(TheX86_64Target, createMCAsmInfo);
65 // Register the code emitter.
66 TargetRegistry::RegisterCodeEmitter(TheX86_32Target,
67 createX86_32MCCodeEmitter);
68 TargetRegistry::RegisterCodeEmitter(TheX86_64Target,
69 createX86_64MCCodeEmitter);
71 // Register the asm backend.
72 TargetRegistry::RegisterAsmBackend(TheX86_32Target,
73 createX86_32AsmBackend);
74 TargetRegistry::RegisterAsmBackend(TheX86_64Target,
75 createX86_64AsmBackend);
77 // Register the object streamer.
78 TargetRegistry::RegisterObjectStreamer(TheX86_32Target,
80 TargetRegistry::RegisterObjectStreamer(TheX86_64Target,
85 X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
86 const std::string &FS)
87 : X86TargetMachine(T, TT, FS, false) {
91 X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
92 const std::string &FS)
93 : X86TargetMachine(T, TT, FS, true) {
96 /// X86TargetMachine ctor - Create an X86 target.
98 X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
99 const std::string &FS, bool is64Bit)
100 : LLVMTargetMachine(T, TT),
101 Subtarget(TT, FS, is64Bit),
102 DataLayout(Subtarget.getDataLayout()),
103 FrameInfo(TargetFrameInfo::StackGrowsDown,
104 Subtarget.getStackAlignment(),
105 (Subtarget.isTargetWin64() ? -40 :
106 (Subtarget.is64Bit() ? -8 : -4))),
107 InstrInfo(*this), JITInfo(*this), TLInfo(*this), TSInfo(*this),
108 ELFWriterInfo(*this) {
109 DefRelocModel = getRelocationModel();
111 // If no relocation model was picked, default as appropriate for the target.
112 if (getRelocationModel() == Reloc::Default) {
113 if (!Subtarget.isTargetDarwin())
114 setRelocationModel(Reloc::Static);
115 else if (Subtarget.is64Bit())
116 setRelocationModel(Reloc::PIC_);
118 setRelocationModel(Reloc::DynamicNoPIC);
121 assert(getRelocationModel() != Reloc::Default &&
122 "Relocation mode not picked");
124 // ELF and X86-64 don't have a distinct DynamicNoPIC model. DynamicNoPIC
125 // is defined as a model for code which may be used in static or dynamic
126 // executables but not necessarily a shared library. On X86-32 we just
127 // compile in -static mode, in x86-64 we use PIC.
128 if (getRelocationModel() == Reloc::DynamicNoPIC) {
130 setRelocationModel(Reloc::PIC_);
131 else if (!Subtarget.isTargetDarwin())
132 setRelocationModel(Reloc::Static);
135 // If we are on Darwin, disallow static relocation model in X86-64 mode, since
136 // the Mach-O file format doesn't support it.
137 if (getRelocationModel() == Reloc::Static &&
138 Subtarget.isTargetDarwin() &&
140 setRelocationModel(Reloc::PIC_);
142 // Determine the PICStyle based on the target selected.
143 if (getRelocationModel() == Reloc::Static) {
144 // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
145 Subtarget.setPICStyle(PICStyles::None);
146 } else if (Subtarget.isTargetCygMing()) {
147 Subtarget.setPICStyle(PICStyles::None);
148 } else if (Subtarget.isTargetDarwin()) {
149 if (Subtarget.is64Bit())
150 Subtarget.setPICStyle(PICStyles::RIPRel);
151 else if (getRelocationModel() == Reloc::PIC_)
152 Subtarget.setPICStyle(PICStyles::StubPIC);
154 assert(getRelocationModel() == Reloc::DynamicNoPIC);
155 Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
157 } else if (Subtarget.isTargetELF()) {
158 if (Subtarget.is64Bit())
159 Subtarget.setPICStyle(PICStyles::RIPRel);
161 Subtarget.setPICStyle(PICStyles::GOT);
164 // Finally, if we have "none" as our PIC style, force to static mode.
165 if (Subtarget.getPICStyle() == PICStyles::None)
166 setRelocationModel(Reloc::Static);
169 //===----------------------------------------------------------------------===//
170 // Pass Pipeline Configuration
171 //===----------------------------------------------------------------------===//
173 bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
174 CodeGenOpt::Level OptLevel) {
175 // Install an instruction selector.
176 PM.add(createX86ISelDag(*this, OptLevel));
178 // For 32-bit, prepend instructions to set the "global base reg" for PIC.
179 if (!Subtarget.is64Bit())
180 PM.add(createGlobalBaseRegPass());
185 bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
186 CodeGenOpt::Level OptLevel) {
187 PM.add(createX86MaxStackAlignmentHeuristicPass());
188 return false; // -print-machineinstr shouldn't print after this.
191 bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
192 CodeGenOpt::Level OptLevel) {
193 PM.add(createX86FloatingPointStackifierPass());
194 return true; // -print-machineinstr should print after this.
197 bool X86TargetMachine::addPreEmitPass(PassManagerBase &PM,
198 CodeGenOpt::Level OptLevel) {
199 if (OptLevel != CodeGenOpt::None && Subtarget.hasSSE2()) {
200 PM.add(createSSEDomainFixPass());
206 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
207 CodeGenOpt::Level OptLevel,
208 JITCodeEmitter &JCE) {
209 // FIXME: Move this to TargetJITInfo!
210 // On Darwin, do not override 64-bit setting made in X86TargetMachine().
211 if (DefRelocModel == Reloc::Default &&
212 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
213 setRelocationModel(Reloc::Static);
214 Subtarget.setPICStyle(PICStyles::None);
218 PM.add(createX86JITCodeEmitterPass(*this, JCE));
223 void X86TargetMachine::setCodeModelForStatic() {
225 if (getCodeModel() != CodeModel::Default) return;
227 // For static codegen, if we're not already set, use Small codegen.
228 setCodeModel(CodeModel::Small);
232 void X86TargetMachine::setCodeModelForJIT() {
234 if (getCodeModel() != CodeModel::Default) return;
236 // 64-bit JIT places everything in the same buffer except external functions.
237 if (Subtarget.is64Bit())
238 setCodeModel(CodeModel::Large);
240 setCodeModel(CodeModel::Small);