1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86TargetMachine.h"
16 #include "llvm/CodeGen/Passes.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/Support/CommandLine.h"
19 #include "llvm/Support/FormattedStream.h"
20 #include "llvm/Support/TargetRegistry.h"
21 #include "llvm/Target/TargetOptions.h"
24 extern "C" void LLVMInitializeX86Target() {
25 // Register the target.
26 RegisterTargetMachine<X86TargetMachine> X(TheX86_32Target);
27 RegisterTargetMachine<X86TargetMachine> Y(TheX86_64Target);
30 void X86TargetMachine::anchor() { }
32 /// X86TargetMachine ctor - Create an X86 target.
34 X86TargetMachine::X86TargetMachine(const Target &T, StringRef TT, StringRef CPU,
35 StringRef FS, const TargetOptions &Options,
36 Reloc::Model RM, CodeModel::Model CM,
38 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
39 Subtarget(TT, CPU, FS, *this, Options.StackAlignmentOverride) {
40 // default to hard float ABI
41 if (Options.FloatABIType == FloatABI::Default)
42 this->Options.FloatABIType = FloatABI::Hard;
44 // Windows stack unwinder gets confused when execution flow "falls through"
45 // after a call to 'noreturn' function.
46 // To prevent that, we emit a trap for 'unreachable' IR instructions.
47 // (which on X86, happens to be the 'ud2' instruction)
48 if (Subtarget.isTargetWin64())
49 this->Options.TrapUnreachable = true;
54 //===----------------------------------------------------------------------===//
55 // Command line options for x86
56 //===----------------------------------------------------------------------===//
58 UseVZeroUpper("x86-use-vzeroupper", cl::Hidden,
59 cl::desc("Minimize AVX to SSE transition penalty"),
62 //===----------------------------------------------------------------------===//
63 // X86 Analysis Pass Setup
64 //===----------------------------------------------------------------------===//
66 void X86TargetMachine::addAnalysisPasses(PassManagerBase &PM) {
67 // Add first the target-independent BasicTTI pass, then our X86 pass. This
68 // allows the X86 pass to delegate to the target independent layer when
70 PM.add(createBasicTargetTransformInfoPass(this));
71 PM.add(createX86TargetTransformInfoPass(this));
75 //===----------------------------------------------------------------------===//
76 // Pass Pipeline Configuration
77 //===----------------------------------------------------------------------===//
80 /// X86 Code Generator Pass Configuration Options.
81 class X86PassConfig : public TargetPassConfig {
83 X86PassConfig(X86TargetMachine *TM, PassManagerBase &PM)
84 : TargetPassConfig(TM, PM) {}
86 X86TargetMachine &getX86TargetMachine() const {
87 return getTM<X86TargetMachine>();
90 const X86Subtarget &getX86Subtarget() const {
91 return *getX86TargetMachine().getSubtargetImpl();
94 void addIRPasses() override;
95 bool addInstSelector() override;
96 bool addILPOpts() override;
97 bool addPreRegAlloc() override;
98 bool addPostRegAlloc() override;
99 bool addPreEmitPass() override;
103 TargetPassConfig *X86TargetMachine::createPassConfig(PassManagerBase &PM) {
104 return new X86PassConfig(this, PM);
107 void X86PassConfig::addIRPasses() {
108 addPass(createX86AtomicExpandPass(&getX86TargetMachine()));
110 TargetPassConfig::addIRPasses();
113 bool X86PassConfig::addInstSelector() {
114 // Install an instruction selector.
115 addPass(createX86ISelDag(getX86TargetMachine(), getOptLevel()));
117 // For ELF, cleanup any local-dynamic TLS accesses.
118 if (getX86Subtarget().isTargetELF() && getOptLevel() != CodeGenOpt::None)
119 addPass(createCleanupLocalDynamicTLSPass());
121 addPass(createX86GlobalBaseRegPass());
126 bool X86PassConfig::addILPOpts() {
127 addPass(&EarlyIfConverterID);
131 bool X86PassConfig::addPreRegAlloc() {
132 return false; // -print-machineinstr shouldn't print after this.
135 bool X86PassConfig::addPostRegAlloc() {
136 addPass(createX86FloatingPointStackifierPass());
137 return true; // -print-machineinstr should print after this.
140 bool X86PassConfig::addPreEmitPass() {
141 bool ShouldPrint = false;
142 if (getOptLevel() != CodeGenOpt::None && getX86Subtarget().hasSSE2()) {
143 addPass(createExecutionDependencyFixPass(&X86::VR128RegClass));
148 addPass(createX86IssueVZeroUpperPass());
152 if (getOptLevel() != CodeGenOpt::None) {
153 addPass(createX86PadShortFunctions());
154 addPass(createX86FixupLEAs());