1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86MCAsmInfo.h"
15 #include "X86TargetMachine.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/MC/MCCodeEmitter.h"
21 #include "llvm/MC/MCStreamer.h"
22 #include "llvm/Support/FormattedStream.h"
23 #include "llvm/Target/TargetOptions.h"
24 #include "llvm/Target/TargetRegistry.h"
27 static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
29 switch (TheTriple.getOS()) {
31 return new X86MCAsmInfoDarwin(TheTriple);
36 if (TheTriple.getEnvironment() == Triple::MachO)
37 return new X86MCAsmInfoDarwin(TheTriple);
39 return new X86MCAsmInfoCOFF(TheTriple);
41 return new X86ELFMCAsmInfo(TheTriple);
45 static MCStreamer *createMCStreamer(const Target &T, const std::string &TT,
46 MCContext &Ctx, TargetAsmBackend &TAB,
48 MCCodeEmitter *_Emitter,
52 switch (TheTriple.getOS()) {
54 return createMachOStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
59 if (TheTriple.getEnvironment() == Triple::MachO)
60 return createMachOStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
62 return createWinCOFFStreamer(Ctx, TAB, *_Emitter, _OS, RelaxAll);
64 return createELFStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll, NoExecStack);
68 extern "C" void LLVMInitializeX86Target() {
69 // Register the target.
70 RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target);
71 RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
73 // Register the target asm info.
74 RegisterAsmInfoFn A(TheX86_32Target, createMCAsmInfo);
75 RegisterAsmInfoFn B(TheX86_64Target, createMCAsmInfo);
77 // Register the code emitter.
78 TargetRegistry::RegisterCodeEmitter(TheX86_32Target,
79 createX86_32MCCodeEmitter);
80 TargetRegistry::RegisterCodeEmitter(TheX86_64Target,
81 createX86_64MCCodeEmitter);
83 // Register the asm backend.
84 TargetRegistry::RegisterAsmBackend(TheX86_32Target,
85 createX86_32AsmBackend);
86 TargetRegistry::RegisterAsmBackend(TheX86_64Target,
87 createX86_64AsmBackend);
89 // Register the object streamer.
90 TargetRegistry::RegisterObjectStreamer(TheX86_32Target,
92 TargetRegistry::RegisterObjectStreamer(TheX86_64Target,
97 X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
98 const std::string &FS)
99 : X86TargetMachine(T, TT, FS, false),
100 DataLayout(getSubtargetImpl()->isTargetDarwin() ?
101 "e-p:32:32-f64:32:64-i64:32:64-f80:128:128-n8:16:32" :
102 (getSubtargetImpl()->isTargetCygMing() ||
103 getSubtargetImpl()->isTargetWindows()) ?
104 "e-p:32:32-f64:64:64-i64:64:64-f80:32:32-n8:16:32" :
105 "e-p:32:32-f64:32:64-i64:32:64-f80:32:32-n8:16:32"),
113 X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
114 const std::string &FS)
115 : X86TargetMachine(T, TT, FS, true),
116 DataLayout("e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-n8:16:32:64"),
123 /// X86TargetMachine ctor - Create an X86 target.
125 X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
126 const std::string &FS, bool is64Bit)
127 : LLVMTargetMachine(T, TT),
128 Subtarget(TT, FS, is64Bit),
129 FrameLowering(*this, Subtarget),
130 ELFWriterInfo(is64Bit, true) {
131 DefRelocModel = getRelocationModel();
133 // If no relocation model was picked, default as appropriate for the target.
134 if (getRelocationModel() == Reloc::Default) {
135 // Darwin defaults to PIC in 64 bit mode and dynamic-no-pic in 32 bit mode.
136 // Win64 requires rip-rel addressing, thus we force it to PIC. Otherwise we
137 // use static relocation model by default.
138 if (Subtarget.isTargetDarwin()) {
139 if (Subtarget.is64Bit())
140 setRelocationModel(Reloc::PIC_);
142 setRelocationModel(Reloc::DynamicNoPIC);
143 } else if (Subtarget.isTargetWin64())
144 setRelocationModel(Reloc::PIC_);
146 setRelocationModel(Reloc::Static);
149 assert(getRelocationModel() != Reloc::Default &&
150 "Relocation mode not picked");
152 // ELF and X86-64 don't have a distinct DynamicNoPIC model. DynamicNoPIC
153 // is defined as a model for code which may be used in static or dynamic
154 // executables but not necessarily a shared library. On X86-32 we just
155 // compile in -static mode, in x86-64 we use PIC.
156 if (getRelocationModel() == Reloc::DynamicNoPIC) {
158 setRelocationModel(Reloc::PIC_);
159 else if (!Subtarget.isTargetDarwin())
160 setRelocationModel(Reloc::Static);
163 // If we are on Darwin, disallow static relocation model in X86-64 mode, since
164 // the Mach-O file format doesn't support it.
165 if (getRelocationModel() == Reloc::Static &&
166 Subtarget.isTargetDarwin() &&
168 setRelocationModel(Reloc::PIC_);
170 // Determine the PICStyle based on the target selected.
171 if (getRelocationModel() == Reloc::Static) {
172 // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
173 Subtarget.setPICStyle(PICStyles::None);
174 } else if (Subtarget.is64Bit()) {
175 // PIC in 64 bit mode is always rip-rel.
176 Subtarget.setPICStyle(PICStyles::RIPRel);
177 } else if (Subtarget.isTargetCygMing()) {
178 Subtarget.setPICStyle(PICStyles::None);
179 } else if (Subtarget.isTargetDarwin()) {
180 if (getRelocationModel() == Reloc::PIC_)
181 Subtarget.setPICStyle(PICStyles::StubPIC);
183 assert(getRelocationModel() == Reloc::DynamicNoPIC);
184 Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
186 } else if (Subtarget.isTargetELF()) {
187 Subtarget.setPICStyle(PICStyles::GOT);
190 // Finally, if we have "none" as our PIC style, force to static mode.
191 if (Subtarget.getPICStyle() == PICStyles::None)
192 setRelocationModel(Reloc::Static);
195 //===----------------------------------------------------------------------===//
196 // Pass Pipeline Configuration
197 //===----------------------------------------------------------------------===//
199 bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
200 CodeGenOpt::Level OptLevel) {
201 // Install an instruction selector.
202 PM.add(createX86ISelDag(*this, OptLevel));
204 // For 32-bit, prepend instructions to set the "global base reg" for PIC.
205 if (!Subtarget.is64Bit())
206 PM.add(createGlobalBaseRegPass());
211 bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
212 CodeGenOpt::Level OptLevel) {
213 PM.add(createX86MaxStackAlignmentHeuristicPass());
214 return false; // -print-machineinstr shouldn't print after this.
217 bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
218 CodeGenOpt::Level OptLevel) {
219 PM.add(createX86FloatingPointStackifierPass());
220 return true; // -print-machineinstr should print after this.
223 bool X86TargetMachine::addPreEmitPass(PassManagerBase &PM,
224 CodeGenOpt::Level OptLevel) {
225 if (OptLevel != CodeGenOpt::None && Subtarget.hasSSE2()) {
226 PM.add(createSSEDomainFixPass());
232 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
233 CodeGenOpt::Level OptLevel,
234 JITCodeEmitter &JCE) {
235 // FIXME: Move this to TargetJITInfo!
236 // On Darwin, do not override 64-bit setting made in X86TargetMachine().
237 if (DefRelocModel == Reloc::Default &&
238 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
239 setRelocationModel(Reloc::Static);
240 Subtarget.setPICStyle(PICStyles::None);
244 PM.add(createX86JITCodeEmitterPass(*this, JCE));
249 void X86TargetMachine::setCodeModelForStatic() {
251 if (getCodeModel() != CodeModel::Default) return;
253 // For static codegen, if we're not already set, use Small codegen.
254 setCodeModel(CodeModel::Small);
258 void X86TargetMachine::setCodeModelForJIT() {
260 if (getCodeModel() != CodeModel::Default) return;
262 // 64-bit JIT places everything in the same buffer except external functions.
263 if (Subtarget.is64Bit())
264 setCodeModel(CodeModel::Large);
266 setCodeModel(CodeModel::Small);