1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86MCAsmInfo.h"
15 #include "X86TargetMachine.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/MC/MCCodeEmitter.h"
21 #include "llvm/MC/MCStreamer.h"
22 #include "llvm/Support/FormattedStream.h"
23 #include "llvm/Target/TargetOptions.h"
24 #include "llvm/Target/TargetRegistry.h"
27 static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
29 switch (TheTriple.getOS()) {
31 return new X86MCAsmInfoDarwin(TheTriple);
36 return new X86MCAsmInfoCOFF(TheTriple);
38 return new X86ELFMCAsmInfo(TheTriple);
42 static MCStreamer *createMCStreamer(const Target &T, const std::string &TT,
43 MCContext &Ctx, TargetAsmBackend &TAB,
45 MCCodeEmitter *_Emitter,
48 switch (TheTriple.getOS()) {
50 return createMachOStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
55 return createWinCOFFStreamer(Ctx, TAB, *_Emitter, _OS, RelaxAll);
57 return createELFStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
61 extern "C" void LLVMInitializeX86Target() {
62 // Register the target.
63 RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target);
64 RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
66 // Register the target asm info.
67 RegisterAsmInfoFn A(TheX86_32Target, createMCAsmInfo);
68 RegisterAsmInfoFn B(TheX86_64Target, createMCAsmInfo);
70 // Register the code emitter.
71 TargetRegistry::RegisterCodeEmitter(TheX86_32Target,
72 createX86_32MCCodeEmitter);
73 TargetRegistry::RegisterCodeEmitter(TheX86_64Target,
74 createX86_64MCCodeEmitter);
76 // Register the asm backend.
77 TargetRegistry::RegisterAsmBackend(TheX86_32Target,
78 createX86_32AsmBackend);
79 TargetRegistry::RegisterAsmBackend(TheX86_64Target,
80 createX86_64AsmBackend);
82 // Register the object streamer.
83 TargetRegistry::RegisterObjectStreamer(TheX86_32Target,
85 TargetRegistry::RegisterObjectStreamer(TheX86_64Target,
90 X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
91 const std::string &FS)
92 : X86TargetMachine(T, TT, FS, false) {
96 X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
97 const std::string &FS)
98 : X86TargetMachine(T, TT, FS, true) {
101 /// X86TargetMachine ctor - Create an X86 target.
103 X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
104 const std::string &FS, bool is64Bit)
105 : LLVMTargetMachine(T, TT),
106 Subtarget(TT, FS, is64Bit),
107 DataLayout(Subtarget.getDataLayout()),
108 FrameInfo(TargetFrameInfo::StackGrowsDown,
109 Subtarget.getStackAlignment(),
110 (Subtarget.isTargetWin64() ? -40 :
111 (Subtarget.is64Bit() ? -8 : -4))),
112 InstrInfo(*this), JITInfo(*this), TLInfo(*this), TSInfo(*this),
113 ELFWriterInfo(*this) {
114 DefRelocModel = getRelocationModel();
116 // If no relocation model was picked, default as appropriate for the target.
117 if (getRelocationModel() == Reloc::Default) {
118 if (!Subtarget.isTargetDarwin())
119 setRelocationModel(Reloc::Static);
120 else if (Subtarget.is64Bit())
121 setRelocationModel(Reloc::PIC_);
123 setRelocationModel(Reloc::DynamicNoPIC);
126 assert(getRelocationModel() != Reloc::Default &&
127 "Relocation mode not picked");
129 // ELF and X86-64 don't have a distinct DynamicNoPIC model. DynamicNoPIC
130 // is defined as a model for code which may be used in static or dynamic
131 // executables but not necessarily a shared library. On X86-32 we just
132 // compile in -static mode, in x86-64 we use PIC.
133 if (getRelocationModel() == Reloc::DynamicNoPIC) {
135 setRelocationModel(Reloc::PIC_);
136 else if (!Subtarget.isTargetDarwin())
137 setRelocationModel(Reloc::Static);
140 // If we are on Darwin, disallow static relocation model in X86-64 mode, since
141 // the Mach-O file format doesn't support it.
142 if (getRelocationModel() == Reloc::Static &&
143 Subtarget.isTargetDarwin() &&
145 setRelocationModel(Reloc::PIC_);
147 // Determine the PICStyle based on the target selected.
148 if (getRelocationModel() == Reloc::Static) {
149 // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
150 Subtarget.setPICStyle(PICStyles::None);
151 } else if (Subtarget.isTargetCygMing()) {
152 Subtarget.setPICStyle(PICStyles::None);
153 } else if (Subtarget.isTargetDarwin()) {
154 if (Subtarget.is64Bit())
155 Subtarget.setPICStyle(PICStyles::RIPRel);
156 else if (getRelocationModel() == Reloc::PIC_)
157 Subtarget.setPICStyle(PICStyles::StubPIC);
159 assert(getRelocationModel() == Reloc::DynamicNoPIC);
160 Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
162 } else if (Subtarget.isTargetELF()) {
163 if (Subtarget.is64Bit())
164 Subtarget.setPICStyle(PICStyles::RIPRel);
166 Subtarget.setPICStyle(PICStyles::GOT);
169 // Finally, if we have "none" as our PIC style, force to static mode.
170 if (Subtarget.getPICStyle() == PICStyles::None)
171 setRelocationModel(Reloc::Static);
174 //===----------------------------------------------------------------------===//
175 // Pass Pipeline Configuration
176 //===----------------------------------------------------------------------===//
178 bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
179 CodeGenOpt::Level OptLevel) {
180 // Install an instruction selector.
181 PM.add(createX86ISelDag(*this, OptLevel));
183 // For 32-bit, prepend instructions to set the "global base reg" for PIC.
184 if (!Subtarget.is64Bit())
185 PM.add(createGlobalBaseRegPass());
190 bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
191 CodeGenOpt::Level OptLevel) {
192 PM.add(createX86MaxStackAlignmentHeuristicPass());
193 return false; // -print-machineinstr shouldn't print after this.
196 bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
197 CodeGenOpt::Level OptLevel) {
198 PM.add(createX86FloatingPointStackifierPass());
199 return true; // -print-machineinstr should print after this.
202 bool X86TargetMachine::addPreEmitPass(PassManagerBase &PM,
203 CodeGenOpt::Level OptLevel) {
204 if (OptLevel != CodeGenOpt::None && Subtarget.hasSSE2()) {
205 PM.add(createSSEDomainFixPass());
211 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
212 CodeGenOpt::Level OptLevel,
213 JITCodeEmitter &JCE) {
214 // FIXME: Move this to TargetJITInfo!
215 // On Darwin, do not override 64-bit setting made in X86TargetMachine().
216 if (DefRelocModel == Reloc::Default &&
217 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
218 setRelocationModel(Reloc::Static);
219 Subtarget.setPICStyle(PICStyles::None);
223 PM.add(createX86JITCodeEmitterPass(*this, JCE));
228 void X86TargetMachine::setCodeModelForStatic() {
230 if (getCodeModel() != CodeModel::Default) return;
232 // For static codegen, if we're not already set, use Small codegen.
233 setCodeModel(CodeModel::Small);
237 void X86TargetMachine::setCodeModelForJIT() {
239 if (getCodeModel() != CodeModel::Default) return;
241 // 64-bit JIT places everything in the same buffer except external functions.
242 if (Subtarget.is64Bit())
243 setCodeModel(CodeModel::Large);
245 setCodeModel(CodeModel::Small);