1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86TargetMachine.h"
16 #include "llvm/Module.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/IntrinsicLowering.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/Target/TargetOptions.h"
22 #include "llvm/Target/TargetMachineRegistry.h"
23 #include "llvm/Transforms/Scalar.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/ADT/Statistic.h"
29 /// X86TargetMachineModule - Note that this is used on hosts that cannot link
30 /// in a library unless there are references into the library. In particular,
31 /// it seems that it is not possible to get things to work on Win32 without
32 /// this. Though it is unused, do not remove it.
33 extern "C" int X86TargetMachineModule;
34 int X86TargetMachineModule = 0;
37 cl::opt<bool> DisableOutput("disable-x86-llc-output", cl::Hidden,
38 cl::desc("Disable the X86 asm printer, for use "
39 "when profiling the code generator."));
41 // Register the target.
42 RegisterTarget<X86TargetMachine> X("x86", " IA-32 (Pentium and above)");
45 unsigned X86TargetMachine::getJITMatchQuality() {
46 #if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
53 unsigned X86TargetMachine::getModuleMatchQuality(const Module &M) {
54 // We strongly match "i[3-9]86-*".
55 std::string TT = M.getTargetTriple();
56 if (TT.size() >= 5 && TT[0] == 'i' && TT[2] == '8' && TT[3] == '6' &&
57 TT[4] == '-' && TT[1] - '3' < 6)
60 if (M.getEndianness() == Module::LittleEndian &&
61 M.getPointerSize() == Module::Pointer32)
62 return 10; // Weak match
63 else if (M.getEndianness() != Module::AnyEndianness ||
64 M.getPointerSize() != Module::AnyPointerSize)
65 return 0; // Match for some other target
67 return getJITMatchQuality()/2;
70 /// X86TargetMachine ctor - Create an ILP32 architecture model
72 X86TargetMachine::X86TargetMachine(const Module &M,
73 IntrinsicLowering *IL,
74 const std::string &FS)
75 : TargetMachine("X86", IL, true, 4, 4, 4, 4, 4),
77 FrameInfo(TargetFrameInfo::StackGrowsDown,
78 Subtarget.getStackAlignment(), -4),
79 JITInfo(*this), TLInfo(*this) {
80 if (getRelocationModel() == Reloc::Default)
81 if (Subtarget.isTargetDarwin())
82 setRelocationModel(Reloc::DynamicNoPIC);
84 setRelocationModel(Reloc::PIC);
88 // addPassesToEmitFile - We currently use all of the same passes as the JIT
89 // does to emit statically compiled machine code.
90 bool X86TargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
91 CodeGenFileType FileType,
93 if (FileType != TargetMachine::AssemblyFile &&
94 FileType != TargetMachine::ObjectFile) return true;
96 // Run loop strength reduction before anything else.
97 PM.add(createLoopStrengthReducePass(&TLInfo));
99 // FIXME: Implement efficient support for garbage collection intrinsics.
100 PM.add(createLowerGCPass());
102 // FIXME: Implement the invoke/unwind instructions!
103 PM.add(createLowerInvokePass());
105 // FIXME: Implement the switch instruction in the instruction selector!
106 PM.add(createLowerSwitchPass());
108 // Make sure that no unreachable blocks are instruction selected.
109 PM.add(createUnreachableBlockEliminationPass());
111 // Install an instruction selector.
112 PM.add(createX86ISelDag(*this));
114 // Print the instruction selected machine code...
115 if (PrintMachineCode)
116 PM.add(createMachineFunctionPrinterPass(&std::cerr));
118 // Perform register allocation to convert to a concrete x86 representation
119 PM.add(createRegisterAllocator());
121 if (PrintMachineCode)
122 PM.add(createMachineFunctionPrinterPass(&std::cerr));
124 PM.add(createX86FloatingPointStackifierPass());
126 if (PrintMachineCode)
127 PM.add(createMachineFunctionPrinterPass(&std::cerr));
129 // Insert prolog/epilog code. Eliminate abstract frame index references...
130 PM.add(createPrologEpilogCodeInserter());
132 if (PrintMachineCode) // Print the register-allocated code
133 PM.add(createX86CodePrinterPass(std::cerr, *this));
138 assert(0 && "Unexpected filetype here!");
139 case TargetMachine::AssemblyFile:
140 PM.add(createX86CodePrinterPass(Out, *this));
142 case TargetMachine::ObjectFile:
143 // FIXME: We only support emission of ELF files for now, this should check
144 // the target triple and decide on the format to write (e.g. COFF on
146 addX86ELFObjectWriterPass(PM, Out, *this);
150 // Delete machine code for this function
151 PM.add(createMachineCodeDeleter());
153 return false; // success!
156 /// addPassesToJITCompile - Add passes to the specified pass manager to
157 /// implement a fast dynamic compiler for this target. Return true if this is
158 /// not supported for this target.
160 void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
161 // The JIT should use static relocation model.
162 TM.setRelocationModel(Reloc::Static);
164 // Run loop strength reduction before anything else.
165 PM.add(createLoopStrengthReducePass(TM.getTargetLowering()));
167 // FIXME: Implement efficient support for garbage collection intrinsics.
168 PM.add(createLowerGCPass());
170 // FIXME: Implement the invoke/unwind instructions!
171 PM.add(createLowerInvokePass());
173 // FIXME: Implement the switch instruction in the instruction selector!
174 PM.add(createLowerSwitchPass());
176 // Make sure that no unreachable blocks are instruction selected.
177 PM.add(createUnreachableBlockEliminationPass());
179 // Install an instruction selector.
180 PM.add(createX86ISelDag(TM));
182 // Print the instruction selected machine code...
183 if (PrintMachineCode)
184 PM.add(createMachineFunctionPrinterPass(&std::cerr));
186 // Perform register allocation to convert to a concrete x86 representation
187 PM.add(createRegisterAllocator());
189 if (PrintMachineCode)
190 PM.add(createMachineFunctionPrinterPass(&std::cerr));
192 PM.add(createX86FloatingPointStackifierPass());
194 if (PrintMachineCode)
195 PM.add(createMachineFunctionPrinterPass(&std::cerr));
197 // Insert prolog/epilog code. Eliminate abstract frame index references...
198 PM.add(createPrologEpilogCodeInserter());
200 if (PrintMachineCode) // Print the register-allocated code
201 PM.add(createX86CodePrinterPass(std::cerr, TM));
204 bool X86TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
205 MachineCodeEmitter &MCE) {
206 PM.add(createX86CodeEmitterPass(MCE));
207 // Delete machine code for this function
208 PM.add(createMachineCodeDeleter());