1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // This file defines the X86 specific subclass of TargetMachine.
5 //===----------------------------------------------------------------------===//
7 #include "X86TargetMachine.h"
9 #include "llvm/Module.h"
10 #include "llvm/PassManager.h"
11 #include "llvm/Target/TargetMachineImpls.h"
12 #include "llvm/CodeGen/MachineFunction.h"
13 #include "llvm/CodeGen/Passes.h"
14 #include "llvm/Transforms/Scalar.h"
15 #include "Support/CommandLine.h"
16 #include "Support/Statistic.h"
19 cl::opt<bool> PrintCode("print-machineinstrs",
20 cl::desc("Print generated machine code"));
21 cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true),
22 cl::desc("Use the 'simple' X86 instruction selector"));
25 // allocateX86TargetMachine - Allocate and return a subclass of TargetMachine
26 // that implements the X86 backend.
28 TargetMachine *allocateX86TargetMachine(const Module &M) {
29 return new X86TargetMachine(M);
33 /// X86TargetMachine ctor - Create an ILP32 architecture model
35 X86TargetMachine::X86TargetMachine(const Module &M)
36 : TargetMachine("X86",
37 M.getEndianness() != Module::BigEndian,
38 M.getPointerSize() != Module::Pointer64 ? 4 : 8,
39 M.getPointerSize() != Module::Pointer64 ? 4 : 8,
40 M.getPointerSize() != Module::Pointer64 ? 4 : 8,
41 4, M.getPointerSize() != Module::Pointer64 ? 4 : 8),
42 FrameInfo(TargetFrameInfo::StackGrowsDown, 8/*16 for SSE*/, 4) {
46 // addPassesToEmitAssembly - We currently use all of the same passes as the JIT
47 // does to emit statically compiled machine code.
48 bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
50 // FIXME: Implement the switch instruction in the instruction selector!
51 PM.add(createLowerSwitchPass());
54 PM.add(createX86SimpleInstructionSelector(*this));
56 PM.add(createX86PatternInstructionSelector(*this));
58 // TODO: optional optimizations go here
60 // FIXME: Add SSA based peephole optimizer here.
62 // Print the instruction selected machine code...
64 PM.add(createMachineFunctionPrinterPass());
66 // Perform register allocation to convert to a concrete x86 representation
67 PM.add(createRegisterAllocator());
70 PM.add(createMachineFunctionPrinterPass());
72 PM.add(createX86FloatingPointStackifierPass());
75 PM.add(createMachineFunctionPrinterPass());
77 // Insert prolog/epilog code. Eliminate abstract frame index references...
78 PM.add(createPrologEpilogCodeInserter());
80 PM.add(createX86PeepholeOptimizerPass());
82 if (PrintCode) // Print the register-allocated code
83 PM.add(createX86CodePrinterPass(std::cerr, *this));
85 PM.add(createX86CodePrinterPass(Out, *this));
86 return false; // success!
89 /// addPassesToJITCompile - Add passes to the specified pass manager to
90 /// implement a fast dynamic compiler for this target. Return true if this is
91 /// not supported for this target.
93 bool X86TargetMachine::addPassesToJITCompile(FunctionPassManager &PM) {
94 // FIXME: Implement the switch instruction in the instruction selector!
95 PM.add(createLowerSwitchPass());
98 PM.add(createX86SimpleInstructionSelector(*this));
100 PM.add(createX86PatternInstructionSelector(*this));
102 // TODO: optional optimizations go here
104 // FIXME: Add SSA based peephole optimizer here.
106 // Print the instruction selected machine code...
108 PM.add(createMachineFunctionPrinterPass());
110 // Perform register allocation to convert to a concrete x86 representation
111 PM.add(createRegisterAllocator());
114 PM.add(createMachineFunctionPrinterPass());
116 PM.add(createX86FloatingPointStackifierPass());
119 PM.add(createMachineFunctionPrinterPass());
121 // Insert prolog/epilog code. Eliminate abstract frame index references...
122 PM.add(createPrologEpilogCodeInserter());
124 PM.add(createX86PeepholeOptimizerPass());
126 if (PrintCode) // Print the register-allocated code
127 PM.add(createX86CodePrinterPass(std::cerr, *this));
128 return false; // success!