1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86TargetMachine.h"
16 #include "llvm/Module.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/Target/TargetMachineImpls.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/Transforms/Scalar.h"
22 #include "Support/CommandLine.h"
23 #include "Support/Statistic.h"
28 cl::opt<bool> PrintCode("print-machineinstrs",
29 cl::desc("Print generated machine code"));
30 cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true),
31 cl::desc("Use the 'simple' X86 instruction selector"));
32 cl::opt<bool> NoSSAPeephole("disable-ssa-peephole", cl::init(true),
33 cl::desc("Disable the ssa-based peephole optimizer (defaults to disabled)"));
36 // allocateX86TargetMachine - Allocate and return a subclass of TargetMachine
37 // that implements the X86 backend.
39 TargetMachine *allocateX86TargetMachine(const Module &M) {
40 return new X86TargetMachine(M);
44 /// X86TargetMachine ctor - Create an ILP32 architecture model
46 X86TargetMachine::X86TargetMachine(const Module &M)
47 : TargetMachine("X86", true, 4, 4, 4, 4, 4),
48 FrameInfo(TargetFrameInfo::StackGrowsDown, 8/*16 for SSE*/, 4) {
52 // addPassesToEmitAssembly - We currently use all of the same passes as the JIT
53 // does to emit statically compiled machine code.
54 bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
56 // FIXME: Implement the switch instruction in the instruction selector!
57 PM.add(createLowerSwitchPass());
59 // FIXME: Implement the invoke/unwind instructions!
60 PM.add(createLowerInvokePass());
62 // FIXME: The code generator does not properly handle functions with
63 // unreachable basic blocks.
64 PM.add(createCFGSimplificationPass());
67 PM.add(createX86SimpleInstructionSelector(*this));
69 PM.add(createX86PatternInstructionSelector(*this));
71 // Run optional SSA-based machine code optimizations next...
73 PM.add(createX86SSAPeepholeOptimizerPass());
75 // Print the instruction selected machine code...
77 PM.add(createMachineFunctionPrinterPass());
79 // Perform register allocation to convert to a concrete x86 representation
80 PM.add(createRegisterAllocator());
83 PM.add(createMachineFunctionPrinterPass());
85 PM.add(createX86FloatingPointStackifierPass());
88 PM.add(createMachineFunctionPrinterPass());
90 // Insert prolog/epilog code. Eliminate abstract frame index references...
91 PM.add(createPrologEpilogCodeInserter());
93 PM.add(createX86PeepholeOptimizerPass());
95 if (PrintCode) // Print the register-allocated code
96 PM.add(createX86CodePrinterPass(std::cerr, *this));
98 PM.add(createX86CodePrinterPass(Out, *this));
99 return false; // success!
102 /// addPassesToJITCompile - Add passes to the specified pass manager to
103 /// implement a fast dynamic compiler for this target. Return true if this is
104 /// not supported for this target.
106 bool X86TargetMachine::addPassesToJITCompile(FunctionPassManager &PM) {
107 // FIXME: Implement the switch instruction in the instruction selector!
108 PM.add(createLowerSwitchPass());
110 // FIXME: Implement the invoke/unwind instructions!
111 PM.add(createLowerInvokePass());
113 // FIXME: The code generator does not properly handle functions with
114 // unreachable basic blocks.
115 PM.add(createCFGSimplificationPass());
118 PM.add(createX86SimpleInstructionSelector(*this));
120 PM.add(createX86PatternInstructionSelector(*this));
122 // Run optional SSA-based machine code optimizations next...
124 PM.add(createX86SSAPeepholeOptimizerPass());
126 // FIXME: Add SSA based peephole optimizer here.
128 // Print the instruction selected machine code...
130 PM.add(createMachineFunctionPrinterPass());
132 // Perform register allocation to convert to a concrete x86 representation
133 PM.add(createRegisterAllocator());
136 PM.add(createMachineFunctionPrinterPass());
138 PM.add(createX86FloatingPointStackifierPass());
141 PM.add(createMachineFunctionPrinterPass());
143 // Insert prolog/epilog code. Eliminate abstract frame index references...
144 PM.add(createPrologEpilogCodeInserter());
146 PM.add(createX86PeepholeOptimizerPass());
148 if (PrintCode) // Print the register-allocated code
149 PM.add(createX86CodePrinterPass(std::cerr, *this));
150 return false; // success!
153 void X86TargetMachine::replaceMachineCodeForFunction (void *Old, void *New) {
154 // FIXME: This code could perhaps live in a more appropriate place.
155 char *OldByte = (char *) Old;
156 *OldByte++ = 0xE9; // Emit JMP opcode.
157 int32_t *OldWord = (int32_t *) OldByte;
158 int32_t NewAddr = (intptr_t) New;
159 int32_t OldAddr = (intptr_t) OldWord;
160 *OldWord = NewAddr - OldAddr - 4; // Emit PC-relative addr of New code.
163 } // End llvm namespace