1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86TargetAsmInfo.h"
15 #include "X86TargetMachine.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/Support/raw_ostream.h"
22 #include "llvm/Target/TargetOptions.h"
23 #include "llvm/Target/TargetMachineRegistry.h"
26 /// X86TargetMachineModule - Note that this is used on hosts that cannot link
27 /// in a library unless there are references into the library. In particular,
28 /// it seems that it is not possible to get things to work on Win32 without
29 /// this. Though it is unused, do not remove it.
30 extern "C" int X86TargetMachineModule;
31 int X86TargetMachineModule = 0;
33 // Register the target.
34 static RegisterTarget<X86_32TargetMachine>
35 X("x86", "32-bit X86: Pentium-Pro and above");
36 static RegisterTarget<X86_64TargetMachine>
37 Y("x86-64", "64-bit X86: EM64T and AMD64");
39 // Force static initialization.
40 extern "C" void LLVMInitializeX86Target() { }
42 // No assembler printer by default
43 X86TargetMachine::AsmPrinterCtorFn X86TargetMachine::AsmPrinterCtor = 0;
45 const TargetAsmInfo *X86TargetMachine::createTargetAsmInfo() const {
46 if (Subtarget.isFlavorIntel())
47 return new X86WinTargetAsmInfo(*this);
49 switch (Subtarget.TargetType) {
50 case X86Subtarget::isDarwin:
51 return new X86DarwinTargetAsmInfo(*this);
52 case X86Subtarget::isELF:
53 return new X86ELFTargetAsmInfo(*this);
54 case X86Subtarget::isMingw:
55 case X86Subtarget::isCygwin:
56 return new X86COFFTargetAsmInfo(*this);
57 case X86Subtarget::isWindows:
58 return new X86WinTargetAsmInfo(*this);
60 return new X86GenericTargetAsmInfo(*this);
64 unsigned X86_32TargetMachine::getJITMatchQuality() {
65 #if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
71 unsigned X86_64TargetMachine::getJITMatchQuality() {
72 #if defined(__x86_64__) || defined(_M_AMD64)
78 unsigned X86_32TargetMachine::getModuleMatchQuality(const Module &M) {
79 // We strongly match "i[3-9]86-*".
80 std::string TT = M.getTargetTriple();
81 if (TT.size() >= 5 && TT[0] == 'i' && TT[2] == '8' && TT[3] == '6' &&
82 TT[4] == '-' && TT[1] - '3' < 6)
84 // If the target triple is something non-X86, we don't match.
85 if (!TT.empty()) return 0;
87 if (M.getEndianness() == Module::LittleEndian &&
88 M.getPointerSize() == Module::Pointer32)
89 return 10; // Weak match
90 else if (M.getEndianness() != Module::AnyEndianness ||
91 M.getPointerSize() != Module::AnyPointerSize)
92 return 0; // Match for some other target
94 return getJITMatchQuality()/2;
97 unsigned X86_64TargetMachine::getModuleMatchQuality(const Module &M) {
98 // We strongly match "x86_64-*".
99 std::string TT = M.getTargetTriple();
100 if (TT.size() >= 7 && TT[0] == 'x' && TT[1] == '8' && TT[2] == '6' &&
101 TT[3] == '_' && TT[4] == '6' && TT[5] == '4' && TT[6] == '-')
104 // We strongly match "amd64-*".
105 if (TT.size() >= 6 && TT[0] == 'a' && TT[1] == 'm' && TT[2] == 'd' &&
106 TT[3] == '6' && TT[4] == '4' && TT[5] == '-')
109 // If the target triple is something non-X86-64, we don't match.
110 if (!TT.empty()) return 0;
112 if (M.getEndianness() == Module::LittleEndian &&
113 M.getPointerSize() == Module::Pointer64)
114 return 10; // Weak match
115 else if (M.getEndianness() != Module::AnyEndianness ||
116 M.getPointerSize() != Module::AnyPointerSize)
117 return 0; // Match for some other target
119 return getJITMatchQuality()/2;
122 X86_32TargetMachine::X86_32TargetMachine(const Module &M, const std::string &FS)
123 : X86TargetMachine(M, FS, false) {
127 X86_64TargetMachine::X86_64TargetMachine(const Module &M, const std::string &FS)
128 : X86TargetMachine(M, FS, true) {
131 /// X86TargetMachine ctor - Create an ILP32 architecture model
133 X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS,
135 : Subtarget(M, FS, is64Bit),
136 DataLayout(Subtarget.getDataLayout()),
137 FrameInfo(TargetFrameInfo::StackGrowsDown,
138 Subtarget.getStackAlignment(), Subtarget.is64Bit() ? -8 : -4),
139 InstrInfo(*this), JITInfo(*this), TLInfo(*this), ELFWriterInfo(*this) {
140 DefRelocModel = getRelocationModel();
141 // FIXME: Correctly select PIC model for Win64 stuff
142 if (getRelocationModel() == Reloc::Default) {
143 if (Subtarget.isTargetDarwin() ||
144 (Subtarget.isTargetCygMing() && !Subtarget.isTargetWin64()))
145 setRelocationModel(Reloc::DynamicNoPIC);
147 setRelocationModel(Reloc::Static);
150 // ELF doesn't have a distinct dynamic-no-PIC model. Dynamic-no-PIC
151 // is defined as a model for code which may be used in static or
152 // dynamic executables but not necessarily a shared library. On ELF
153 // implement this by using the Static model.
154 if (Subtarget.isTargetELF() &&
155 getRelocationModel() == Reloc::DynamicNoPIC)
156 setRelocationModel(Reloc::Static);
158 if (Subtarget.is64Bit()) {
159 // No DynamicNoPIC support under X86-64.
160 if (getRelocationModel() == Reloc::DynamicNoPIC)
161 setRelocationModel(Reloc::PIC_);
162 // Default X86-64 code model is small.
163 if (getCodeModel() == CodeModel::Default)
164 setCodeModel(CodeModel::Small);
167 if (Subtarget.isTargetCygMing())
168 Subtarget.setPICStyle(PICStyles::WinPIC);
169 else if (Subtarget.isTargetDarwin()) {
170 if (Subtarget.is64Bit())
171 Subtarget.setPICStyle(PICStyles::RIPRel);
173 Subtarget.setPICStyle(PICStyles::Stub);
174 } else if (Subtarget.isTargetELF()) {
175 if (Subtarget.is64Bit())
176 Subtarget.setPICStyle(PICStyles::RIPRel);
178 Subtarget.setPICStyle(PICStyles::GOT);
182 //===----------------------------------------------------------------------===//
183 // Pass Pipeline Configuration
184 //===----------------------------------------------------------------------===//
186 bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
187 CodeGenOpt::Level OptLevel) {
188 // Install an instruction selector.
189 PM.add(createX86ISelDag(*this, OptLevel));
191 // If we're using Fast-ISel, clean up the mess.
193 PM.add(createDeadMachineInstructionElimPass());
195 // Install a pass to insert x87 FP_REG_KILL instructions, as needed.
196 PM.add(createX87FPRegKillInserterPass());
201 bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
202 CodeGenOpt::Level OptLevel) {
203 // Calculate and set max stack object alignment early, so we can decide
204 // whether we will need stack realignment (and thus FP).
205 PM.add(createX86MaxStackAlignmentCalculatorPass());
206 return false; // -print-machineinstr shouldn't print after this.
209 bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
210 CodeGenOpt::Level OptLevel) {
211 PM.add(createX86FloatingPointStackifierPass());
212 return true; // -print-machineinstr should print after this.
215 bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM,
216 CodeGenOpt::Level OptLevel,
219 // FIXME: Move this somewhere else!
220 // On Darwin, override 64-bit static relocation to pic_ since the
221 // assembler doesn't support it.
222 if (DefRelocModel == Reloc::Static &&
223 Subtarget.isTargetDarwin() && Subtarget.is64Bit())
224 setRelocationModel(Reloc::PIC_);
226 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
228 PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose));
232 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
233 CodeGenOpt::Level OptLevel,
235 MachineCodeEmitter &MCE) {
236 // FIXME: Move this to TargetJITInfo!
237 // On Darwin, do not override 64-bit setting made in X86TargetMachine().
238 if (DefRelocModel == Reloc::Default &&
239 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit()))
240 setRelocationModel(Reloc::Static);
242 // 64-bit JIT places everything in the same buffer except external functions.
243 // On Darwin, use small code model but hack the call instruction for
244 // externals. Elsewhere, do not assume globals are in the lower 4G.
245 if (Subtarget.is64Bit()) {
246 if (Subtarget.isTargetDarwin())
247 setCodeModel(CodeModel::Small);
249 setCodeModel(CodeModel::Large);
252 PM.add(createX86CodeEmitterPass(*this, MCE));
254 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
256 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
262 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
263 CodeGenOpt::Level OptLevel,
265 JITCodeEmitter &JCE) {
266 // FIXME: Move this to TargetJITInfo!
267 // On Darwin, do not override 64-bit setting made in X86TargetMachine().
268 if (DefRelocModel == Reloc::Default &&
269 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit()))
270 setRelocationModel(Reloc::Static);
272 // 64-bit JIT places everything in the same buffer except external functions.
273 // On Darwin, use small code model but hack the call instruction for
274 // externals. Elsewhere, do not assume globals are in the lower 4G.
275 if (Subtarget.is64Bit()) {
276 if (Subtarget.isTargetDarwin())
277 setCodeModel(CodeModel::Small);
279 setCodeModel(CodeModel::Large);
282 PM.add(createX86JITCodeEmitterPass(*this, JCE));
284 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
286 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
292 bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
293 CodeGenOpt::Level OptLevel,
295 MachineCodeEmitter &MCE) {
296 PM.add(createX86CodeEmitterPass(*this, MCE));
298 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
300 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
306 bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
307 CodeGenOpt::Level OptLevel,
309 JITCodeEmitter &JCE) {
310 PM.add(createX86JITCodeEmitterPass(*this, JCE));
312 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
314 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
320 /// symbolicAddressesAreRIPRel - Return true if symbolic addresses are
321 /// RIP-relative on this machine, taking into consideration the relocation
322 /// model and subtarget. RIP-relative addresses cannot have a separate
323 /// base or index register.
324 bool X86TargetMachine::symbolicAddressesAreRIPRel() const {
325 return getRelocationModel() != Reloc::Static &&
326 Subtarget.isPICStyleRIPRel();