1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86MCAsmInfo.h"
15 #include "X86TargetMachine.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/MC/MCCodeEmitter.h"
21 #include "llvm/MC/MCStreamer.h"
22 #include "llvm/Support/FormattedStream.h"
23 #include "llvm/Target/TargetOptions.h"
24 #include "llvm/Target/TargetRegistry.h"
27 static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
29 switch (TheTriple.getOS()) {
31 return new X86MCAsmInfoDarwin(TheTriple);
36 return new X86MCAsmInfoCOFF(TheTriple);
38 return new X86ELFMCAsmInfo(TheTriple);
42 static MCStreamer *createMCStreamer(const Target &T, const std::string &TT,
43 MCContext &Ctx, TargetAsmBackend &TAB,
45 MCCodeEmitter *_Emitter,
48 switch (TheTriple.getOS()) {
50 return createMachOStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
55 return createWinCOFFStreamer(Ctx, TAB, *_Emitter, _OS, RelaxAll);
57 // FIXME: default to ELF.
58 report_fatal_error("object emission not implemented for this target.");
62 extern "C" void LLVMInitializeX86Target() {
63 // Register the target.
64 RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target);
65 RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
67 // Register the target asm info.
68 RegisterAsmInfoFn A(TheX86_32Target, createMCAsmInfo);
69 RegisterAsmInfoFn B(TheX86_64Target, createMCAsmInfo);
71 // Register the code emitter.
72 TargetRegistry::RegisterCodeEmitter(TheX86_32Target,
73 createX86_32MCCodeEmitter);
74 TargetRegistry::RegisterCodeEmitter(TheX86_64Target,
75 createX86_64MCCodeEmitter);
77 // Register the asm backend.
78 TargetRegistry::RegisterAsmBackend(TheX86_32Target,
79 createX86_32AsmBackend);
80 TargetRegistry::RegisterAsmBackend(TheX86_64Target,
81 createX86_64AsmBackend);
83 // Register the object streamer.
84 TargetRegistry::RegisterObjectStreamer(TheX86_32Target,
86 TargetRegistry::RegisterObjectStreamer(TheX86_64Target,
91 X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
92 const std::string &FS)
93 : X86TargetMachine(T, TT, FS, false) {
97 X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
98 const std::string &FS)
99 : X86TargetMachine(T, TT, FS, true) {
102 /// X86TargetMachine ctor - Create an X86 target.
104 X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
105 const std::string &FS, bool is64Bit)
106 : LLVMTargetMachine(T, TT),
107 Subtarget(TT, FS, is64Bit),
108 DataLayout(Subtarget.getDataLayout()),
109 FrameInfo(TargetFrameInfo::StackGrowsDown,
110 Subtarget.getStackAlignment(),
111 (Subtarget.isTargetWin64() ? -40 :
112 (Subtarget.is64Bit() ? -8 : -4))),
113 InstrInfo(*this), JITInfo(*this), TLInfo(*this), TSInfo(*this),
114 ELFWriterInfo(*this) {
115 DefRelocModel = getRelocationModel();
117 // If no relocation model was picked, default as appropriate for the target.
118 if (getRelocationModel() == Reloc::Default) {
119 if (!Subtarget.isTargetDarwin())
120 setRelocationModel(Reloc::Static);
121 else if (Subtarget.is64Bit())
122 setRelocationModel(Reloc::PIC_);
124 setRelocationModel(Reloc::DynamicNoPIC);
127 assert(getRelocationModel() != Reloc::Default &&
128 "Relocation mode not picked");
130 // ELF and X86-64 don't have a distinct DynamicNoPIC model. DynamicNoPIC
131 // is defined as a model for code which may be used in static or dynamic
132 // executables but not necessarily a shared library. On X86-32 we just
133 // compile in -static mode, in x86-64 we use PIC.
134 if (getRelocationModel() == Reloc::DynamicNoPIC) {
136 setRelocationModel(Reloc::PIC_);
137 else if (!Subtarget.isTargetDarwin())
138 setRelocationModel(Reloc::Static);
141 // If we are on Darwin, disallow static relocation model in X86-64 mode, since
142 // the Mach-O file format doesn't support it.
143 if (getRelocationModel() == Reloc::Static &&
144 Subtarget.isTargetDarwin() &&
146 setRelocationModel(Reloc::PIC_);
148 // Determine the PICStyle based on the target selected.
149 if (getRelocationModel() == Reloc::Static) {
150 // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
151 Subtarget.setPICStyle(PICStyles::None);
152 } else if (Subtarget.isTargetCygMing()) {
153 Subtarget.setPICStyle(PICStyles::None);
154 } else if (Subtarget.isTargetDarwin()) {
155 if (Subtarget.is64Bit())
156 Subtarget.setPICStyle(PICStyles::RIPRel);
157 else if (getRelocationModel() == Reloc::PIC_)
158 Subtarget.setPICStyle(PICStyles::StubPIC);
160 assert(getRelocationModel() == Reloc::DynamicNoPIC);
161 Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
163 } else if (Subtarget.isTargetELF()) {
164 if (Subtarget.is64Bit())
165 Subtarget.setPICStyle(PICStyles::RIPRel);
167 Subtarget.setPICStyle(PICStyles::GOT);
170 // Finally, if we have "none" as our PIC style, force to static mode.
171 if (Subtarget.getPICStyle() == PICStyles::None)
172 setRelocationModel(Reloc::Static);
175 //===----------------------------------------------------------------------===//
176 // Pass Pipeline Configuration
177 //===----------------------------------------------------------------------===//
179 bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
180 CodeGenOpt::Level OptLevel) {
181 // Install an instruction selector.
182 PM.add(createX86ISelDag(*this, OptLevel));
184 // For 32-bit, prepend instructions to set the "global base reg" for PIC.
185 if (!Subtarget.is64Bit())
186 PM.add(createGlobalBaseRegPass());
191 bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
192 CodeGenOpt::Level OptLevel) {
193 PM.add(createX86MaxStackAlignmentHeuristicPass());
194 return false; // -print-machineinstr shouldn't print after this.
197 bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
198 CodeGenOpt::Level OptLevel) {
199 PM.add(createX86FloatingPointStackifierPass());
200 return true; // -print-machineinstr should print after this.
203 bool X86TargetMachine::addPreEmitPass(PassManagerBase &PM,
204 CodeGenOpt::Level OptLevel) {
205 if (OptLevel != CodeGenOpt::None && Subtarget.hasSSE2()) {
206 PM.add(createSSEDomainFixPass());
212 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
213 CodeGenOpt::Level OptLevel,
214 JITCodeEmitter &JCE) {
215 // FIXME: Move this to TargetJITInfo!
216 // On Darwin, do not override 64-bit setting made in X86TargetMachine().
217 if (DefRelocModel == Reloc::Default &&
218 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
219 setRelocationModel(Reloc::Static);
220 Subtarget.setPICStyle(PICStyles::None);
224 PM.add(createX86JITCodeEmitterPass(*this, JCE));
229 void X86TargetMachine::setCodeModelForStatic() {
231 if (getCodeModel() != CodeModel::Default) return;
233 // For static codegen, if we're not already set, use Small codegen.
234 setCodeModel(CodeModel::Small);
238 void X86TargetMachine::setCodeModelForJIT() {
240 if (getCodeModel() != CodeModel::Default) return;
242 // 64-bit JIT places everything in the same buffer except external functions.
243 if (Subtarget.is64Bit())
244 setCodeModel(CodeModel::Large);
246 setCodeModel(CodeModel::Small);