1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86MCAsmInfo.h"
15 #include "X86TargetMachine.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/MC/MCCodeEmitter.h"
21 #include "llvm/MC/MCStreamer.h"
22 #include "llvm/Support/FormattedStream.h"
23 #include "llvm/Target/TargetOptions.h"
24 #include "llvm/Target/TargetRegistry.h"
27 static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
29 switch (TheTriple.getOS()) {
31 return new X86MCAsmInfoDarwin(TheTriple);
36 return new X86MCAsmInfoCOFF(TheTriple);
38 return new X86ELFMCAsmInfo(TheTriple);
42 static MCStreamer *createMCStreamer(const Target &T, const std::string &TT,
43 MCContext &Ctx, TargetAsmBackend &TAB,
45 MCCodeEmitter *_Emitter,
48 switch (TheTriple.getOS()) {
50 return createMachOStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
55 return createWinCOFFStreamer(Ctx, TAB, *_Emitter, _OS, RelaxAll);
57 return createELFStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
61 extern "C" void LLVMInitializeX86Target() {
62 // Register the target.
63 RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target);
64 RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
66 // Register the target asm info.
67 RegisterAsmInfoFn A(TheX86_32Target, createMCAsmInfo);
68 RegisterAsmInfoFn B(TheX86_64Target, createMCAsmInfo);
70 // Register the code emitter.
71 TargetRegistry::RegisterCodeEmitter(TheX86_32Target,
72 createX86_32MCCodeEmitter);
73 TargetRegistry::RegisterCodeEmitter(TheX86_64Target,
74 createX86_64MCCodeEmitter);
76 // Register the asm backend.
77 TargetRegistry::RegisterAsmBackend(TheX86_32Target,
78 createX86_32AsmBackend);
79 TargetRegistry::RegisterAsmBackend(TheX86_64Target,
80 createX86_64AsmBackend);
82 // Register the object streamer.
83 TargetRegistry::RegisterObjectStreamer(TheX86_32Target,
85 TargetRegistry::RegisterObjectStreamer(TheX86_64Target,
90 X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
91 const std::string &FS)
92 : X86TargetMachine(T, TT, FS, false),
93 DataLayout(getSubtargetImpl()->isTargetDarwin() ?
94 "e-p:32:32-f64:32:64-i64:32:64-f80:128:128-n8:16:32" :
95 (getSubtargetImpl()->isTargetCygMing() ||
96 getSubtargetImpl()->isTargetWindows()) ?
97 "e-p:32:32-f64:64:64-i64:64:64-f80:32:32-n8:16:32" :
98 "e-p:32:32-f64:32:64-i64:32:64-f80:32:32-n8:16:32"),
106 X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
107 const std::string &FS)
108 : X86TargetMachine(T, TT, FS, true),
109 DataLayout("e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-n8:16:32:64"),
116 /// X86TargetMachine ctor - Create an X86 target.
118 X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
119 const std::string &FS, bool is64Bit)
120 : LLVMTargetMachine(T, TT),
121 Subtarget(TT, FS, is64Bit),
122 FrameInfo(TargetFrameInfo::StackGrowsDown,
123 Subtarget.getStackAlignment(),
124 Subtarget.is64Bit() ? -8 : -4),
125 ELFWriterInfo(is64Bit, true) {
126 DefRelocModel = getRelocationModel();
128 // If no relocation model was picked, default as appropriate for the target.
129 if (getRelocationModel() == Reloc::Default) {
130 // Darwin defaults to PIC in 64 bit mode and dynamic-no-pic in 32 bit mode.
131 // Win64 requires rip-rel addressing, thus we force it to PIC. Otherwise we
132 // use static relocation model by default.
133 if (Subtarget.isTargetDarwin()) {
134 if (Subtarget.is64Bit())
135 setRelocationModel(Reloc::PIC_);
137 setRelocationModel(Reloc::DynamicNoPIC);
138 } else if (Subtarget.isTargetWin64())
139 setRelocationModel(Reloc::PIC_);
141 setRelocationModel(Reloc::Static);
144 assert(getRelocationModel() != Reloc::Default &&
145 "Relocation mode not picked");
147 // ELF and X86-64 don't have a distinct DynamicNoPIC model. DynamicNoPIC
148 // is defined as a model for code which may be used in static or dynamic
149 // executables but not necessarily a shared library. On X86-32 we just
150 // compile in -static mode, in x86-64 we use PIC.
151 if (getRelocationModel() == Reloc::DynamicNoPIC) {
153 setRelocationModel(Reloc::PIC_);
154 else if (!Subtarget.isTargetDarwin())
155 setRelocationModel(Reloc::Static);
158 // If we are on Darwin, disallow static relocation model in X86-64 mode, since
159 // the Mach-O file format doesn't support it.
160 if (getRelocationModel() == Reloc::Static &&
161 Subtarget.isTargetDarwin() &&
163 setRelocationModel(Reloc::PIC_);
165 // Determine the PICStyle based on the target selected.
166 if (getRelocationModel() == Reloc::Static) {
167 // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
168 Subtarget.setPICStyle(PICStyles::None);
169 } else if (Subtarget.is64Bit()) {
170 // PIC in 64 bit mode is always rip-rel.
171 Subtarget.setPICStyle(PICStyles::RIPRel);
172 } else if (Subtarget.isTargetCygMing()) {
173 Subtarget.setPICStyle(PICStyles::None);
174 } else if (Subtarget.isTargetDarwin()) {
175 if (getRelocationModel() == Reloc::PIC_)
176 Subtarget.setPICStyle(PICStyles::StubPIC);
178 assert(getRelocationModel() == Reloc::DynamicNoPIC);
179 Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
181 } else if (Subtarget.isTargetELF()) {
182 Subtarget.setPICStyle(PICStyles::GOT);
185 // Finally, if we have "none" as our PIC style, force to static mode.
186 if (Subtarget.getPICStyle() == PICStyles::None)
187 setRelocationModel(Reloc::Static);
190 //===----------------------------------------------------------------------===//
191 // Pass Pipeline Configuration
192 //===----------------------------------------------------------------------===//
194 bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
195 CodeGenOpt::Level OptLevel) {
196 // Install an instruction selector.
197 PM.add(createX86ISelDag(*this, OptLevel));
199 // For 32-bit, prepend instructions to set the "global base reg" for PIC.
200 if (!Subtarget.is64Bit())
201 PM.add(createGlobalBaseRegPass());
206 bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
207 CodeGenOpt::Level OptLevel) {
208 PM.add(createX86MaxStackAlignmentHeuristicPass());
209 return false; // -print-machineinstr shouldn't print after this.
212 bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
213 CodeGenOpt::Level OptLevel) {
214 PM.add(createX86FloatingPointStackifierPass());
215 return true; // -print-machineinstr should print after this.
218 bool X86TargetMachine::addPreEmitPass(PassManagerBase &PM,
219 CodeGenOpt::Level OptLevel) {
220 if (OptLevel != CodeGenOpt::None && Subtarget.hasSSE2()) {
221 PM.add(createSSEDomainFixPass());
227 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
228 CodeGenOpt::Level OptLevel,
229 JITCodeEmitter &JCE) {
230 // FIXME: Move this to TargetJITInfo!
231 // On Darwin, do not override 64-bit setting made in X86TargetMachine().
232 if (DefRelocModel == Reloc::Default &&
233 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
234 setRelocationModel(Reloc::Static);
235 Subtarget.setPICStyle(PICStyles::None);
239 PM.add(createX86JITCodeEmitterPass(*this, JCE));
244 void X86TargetMachine::setCodeModelForStatic() {
246 if (getCodeModel() != CodeModel::Default) return;
248 // For static codegen, if we're not already set, use Small codegen.
249 setCodeModel(CodeModel::Small);
253 void X86TargetMachine::setCodeModelForJIT() {
255 if (getCodeModel() != CodeModel::Default) return;
257 // 64-bit JIT places everything in the same buffer except external functions.
258 if (Subtarget.is64Bit())
259 setCodeModel(CodeModel::Large);
261 setCodeModel(CodeModel::Small);