1 //===-- X86TargetMachine.h - Define TargetMachine for the X86 ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef X86TARGETMACHINE_H
15 #define X86TARGETMACHINE_H
18 #include "X86ELFWriterInfo.h"
19 #include "X86InstrInfo.h"
20 #include "X86ISelLowering.h"
21 #include "X86FrameLowering.h"
22 #include "X86JITInfo.h"
23 #include "X86SelectionDAGInfo.h"
24 #include "X86Subtarget.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Target/TargetData.h"
27 #include "llvm/Target/TargetFrameLowering.h"
31 class formatted_raw_ostream;
34 class X86TargetMachine : public LLVMTargetMachine {
35 X86Subtarget Subtarget;
36 X86FrameLowering FrameLowering;
37 X86ELFWriterInfo ELFWriterInfo;
38 InstrItineraryData InstrItins;
41 X86TargetMachine(const Target &T, StringRef TT,
42 StringRef CPU, StringRef FS, const TargetOptions &Options,
43 Reloc::Model RM, CodeModel::Model CM,
47 virtual const X86InstrInfo *getInstrInfo() const {
48 llvm_unreachable("getInstrInfo not implemented");
50 virtual const TargetFrameLowering *getFrameLowering() const {
51 return &FrameLowering;
53 virtual X86JITInfo *getJITInfo() {
54 llvm_unreachable("getJITInfo not implemented");
56 virtual const X86Subtarget *getSubtargetImpl() const{ return &Subtarget; }
57 virtual const X86TargetLowering *getTargetLowering() const {
58 llvm_unreachable("getTargetLowering not implemented");
60 virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const {
61 llvm_unreachable("getSelectionDAGInfo not implemented");
63 virtual const X86RegisterInfo *getRegisterInfo() const {
64 return &getInstrInfo()->getRegisterInfo();
66 virtual const X86ELFWriterInfo *getELFWriterInfo() const {
67 return Subtarget.isTargetELF() ? &ELFWriterInfo : 0;
69 virtual const InstrItineraryData *getInstrItineraryData() const {
73 // Set up the pass pipeline.
74 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
76 virtual bool addCodeEmitter(PassManagerBase &PM,
80 /// X86_32TargetMachine - X86 32-bit target machine.
82 class X86_32TargetMachine : public X86TargetMachine {
83 virtual void anchor();
84 const TargetData DataLayout; // Calculates type size & alignment
85 X86InstrInfo InstrInfo;
86 X86SelectionDAGInfo TSInfo;
87 X86TargetLowering TLInfo;
90 X86_32TargetMachine(const Target &T, StringRef TT,
91 StringRef CPU, StringRef FS, const TargetOptions &Options,
92 Reloc::Model RM, CodeModel::Model CM,
93 CodeGenOpt::Level OL);
94 virtual const TargetData *getTargetData() const { return &DataLayout; }
95 virtual const X86TargetLowering *getTargetLowering() const {
98 virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const {
101 virtual const X86InstrInfo *getInstrInfo() const {
104 virtual X86JITInfo *getJITInfo() {
109 /// X86_64TargetMachine - X86 64-bit target machine.
111 class X86_64TargetMachine : public X86TargetMachine {
112 virtual void anchor();
113 const TargetData DataLayout; // Calculates type size & alignment
114 X86InstrInfo InstrInfo;
115 X86SelectionDAGInfo TSInfo;
116 X86TargetLowering TLInfo;
119 X86_64TargetMachine(const Target &T, StringRef TT,
120 StringRef CPU, StringRef FS, const TargetOptions &Options,
121 Reloc::Model RM, CodeModel::Model CM,
122 CodeGenOpt::Level OL);
123 virtual const TargetData *getTargetData() const { return &DataLayout; }
124 virtual const X86TargetLowering *getTargetLowering() const {
127 virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const {
130 virtual const X86InstrInfo *getInstrInfo() const {
133 virtual X86JITInfo *getJITInfo() {
138 } // End llvm namespace