1 //===-- X86TargetMachine.h - Define TargetMachine for the X86 ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef X86TARGETMACHINE_H
15 #define X86TARGETMACHINE_H
18 #include "X86ELFWriterInfo.h"
19 #include "X86InstrInfo.h"
20 #include "X86ISelLowering.h"
21 #include "X86FrameLowering.h"
22 #include "X86JITInfo.h"
23 #include "X86SelectionDAGInfo.h"
24 #include "X86Subtarget.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Target/TargetData.h"
27 #include "llvm/Target/TargetFrameLowering.h"
33 class X86TargetMachine : public LLVMTargetMachine {
34 X86Subtarget Subtarget;
35 X86FrameLowering FrameLowering;
36 X86ELFWriterInfo ELFWriterInfo;
37 InstrItineraryData InstrItins;
40 X86TargetMachine(const Target &T, StringRef TT,
41 StringRef CPU, StringRef FS, const TargetOptions &Options,
42 Reloc::Model RM, CodeModel::Model CM,
46 virtual const X86InstrInfo *getInstrInfo() const {
47 llvm_unreachable("getInstrInfo not implemented");
49 virtual const TargetFrameLowering *getFrameLowering() const {
50 return &FrameLowering;
52 virtual X86JITInfo *getJITInfo() {
53 llvm_unreachable("getJITInfo not implemented");
55 virtual const X86Subtarget *getSubtargetImpl() const{ return &Subtarget; }
56 virtual const X86TargetLowering *getTargetLowering() const {
57 llvm_unreachable("getTargetLowering not implemented");
59 virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const {
60 llvm_unreachable("getSelectionDAGInfo not implemented");
62 virtual const X86RegisterInfo *getRegisterInfo() const {
63 return &getInstrInfo()->getRegisterInfo();
65 virtual const X86ELFWriterInfo *getELFWriterInfo() const {
66 return Subtarget.isTargetELF() ? &ELFWriterInfo : 0;
68 virtual const InstrItineraryData *getInstrItineraryData() const {
72 // Set up the pass pipeline.
73 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
75 virtual bool addCodeEmitter(PassManagerBase &PM,
79 /// X86_32TargetMachine - X86 32-bit target machine.
81 class X86_32TargetMachine : public X86TargetMachine {
82 virtual void anchor();
83 const TargetData DataLayout; // Calculates type size & alignment
84 X86InstrInfo InstrInfo;
85 X86SelectionDAGInfo TSInfo;
86 X86TargetLowering TLInfo;
89 X86_32TargetMachine(const Target &T, StringRef TT,
90 StringRef CPU, StringRef FS, const TargetOptions &Options,
91 Reloc::Model RM, CodeModel::Model CM,
92 CodeGenOpt::Level OL);
93 virtual const TargetData *getTargetData() const { return &DataLayout; }
94 virtual const X86TargetLowering *getTargetLowering() const {
97 virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const {
100 virtual const X86InstrInfo *getInstrInfo() const {
103 virtual X86JITInfo *getJITInfo() {
108 /// X86_64TargetMachine - X86 64-bit target machine.
110 class X86_64TargetMachine : public X86TargetMachine {
111 virtual void anchor();
112 const TargetData DataLayout; // Calculates type size & alignment
113 X86InstrInfo InstrInfo;
114 X86SelectionDAGInfo TSInfo;
115 X86TargetLowering TLInfo;
118 X86_64TargetMachine(const Target &T, StringRef TT,
119 StringRef CPU, StringRef FS, const TargetOptions &Options,
120 Reloc::Model RM, CodeModel::Model CM,
121 CodeGenOpt::Level OL);
122 virtual const TargetData *getTargetData() const { return &DataLayout; }
123 virtual const X86TargetLowering *getTargetLowering() const {
126 virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const {
129 virtual const X86InstrInfo *getInstrInfo() const {
132 virtual X86JITInfo *getJITInfo() {
137 } // End llvm namespace