1 //===-- X86TargetTransformInfo.cpp - X86 specific TTI pass ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 /// This file implements a TargetTransformInfo analysis pass specific to the
11 /// X86 target machine. It uses the target's detailed information to provide
12 /// more precise answers to certain TTI queries, while letting the target
13 /// independent and default TTI implementations handle the rest.
15 //===----------------------------------------------------------------------===//
17 #define DEBUG_TYPE "x86tti"
19 #include "X86TargetMachine.h"
20 #include "llvm/Analysis/TargetTransformInfo.h"
21 #include "llvm/Support/Debug.h"
22 #include "llvm/Target/TargetLowering.h"
23 #include "llvm/Target/CostTable.h"
26 // Declare the pass initialization routine locally as target-specific passes
27 // don't havve a target-wide initialization entry point, and so we rely on the
28 // pass constructor initialization.
30 void initializeX86TTIPass(PassRegistry &);
35 class X86TTI : public ImmutablePass, public TargetTransformInfo {
36 const X86TargetMachine *TM;
37 const X86Subtarget *ST;
38 const X86TargetLowering *TLI;
40 /// Estimate the overhead of scalarizing an instruction. Insert and Extract
41 /// are set if the result needs to be inserted and/or extracted from vectors.
42 unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract) const;
45 X86TTI() : ImmutablePass(ID), TM(0), ST(0), TLI(0) {
46 llvm_unreachable("This pass cannot be directly constructed");
49 X86TTI(const X86TargetMachine *TM)
50 : ImmutablePass(ID), TM(TM), ST(TM->getSubtargetImpl()),
51 TLI(TM->getTargetLowering()) {
52 initializeX86TTIPass(*PassRegistry::getPassRegistry());
55 virtual void initializePass() {
59 virtual void finalizePass() {
63 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
64 TargetTransformInfo::getAnalysisUsage(AU);
67 /// Pass identification.
70 /// Provide necessary pointer adjustments for the two base classes.
71 virtual void *getAdjustedAnalysisPointer(const void *ID) {
72 if (ID == &TargetTransformInfo::ID)
73 return (TargetTransformInfo*)this;
77 /// \name Scalar TTI Implementations
79 virtual PopcntSupportKind getPopcntSupport(unsigned TyWidth) const;
83 /// \name Vector TTI Implementations
86 virtual unsigned getNumberOfRegisters(bool Vector) const;
87 virtual unsigned getRegisterBitWidth(bool Vector) const;
88 virtual unsigned getMaximumUnrollFactor() const;
89 virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty) const;
90 virtual unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
91 int Index, Type *SubTp) const;
92 virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
94 virtual unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
96 virtual unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
97 unsigned Index) const;
98 virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src,
100 unsigned AddressSpace) const;
105 } // end anonymous namespace
107 INITIALIZE_AG_PASS(X86TTI, TargetTransformInfo, "x86tti",
108 "X86 Target Transform Info", true, true, false)
112 llvm::createX86TargetTransformInfoPass(const X86TargetMachine *TM) {
113 return new X86TTI(TM);
117 //===----------------------------------------------------------------------===//
121 //===----------------------------------------------------------------------===//
123 X86TTI::PopcntSupportKind X86TTI::getPopcntSupport(unsigned TyWidth) const {
124 assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2");
125 // TODO: Currently the __builtin_popcount() implementation using SSE3
126 // instructions is inefficient. Once the problem is fixed, we should
127 // call ST->hasSSE3() instead of ST->hasSSE4().
128 return ST->hasSSE41() ? PSK_FastHardware : PSK_Software;
131 unsigned X86TTI::getNumberOfRegisters(bool Vector) const {
132 if (Vector && !ST->hasSSE1())
140 unsigned X86TTI::getRegisterBitWidth(bool Vector) const {
142 if (ST->hasAVX()) return 256;
143 if (ST->hasSSE1()) return 128;
153 unsigned X86TTI::getMaximumUnrollFactor() const {
157 // Sandybridge and Haswell have multiple execution ports and pipelined
165 unsigned X86TTI::getArithmeticInstrCost(unsigned Opcode, Type *Ty) const {
166 // Legalize the type.
167 std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(Ty);
169 int ISD = TLI->InstructionOpcodeToISD(Opcode);
170 assert(ISD && "Invalid opcode");
172 static const CostTblEntry<MVT> AVX1CostTable[] = {
173 // We don't have to scalarize unsupported ops. We can issue two half-sized
174 // operations and we only need to extract the upper YMM half.
175 // Two ops + 1 extract + 1 insert = 4.
176 { ISD::MUL, MVT::v8i32, 4 },
177 { ISD::SUB, MVT::v8i32, 4 },
178 { ISD::ADD, MVT::v8i32, 4 },
179 { ISD::MUL, MVT::v4i64, 4 },
180 { ISD::SUB, MVT::v4i64, 4 },
181 { ISD::ADD, MVT::v4i64, 4 },
184 // Look for AVX1 lowering tricks.
186 int Idx = CostTableLookup<MVT>(AVX1CostTable, array_lengthof(AVX1CostTable), ISD,
189 return LT.first * AVX1CostTable[Idx].Cost;
191 // Fallback to the default implementation.
192 return TargetTransformInfo::getArithmeticInstrCost(Opcode, Ty);
195 unsigned X86TTI::getShuffleCost(ShuffleKind Kind, Type *Tp, int Index,
197 // We only estimate the cost of reverse shuffles.
198 if (Kind != SK_Reverse)
199 return TargetTransformInfo::getShuffleCost(Kind, Tp, Index, SubTp);
201 std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(Tp);
203 if (LT.second.getSizeInBits() > 128)
204 Cost = 3; // Extract + insert + copy.
206 // Multiple by the number of parts.
207 return Cost * LT.first;
210 unsigned X86TTI::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) const {
211 int ISD = TLI->InstructionOpcodeToISD(Opcode);
212 assert(ISD && "Invalid opcode");
214 EVT SrcTy = TLI->getValueType(Src);
215 EVT DstTy = TLI->getValueType(Dst);
217 if (!SrcTy.isSimple() || !DstTy.isSimple())
218 return TargetTransformInfo::getCastInstrCost(Opcode, Dst, Src);
220 static const TypeConversionCostTblEntry<MVT> AVXConversionTbl[] = {
221 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i16, 1 },
222 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i16, 1 },
223 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i32, 1 },
224 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i32, 1 },
225 { ISD::TRUNCATE, MVT::v4i32, MVT::v4i64, 1 },
226 { ISD::TRUNCATE, MVT::v8i16, MVT::v8i32, 1 },
227 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i8, 1 },
228 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i8, 1 },
229 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i8, 1 },
230 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 1 },
231 { ISD::FP_TO_SINT, MVT::v8i8, MVT::v8f32, 1 },
232 { ISD::FP_TO_SINT, MVT::v4i8, MVT::v4f32, 1 },
233 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i1, 6 },
234 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i1, 9 },
235 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i1, 8 },
236 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i8, 8 },
237 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i16, 8 },
238 { ISD::TRUNCATE, MVT::v8i32, MVT::v8i64, 3 },
242 int Idx = ConvertCostTableLookup<MVT>(AVXConversionTbl,
243 array_lengthof(AVXConversionTbl),
244 ISD, DstTy.getSimpleVT(), SrcTy.getSimpleVT());
246 return AVXConversionTbl[Idx].Cost;
249 return TargetTransformInfo::getCastInstrCost(Opcode, Dst, Src);
252 unsigned X86TTI::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
253 Type *CondTy) const {
254 // Legalize the type.
255 std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(ValTy);
259 int ISD = TLI->InstructionOpcodeToISD(Opcode);
260 assert(ISD && "Invalid opcode");
262 static const CostTblEntry<MVT> SSE42CostTbl[] = {
263 { ISD::SETCC, MVT::v2f64, 1 },
264 { ISD::SETCC, MVT::v4f32, 1 },
265 { ISD::SETCC, MVT::v2i64, 1 },
266 { ISD::SETCC, MVT::v4i32, 1 },
267 { ISD::SETCC, MVT::v8i16, 1 },
268 { ISD::SETCC, MVT::v16i8, 1 },
271 static const CostTblEntry<MVT> AVX1CostTbl[] = {
272 { ISD::SETCC, MVT::v4f64, 1 },
273 { ISD::SETCC, MVT::v8f32, 1 },
274 // AVX1 does not support 8-wide integer compare.
275 { ISD::SETCC, MVT::v4i64, 4 },
276 { ISD::SETCC, MVT::v8i32, 4 },
277 { ISD::SETCC, MVT::v16i16, 4 },
278 { ISD::SETCC, MVT::v32i8, 4 },
281 static const CostTblEntry<MVT> AVX2CostTbl[] = {
282 { ISD::SETCC, MVT::v4i64, 1 },
283 { ISD::SETCC, MVT::v8i32, 1 },
284 { ISD::SETCC, MVT::v16i16, 1 },
285 { ISD::SETCC, MVT::v32i8, 1 },
289 int Idx = CostTableLookup<MVT>(AVX2CostTbl, array_lengthof(AVX2CostTbl), ISD, MTy);
291 return LT.first * AVX2CostTbl[Idx].Cost;
295 int Idx = CostTableLookup<MVT>(AVX1CostTbl, array_lengthof(AVX1CostTbl), ISD, MTy);
297 return LT.first * AVX1CostTbl[Idx].Cost;
300 if (ST->hasSSE42()) {
301 int Idx = CostTableLookup<MVT>(SSE42CostTbl, array_lengthof(SSE42CostTbl), ISD, MTy);
303 return LT.first * SSE42CostTbl[Idx].Cost;
306 return TargetTransformInfo::getCmpSelInstrCost(Opcode, ValTy, CondTy);
309 unsigned X86TTI::getVectorInstrCost(unsigned Opcode, Type *Val,
310 unsigned Index) const {
311 assert(Val->isVectorTy() && "This must be a vector type");
314 // Legalize the type.
315 std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(Val);
317 // This type is legalized to a scalar type.
318 if (!LT.second.isVector())
321 // The type may be split. Normalize the index to the new type.
322 unsigned Width = LT.second.getVectorNumElements();
323 Index = Index % Width;
325 // Floating point scalars are already located in index #0.
326 if (Val->getScalarType()->isFloatingPointTy() && Index == 0)
330 return TargetTransformInfo::getVectorInstrCost(Opcode, Val, Index);
333 unsigned X86TTI::getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
334 unsigned AddressSpace) const {
335 // Legalize the type.
336 std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(Src);
337 assert((Opcode == Instruction::Load || Opcode == Instruction::Store) &&
340 // Each load/store unit costs 1.
341 unsigned Cost = LT.first * 1;
343 // On Sandybridge 256bit load/stores are double pumped
344 // (but not on Haswell).
345 if (LT.second.getSizeInBits() > 128 && !ST->hasAVX2())