1 //===-- XCoreISelLowering.h - XCore DAG Lowering Interface ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the interfaces that XCore uses to lower LLVM code into a
13 //===----------------------------------------------------------------------===//
15 #ifndef XCOREISELLOWERING_H
16 #define XCOREISELLOWERING_H
18 #include "llvm/CodeGen/SelectionDAG.h"
19 #include "llvm/Target/TargetLowering.h"
24 // Forward delcarations
26 class XCoreTargetMachine;
30 // Start the numbering where the builtin ops and target ops leave off.
31 FIRST_NUMBER = ISD::BUILTIN_OP_END+XCore::INSTRUCTION_LIST_END,
33 // Branch and link (call)
36 // pc relative address
39 // dp relative address
42 // cp relative address
45 // Store word to stack
48 // Corresponds to retsp instruction
51 // Corresponds to LADD instruction
54 // Corresponds to LSUB instruction
59 //===--------------------------------------------------------------------===//
60 // TargetLowering Implementation
61 //===--------------------------------------------------------------------===//
62 class XCoreTargetLowering : public TargetLowering
66 explicit XCoreTargetLowering(XCoreTargetMachine &TM);
68 /// LowerOperation - Provide custom lowering hooks for some operations.
69 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
71 /// ReplaceNodeResults - Replace the results of node with an illegal result
72 /// type with new values built out of custom code.
74 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
77 /// getTargetNodeName - This method returns the name of a target specific
79 virtual const char *getTargetNodeName(unsigned Opcode) const;
81 virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,
82 MachineBasicBlock *MBB) const;
84 virtual bool isLegalAddressingMode(const AddrMode &AM,
85 const Type *Ty) const;
88 const XCoreTargetMachine &TM;
89 const XCoreSubtarget &Subtarget;
91 // Lower Operand helpers
92 SDValue LowerCCCArguments(SDValue Op, SelectionDAG &DAG);
93 SDValue LowerCCCCallTo(SDValue Op, SelectionDAG &DAG, unsigned CC);
94 SDNode *LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode*TheCall,
95 unsigned CallingConv, SelectionDAG &DAG);
96 SDValue getReturnAddressFrameIndex(SelectionDAG &DAG);
97 SDValue getGlobalAddressWrapper(SDValue GA, GlobalValue *GV,
100 // Lower Operand specifics
101 SDValue LowerRET(SDValue Op, SelectionDAG &DAG);
102 SDValue LowerCALL(SDValue Op, SelectionDAG &DAG);
103 SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG);
104 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
105 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG);
106 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG);
107 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG);
108 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG);
109 SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG);
110 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG);
111 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG);
113 // Inline asm support
114 std::vector<unsigned>
115 getRegClassForInlineAsmConstraint(const std::string &Constraint,
119 SDValue ExpandADDSUB(SDNode *Op, SelectionDAG &DAG);
123 #endif // XCOREISELLOWERING_H