1 //===-- XCoreISelLowering.h - XCore DAG Lowering Interface ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the interfaces that XCore uses to lower LLVM code into a
13 //===----------------------------------------------------------------------===//
15 #ifndef XCOREISELLOWERING_H
16 #define XCOREISELLOWERING_H
18 #include "llvm/CodeGen/SelectionDAG.h"
19 #include "llvm/Target/TargetLowering.h"
24 // Forward delcarations
26 class XCoreTargetMachine;
30 // Start the numbering where the builtin ops and target ops leave off.
31 FIRST_NUMBER = ISD::BUILTIN_OP_END+XCore::INSTRUCTION_LIST_END,
33 // Branch and link (call)
36 // pc relative address
39 // dp relative address
42 // cp relative address
45 // Store word to stack
48 // Corresponds to retsp instruction
51 // Corresponds to LADD instruction
54 // Corresponds to LSUB instruction
59 //===--------------------------------------------------------------------===//
60 // TargetLowering Implementation
61 //===--------------------------------------------------------------------===//
62 class XCoreTargetLowering : public TargetLowering
66 explicit XCoreTargetLowering(XCoreTargetMachine &TM);
68 /// LowerOperation - Provide custom lowering hooks for some operations.
69 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
71 /// ReplaceNodeResults - Replace the results of node with an illegal result
72 /// type with new values built out of custom code.
74 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
77 /// getTargetNodeName - This method returns the name of a target specific
79 virtual const char *getTargetNodeName(unsigned Opcode) const;
81 virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,
82 MachineBasicBlock *MBB,
83 DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM) const;
85 virtual bool isLegalAddressingMode(const AddrMode &AM,
86 const Type *Ty) const;
88 /// getFunctionAlignment - Return the Log2 alignment of this function.
89 virtual unsigned getFunctionAlignment(const Function *F) const;
92 const XCoreTargetMachine &TM;
93 const XCoreSubtarget &Subtarget;
95 // Lower Operand helpers
96 SDValue LowerCCCArguments(SDValue Chain,
97 CallingConv::ID CallConv,
99 const SmallVectorImpl<ISD::InputArg> &Ins,
100 DebugLoc dl, SelectionDAG &DAG,
101 SmallVectorImpl<SDValue> &InVals);
102 SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee,
103 CallingConv::ID CallConv, bool isVarArg,
105 const SmallVectorImpl<ISD::OutputArg> &Outs,
106 const SmallVectorImpl<ISD::InputArg> &Ins,
107 DebugLoc dl, SelectionDAG &DAG,
108 SmallVectorImpl<SDValue> &InVals);
109 SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
110 CallingConv::ID CallConv, bool isVarArg,
111 const SmallVectorImpl<ISD::InputArg> &Ins,
112 DebugLoc dl, SelectionDAG &DAG,
113 SmallVectorImpl<SDValue> &InVals);
114 SDValue getReturnAddressFrameIndex(SelectionDAG &DAG);
115 SDValue getGlobalAddressWrapper(SDValue GA, GlobalValue *GV,
118 // Lower Operand specifics
119 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG);
120 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG);
121 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
122 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG);
123 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG);
124 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG);
125 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG);
126 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG);
127 SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG);
128 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG);
129 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG);
131 // Inline asm support
132 std::vector<unsigned>
133 getRegClassForInlineAsmConstraint(const std::string &Constraint,
137 SDValue ExpandADDSUB(SDNode *Op, SelectionDAG &DAG);
139 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
142 LowerFormalArguments(SDValue Chain,
143 CallingConv::ID CallConv,
145 const SmallVectorImpl<ISD::InputArg> &Ins,
146 DebugLoc dl, SelectionDAG &DAG,
147 SmallVectorImpl<SDValue> &InVals);
150 LowerCall(SDValue Chain, SDValue Callee,
151 CallingConv::ID CallConv, bool isVarArg,
153 const SmallVectorImpl<ISD::OutputArg> &Outs,
154 const SmallVectorImpl<ISD::InputArg> &Ins,
155 DebugLoc dl, SelectionDAG &DAG,
156 SmallVectorImpl<SDValue> &InVals);
159 LowerReturn(SDValue Chain,
160 CallingConv::ID CallConv, bool isVarArg,
161 const SmallVectorImpl<ISD::OutputArg> &Outs,
162 DebugLoc dl, SelectionDAG &DAG);
165 CanLowerReturn(CallingConv::ID CallConv, bool isVarArg,
166 const SmallVectorImpl<EVT> &OutTys,
167 const SmallVectorImpl<ISD::ArgFlagsTy> &ArgsFlags,
172 #endif // XCOREISELLOWERING_H