1 //===- LoopStrengthReduce.cpp - Strength Reduce IVs in Loops --------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This transformation analyzes and transforms the induction variables (and
11 // computations derived from them) into forms suitable for efficient execution
14 // This pass performs a strength reduction on array references inside loops that
15 // have as one or more of their components the loop induction variable, it
16 // rewrites expressions to take advantage of scaled-index addressing modes
17 // available on the target, and it performs a variety of other optimizations
18 // related to loop induction variables.
20 // Terminology note: this code has a lot of handling for "post-increment" or
21 // "post-inc" users. This is not talking about post-increment addressing modes;
22 // it is instead talking about code like this:
24 // %i = phi [ 0, %entry ], [ %i.next, %latch ]
26 // %i.next = add %i, 1
27 // %c = icmp eq %i.next, %n
29 // The SCEV for %i is {0,+,1}<%L>. The SCEV for %i.next is {1,+,1}<%L>, however
30 // it's useful to think about these as the same register, with some uses using
31 // the value of the register before the add and some using // it after. In this
32 // example, the icmp is a post-increment user, since it uses %i.next, which is
33 // the value of the induction variable after the increment. The other common
34 // case of post-increment users is users outside the loop.
36 // TODO: More sophistication in the way Formulae are generated and filtered.
38 // TODO: Handle multiple loops at a time.
40 // TODO: Should the addressing mode BaseGV be changed to a ConstantExpr instead
43 // TODO: When truncation is free, truncate ICmp users' operands to make it a
44 // smaller encoding (on x86 at least).
46 // TODO: When a negated register is used by an add (such as in a list of
47 // multiple base registers, or as the increment expression in an addrec),
48 // we may not actually need both reg and (-1 * reg) in registers; the
49 // negation can be implemented by using a sub instead of an add. The
50 // lack of support for taking this into consideration when making
51 // register pressure decisions is partly worked around by the "Special"
54 //===----------------------------------------------------------------------===//
56 #define DEBUG_TYPE "loop-reduce"
57 #include "llvm/Transforms/Scalar.h"
58 #include "llvm/ADT/DenseSet.h"
59 #include "llvm/ADT/SetVector.h"
60 #include "llvm/ADT/SmallBitVector.h"
61 #include "llvm/ADT/STLExtras.h"
62 #include "llvm/Analysis/Dominators.h"
63 #include "llvm/Analysis/IVUsers.h"
64 #include "llvm/Analysis/LoopPass.h"
65 #include "llvm/Analysis/ScalarEvolutionExpander.h"
66 #include "llvm/Analysis/TargetTransformInfo.h"
67 #include "llvm/Assembly/Writer.h"
68 #include "llvm/IR/Constants.h"
69 #include "llvm/IR/DerivedTypes.h"
70 #include "llvm/IR/Instructions.h"
71 #include "llvm/IR/IntrinsicInst.h"
72 #include "llvm/Support/CommandLine.h"
73 #include "llvm/Support/Debug.h"
74 #include "llvm/Support/ValueHandle.h"
75 #include "llvm/Support/raw_ostream.h"
76 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
77 #include "llvm/Transforms/Utils/Local.h"
81 /// MaxIVUsers is an arbitrary threshold that provides an early opportunitiy for
82 /// bail out. This threshold is far beyond the number of users that LSR can
83 /// conceivably solve, so it should not affect generated code, but catches the
84 /// worst cases before LSR burns too much compile time and stack space.
85 static const unsigned MaxIVUsers = 200;
87 // Temporary flag to cleanup congruent phis after LSR phi expansion.
88 // It's currently disabled until we can determine whether it's truly useful or
89 // not. The flag should be removed after the v3.0 release.
90 // This is now needed for ivchains.
91 static cl::opt<bool> EnablePhiElim(
92 "enable-lsr-phielim", cl::Hidden, cl::init(true),
93 cl::desc("Enable LSR phi elimination"));
96 // Stress test IV chain generation.
97 static cl::opt<bool> StressIVChain(
98 "stress-ivchain", cl::Hidden, cl::init(false),
99 cl::desc("Stress test LSR IV chains"));
101 static bool StressIVChain = false;
106 /// RegSortData - This class holds data which is used to order reuse candidates.
109 /// UsedByIndices - This represents the set of LSRUse indices which reference
110 /// a particular register.
111 SmallBitVector UsedByIndices;
115 void print(raw_ostream &OS) const;
121 void RegSortData::print(raw_ostream &OS) const {
122 OS << "[NumUses=" << UsedByIndices.count() << ']';
125 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
126 void RegSortData::dump() const {
127 print(errs()); errs() << '\n';
133 /// RegUseTracker - Map register candidates to information about how they are
135 class RegUseTracker {
136 typedef DenseMap<const SCEV *, RegSortData> RegUsesTy;
138 RegUsesTy RegUsesMap;
139 SmallVector<const SCEV *, 16> RegSequence;
142 void CountRegister(const SCEV *Reg, size_t LUIdx);
143 void DropRegister(const SCEV *Reg, size_t LUIdx);
144 void SwapAndDropUse(size_t LUIdx, size_t LastLUIdx);
146 bool isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const;
148 const SmallBitVector &getUsedByIndices(const SCEV *Reg) const;
152 typedef SmallVectorImpl<const SCEV *>::iterator iterator;
153 typedef SmallVectorImpl<const SCEV *>::const_iterator const_iterator;
154 iterator begin() { return RegSequence.begin(); }
155 iterator end() { return RegSequence.end(); }
156 const_iterator begin() const { return RegSequence.begin(); }
157 const_iterator end() const { return RegSequence.end(); }
163 RegUseTracker::CountRegister(const SCEV *Reg, size_t LUIdx) {
164 std::pair<RegUsesTy::iterator, bool> Pair =
165 RegUsesMap.insert(std::make_pair(Reg, RegSortData()));
166 RegSortData &RSD = Pair.first->second;
168 RegSequence.push_back(Reg);
169 RSD.UsedByIndices.resize(std::max(RSD.UsedByIndices.size(), LUIdx + 1));
170 RSD.UsedByIndices.set(LUIdx);
174 RegUseTracker::DropRegister(const SCEV *Reg, size_t LUIdx) {
175 RegUsesTy::iterator It = RegUsesMap.find(Reg);
176 assert(It != RegUsesMap.end());
177 RegSortData &RSD = It->second;
178 assert(RSD.UsedByIndices.size() > LUIdx);
179 RSD.UsedByIndices.reset(LUIdx);
183 RegUseTracker::SwapAndDropUse(size_t LUIdx, size_t LastLUIdx) {
184 assert(LUIdx <= LastLUIdx);
186 // Update RegUses. The data structure is not optimized for this purpose;
187 // we must iterate through it and update each of the bit vectors.
188 for (RegUsesTy::iterator I = RegUsesMap.begin(), E = RegUsesMap.end();
190 SmallBitVector &UsedByIndices = I->second.UsedByIndices;
191 if (LUIdx < UsedByIndices.size())
192 UsedByIndices[LUIdx] =
193 LastLUIdx < UsedByIndices.size() ? UsedByIndices[LastLUIdx] : 0;
194 UsedByIndices.resize(std::min(UsedByIndices.size(), LastLUIdx));
199 RegUseTracker::isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const {
200 RegUsesTy::const_iterator I = RegUsesMap.find(Reg);
201 if (I == RegUsesMap.end())
203 const SmallBitVector &UsedByIndices = I->second.UsedByIndices;
204 int i = UsedByIndices.find_first();
205 if (i == -1) return false;
206 if ((size_t)i != LUIdx) return true;
207 return UsedByIndices.find_next(i) != -1;
210 const SmallBitVector &RegUseTracker::getUsedByIndices(const SCEV *Reg) const {
211 RegUsesTy::const_iterator I = RegUsesMap.find(Reg);
212 assert(I != RegUsesMap.end() && "Unknown register!");
213 return I->second.UsedByIndices;
216 void RegUseTracker::clear() {
223 /// Formula - This class holds information that describes a formula for
224 /// computing satisfying a use. It may include broken-out immediates and scaled
227 /// Global base address used for complex addressing.
230 /// Base offset for complex addressing.
233 /// Whether any complex addressing has a base register.
236 /// The scale of any complex addressing.
239 /// BaseRegs - The list of "base" registers for this use. When this is
241 SmallVector<const SCEV *, 4> BaseRegs;
243 /// ScaledReg - The 'scaled' register for this use. This should be non-null
244 /// when Scale is not zero.
245 const SCEV *ScaledReg;
247 /// UnfoldedOffset - An additional constant offset which added near the
248 /// use. This requires a temporary register, but the offset itself can
249 /// live in an add immediate field rather than a register.
250 int64_t UnfoldedOffset;
253 : BaseGV(0), BaseOffset(0), HasBaseReg(false), Scale(0), ScaledReg(0),
256 void InitialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE);
258 unsigned getNumRegs() const;
259 Type *getType() const;
261 void DeleteBaseReg(const SCEV *&S);
263 bool referencesReg(const SCEV *S) const;
264 bool hasRegsUsedByUsesOtherThan(size_t LUIdx,
265 const RegUseTracker &RegUses) const;
267 void print(raw_ostream &OS) const;
273 /// DoInitialMatch - Recursion helper for InitialMatch.
274 static void DoInitialMatch(const SCEV *S, Loop *L,
275 SmallVectorImpl<const SCEV *> &Good,
276 SmallVectorImpl<const SCEV *> &Bad,
277 ScalarEvolution &SE) {
278 // Collect expressions which properly dominate the loop header.
279 if (SE.properlyDominates(S, L->getHeader())) {
284 // Look at add operands.
285 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
286 for (SCEVAddExpr::op_iterator I = Add->op_begin(), E = Add->op_end();
288 DoInitialMatch(*I, L, Good, Bad, SE);
292 // Look at addrec operands.
293 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S))
294 if (!AR->getStart()->isZero()) {
295 DoInitialMatch(AR->getStart(), L, Good, Bad, SE);
296 DoInitialMatch(SE.getAddRecExpr(SE.getConstant(AR->getType(), 0),
297 AR->getStepRecurrence(SE),
298 // FIXME: AR->getNoWrapFlags()
299 AR->getLoop(), SCEV::FlagAnyWrap),
304 // Handle a multiplication by -1 (negation) if it didn't fold.
305 if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S))
306 if (Mul->getOperand(0)->isAllOnesValue()) {
307 SmallVector<const SCEV *, 4> Ops(Mul->op_begin()+1, Mul->op_end());
308 const SCEV *NewMul = SE.getMulExpr(Ops);
310 SmallVector<const SCEV *, 4> MyGood;
311 SmallVector<const SCEV *, 4> MyBad;
312 DoInitialMatch(NewMul, L, MyGood, MyBad, SE);
313 const SCEV *NegOne = SE.getSCEV(ConstantInt::getAllOnesValue(
314 SE.getEffectiveSCEVType(NewMul->getType())));
315 for (SmallVectorImpl<const SCEV *>::const_iterator I = MyGood.begin(),
316 E = MyGood.end(); I != E; ++I)
317 Good.push_back(SE.getMulExpr(NegOne, *I));
318 for (SmallVectorImpl<const SCEV *>::const_iterator I = MyBad.begin(),
319 E = MyBad.end(); I != E; ++I)
320 Bad.push_back(SE.getMulExpr(NegOne, *I));
324 // Ok, we can't do anything interesting. Just stuff the whole thing into a
325 // register and hope for the best.
329 /// InitialMatch - Incorporate loop-variant parts of S into this Formula,
330 /// attempting to keep all loop-invariant and loop-computable values in a
331 /// single base register.
332 void Formula::InitialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE) {
333 SmallVector<const SCEV *, 4> Good;
334 SmallVector<const SCEV *, 4> Bad;
335 DoInitialMatch(S, L, Good, Bad, SE);
337 const SCEV *Sum = SE.getAddExpr(Good);
339 BaseRegs.push_back(Sum);
343 const SCEV *Sum = SE.getAddExpr(Bad);
345 BaseRegs.push_back(Sum);
350 /// getNumRegs - Return the total number of register operands used by this
351 /// formula. This does not include register uses implied by non-constant
353 unsigned Formula::getNumRegs() const {
354 return !!ScaledReg + BaseRegs.size();
357 /// getType - Return the type of this formula, if it has one, or null
358 /// otherwise. This type is meaningless except for the bit size.
359 Type *Formula::getType() const {
360 return !BaseRegs.empty() ? BaseRegs.front()->getType() :
361 ScaledReg ? ScaledReg->getType() :
362 BaseGV ? BaseGV->getType() :
366 /// DeleteBaseReg - Delete the given base reg from the BaseRegs list.
367 void Formula::DeleteBaseReg(const SCEV *&S) {
368 if (&S != &BaseRegs.back())
369 std::swap(S, BaseRegs.back());
373 /// referencesReg - Test if this formula references the given register.
374 bool Formula::referencesReg(const SCEV *S) const {
375 return S == ScaledReg ||
376 std::find(BaseRegs.begin(), BaseRegs.end(), S) != BaseRegs.end();
379 /// hasRegsUsedByUsesOtherThan - Test whether this formula uses registers
380 /// which are used by uses other than the use with the given index.
381 bool Formula::hasRegsUsedByUsesOtherThan(size_t LUIdx,
382 const RegUseTracker &RegUses) const {
384 if (RegUses.isRegUsedByUsesOtherThan(ScaledReg, LUIdx))
386 for (SmallVectorImpl<const SCEV *>::const_iterator I = BaseRegs.begin(),
387 E = BaseRegs.end(); I != E; ++I)
388 if (RegUses.isRegUsedByUsesOtherThan(*I, LUIdx))
393 void Formula::print(raw_ostream &OS) const {
396 if (!First) OS << " + "; else First = false;
397 WriteAsOperand(OS, BaseGV, /*PrintType=*/false);
399 if (BaseOffset != 0) {
400 if (!First) OS << " + "; else First = false;
403 for (SmallVectorImpl<const SCEV *>::const_iterator I = BaseRegs.begin(),
404 E = BaseRegs.end(); I != E; ++I) {
405 if (!First) OS << " + "; else First = false;
406 OS << "reg(" << **I << ')';
408 if (HasBaseReg && BaseRegs.empty()) {
409 if (!First) OS << " + "; else First = false;
410 OS << "**error: HasBaseReg**";
411 } else if (!HasBaseReg && !BaseRegs.empty()) {
412 if (!First) OS << " + "; else First = false;
413 OS << "**error: !HasBaseReg**";
416 if (!First) OS << " + "; else First = false;
417 OS << Scale << "*reg(";
424 if (UnfoldedOffset != 0) {
425 if (!First) OS << " + "; else First = false;
426 OS << "imm(" << UnfoldedOffset << ')';
430 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
431 void Formula::dump() const {
432 print(errs()); errs() << '\n';
436 /// isAddRecSExtable - Return true if the given addrec can be sign-extended
437 /// without changing its value.
438 static bool isAddRecSExtable(const SCEVAddRecExpr *AR, ScalarEvolution &SE) {
440 IntegerType::get(SE.getContext(), SE.getTypeSizeInBits(AR->getType()) + 1);
441 return isa<SCEVAddRecExpr>(SE.getSignExtendExpr(AR, WideTy));
444 /// isAddSExtable - Return true if the given add can be sign-extended
445 /// without changing its value.
446 static bool isAddSExtable(const SCEVAddExpr *A, ScalarEvolution &SE) {
448 IntegerType::get(SE.getContext(), SE.getTypeSizeInBits(A->getType()) + 1);
449 return isa<SCEVAddExpr>(SE.getSignExtendExpr(A, WideTy));
452 /// isMulSExtable - Return true if the given mul can be sign-extended
453 /// without changing its value.
454 static bool isMulSExtable(const SCEVMulExpr *M, ScalarEvolution &SE) {
456 IntegerType::get(SE.getContext(),
457 SE.getTypeSizeInBits(M->getType()) * M->getNumOperands());
458 return isa<SCEVMulExpr>(SE.getSignExtendExpr(M, WideTy));
461 /// getExactSDiv - Return an expression for LHS /s RHS, if it can be determined
462 /// and if the remainder is known to be zero, or null otherwise. If
463 /// IgnoreSignificantBits is true, expressions like (X * Y) /s Y are simplified
464 /// to Y, ignoring that the multiplication may overflow, which is useful when
465 /// the result will be used in a context where the most significant bits are
467 static const SCEV *getExactSDiv(const SCEV *LHS, const SCEV *RHS,
469 bool IgnoreSignificantBits = false) {
470 // Handle the trivial case, which works for any SCEV type.
472 return SE.getConstant(LHS->getType(), 1);
474 // Handle a few RHS special cases.
475 const SCEVConstant *RC = dyn_cast<SCEVConstant>(RHS);
477 const APInt &RA = RC->getValue()->getValue();
478 // Handle x /s -1 as x * -1, to give ScalarEvolution a chance to do
480 if (RA.isAllOnesValue())
481 return SE.getMulExpr(LHS, RC);
482 // Handle x /s 1 as x.
487 // Check for a division of a constant by a constant.
488 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(LHS)) {
491 const APInt &LA = C->getValue()->getValue();
492 const APInt &RA = RC->getValue()->getValue();
493 if (LA.srem(RA) != 0)
495 return SE.getConstant(LA.sdiv(RA));
498 // Distribute the sdiv over addrec operands, if the addrec doesn't overflow.
499 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(LHS)) {
500 if (IgnoreSignificantBits || isAddRecSExtable(AR, SE)) {
501 const SCEV *Step = getExactSDiv(AR->getStepRecurrence(SE), RHS, SE,
502 IgnoreSignificantBits);
504 const SCEV *Start = getExactSDiv(AR->getStart(), RHS, SE,
505 IgnoreSignificantBits);
506 if (!Start) return 0;
507 // FlagNW is independent of the start value, step direction, and is
508 // preserved with smaller magnitude steps.
509 // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
510 return SE.getAddRecExpr(Start, Step, AR->getLoop(), SCEV::FlagAnyWrap);
515 // Distribute the sdiv over add operands, if the add doesn't overflow.
516 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(LHS)) {
517 if (IgnoreSignificantBits || isAddSExtable(Add, SE)) {
518 SmallVector<const SCEV *, 8> Ops;
519 for (SCEVAddExpr::op_iterator I = Add->op_begin(), E = Add->op_end();
521 const SCEV *Op = getExactSDiv(*I, RHS, SE,
522 IgnoreSignificantBits);
526 return SE.getAddExpr(Ops);
531 // Check for a multiply operand that we can pull RHS out of.
532 if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(LHS)) {
533 if (IgnoreSignificantBits || isMulSExtable(Mul, SE)) {
534 SmallVector<const SCEV *, 4> Ops;
536 for (SCEVMulExpr::op_iterator I = Mul->op_begin(), E = Mul->op_end();
540 if (const SCEV *Q = getExactSDiv(S, RHS, SE,
541 IgnoreSignificantBits)) {
547 return Found ? SE.getMulExpr(Ops) : 0;
552 // Otherwise we don't know.
556 /// ExtractImmediate - If S involves the addition of a constant integer value,
557 /// return that integer value, and mutate S to point to a new SCEV with that
559 static int64_t ExtractImmediate(const SCEV *&S, ScalarEvolution &SE) {
560 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(S)) {
561 if (C->getValue()->getValue().getMinSignedBits() <= 64) {
562 S = SE.getConstant(C->getType(), 0);
563 return C->getValue()->getSExtValue();
565 } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
566 SmallVector<const SCEV *, 8> NewOps(Add->op_begin(), Add->op_end());
567 int64_t Result = ExtractImmediate(NewOps.front(), SE);
569 S = SE.getAddExpr(NewOps);
571 } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
572 SmallVector<const SCEV *, 8> NewOps(AR->op_begin(), AR->op_end());
573 int64_t Result = ExtractImmediate(NewOps.front(), SE);
575 S = SE.getAddRecExpr(NewOps, AR->getLoop(),
576 // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
583 /// ExtractSymbol - If S involves the addition of a GlobalValue address,
584 /// return that symbol, and mutate S to point to a new SCEV with that
586 static GlobalValue *ExtractSymbol(const SCEV *&S, ScalarEvolution &SE) {
587 if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(S)) {
588 if (GlobalValue *GV = dyn_cast<GlobalValue>(U->getValue())) {
589 S = SE.getConstant(GV->getType(), 0);
592 } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
593 SmallVector<const SCEV *, 8> NewOps(Add->op_begin(), Add->op_end());
594 GlobalValue *Result = ExtractSymbol(NewOps.back(), SE);
596 S = SE.getAddExpr(NewOps);
598 } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
599 SmallVector<const SCEV *, 8> NewOps(AR->op_begin(), AR->op_end());
600 GlobalValue *Result = ExtractSymbol(NewOps.front(), SE);
602 S = SE.getAddRecExpr(NewOps, AR->getLoop(),
603 // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
610 /// isAddressUse - Returns true if the specified instruction is using the
611 /// specified value as an address.
612 static bool isAddressUse(Instruction *Inst, Value *OperandVal) {
613 bool isAddress = isa<LoadInst>(Inst);
614 if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
615 if (SI->getOperand(1) == OperandVal)
617 } else if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
618 // Addressing modes can also be folded into prefetches and a variety
620 switch (II->getIntrinsicID()) {
622 case Intrinsic::prefetch:
623 case Intrinsic::x86_sse_storeu_ps:
624 case Intrinsic::x86_sse2_storeu_pd:
625 case Intrinsic::x86_sse2_storeu_dq:
626 case Intrinsic::x86_sse2_storel_dq:
627 if (II->getArgOperand(0) == OperandVal)
635 /// getAccessType - Return the type of the memory being accessed.
636 static Type *getAccessType(const Instruction *Inst) {
637 Type *AccessTy = Inst->getType();
638 if (const StoreInst *SI = dyn_cast<StoreInst>(Inst))
639 AccessTy = SI->getOperand(0)->getType();
640 else if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
641 // Addressing modes can also be folded into prefetches and a variety
643 switch (II->getIntrinsicID()) {
645 case Intrinsic::x86_sse_storeu_ps:
646 case Intrinsic::x86_sse2_storeu_pd:
647 case Intrinsic::x86_sse2_storeu_dq:
648 case Intrinsic::x86_sse2_storel_dq:
649 AccessTy = II->getArgOperand(0)->getType();
654 // All pointers have the same requirements, so canonicalize them to an
655 // arbitrary pointer type to minimize variation.
656 if (PointerType *PTy = dyn_cast<PointerType>(AccessTy))
657 AccessTy = PointerType::get(IntegerType::get(PTy->getContext(), 1),
658 PTy->getAddressSpace());
663 /// isExistingPhi - Return true if this AddRec is already a phi in its loop.
664 static bool isExistingPhi(const SCEVAddRecExpr *AR, ScalarEvolution &SE) {
665 for (BasicBlock::iterator I = AR->getLoop()->getHeader()->begin();
666 PHINode *PN = dyn_cast<PHINode>(I); ++I) {
667 if (SE.isSCEVable(PN->getType()) &&
668 (SE.getEffectiveSCEVType(PN->getType()) ==
669 SE.getEffectiveSCEVType(AR->getType())) &&
670 SE.getSCEV(PN) == AR)
676 /// Check if expanding this expression is likely to incur significant cost. This
677 /// is tricky because SCEV doesn't track which expressions are actually computed
678 /// by the current IR.
680 /// We currently allow expansion of IV increments that involve adds,
681 /// multiplication by constants, and AddRecs from existing phis.
683 /// TODO: Allow UDivExpr if we can find an existing IV increment that is an
684 /// obvious multiple of the UDivExpr.
685 static bool isHighCostExpansion(const SCEV *S,
686 SmallPtrSet<const SCEV*, 8> &Processed,
687 ScalarEvolution &SE) {
688 // Zero/One operand expressions
689 switch (S->getSCEVType()) {
694 return isHighCostExpansion(cast<SCEVTruncateExpr>(S)->getOperand(),
697 return isHighCostExpansion(cast<SCEVZeroExtendExpr>(S)->getOperand(),
700 return isHighCostExpansion(cast<SCEVSignExtendExpr>(S)->getOperand(),
704 if (!Processed.insert(S))
707 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
708 for (SCEVAddExpr::op_iterator I = Add->op_begin(), E = Add->op_end();
710 if (isHighCostExpansion(*I, Processed, SE))
716 if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S)) {
717 if (Mul->getNumOperands() == 2) {
718 // Multiplication by a constant is ok
719 if (isa<SCEVConstant>(Mul->getOperand(0)))
720 return isHighCostExpansion(Mul->getOperand(1), Processed, SE);
722 // If we have the value of one operand, check if an existing
723 // multiplication already generates this expression.
724 if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(Mul->getOperand(1))) {
725 Value *UVal = U->getValue();
726 for (Value::use_iterator UI = UVal->use_begin(), UE = UVal->use_end();
728 // If U is a constant, it may be used by a ConstantExpr.
729 Instruction *User = dyn_cast<Instruction>(*UI);
730 if (User && User->getOpcode() == Instruction::Mul
731 && SE.isSCEVable(User->getType())) {
732 return SE.getSCEV(User) == Mul;
739 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
740 if (isExistingPhi(AR, SE))
744 // Fow now, consider any other type of expression (div/mul/min/max) high cost.
748 /// DeleteTriviallyDeadInstructions - If any of the instructions is the
749 /// specified set are trivially dead, delete them and see if this makes any of
750 /// their operands subsequently dead.
752 DeleteTriviallyDeadInstructions(SmallVectorImpl<WeakVH> &DeadInsts) {
753 bool Changed = false;
755 while (!DeadInsts.empty()) {
756 Value *V = DeadInsts.pop_back_val();
757 Instruction *I = dyn_cast_or_null<Instruction>(V);
759 if (I == 0 || !isInstructionTriviallyDead(I))
762 for (User::op_iterator OI = I->op_begin(), E = I->op_end(); OI != E; ++OI)
763 if (Instruction *U = dyn_cast<Instruction>(*OI)) {
766 DeadInsts.push_back(U);
769 I->eraseFromParent();
779 // Check if it is legal to fold 2 base registers.
780 static bool isLegal2RegAMUse(const TargetTransformInfo &TTI, const LSRUse &LU,
782 // Get the cost of the scaling factor used in F for LU.
783 static unsigned getScalingFactorCost(const TargetTransformInfo &TTI,
784 const LSRUse &LU, const Formula &F);
788 /// Cost - This class is used to measure and compare candidate formulae.
790 /// TODO: Some of these could be merged. Also, a lexical ordering
791 /// isn't always optimal.
795 unsigned NumBaseAdds;
802 : NumRegs(0), AddRecCost(0), NumIVMuls(0), NumBaseAdds(0), ImmCost(0),
803 SetupCost(0), ScaleCost(0) {}
805 bool operator<(const Cost &Other) const;
810 // Once any of the metrics loses, they must all remain losers.
812 return ((NumRegs | AddRecCost | NumIVMuls | NumBaseAdds
813 | ImmCost | SetupCost | ScaleCost) != ~0u)
814 || ((NumRegs & AddRecCost & NumIVMuls & NumBaseAdds
815 & ImmCost & SetupCost & ScaleCost) == ~0u);
820 assert(isValid() && "invalid cost");
821 return NumRegs == ~0u;
824 void RateFormula(const TargetTransformInfo &TTI,
826 SmallPtrSet<const SCEV *, 16> &Regs,
827 const DenseSet<const SCEV *> &VisitedRegs,
829 const SmallVectorImpl<int64_t> &Offsets,
830 ScalarEvolution &SE, DominatorTree &DT,
832 SmallPtrSet<const SCEV *, 16> *LoserRegs = 0);
834 void print(raw_ostream &OS) const;
838 void RateRegister(const SCEV *Reg,
839 SmallPtrSet<const SCEV *, 16> &Regs,
841 ScalarEvolution &SE, DominatorTree &DT);
842 void RatePrimaryRegister(const SCEV *Reg,
843 SmallPtrSet<const SCEV *, 16> &Regs,
845 ScalarEvolution &SE, DominatorTree &DT,
846 SmallPtrSet<const SCEV *, 16> *LoserRegs);
851 /// RateRegister - Tally up interesting quantities from the given register.
852 void Cost::RateRegister(const SCEV *Reg,
853 SmallPtrSet<const SCEV *, 16> &Regs,
855 ScalarEvolution &SE, DominatorTree &DT) {
856 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(Reg)) {
857 // If this is an addrec for another loop, don't second-guess its addrec phi
858 // nodes. LSR isn't currently smart enough to reason about more than one
859 // loop at a time. LSR has already run on inner loops, will not run on outer
860 // loops, and cannot be expected to change sibling loops.
861 if (AR->getLoop() != L) {
862 // If the AddRec exists, consider it's register free and leave it alone.
863 if (isExistingPhi(AR, SE))
866 // Otherwise, do not consider this formula at all.
870 AddRecCost += 1; /// TODO: This should be a function of the stride.
872 // Add the step value register, if it needs one.
873 // TODO: The non-affine case isn't precisely modeled here.
874 if (!AR->isAffine() || !isa<SCEVConstant>(AR->getOperand(1))) {
875 if (!Regs.count(AR->getOperand(1))) {
876 RateRegister(AR->getOperand(1), Regs, L, SE, DT);
884 // Rough heuristic; favor registers which don't require extra setup
885 // instructions in the preheader.
886 if (!isa<SCEVUnknown>(Reg) &&
887 !isa<SCEVConstant>(Reg) &&
888 !(isa<SCEVAddRecExpr>(Reg) &&
889 (isa<SCEVUnknown>(cast<SCEVAddRecExpr>(Reg)->getStart()) ||
890 isa<SCEVConstant>(cast<SCEVAddRecExpr>(Reg)->getStart()))))
893 NumIVMuls += isa<SCEVMulExpr>(Reg) &&
894 SE.hasComputableLoopEvolution(Reg, L);
897 /// RatePrimaryRegister - Record this register in the set. If we haven't seen it
898 /// before, rate it. Optional LoserRegs provides a way to declare any formula
899 /// that refers to one of those regs an instant loser.
900 void Cost::RatePrimaryRegister(const SCEV *Reg,
901 SmallPtrSet<const SCEV *, 16> &Regs,
903 ScalarEvolution &SE, DominatorTree &DT,
904 SmallPtrSet<const SCEV *, 16> *LoserRegs) {
905 if (LoserRegs && LoserRegs->count(Reg)) {
909 if (Regs.insert(Reg)) {
910 RateRegister(Reg, Regs, L, SE, DT);
911 if (LoserRegs && isLoser())
912 LoserRegs->insert(Reg);
916 void Cost::RateFormula(const TargetTransformInfo &TTI,
918 SmallPtrSet<const SCEV *, 16> &Regs,
919 const DenseSet<const SCEV *> &VisitedRegs,
921 const SmallVectorImpl<int64_t> &Offsets,
922 ScalarEvolution &SE, DominatorTree &DT,
924 SmallPtrSet<const SCEV *, 16> *LoserRegs) {
925 // Tally up the registers.
926 if (const SCEV *ScaledReg = F.ScaledReg) {
927 if (VisitedRegs.count(ScaledReg)) {
931 RatePrimaryRegister(ScaledReg, Regs, L, SE, DT, LoserRegs);
935 for (SmallVectorImpl<const SCEV *>::const_iterator I = F.BaseRegs.begin(),
936 E = F.BaseRegs.end(); I != E; ++I) {
937 const SCEV *BaseReg = *I;
938 if (VisitedRegs.count(BaseReg)) {
942 RatePrimaryRegister(BaseReg, Regs, L, SE, DT, LoserRegs);
947 // Determine how many (unfolded) adds we'll need inside the loop.
948 size_t NumBaseParts = F.BaseRegs.size() + (F.UnfoldedOffset != 0);
949 if (NumBaseParts > 1)
950 // Do not count the base and a possible second register if the target
951 // allows to fold 2 registers.
952 NumBaseAdds += NumBaseParts - (1 + isLegal2RegAMUse(TTI, LU, F));
954 // Accumulate non-free scaling amounts.
955 ScaleCost += getScalingFactorCost(TTI, LU, F);
957 // Tally up the non-zero immediates.
958 for (SmallVectorImpl<int64_t>::const_iterator I = Offsets.begin(),
959 E = Offsets.end(); I != E; ++I) {
960 int64_t Offset = (uint64_t)*I + F.BaseOffset;
962 ImmCost += 64; // Handle symbolic values conservatively.
963 // TODO: This should probably be the pointer size.
964 else if (Offset != 0)
965 ImmCost += APInt(64, Offset, true).getMinSignedBits();
967 assert(isValid() && "invalid cost");
970 /// Loose - Set this cost to a losing value.
981 /// operator< - Choose the lower cost.
982 bool Cost::operator<(const Cost &Other) const {
983 if (NumRegs != Other.NumRegs)
984 return NumRegs < Other.NumRegs;
985 if (AddRecCost != Other.AddRecCost)
986 return AddRecCost < Other.AddRecCost;
987 if (NumIVMuls != Other.NumIVMuls)
988 return NumIVMuls < Other.NumIVMuls;
989 if (NumBaseAdds != Other.NumBaseAdds)
990 return NumBaseAdds < Other.NumBaseAdds;
991 if (ScaleCost != Other.ScaleCost)
992 return ScaleCost < Other.ScaleCost;
993 if (ImmCost != Other.ImmCost)
994 return ImmCost < Other.ImmCost;
995 if (SetupCost != Other.SetupCost)
996 return SetupCost < Other.SetupCost;
1000 void Cost::print(raw_ostream &OS) const {
1001 OS << NumRegs << " reg" << (NumRegs == 1 ? "" : "s");
1002 if (AddRecCost != 0)
1003 OS << ", with addrec cost " << AddRecCost;
1005 OS << ", plus " << NumIVMuls << " IV mul" << (NumIVMuls == 1 ? "" : "s");
1006 if (NumBaseAdds != 0)
1007 OS << ", plus " << NumBaseAdds << " base add"
1008 << (NumBaseAdds == 1 ? "" : "s");
1010 OS << ", plus " << ScaleCost << " scale cost";
1012 OS << ", plus " << ImmCost << " imm cost";
1014 OS << ", plus " << SetupCost << " setup cost";
1017 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1018 void Cost::dump() const {
1019 print(errs()); errs() << '\n';
1025 /// LSRFixup - An operand value in an instruction which is to be replaced
1026 /// with some equivalent, possibly strength-reduced, replacement.
1028 /// UserInst - The instruction which will be updated.
1029 Instruction *UserInst;
1031 /// OperandValToReplace - The operand of the instruction which will
1032 /// be replaced. The operand may be used more than once; every instance
1033 /// will be replaced.
1034 Value *OperandValToReplace;
1036 /// PostIncLoops - If this user is to use the post-incremented value of an
1037 /// induction variable, this variable is non-null and holds the loop
1038 /// associated with the induction variable.
1039 PostIncLoopSet PostIncLoops;
1041 /// LUIdx - The index of the LSRUse describing the expression which
1042 /// this fixup needs, minus an offset (below).
1045 /// Offset - A constant offset to be added to the LSRUse expression.
1046 /// This allows multiple fixups to share the same LSRUse with different
1047 /// offsets, for example in an unrolled loop.
1050 bool isUseFullyOutsideLoop(const Loop *L) const;
1054 void print(raw_ostream &OS) const;
1060 LSRFixup::LSRFixup()
1061 : UserInst(0), OperandValToReplace(0), LUIdx(~size_t(0)), Offset(0) {}
1063 /// isUseFullyOutsideLoop - Test whether this fixup always uses its
1064 /// value outside of the given loop.
1065 bool LSRFixup::isUseFullyOutsideLoop(const Loop *L) const {
1066 // PHI nodes use their value in their incoming blocks.
1067 if (const PHINode *PN = dyn_cast<PHINode>(UserInst)) {
1068 for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
1069 if (PN->getIncomingValue(i) == OperandValToReplace &&
1070 L->contains(PN->getIncomingBlock(i)))
1075 return !L->contains(UserInst);
1078 void LSRFixup::print(raw_ostream &OS) const {
1080 // Store is common and interesting enough to be worth special-casing.
1081 if (StoreInst *Store = dyn_cast<StoreInst>(UserInst)) {
1083 WriteAsOperand(OS, Store->getOperand(0), /*PrintType=*/false);
1084 } else if (UserInst->getType()->isVoidTy())
1085 OS << UserInst->getOpcodeName();
1087 WriteAsOperand(OS, UserInst, /*PrintType=*/false);
1089 OS << ", OperandValToReplace=";
1090 WriteAsOperand(OS, OperandValToReplace, /*PrintType=*/false);
1092 for (PostIncLoopSet::const_iterator I = PostIncLoops.begin(),
1093 E = PostIncLoops.end(); I != E; ++I) {
1094 OS << ", PostIncLoop=";
1095 WriteAsOperand(OS, (*I)->getHeader(), /*PrintType=*/false);
1098 if (LUIdx != ~size_t(0))
1099 OS << ", LUIdx=" << LUIdx;
1102 OS << ", Offset=" << Offset;
1105 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1106 void LSRFixup::dump() const {
1107 print(errs()); errs() << '\n';
1113 /// UniquifierDenseMapInfo - A DenseMapInfo implementation for holding
1114 /// DenseMaps and DenseSets of sorted SmallVectors of const SCEV*.
1115 struct UniquifierDenseMapInfo {
1116 static SmallVector<const SCEV *, 4> getEmptyKey() {
1117 SmallVector<const SCEV *, 4> V;
1118 V.push_back(reinterpret_cast<const SCEV *>(-1));
1122 static SmallVector<const SCEV *, 4> getTombstoneKey() {
1123 SmallVector<const SCEV *, 4> V;
1124 V.push_back(reinterpret_cast<const SCEV *>(-2));
1128 static unsigned getHashValue(const SmallVector<const SCEV *, 4> &V) {
1129 unsigned Result = 0;
1130 for (SmallVectorImpl<const SCEV *>::const_iterator I = V.begin(),
1131 E = V.end(); I != E; ++I)
1132 Result ^= DenseMapInfo<const SCEV *>::getHashValue(*I);
1136 static bool isEqual(const SmallVector<const SCEV *, 4> &LHS,
1137 const SmallVector<const SCEV *, 4> &RHS) {
1142 /// LSRUse - This class holds the state that LSR keeps for each use in
1143 /// IVUsers, as well as uses invented by LSR itself. It includes information
1144 /// about what kinds of things can be folded into the user, information about
1145 /// the user itself, and information about how the use may be satisfied.
1146 /// TODO: Represent multiple users of the same expression in common?
1148 DenseSet<SmallVector<const SCEV *, 4>, UniquifierDenseMapInfo> Uniquifier;
1151 /// KindType - An enum for a kind of use, indicating what types of
1152 /// scaled and immediate operands it might support.
1154 Basic, ///< A normal use, with no folding.
1155 Special, ///< A special case of basic, allowing -1 scales.
1156 Address, ///< An address use; folding according to TargetLowering
1157 ICmpZero ///< An equality icmp with both operands folded into one.
1158 // TODO: Add a generic icmp too?
1164 SmallVector<int64_t, 8> Offsets;
1168 /// AllFixupsOutsideLoop - This records whether all of the fixups using this
1169 /// LSRUse are outside of the loop, in which case some special-case heuristics
1171 bool AllFixupsOutsideLoop;
1173 /// WidestFixupType - This records the widest use type for any fixup using
1174 /// this LSRUse. FindUseWithSimilarFormula can't consider uses with different
1175 /// max fixup widths to be equivalent, because the narrower one may be relying
1176 /// on the implicit truncation to truncate away bogus bits.
1177 Type *WidestFixupType;
1179 /// Formulae - A list of ways to build a value that can satisfy this user.
1180 /// After the list is populated, one of these is selected heuristically and
1181 /// used to formulate a replacement for OperandValToReplace in UserInst.
1182 SmallVector<Formula, 12> Formulae;
1184 /// Regs - The set of register candidates used by all formulae in this LSRUse.
1185 SmallPtrSet<const SCEV *, 4> Regs;
1187 LSRUse(KindType K, Type *T) : Kind(K), AccessTy(T),
1188 MinOffset(INT64_MAX),
1189 MaxOffset(INT64_MIN),
1190 AllFixupsOutsideLoop(true),
1191 WidestFixupType(0) {}
1193 bool HasFormulaWithSameRegs(const Formula &F) const;
1194 bool InsertFormula(const Formula &F);
1195 void DeleteFormula(Formula &F);
1196 void RecomputeRegs(size_t LUIdx, RegUseTracker &Reguses);
1198 void print(raw_ostream &OS) const;
1204 /// HasFormula - Test whether this use as a formula which has the same
1205 /// registers as the given formula.
1206 bool LSRUse::HasFormulaWithSameRegs(const Formula &F) const {
1207 SmallVector<const SCEV *, 4> Key = F.BaseRegs;
1208 if (F.ScaledReg) Key.push_back(F.ScaledReg);
1209 // Unstable sort by host order ok, because this is only used for uniquifying.
1210 std::sort(Key.begin(), Key.end());
1211 return Uniquifier.count(Key);
1214 /// InsertFormula - If the given formula has not yet been inserted, add it to
1215 /// the list, and return true. Return false otherwise.
1216 bool LSRUse::InsertFormula(const Formula &F) {
1217 SmallVector<const SCEV *, 4> Key = F.BaseRegs;
1218 if (F.ScaledReg) Key.push_back(F.ScaledReg);
1219 // Unstable sort by host order ok, because this is only used for uniquifying.
1220 std::sort(Key.begin(), Key.end());
1222 if (!Uniquifier.insert(Key).second)
1225 // Using a register to hold the value of 0 is not profitable.
1226 assert((!F.ScaledReg || !F.ScaledReg->isZero()) &&
1227 "Zero allocated in a scaled register!");
1229 for (SmallVectorImpl<const SCEV *>::const_iterator I =
1230 F.BaseRegs.begin(), E = F.BaseRegs.end(); I != E; ++I)
1231 assert(!(*I)->isZero() && "Zero allocated in a base register!");
1234 // Add the formula to the list.
1235 Formulae.push_back(F);
1237 // Record registers now being used by this use.
1238 Regs.insert(F.BaseRegs.begin(), F.BaseRegs.end());
1243 /// DeleteFormula - Remove the given formula from this use's list.
1244 void LSRUse::DeleteFormula(Formula &F) {
1245 if (&F != &Formulae.back())
1246 std::swap(F, Formulae.back());
1247 Formulae.pop_back();
1250 /// RecomputeRegs - Recompute the Regs field, and update RegUses.
1251 void LSRUse::RecomputeRegs(size_t LUIdx, RegUseTracker &RegUses) {
1252 // Now that we've filtered out some formulae, recompute the Regs set.
1253 SmallPtrSet<const SCEV *, 4> OldRegs = Regs;
1255 for (SmallVectorImpl<Formula>::const_iterator I = Formulae.begin(),
1256 E = Formulae.end(); I != E; ++I) {
1257 const Formula &F = *I;
1258 if (F.ScaledReg) Regs.insert(F.ScaledReg);
1259 Regs.insert(F.BaseRegs.begin(), F.BaseRegs.end());
1262 // Update the RegTracker.
1263 for (SmallPtrSet<const SCEV *, 4>::iterator I = OldRegs.begin(),
1264 E = OldRegs.end(); I != E; ++I)
1265 if (!Regs.count(*I))
1266 RegUses.DropRegister(*I, LUIdx);
1269 void LSRUse::print(raw_ostream &OS) const {
1270 OS << "LSR Use: Kind=";
1272 case Basic: OS << "Basic"; break;
1273 case Special: OS << "Special"; break;
1274 case ICmpZero: OS << "ICmpZero"; break;
1276 OS << "Address of ";
1277 if (AccessTy->isPointerTy())
1278 OS << "pointer"; // the full pointer type could be really verbose
1283 OS << ", Offsets={";
1284 for (SmallVectorImpl<int64_t>::const_iterator I = Offsets.begin(),
1285 E = Offsets.end(); I != E; ++I) {
1287 if (llvm::next(I) != E)
1292 if (AllFixupsOutsideLoop)
1293 OS << ", all-fixups-outside-loop";
1295 if (WidestFixupType)
1296 OS << ", widest fixup type: " << *WidestFixupType;
1299 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1300 void LSRUse::dump() const {
1301 print(errs()); errs() << '\n';
1305 /// isLegalUse - Test whether the use described by AM is "legal", meaning it can
1306 /// be completely folded into the user instruction at isel time. This includes
1307 /// address-mode folding and special icmp tricks.
1308 static bool isLegalUse(const TargetTransformInfo &TTI, LSRUse::KindType Kind,
1309 Type *AccessTy, GlobalValue *BaseGV, int64_t BaseOffset,
1310 bool HasBaseReg, int64_t Scale) {
1312 case LSRUse::Address:
1313 return TTI.isLegalAddressingMode(AccessTy, BaseGV, BaseOffset, HasBaseReg, Scale);
1315 // Otherwise, just guess that reg+reg addressing is legal.
1318 case LSRUse::ICmpZero:
1319 // There's not even a target hook for querying whether it would be legal to
1320 // fold a GV into an ICmp.
1324 // ICmp only has two operands; don't allow more than two non-trivial parts.
1325 if (Scale != 0 && HasBaseReg && BaseOffset != 0)
1328 // ICmp only supports no scale or a -1 scale, as we can "fold" a -1 scale by
1329 // putting the scaled register in the other operand of the icmp.
1330 if (Scale != 0 && Scale != -1)
1333 // If we have low-level target information, ask the target if it can fold an
1334 // integer immediate on an icmp.
1335 if (BaseOffset != 0) {
1337 // ICmpZero BaseReg + BaseOffset => ICmp BaseReg, -BaseOffset
1338 // ICmpZero -1*ScaleReg + BaseOffset => ICmp ScaleReg, BaseOffset
1339 // Offs is the ICmp immediate.
1341 // The cast does the right thing with INT64_MIN.
1342 BaseOffset = -(uint64_t)BaseOffset;
1343 return TTI.isLegalICmpImmediate(BaseOffset);
1346 // ICmpZero BaseReg + -1*ScaleReg => ICmp BaseReg, ScaleReg
1350 // Only handle single-register values.
1351 return !BaseGV && Scale == 0 && BaseOffset == 0;
1353 case LSRUse::Special:
1354 // Special case Basic to handle -1 scales.
1355 return !BaseGV && (Scale == 0 || Scale == -1) && BaseOffset == 0;
1358 llvm_unreachable("Invalid LSRUse Kind!");
1361 static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset,
1362 int64_t MaxOffset, LSRUse::KindType Kind, Type *AccessTy,
1363 GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg,
1365 // Check for overflow.
1366 if (((int64_t)((uint64_t)BaseOffset + MinOffset) > BaseOffset) !=
1369 MinOffset = (uint64_t)BaseOffset + MinOffset;
1370 if (((int64_t)((uint64_t)BaseOffset + MaxOffset) > BaseOffset) !=
1373 MaxOffset = (uint64_t)BaseOffset + MaxOffset;
1375 return isLegalUse(TTI, Kind, AccessTy, BaseGV, MinOffset, HasBaseReg,
1377 isLegalUse(TTI, Kind, AccessTy, BaseGV, MaxOffset, HasBaseReg, Scale);
1380 static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset,
1381 int64_t MaxOffset, LSRUse::KindType Kind, Type *AccessTy,
1383 return isLegalUse(TTI, MinOffset, MaxOffset, Kind, AccessTy, F.BaseGV,
1384 F.BaseOffset, F.HasBaseReg, F.Scale);
1387 static bool isLegal2RegAMUse(const TargetTransformInfo &TTI, const LSRUse &LU,
1389 // If F is used as an Addressing Mode, it may fold one Base plus one
1390 // scaled register. If the scaled register is nil, do as if another
1391 // element of the base regs is a 1-scaled register.
1392 // This is possible if BaseRegs has at least 2 registers.
1394 // If this is not an address calculation, this is not an addressing mode
1396 if (LU.Kind != LSRUse::Address)
1399 // F is already scaled.
1403 // We need to keep one register for the base and one to scale.
1404 if (F.BaseRegs.size() < 2)
1407 return isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
1408 F.BaseGV, F.BaseOffset, F.HasBaseReg, 1);
1411 static unsigned getScalingFactorCost(const TargetTransformInfo &TTI,
1412 const LSRUse &LU, const Formula &F) {
1415 assert(isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind,
1416 LU.AccessTy, F) && "Illegal formula in use.");
1419 case LSRUse::Address: {
1420 int CurScaleCost = TTI.getScalingFactorCost(LU.AccessTy, F.BaseGV,
1421 F.BaseOffset, F.HasBaseReg,
1423 assert(CurScaleCost >= 0 && "Legal addressing mode has an illegal cost!");
1424 return CurScaleCost;
1426 case LSRUse::ICmpZero:
1427 // ICmpZero BaseReg + -1*ScaleReg => ICmp BaseReg, ScaleReg.
1428 // Therefore, return 0 in case F.Scale == -1.
1429 return F.Scale != -1;
1432 case LSRUse::Special:
1436 llvm_unreachable("Invalid LSRUse Kind!");
1439 static bool isAlwaysFoldable(const TargetTransformInfo &TTI,
1440 LSRUse::KindType Kind, Type *AccessTy,
1441 GlobalValue *BaseGV, int64_t BaseOffset,
1443 // Fast-path: zero is always foldable.
1444 if (BaseOffset == 0 && !BaseGV) return true;
1446 // Conservatively, create an address with an immediate and a
1447 // base and a scale.
1448 int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1;
1450 // Canonicalize a scale of 1 to a base register if the formula doesn't
1451 // already have a base register.
1452 if (!HasBaseReg && Scale == 1) {
1457 return isLegalUse(TTI, Kind, AccessTy, BaseGV, BaseOffset, HasBaseReg, Scale);
1460 static bool isAlwaysFoldable(const TargetTransformInfo &TTI,
1461 ScalarEvolution &SE, int64_t MinOffset,
1462 int64_t MaxOffset, LSRUse::KindType Kind,
1463 Type *AccessTy, const SCEV *S, bool HasBaseReg) {
1464 // Fast-path: zero is always foldable.
1465 if (S->isZero()) return true;
1467 // Conservatively, create an address with an immediate and a
1468 // base and a scale.
1469 int64_t BaseOffset = ExtractImmediate(S, SE);
1470 GlobalValue *BaseGV = ExtractSymbol(S, SE);
1472 // If there's anything else involved, it's not foldable.
1473 if (!S->isZero()) return false;
1475 // Fast-path: zero is always foldable.
1476 if (BaseOffset == 0 && !BaseGV) return true;
1478 // Conservatively, create an address with an immediate and a
1479 // base and a scale.
1480 int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1;
1482 return isLegalUse(TTI, MinOffset, MaxOffset, Kind, AccessTy, BaseGV,
1483 BaseOffset, HasBaseReg, Scale);
1488 /// UseMapDenseMapInfo - A DenseMapInfo implementation for holding
1489 /// DenseMaps and DenseSets of pairs of const SCEV* and LSRUse::Kind.
1490 struct UseMapDenseMapInfo {
1491 static std::pair<const SCEV *, LSRUse::KindType> getEmptyKey() {
1492 return std::make_pair(reinterpret_cast<const SCEV *>(-1), LSRUse::Basic);
1495 static std::pair<const SCEV *, LSRUse::KindType> getTombstoneKey() {
1496 return std::make_pair(reinterpret_cast<const SCEV *>(-2), LSRUse::Basic);
1500 getHashValue(const std::pair<const SCEV *, LSRUse::KindType> &V) {
1501 unsigned Result = DenseMapInfo<const SCEV *>::getHashValue(V.first);
1502 Result ^= DenseMapInfo<unsigned>::getHashValue(unsigned(V.second));
1506 static bool isEqual(const std::pair<const SCEV *, LSRUse::KindType> &LHS,
1507 const std::pair<const SCEV *, LSRUse::KindType> &RHS) {
1512 /// IVInc - An individual increment in a Chain of IV increments.
1513 /// Relate an IV user to an expression that computes the IV it uses from the IV
1514 /// used by the previous link in the Chain.
1516 /// For the head of a chain, IncExpr holds the absolute SCEV expression for the
1517 /// original IVOperand. The head of the chain's IVOperand is only valid during
1518 /// chain collection, before LSR replaces IV users. During chain generation,
1519 /// IncExpr can be used to find the new IVOperand that computes the same
1522 Instruction *UserInst;
1524 const SCEV *IncExpr;
1526 IVInc(Instruction *U, Value *O, const SCEV *E):
1527 UserInst(U), IVOperand(O), IncExpr(E) {}
1530 // IVChain - The list of IV increments in program order.
1531 // We typically add the head of a chain without finding subsequent links.
1533 SmallVector<IVInc,1> Incs;
1534 const SCEV *ExprBase;
1536 IVChain() : ExprBase(0) {}
1538 IVChain(const IVInc &Head, const SCEV *Base)
1539 : Incs(1, Head), ExprBase(Base) {}
1541 typedef SmallVectorImpl<IVInc>::const_iterator const_iterator;
1543 // begin - return the first increment in the chain.
1544 const_iterator begin() const {
1545 assert(!Incs.empty());
1546 return llvm::next(Incs.begin());
1548 const_iterator end() const {
1552 // hasIncs - Returns true if this chain contains any increments.
1553 bool hasIncs() const { return Incs.size() >= 2; }
1555 // add - Add an IVInc to the end of this chain.
1556 void add(const IVInc &X) { Incs.push_back(X); }
1558 // tailUserInst - Returns the last UserInst in the chain.
1559 Instruction *tailUserInst() const { return Incs.back().UserInst; }
1561 // isProfitableIncrement - Returns true if IncExpr can be profitably added to
1563 bool isProfitableIncrement(const SCEV *OperExpr,
1564 const SCEV *IncExpr,
1568 /// ChainUsers - Helper for CollectChains to track multiple IV increment uses.
1569 /// Distinguish between FarUsers that definitely cross IV increments and
1570 /// NearUsers that may be used between IV increments.
1572 SmallPtrSet<Instruction*, 4> FarUsers;
1573 SmallPtrSet<Instruction*, 4> NearUsers;
1576 /// LSRInstance - This class holds state for the main loop strength reduction
1580 ScalarEvolution &SE;
1583 const TargetTransformInfo &TTI;
1587 /// IVIncInsertPos - This is the insert position that the current loop's
1588 /// induction variable increment should be placed. In simple loops, this is
1589 /// the latch block's terminator. But in more complicated cases, this is a
1590 /// position which will dominate all the in-loop post-increment users.
1591 Instruction *IVIncInsertPos;
1593 /// Factors - Interesting factors between use strides.
1594 SmallSetVector<int64_t, 8> Factors;
1596 /// Types - Interesting use types, to facilitate truncation reuse.
1597 SmallSetVector<Type *, 4> Types;
1599 /// Fixups - The list of operands which are to be replaced.
1600 SmallVector<LSRFixup, 16> Fixups;
1602 /// Uses - The list of interesting uses.
1603 SmallVector<LSRUse, 16> Uses;
1605 /// RegUses - Track which uses use which register candidates.
1606 RegUseTracker RegUses;
1608 // Limit the number of chains to avoid quadratic behavior. We don't expect to
1609 // have more than a few IV increment chains in a loop. Missing a Chain falls
1610 // back to normal LSR behavior for those uses.
1611 static const unsigned MaxChains = 8;
1613 /// IVChainVec - IV users can form a chain of IV increments.
1614 SmallVector<IVChain, MaxChains> IVChainVec;
1616 /// IVIncSet - IV users that belong to profitable IVChains.
1617 SmallPtrSet<Use*, MaxChains> IVIncSet;
1619 void OptimizeShadowIV();
1620 bool FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse);
1621 ICmpInst *OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse);
1622 void OptimizeLoopTermCond();
1624 void ChainInstruction(Instruction *UserInst, Instruction *IVOper,
1625 SmallVectorImpl<ChainUsers> &ChainUsersVec);
1626 void FinalizeChain(IVChain &Chain);
1627 void CollectChains();
1628 void GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter,
1629 SmallVectorImpl<WeakVH> &DeadInsts);
1631 void CollectInterestingTypesAndFactors();
1632 void CollectFixupsAndInitialFormulae();
1634 LSRFixup &getNewFixup() {
1635 Fixups.push_back(LSRFixup());
1636 return Fixups.back();
1639 // Support for sharing of LSRUses between LSRFixups.
1640 typedef DenseMap<std::pair<const SCEV *, LSRUse::KindType>,
1642 UseMapDenseMapInfo> UseMapTy;
1645 bool reconcileNewOffset(LSRUse &LU, int64_t NewOffset, bool HasBaseReg,
1646 LSRUse::KindType Kind, Type *AccessTy);
1648 std::pair<size_t, int64_t> getUse(const SCEV *&Expr,
1649 LSRUse::KindType Kind,
1652 void DeleteUse(LSRUse &LU, size_t LUIdx);
1654 LSRUse *FindUseWithSimilarFormula(const Formula &F, const LSRUse &OrigLU);
1656 void InsertInitialFormula(const SCEV *S, LSRUse &LU, size_t LUIdx);
1657 void InsertSupplementalFormula(const SCEV *S, LSRUse &LU, size_t LUIdx);
1658 void CountRegisters(const Formula &F, size_t LUIdx);
1659 bool InsertFormula(LSRUse &LU, unsigned LUIdx, const Formula &F);
1661 void CollectLoopInvariantFixupsAndFormulae();
1663 void GenerateReassociations(LSRUse &LU, unsigned LUIdx, Formula Base,
1664 unsigned Depth = 0);
1665 void GenerateCombinations(LSRUse &LU, unsigned LUIdx, Formula Base);
1666 void GenerateSymbolicOffsets(LSRUse &LU, unsigned LUIdx, Formula Base);
1667 void GenerateConstantOffsets(LSRUse &LU, unsigned LUIdx, Formula Base);
1668 void GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx, Formula Base);
1669 void GenerateScales(LSRUse &LU, unsigned LUIdx, Formula Base);
1670 void GenerateTruncates(LSRUse &LU, unsigned LUIdx, Formula Base);
1671 void GenerateCrossUseConstantOffsets();
1672 void GenerateAllReuseFormulae();
1674 void FilterOutUndesirableDedicatedRegisters();
1676 size_t EstimateSearchSpaceComplexity() const;
1677 void NarrowSearchSpaceByDetectingSupersets();
1678 void NarrowSearchSpaceByCollapsingUnrolledCode();
1679 void NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters();
1680 void NarrowSearchSpaceByPickingWinnerRegs();
1681 void NarrowSearchSpaceUsingHeuristics();
1683 void SolveRecurse(SmallVectorImpl<const Formula *> &Solution,
1685 SmallVectorImpl<const Formula *> &Workspace,
1686 const Cost &CurCost,
1687 const SmallPtrSet<const SCEV *, 16> &CurRegs,
1688 DenseSet<const SCEV *> &VisitedRegs) const;
1689 void Solve(SmallVectorImpl<const Formula *> &Solution) const;
1691 BasicBlock::iterator
1692 HoistInsertPosition(BasicBlock::iterator IP,
1693 const SmallVectorImpl<Instruction *> &Inputs) const;
1694 BasicBlock::iterator
1695 AdjustInsertPositionForExpand(BasicBlock::iterator IP,
1698 SCEVExpander &Rewriter) const;
1700 Value *Expand(const LSRFixup &LF,
1702 BasicBlock::iterator IP,
1703 SCEVExpander &Rewriter,
1704 SmallVectorImpl<WeakVH> &DeadInsts) const;
1705 void RewriteForPHI(PHINode *PN, const LSRFixup &LF,
1707 SCEVExpander &Rewriter,
1708 SmallVectorImpl<WeakVH> &DeadInsts,
1710 void Rewrite(const LSRFixup &LF,
1712 SCEVExpander &Rewriter,
1713 SmallVectorImpl<WeakVH> &DeadInsts,
1715 void ImplementSolution(const SmallVectorImpl<const Formula *> &Solution,
1719 LSRInstance(Loop *L, Pass *P);
1721 bool getChanged() const { return Changed; }
1723 void print_factors_and_types(raw_ostream &OS) const;
1724 void print_fixups(raw_ostream &OS) const;
1725 void print_uses(raw_ostream &OS) const;
1726 void print(raw_ostream &OS) const;
1732 /// OptimizeShadowIV - If IV is used in a int-to-float cast
1733 /// inside the loop then try to eliminate the cast operation.
1734 void LSRInstance::OptimizeShadowIV() {
1735 const SCEV *BackedgeTakenCount = SE.getBackedgeTakenCount(L);
1736 if (isa<SCEVCouldNotCompute>(BackedgeTakenCount))
1739 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end();
1740 UI != E; /* empty */) {
1741 IVUsers::const_iterator CandidateUI = UI;
1743 Instruction *ShadowUse = CandidateUI->getUser();
1744 Type *DestTy = NULL;
1745 bool IsSigned = false;
1747 /* If shadow use is a int->float cast then insert a second IV
1748 to eliminate this cast.
1750 for (unsigned i = 0; i < n; ++i)
1756 for (unsigned i = 0; i < n; ++i, ++d)
1759 if (UIToFPInst *UCast = dyn_cast<UIToFPInst>(CandidateUI->getUser())) {
1761 DestTy = UCast->getDestTy();
1763 else if (SIToFPInst *SCast = dyn_cast<SIToFPInst>(CandidateUI->getUser())) {
1765 DestTy = SCast->getDestTy();
1767 if (!DestTy) continue;
1769 // If target does not support DestTy natively then do not apply
1770 // this transformation.
1771 if (!TTI.isTypeLegal(DestTy)) continue;
1773 PHINode *PH = dyn_cast<PHINode>(ShadowUse->getOperand(0));
1775 if (PH->getNumIncomingValues() != 2) continue;
1777 Type *SrcTy = PH->getType();
1778 int Mantissa = DestTy->getFPMantissaWidth();
1779 if (Mantissa == -1) continue;
1780 if ((int)SE.getTypeSizeInBits(SrcTy) > Mantissa)
1783 unsigned Entry, Latch;
1784 if (PH->getIncomingBlock(0) == L->getLoopPreheader()) {
1792 ConstantInt *Init = dyn_cast<ConstantInt>(PH->getIncomingValue(Entry));
1793 if (!Init) continue;
1794 Constant *NewInit = ConstantFP::get(DestTy, IsSigned ?
1795 (double)Init->getSExtValue() :
1796 (double)Init->getZExtValue());
1798 BinaryOperator *Incr =
1799 dyn_cast<BinaryOperator>(PH->getIncomingValue(Latch));
1800 if (!Incr) continue;
1801 if (Incr->getOpcode() != Instruction::Add
1802 && Incr->getOpcode() != Instruction::Sub)
1805 /* Initialize new IV, double d = 0.0 in above example. */
1806 ConstantInt *C = NULL;
1807 if (Incr->getOperand(0) == PH)
1808 C = dyn_cast<ConstantInt>(Incr->getOperand(1));
1809 else if (Incr->getOperand(1) == PH)
1810 C = dyn_cast<ConstantInt>(Incr->getOperand(0));
1816 // Ignore negative constants, as the code below doesn't handle them
1817 // correctly. TODO: Remove this restriction.
1818 if (!C->getValue().isStrictlyPositive()) continue;
1820 /* Add new PHINode. */
1821 PHINode *NewPH = PHINode::Create(DestTy, 2, "IV.S.", PH);
1823 /* create new increment. '++d' in above example. */
1824 Constant *CFP = ConstantFP::get(DestTy, C->getZExtValue());
1825 BinaryOperator *NewIncr =
1826 BinaryOperator::Create(Incr->getOpcode() == Instruction::Add ?
1827 Instruction::FAdd : Instruction::FSub,
1828 NewPH, CFP, "IV.S.next.", Incr);
1830 NewPH->addIncoming(NewInit, PH->getIncomingBlock(Entry));
1831 NewPH->addIncoming(NewIncr, PH->getIncomingBlock(Latch));
1833 /* Remove cast operation */
1834 ShadowUse->replaceAllUsesWith(NewPH);
1835 ShadowUse->eraseFromParent();
1841 /// FindIVUserForCond - If Cond has an operand that is an expression of an IV,
1842 /// set the IV user and stride information and return true, otherwise return
1844 bool LSRInstance::FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse) {
1845 for (IVUsers::iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI)
1846 if (UI->getUser() == Cond) {
1847 // NOTE: we could handle setcc instructions with multiple uses here, but
1848 // InstCombine does it as well for simple uses, it's not clear that it
1849 // occurs enough in real life to handle.
1856 /// OptimizeMax - Rewrite the loop's terminating condition if it uses
1857 /// a max computation.
1859 /// This is a narrow solution to a specific, but acute, problem. For loops
1865 /// } while (++i < n);
1867 /// the trip count isn't just 'n', because 'n' might not be positive. And
1868 /// unfortunately this can come up even for loops where the user didn't use
1869 /// a C do-while loop. For example, seemingly well-behaved top-test loops
1870 /// will commonly be lowered like this:
1876 /// } while (++i < n);
1879 /// and then it's possible for subsequent optimization to obscure the if
1880 /// test in such a way that indvars can't find it.
1882 /// When indvars can't find the if test in loops like this, it creates a
1883 /// max expression, which allows it to give the loop a canonical
1884 /// induction variable:
1887 /// max = n < 1 ? 1 : n;
1890 /// } while (++i != max);
1892 /// Canonical induction variables are necessary because the loop passes
1893 /// are designed around them. The most obvious example of this is the
1894 /// LoopInfo analysis, which doesn't remember trip count values. It
1895 /// expects to be able to rediscover the trip count each time it is
1896 /// needed, and it does this using a simple analysis that only succeeds if
1897 /// the loop has a canonical induction variable.
1899 /// However, when it comes time to generate code, the maximum operation
1900 /// can be quite costly, especially if it's inside of an outer loop.
1902 /// This function solves this problem by detecting this type of loop and
1903 /// rewriting their conditions from ICMP_NE back to ICMP_SLT, and deleting
1904 /// the instructions for the maximum computation.
1906 ICmpInst *LSRInstance::OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse) {
1907 // Check that the loop matches the pattern we're looking for.
1908 if (Cond->getPredicate() != CmpInst::ICMP_EQ &&
1909 Cond->getPredicate() != CmpInst::ICMP_NE)
1912 SelectInst *Sel = dyn_cast<SelectInst>(Cond->getOperand(1));
1913 if (!Sel || !Sel->hasOneUse()) return Cond;
1915 const SCEV *BackedgeTakenCount = SE.getBackedgeTakenCount(L);
1916 if (isa<SCEVCouldNotCompute>(BackedgeTakenCount))
1918 const SCEV *One = SE.getConstant(BackedgeTakenCount->getType(), 1);
1920 // Add one to the backedge-taken count to get the trip count.
1921 const SCEV *IterationCount = SE.getAddExpr(One, BackedgeTakenCount);
1922 if (IterationCount != SE.getSCEV(Sel)) return Cond;
1924 // Check for a max calculation that matches the pattern. There's no check
1925 // for ICMP_ULE here because the comparison would be with zero, which
1926 // isn't interesting.
1927 CmpInst::Predicate Pred = ICmpInst::BAD_ICMP_PREDICATE;
1928 const SCEVNAryExpr *Max = 0;
1929 if (const SCEVSMaxExpr *S = dyn_cast<SCEVSMaxExpr>(BackedgeTakenCount)) {
1930 Pred = ICmpInst::ICMP_SLE;
1932 } else if (const SCEVSMaxExpr *S = dyn_cast<SCEVSMaxExpr>(IterationCount)) {
1933 Pred = ICmpInst::ICMP_SLT;
1935 } else if (const SCEVUMaxExpr *U = dyn_cast<SCEVUMaxExpr>(IterationCount)) {
1936 Pred = ICmpInst::ICMP_ULT;
1943 // To handle a max with more than two operands, this optimization would
1944 // require additional checking and setup.
1945 if (Max->getNumOperands() != 2)
1948 const SCEV *MaxLHS = Max->getOperand(0);
1949 const SCEV *MaxRHS = Max->getOperand(1);
1951 // ScalarEvolution canonicalizes constants to the left. For < and >, look
1952 // for a comparison with 1. For <= and >=, a comparison with zero.
1954 (ICmpInst::isTrueWhenEqual(Pred) ? !MaxLHS->isZero() : (MaxLHS != One)))
1957 // Check the relevant induction variable for conformance to
1959 const SCEV *IV = SE.getSCEV(Cond->getOperand(0));
1960 const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(IV);
1961 if (!AR || !AR->isAffine() ||
1962 AR->getStart() != One ||
1963 AR->getStepRecurrence(SE) != One)
1966 assert(AR->getLoop() == L &&
1967 "Loop condition operand is an addrec in a different loop!");
1969 // Check the right operand of the select, and remember it, as it will
1970 // be used in the new comparison instruction.
1972 if (ICmpInst::isTrueWhenEqual(Pred)) {
1973 // Look for n+1, and grab n.
1974 if (AddOperator *BO = dyn_cast<AddOperator>(Sel->getOperand(1)))
1975 if (ConstantInt *BO1 = dyn_cast<ConstantInt>(BO->getOperand(1)))
1976 if (BO1->isOne() && SE.getSCEV(BO->getOperand(0)) == MaxRHS)
1977 NewRHS = BO->getOperand(0);
1978 if (AddOperator *BO = dyn_cast<AddOperator>(Sel->getOperand(2)))
1979 if (ConstantInt *BO1 = dyn_cast<ConstantInt>(BO->getOperand(1)))
1980 if (BO1->isOne() && SE.getSCEV(BO->getOperand(0)) == MaxRHS)
1981 NewRHS = BO->getOperand(0);
1984 } else if (SE.getSCEV(Sel->getOperand(1)) == MaxRHS)
1985 NewRHS = Sel->getOperand(1);
1986 else if (SE.getSCEV(Sel->getOperand(2)) == MaxRHS)
1987 NewRHS = Sel->getOperand(2);
1988 else if (const SCEVUnknown *SU = dyn_cast<SCEVUnknown>(MaxRHS))
1989 NewRHS = SU->getValue();
1991 // Max doesn't match expected pattern.
1994 // Determine the new comparison opcode. It may be signed or unsigned,
1995 // and the original comparison may be either equality or inequality.
1996 if (Cond->getPredicate() == CmpInst::ICMP_EQ)
1997 Pred = CmpInst::getInversePredicate(Pred);
1999 // Ok, everything looks ok to change the condition into an SLT or SGE and
2000 // delete the max calculation.
2002 new ICmpInst(Cond, Pred, Cond->getOperand(0), NewRHS, "scmp");
2004 // Delete the max calculation instructions.
2005 Cond->replaceAllUsesWith(NewCond);
2006 CondUse->setUser(NewCond);
2007 Instruction *Cmp = cast<Instruction>(Sel->getOperand(0));
2008 Cond->eraseFromParent();
2009 Sel->eraseFromParent();
2010 if (Cmp->use_empty())
2011 Cmp->eraseFromParent();
2015 /// OptimizeLoopTermCond - Change loop terminating condition to use the
2016 /// postinc iv when possible.
2018 LSRInstance::OptimizeLoopTermCond() {
2019 SmallPtrSet<Instruction *, 4> PostIncs;
2021 BasicBlock *LatchBlock = L->getLoopLatch();
2022 SmallVector<BasicBlock*, 8> ExitingBlocks;
2023 L->getExitingBlocks(ExitingBlocks);
2025 for (unsigned i = 0, e = ExitingBlocks.size(); i != e; ++i) {
2026 BasicBlock *ExitingBlock = ExitingBlocks[i];
2028 // Get the terminating condition for the loop if possible. If we
2029 // can, we want to change it to use a post-incremented version of its
2030 // induction variable, to allow coalescing the live ranges for the IV into
2031 // one register value.
2033 BranchInst *TermBr = dyn_cast<BranchInst>(ExitingBlock->getTerminator());
2036 // FIXME: Overly conservative, termination condition could be an 'or' etc..
2037 if (TermBr->isUnconditional() || !isa<ICmpInst>(TermBr->getCondition()))
2040 // Search IVUsesByStride to find Cond's IVUse if there is one.
2041 IVStrideUse *CondUse = 0;
2042 ICmpInst *Cond = cast<ICmpInst>(TermBr->getCondition());
2043 if (!FindIVUserForCond(Cond, CondUse))
2046 // If the trip count is computed in terms of a max (due to ScalarEvolution
2047 // being unable to find a sufficient guard, for example), change the loop
2048 // comparison to use SLT or ULT instead of NE.
2049 // One consequence of doing this now is that it disrupts the count-down
2050 // optimization. That's not always a bad thing though, because in such
2051 // cases it may still be worthwhile to avoid a max.
2052 Cond = OptimizeMax(Cond, CondUse);
2054 // If this exiting block dominates the latch block, it may also use
2055 // the post-inc value if it won't be shared with other uses.
2056 // Check for dominance.
2057 if (!DT.dominates(ExitingBlock, LatchBlock))
2060 // Conservatively avoid trying to use the post-inc value in non-latch
2061 // exits if there may be pre-inc users in intervening blocks.
2062 if (LatchBlock != ExitingBlock)
2063 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI)
2064 // Test if the use is reachable from the exiting block. This dominator
2065 // query is a conservative approximation of reachability.
2066 if (&*UI != CondUse &&
2067 !DT.properlyDominates(UI->getUser()->getParent(), ExitingBlock)) {
2068 // Conservatively assume there may be reuse if the quotient of their
2069 // strides could be a legal scale.
2070 const SCEV *A = IU.getStride(*CondUse, L);
2071 const SCEV *B = IU.getStride(*UI, L);
2072 if (!A || !B) continue;
2073 if (SE.getTypeSizeInBits(A->getType()) !=
2074 SE.getTypeSizeInBits(B->getType())) {
2075 if (SE.getTypeSizeInBits(A->getType()) >
2076 SE.getTypeSizeInBits(B->getType()))
2077 B = SE.getSignExtendExpr(B, A->getType());
2079 A = SE.getSignExtendExpr(A, B->getType());
2081 if (const SCEVConstant *D =
2082 dyn_cast_or_null<SCEVConstant>(getExactSDiv(B, A, SE))) {
2083 const ConstantInt *C = D->getValue();
2084 // Stride of one or negative one can have reuse with non-addresses.
2085 if (C->isOne() || C->isAllOnesValue())
2086 goto decline_post_inc;
2087 // Avoid weird situations.
2088 if (C->getValue().getMinSignedBits() >= 64 ||
2089 C->getValue().isMinSignedValue())
2090 goto decline_post_inc;
2091 // Check for possible scaled-address reuse.
2092 Type *AccessTy = getAccessType(UI->getUser());
2093 int64_t Scale = C->getSExtValue();
2094 if (TTI.isLegalAddressingMode(AccessTy, /*BaseGV=*/ 0,
2096 /*HasBaseReg=*/ false, Scale))
2097 goto decline_post_inc;
2099 if (TTI.isLegalAddressingMode(AccessTy, /*BaseGV=*/ 0,
2101 /*HasBaseReg=*/ false, Scale))
2102 goto decline_post_inc;
2106 DEBUG(dbgs() << " Change loop exiting icmp to use postinc iv: "
2109 // It's possible for the setcc instruction to be anywhere in the loop, and
2110 // possible for it to have multiple users. If it is not immediately before
2111 // the exiting block branch, move it.
2112 if (&*++BasicBlock::iterator(Cond) != TermBr) {
2113 if (Cond->hasOneUse()) {
2114 Cond->moveBefore(TermBr);
2116 // Clone the terminating condition and insert into the loopend.
2117 ICmpInst *OldCond = Cond;
2118 Cond = cast<ICmpInst>(Cond->clone());
2119 Cond->setName(L->getHeader()->getName() + ".termcond");
2120 ExitingBlock->getInstList().insert(TermBr, Cond);
2122 // Clone the IVUse, as the old use still exists!
2123 CondUse = &IU.AddUser(Cond, CondUse->getOperandValToReplace());
2124 TermBr->replaceUsesOfWith(OldCond, Cond);
2128 // If we get to here, we know that we can transform the setcc instruction to
2129 // use the post-incremented version of the IV, allowing us to coalesce the
2130 // live ranges for the IV correctly.
2131 CondUse->transformToPostInc(L);
2134 PostIncs.insert(Cond);
2138 // Determine an insertion point for the loop induction variable increment. It
2139 // must dominate all the post-inc comparisons we just set up, and it must
2140 // dominate the loop latch edge.
2141 IVIncInsertPos = L->getLoopLatch()->getTerminator();
2142 for (SmallPtrSet<Instruction *, 4>::const_iterator I = PostIncs.begin(),
2143 E = PostIncs.end(); I != E; ++I) {
2145 DT.findNearestCommonDominator(IVIncInsertPos->getParent(),
2147 if (BB == (*I)->getParent())
2148 IVIncInsertPos = *I;
2149 else if (BB != IVIncInsertPos->getParent())
2150 IVIncInsertPos = BB->getTerminator();
2154 /// reconcileNewOffset - Determine if the given use can accommodate a fixup
2155 /// at the given offset and other details. If so, update the use and
2158 LSRInstance::reconcileNewOffset(LSRUse &LU, int64_t NewOffset, bool HasBaseReg,
2159 LSRUse::KindType Kind, Type *AccessTy) {
2160 int64_t NewMinOffset = LU.MinOffset;
2161 int64_t NewMaxOffset = LU.MaxOffset;
2162 Type *NewAccessTy = AccessTy;
2164 // Check for a mismatched kind. It's tempting to collapse mismatched kinds to
2165 // something conservative, however this can pessimize in the case that one of
2166 // the uses will have all its uses outside the loop, for example.
2167 if (LU.Kind != Kind)
2169 // Conservatively assume HasBaseReg is true for now.
2170 if (NewOffset < LU.MinOffset) {
2171 if (!isAlwaysFoldable(TTI, Kind, AccessTy, /*BaseGV=*/ 0,
2172 LU.MaxOffset - NewOffset, HasBaseReg))
2174 NewMinOffset = NewOffset;
2175 } else if (NewOffset > LU.MaxOffset) {
2176 if (!isAlwaysFoldable(TTI, Kind, AccessTy, /*BaseGV=*/ 0,
2177 NewOffset - LU.MinOffset, HasBaseReg))
2179 NewMaxOffset = NewOffset;
2181 // Check for a mismatched access type, and fall back conservatively as needed.
2182 // TODO: Be less conservative when the type is similar and can use the same
2183 // addressing modes.
2184 if (Kind == LSRUse::Address && AccessTy != LU.AccessTy)
2185 NewAccessTy = Type::getVoidTy(AccessTy->getContext());
2188 LU.MinOffset = NewMinOffset;
2189 LU.MaxOffset = NewMaxOffset;
2190 LU.AccessTy = NewAccessTy;
2191 if (NewOffset != LU.Offsets.back())
2192 LU.Offsets.push_back(NewOffset);
2196 /// getUse - Return an LSRUse index and an offset value for a fixup which
2197 /// needs the given expression, with the given kind and optional access type.
2198 /// Either reuse an existing use or create a new one, as needed.
2199 std::pair<size_t, int64_t>
2200 LSRInstance::getUse(const SCEV *&Expr,
2201 LSRUse::KindType Kind, Type *AccessTy) {
2202 const SCEV *Copy = Expr;
2203 int64_t Offset = ExtractImmediate(Expr, SE);
2205 // Basic uses can't accept any offset, for example.
2206 if (!isAlwaysFoldable(TTI, Kind, AccessTy, /*BaseGV=*/ 0,
2207 Offset, /*HasBaseReg=*/ true)) {
2212 std::pair<UseMapTy::iterator, bool> P =
2213 UseMap.insert(std::make_pair(std::make_pair(Expr, Kind), 0));
2215 // A use already existed with this base.
2216 size_t LUIdx = P.first->second;
2217 LSRUse &LU = Uses[LUIdx];
2218 if (reconcileNewOffset(LU, Offset, /*HasBaseReg=*/true, Kind, AccessTy))
2220 return std::make_pair(LUIdx, Offset);
2223 // Create a new use.
2224 size_t LUIdx = Uses.size();
2225 P.first->second = LUIdx;
2226 Uses.push_back(LSRUse(Kind, AccessTy));
2227 LSRUse &LU = Uses[LUIdx];
2229 // We don't need to track redundant offsets, but we don't need to go out
2230 // of our way here to avoid them.
2231 if (LU.Offsets.empty() || Offset != LU.Offsets.back())
2232 LU.Offsets.push_back(Offset);
2234 LU.MinOffset = Offset;
2235 LU.MaxOffset = Offset;
2236 return std::make_pair(LUIdx, Offset);
2239 /// DeleteUse - Delete the given use from the Uses list.
2240 void LSRInstance::DeleteUse(LSRUse &LU, size_t LUIdx) {
2241 if (&LU != &Uses.back())
2242 std::swap(LU, Uses.back());
2246 RegUses.SwapAndDropUse(LUIdx, Uses.size());
2249 /// FindUseWithFormula - Look for a use distinct from OrigLU which is has
2250 /// a formula that has the same registers as the given formula.
2252 LSRInstance::FindUseWithSimilarFormula(const Formula &OrigF,
2253 const LSRUse &OrigLU) {
2254 // Search all uses for the formula. This could be more clever.
2255 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
2256 LSRUse &LU = Uses[LUIdx];
2257 // Check whether this use is close enough to OrigLU, to see whether it's
2258 // worthwhile looking through its formulae.
2259 // Ignore ICmpZero uses because they may contain formulae generated by
2260 // GenerateICmpZeroScales, in which case adding fixup offsets may
2262 if (&LU != &OrigLU &&
2263 LU.Kind != LSRUse::ICmpZero &&
2264 LU.Kind == OrigLU.Kind && OrigLU.AccessTy == LU.AccessTy &&
2265 LU.WidestFixupType == OrigLU.WidestFixupType &&
2266 LU.HasFormulaWithSameRegs(OrigF)) {
2267 // Scan through this use's formulae.
2268 for (SmallVectorImpl<Formula>::const_iterator I = LU.Formulae.begin(),
2269 E = LU.Formulae.end(); I != E; ++I) {
2270 const Formula &F = *I;
2271 // Check to see if this formula has the same registers and symbols
2273 if (F.BaseRegs == OrigF.BaseRegs &&
2274 F.ScaledReg == OrigF.ScaledReg &&
2275 F.BaseGV == OrigF.BaseGV &&
2276 F.Scale == OrigF.Scale &&
2277 F.UnfoldedOffset == OrigF.UnfoldedOffset) {
2278 if (F.BaseOffset == 0)
2280 // This is the formula where all the registers and symbols matched;
2281 // there aren't going to be any others. Since we declined it, we
2282 // can skip the rest of the formulae and proceed to the next LSRUse.
2289 // Nothing looked good.
2293 void LSRInstance::CollectInterestingTypesAndFactors() {
2294 SmallSetVector<const SCEV *, 4> Strides;
2296 // Collect interesting types and strides.
2297 SmallVector<const SCEV *, 4> Worklist;
2298 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI) {
2299 const SCEV *Expr = IU.getExpr(*UI);
2301 // Collect interesting types.
2302 Types.insert(SE.getEffectiveSCEVType(Expr->getType()));
2304 // Add strides for mentioned loops.
2305 Worklist.push_back(Expr);
2307 const SCEV *S = Worklist.pop_back_val();
2308 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
2309 if (AR->getLoop() == L)
2310 Strides.insert(AR->getStepRecurrence(SE));
2311 Worklist.push_back(AR->getStart());
2312 } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
2313 Worklist.append(Add->op_begin(), Add->op_end());
2315 } while (!Worklist.empty());
2318 // Compute interesting factors from the set of interesting strides.
2319 for (SmallSetVector<const SCEV *, 4>::const_iterator
2320 I = Strides.begin(), E = Strides.end(); I != E; ++I)
2321 for (SmallSetVector<const SCEV *, 4>::const_iterator NewStrideIter =
2322 llvm::next(I); NewStrideIter != E; ++NewStrideIter) {
2323 const SCEV *OldStride = *I;
2324 const SCEV *NewStride = *NewStrideIter;
2326 if (SE.getTypeSizeInBits(OldStride->getType()) !=
2327 SE.getTypeSizeInBits(NewStride->getType())) {
2328 if (SE.getTypeSizeInBits(OldStride->getType()) >
2329 SE.getTypeSizeInBits(NewStride->getType()))
2330 NewStride = SE.getSignExtendExpr(NewStride, OldStride->getType());
2332 OldStride = SE.getSignExtendExpr(OldStride, NewStride->getType());
2334 if (const SCEVConstant *Factor =
2335 dyn_cast_or_null<SCEVConstant>(getExactSDiv(NewStride, OldStride,
2337 if (Factor->getValue()->getValue().getMinSignedBits() <= 64)
2338 Factors.insert(Factor->getValue()->getValue().getSExtValue());
2339 } else if (const SCEVConstant *Factor =
2340 dyn_cast_or_null<SCEVConstant>(getExactSDiv(OldStride,
2343 if (Factor->getValue()->getValue().getMinSignedBits() <= 64)
2344 Factors.insert(Factor->getValue()->getValue().getSExtValue());
2348 // If all uses use the same type, don't bother looking for truncation-based
2350 if (Types.size() == 1)
2353 DEBUG(print_factors_and_types(dbgs()));
2356 /// findIVOperand - Helper for CollectChains that finds an IV operand (computed
2357 /// by an AddRec in this loop) within [OI,OE) or returns OE. If IVUsers mapped
2358 /// Instructions to IVStrideUses, we could partially skip this.
2359 static User::op_iterator
2360 findIVOperand(User::op_iterator OI, User::op_iterator OE,
2361 Loop *L, ScalarEvolution &SE) {
2362 for(; OI != OE; ++OI) {
2363 if (Instruction *Oper = dyn_cast<Instruction>(*OI)) {
2364 if (!SE.isSCEVable(Oper->getType()))
2367 if (const SCEVAddRecExpr *AR =
2368 dyn_cast<SCEVAddRecExpr>(SE.getSCEV(Oper))) {
2369 if (AR->getLoop() == L)
2377 /// getWideOperand - IVChain logic must consistenctly peek base TruncInst
2378 /// operands, so wrap it in a convenient helper.
2379 static Value *getWideOperand(Value *Oper) {
2380 if (TruncInst *Trunc = dyn_cast<TruncInst>(Oper))
2381 return Trunc->getOperand(0);
2385 /// isCompatibleIVType - Return true if we allow an IV chain to include both
2387 static bool isCompatibleIVType(Value *LVal, Value *RVal) {
2388 Type *LType = LVal->getType();
2389 Type *RType = RVal->getType();
2390 return (LType == RType) || (LType->isPointerTy() && RType->isPointerTy());
2393 /// getExprBase - Return an approximation of this SCEV expression's "base", or
2394 /// NULL for any constant. Returning the expression itself is
2395 /// conservative. Returning a deeper subexpression is more precise and valid as
2396 /// long as it isn't less complex than another subexpression. For expressions
2397 /// involving multiple unscaled values, we need to return the pointer-type
2398 /// SCEVUnknown. This avoids forming chains across objects, such as:
2399 /// PrevOper==a[i], IVOper==b[i], IVInc==b-a.
2401 /// Since SCEVUnknown is the rightmost type, and pointers are the rightmost
2402 /// SCEVUnknown, we simply return the rightmost SCEV operand.
2403 static const SCEV *getExprBase(const SCEV *S) {
2404 switch (S->getSCEVType()) {
2405 default: // uncluding scUnknown.
2410 return getExprBase(cast<SCEVTruncateExpr>(S)->getOperand());
2412 return getExprBase(cast<SCEVZeroExtendExpr>(S)->getOperand());
2414 return getExprBase(cast<SCEVSignExtendExpr>(S)->getOperand());
2416 // Skip over scaled operands (scMulExpr) to follow add operands as long as
2417 // there's nothing more complex.
2418 // FIXME: not sure if we want to recognize negation.
2419 const SCEVAddExpr *Add = cast<SCEVAddExpr>(S);
2420 for (std::reverse_iterator<SCEVAddExpr::op_iterator> I(Add->op_end()),
2421 E(Add->op_begin()); I != E; ++I) {
2422 const SCEV *SubExpr = *I;
2423 if (SubExpr->getSCEVType() == scAddExpr)
2424 return getExprBase(SubExpr);
2426 if (SubExpr->getSCEVType() != scMulExpr)
2429 return S; // all operands are scaled, be conservative.
2432 return getExprBase(cast<SCEVAddRecExpr>(S)->getStart());
2436 /// Return true if the chain increment is profitable to expand into a loop
2437 /// invariant value, which may require its own register. A profitable chain
2438 /// increment will be an offset relative to the same base. We allow such offsets
2439 /// to potentially be used as chain increment as long as it's not obviously
2440 /// expensive to expand using real instructions.
2441 bool IVChain::isProfitableIncrement(const SCEV *OperExpr,
2442 const SCEV *IncExpr,
2443 ScalarEvolution &SE) {
2444 // Aggressively form chains when -stress-ivchain.
2448 // Do not replace a constant offset from IV head with a nonconstant IV
2450 if (!isa<SCEVConstant>(IncExpr)) {
2451 const SCEV *HeadExpr = SE.getSCEV(getWideOperand(Incs[0].IVOperand));
2452 if (isa<SCEVConstant>(SE.getMinusSCEV(OperExpr, HeadExpr)))
2456 SmallPtrSet<const SCEV*, 8> Processed;
2457 return !isHighCostExpansion(IncExpr, Processed, SE);
2460 /// Return true if the number of registers needed for the chain is estimated to
2461 /// be less than the number required for the individual IV users. First prohibit
2462 /// any IV users that keep the IV live across increments (the Users set should
2463 /// be empty). Next count the number and type of increments in the chain.
2465 /// Chaining IVs can lead to considerable code bloat if ISEL doesn't
2466 /// effectively use postinc addressing modes. Only consider it profitable it the
2467 /// increments can be computed in fewer registers when chained.
2469 /// TODO: Consider IVInc free if it's already used in another chains.
2471 isProfitableChain(IVChain &Chain, SmallPtrSet<Instruction*, 4> &Users,
2472 ScalarEvolution &SE, const TargetTransformInfo &TTI) {
2476 if (!Chain.hasIncs())
2479 if (!Users.empty()) {
2480 DEBUG(dbgs() << "Chain: " << *Chain.Incs[0].UserInst << " users:\n";
2481 for (SmallPtrSet<Instruction*, 4>::const_iterator I = Users.begin(),
2482 E = Users.end(); I != E; ++I) {
2483 dbgs() << " " << **I << "\n";
2487 assert(!Chain.Incs.empty() && "empty IV chains are not allowed");
2489 // The chain itself may require a register, so intialize cost to 1.
2492 // A complete chain likely eliminates the need for keeping the original IV in
2493 // a register. LSR does not currently know how to form a complete chain unless
2494 // the header phi already exists.
2495 if (isa<PHINode>(Chain.tailUserInst())
2496 && SE.getSCEV(Chain.tailUserInst()) == Chain.Incs[0].IncExpr) {
2499 const SCEV *LastIncExpr = 0;
2500 unsigned NumConstIncrements = 0;
2501 unsigned NumVarIncrements = 0;
2502 unsigned NumReusedIncrements = 0;
2503 for (IVChain::const_iterator I = Chain.begin(), E = Chain.end();
2506 if (I->IncExpr->isZero())
2509 // Incrementing by zero or some constant is neutral. We assume constants can
2510 // be folded into an addressing mode or an add's immediate operand.
2511 if (isa<SCEVConstant>(I->IncExpr)) {
2512 ++NumConstIncrements;
2516 if (I->IncExpr == LastIncExpr)
2517 ++NumReusedIncrements;
2521 LastIncExpr = I->IncExpr;
2523 // An IV chain with a single increment is handled by LSR's postinc
2524 // uses. However, a chain with multiple increments requires keeping the IV's
2525 // value live longer than it needs to be if chained.
2526 if (NumConstIncrements > 1)
2529 // Materializing increment expressions in the preheader that didn't exist in
2530 // the original code may cost a register. For example, sign-extended array
2531 // indices can produce ridiculous increments like this:
2532 // IV + ((sext i32 (2 * %s) to i64) + (-1 * (sext i32 %s to i64)))
2533 cost += NumVarIncrements;
2535 // Reusing variable increments likely saves a register to hold the multiple of
2537 cost -= NumReusedIncrements;
2539 DEBUG(dbgs() << "Chain: " << *Chain.Incs[0].UserInst << " Cost: " << cost
2545 /// ChainInstruction - Add this IV user to an existing chain or make it the head
2547 void LSRInstance::ChainInstruction(Instruction *UserInst, Instruction *IVOper,
2548 SmallVectorImpl<ChainUsers> &ChainUsersVec) {
2549 // When IVs are used as types of varying widths, they are generally converted
2550 // to a wider type with some uses remaining narrow under a (free) trunc.
2551 Value *const NextIV = getWideOperand(IVOper);
2552 const SCEV *const OperExpr = SE.getSCEV(NextIV);
2553 const SCEV *const OperExprBase = getExprBase(OperExpr);
2555 // Visit all existing chains. Check if its IVOper can be computed as a
2556 // profitable loop invariant increment from the last link in the Chain.
2557 unsigned ChainIdx = 0, NChains = IVChainVec.size();
2558 const SCEV *LastIncExpr = 0;
2559 for (; ChainIdx < NChains; ++ChainIdx) {
2560 IVChain &Chain = IVChainVec[ChainIdx];
2562 // Prune the solution space aggressively by checking that both IV operands
2563 // are expressions that operate on the same unscaled SCEVUnknown. This
2564 // "base" will be canceled by the subsequent getMinusSCEV call. Checking
2565 // first avoids creating extra SCEV expressions.
2566 if (!StressIVChain && Chain.ExprBase != OperExprBase)
2569 Value *PrevIV = getWideOperand(Chain.Incs.back().IVOperand);
2570 if (!isCompatibleIVType(PrevIV, NextIV))
2573 // A phi node terminates a chain.
2574 if (isa<PHINode>(UserInst) && isa<PHINode>(Chain.tailUserInst()))
2577 // The increment must be loop-invariant so it can be kept in a register.
2578 const SCEV *PrevExpr = SE.getSCEV(PrevIV);
2579 const SCEV *IncExpr = SE.getMinusSCEV(OperExpr, PrevExpr);
2580 if (!SE.isLoopInvariant(IncExpr, L))
2583 if (Chain.isProfitableIncrement(OperExpr, IncExpr, SE)) {
2584 LastIncExpr = IncExpr;
2588 // If we haven't found a chain, create a new one, unless we hit the max. Don't
2589 // bother for phi nodes, because they must be last in the chain.
2590 if (ChainIdx == NChains) {
2591 if (isa<PHINode>(UserInst))
2593 if (NChains >= MaxChains && !StressIVChain) {
2594 DEBUG(dbgs() << "IV Chain Limit\n");
2597 LastIncExpr = OperExpr;
2598 // IVUsers may have skipped over sign/zero extensions. We don't currently
2599 // attempt to form chains involving extensions unless they can be hoisted
2600 // into this loop's AddRec.
2601 if (!isa<SCEVAddRecExpr>(LastIncExpr))
2604 IVChainVec.push_back(IVChain(IVInc(UserInst, IVOper, LastIncExpr),
2606 ChainUsersVec.resize(NChains);
2607 DEBUG(dbgs() << "IV Chain#" << ChainIdx << " Head: (" << *UserInst
2608 << ") IV=" << *LastIncExpr << "\n");
2610 DEBUG(dbgs() << "IV Chain#" << ChainIdx << " Inc: (" << *UserInst
2611 << ") IV+" << *LastIncExpr << "\n");
2612 // Add this IV user to the end of the chain.
2613 IVChainVec[ChainIdx].add(IVInc(UserInst, IVOper, LastIncExpr));
2615 IVChain &Chain = IVChainVec[ChainIdx];
2617 SmallPtrSet<Instruction*,4> &NearUsers = ChainUsersVec[ChainIdx].NearUsers;
2618 // This chain's NearUsers become FarUsers.
2619 if (!LastIncExpr->isZero()) {
2620 ChainUsersVec[ChainIdx].FarUsers.insert(NearUsers.begin(),
2625 // All other uses of IVOperand become near uses of the chain.
2626 // We currently ignore intermediate values within SCEV expressions, assuming
2627 // they will eventually be used be the current chain, or can be computed
2628 // from one of the chain increments. To be more precise we could
2629 // transitively follow its user and only add leaf IV users to the set.
2630 for (Value::use_iterator UseIter = IVOper->use_begin(),
2631 UseEnd = IVOper->use_end(); UseIter != UseEnd; ++UseIter) {
2632 Instruction *OtherUse = dyn_cast<Instruction>(*UseIter);
2635 // Uses in the chain will no longer be uses if the chain is formed.
2636 // Include the head of the chain in this iteration (not Chain.begin()).
2637 IVChain::const_iterator IncIter = Chain.Incs.begin();
2638 IVChain::const_iterator IncEnd = Chain.Incs.end();
2639 for( ; IncIter != IncEnd; ++IncIter) {
2640 if (IncIter->UserInst == OtherUse)
2643 if (IncIter != IncEnd)
2646 if (SE.isSCEVable(OtherUse->getType())
2647 && !isa<SCEVUnknown>(SE.getSCEV(OtherUse))
2648 && IU.isIVUserOrOperand(OtherUse)) {
2651 NearUsers.insert(OtherUse);
2654 // Since this user is part of the chain, it's no longer considered a use
2656 ChainUsersVec[ChainIdx].FarUsers.erase(UserInst);
2659 /// CollectChains - Populate the vector of Chains.
2661 /// This decreases ILP at the architecture level. Targets with ample registers,
2662 /// multiple memory ports, and no register renaming probably don't want
2663 /// this. However, such targets should probably disable LSR altogether.
2665 /// The job of LSR is to make a reasonable choice of induction variables across
2666 /// the loop. Subsequent passes can easily "unchain" computation exposing more
2667 /// ILP *within the loop* if the target wants it.
2669 /// Finding the best IV chain is potentially a scheduling problem. Since LSR
2670 /// will not reorder memory operations, it will recognize this as a chain, but
2671 /// will generate redundant IV increments. Ideally this would be corrected later
2672 /// by a smart scheduler:
2678 /// TODO: Walk the entire domtree within this loop, not just the path to the
2679 /// loop latch. This will discover chains on side paths, but requires
2680 /// maintaining multiple copies of the Chains state.
2681 void LSRInstance::CollectChains() {
2682 DEBUG(dbgs() << "Collecting IV Chains.\n");
2683 SmallVector<ChainUsers, 8> ChainUsersVec;
2685 SmallVector<BasicBlock *,8> LatchPath;
2686 BasicBlock *LoopHeader = L->getHeader();
2687 for (DomTreeNode *Rung = DT.getNode(L->getLoopLatch());
2688 Rung->getBlock() != LoopHeader; Rung = Rung->getIDom()) {
2689 LatchPath.push_back(Rung->getBlock());
2691 LatchPath.push_back(LoopHeader);
2693 // Walk the instruction stream from the loop header to the loop latch.
2694 for (SmallVectorImpl<BasicBlock *>::reverse_iterator
2695 BBIter = LatchPath.rbegin(), BBEnd = LatchPath.rend();
2696 BBIter != BBEnd; ++BBIter) {
2697 for (BasicBlock::iterator I = (*BBIter)->begin(), E = (*BBIter)->end();
2699 // Skip instructions that weren't seen by IVUsers analysis.
2700 if (isa<PHINode>(I) || !IU.isIVUserOrOperand(I))
2703 // Ignore users that are part of a SCEV expression. This way we only
2704 // consider leaf IV Users. This effectively rediscovers a portion of
2705 // IVUsers analysis but in program order this time.
2706 if (SE.isSCEVable(I->getType()) && !isa<SCEVUnknown>(SE.getSCEV(I)))
2709 // Remove this instruction from any NearUsers set it may be in.
2710 for (unsigned ChainIdx = 0, NChains = IVChainVec.size();
2711 ChainIdx < NChains; ++ChainIdx) {
2712 ChainUsersVec[ChainIdx].NearUsers.erase(I);
2714 // Search for operands that can be chained.
2715 SmallPtrSet<Instruction*, 4> UniqueOperands;
2716 User::op_iterator IVOpEnd = I->op_end();
2717 User::op_iterator IVOpIter = findIVOperand(I->op_begin(), IVOpEnd, L, SE);
2718 while (IVOpIter != IVOpEnd) {
2719 Instruction *IVOpInst = cast<Instruction>(*IVOpIter);
2720 if (UniqueOperands.insert(IVOpInst))
2721 ChainInstruction(I, IVOpInst, ChainUsersVec);
2722 IVOpIter = findIVOperand(llvm::next(IVOpIter), IVOpEnd, L, SE);
2724 } // Continue walking down the instructions.
2725 } // Continue walking down the domtree.
2726 // Visit phi backedges to determine if the chain can generate the IV postinc.
2727 for (BasicBlock::iterator I = L->getHeader()->begin();
2728 PHINode *PN = dyn_cast<PHINode>(I); ++I) {
2729 if (!SE.isSCEVable(PN->getType()))
2733 dyn_cast<Instruction>(PN->getIncomingValueForBlock(L->getLoopLatch()));
2735 ChainInstruction(PN, IncV, ChainUsersVec);
2737 // Remove any unprofitable chains.
2738 unsigned ChainIdx = 0;
2739 for (unsigned UsersIdx = 0, NChains = IVChainVec.size();
2740 UsersIdx < NChains; ++UsersIdx) {
2741 if (!isProfitableChain(IVChainVec[UsersIdx],
2742 ChainUsersVec[UsersIdx].FarUsers, SE, TTI))
2744 // Preserve the chain at UsesIdx.
2745 if (ChainIdx != UsersIdx)
2746 IVChainVec[ChainIdx] = IVChainVec[UsersIdx];
2747 FinalizeChain(IVChainVec[ChainIdx]);
2750 IVChainVec.resize(ChainIdx);
2753 void LSRInstance::FinalizeChain(IVChain &Chain) {
2754 assert(!Chain.Incs.empty() && "empty IV chains are not allowed");
2755 DEBUG(dbgs() << "Final Chain: " << *Chain.Incs[0].UserInst << "\n");
2757 for (IVChain::const_iterator I = Chain.begin(), E = Chain.end();
2759 DEBUG(dbgs() << " Inc: " << *I->UserInst << "\n");
2760 User::op_iterator UseI =
2761 std::find(I->UserInst->op_begin(), I->UserInst->op_end(), I->IVOperand);
2762 assert(UseI != I->UserInst->op_end() && "cannot find IV operand");
2763 IVIncSet.insert(UseI);
2767 /// Return true if the IVInc can be folded into an addressing mode.
2768 static bool canFoldIVIncExpr(const SCEV *IncExpr, Instruction *UserInst,
2769 Value *Operand, const TargetTransformInfo &TTI) {
2770 const SCEVConstant *IncConst = dyn_cast<SCEVConstant>(IncExpr);
2771 if (!IncConst || !isAddressUse(UserInst, Operand))
2774 if (IncConst->getValue()->getValue().getMinSignedBits() > 64)
2777 int64_t IncOffset = IncConst->getValue()->getSExtValue();
2778 if (!isAlwaysFoldable(TTI, LSRUse::Address,
2779 getAccessType(UserInst), /*BaseGV=*/ 0,
2780 IncOffset, /*HaseBaseReg=*/ false))
2786 /// GenerateIVChains - Generate an add or subtract for each IVInc in a chain to
2787 /// materialize the IV user's operand from the previous IV user's operand.
2788 void LSRInstance::GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter,
2789 SmallVectorImpl<WeakVH> &DeadInsts) {
2790 // Find the new IVOperand for the head of the chain. It may have been replaced
2792 const IVInc &Head = Chain.Incs[0];
2793 User::op_iterator IVOpEnd = Head.UserInst->op_end();
2794 // findIVOperand returns IVOpEnd if it can no longer find a valid IV user.
2795 User::op_iterator IVOpIter = findIVOperand(Head.UserInst->op_begin(),
2798 while (IVOpIter != IVOpEnd) {
2799 IVSrc = getWideOperand(*IVOpIter);
2801 // If this operand computes the expression that the chain needs, we may use
2802 // it. (Check this after setting IVSrc which is used below.)
2804 // Note that if Head.IncExpr is wider than IVSrc, then this phi is too
2805 // narrow for the chain, so we can no longer use it. We do allow using a
2806 // wider phi, assuming the LSR checked for free truncation. In that case we
2807 // should already have a truncate on this operand such that
2808 // getSCEV(IVSrc) == IncExpr.
2809 if (SE.getSCEV(*IVOpIter) == Head.IncExpr
2810 || SE.getSCEV(IVSrc) == Head.IncExpr) {
2813 IVOpIter = findIVOperand(llvm::next(IVOpIter), IVOpEnd, L, SE);
2815 if (IVOpIter == IVOpEnd) {
2816 // Gracefully give up on this chain.
2817 DEBUG(dbgs() << "Concealed chain head: " << *Head.UserInst << "\n");
2821 DEBUG(dbgs() << "Generate chain at: " << *IVSrc << "\n");
2822 Type *IVTy = IVSrc->getType();
2823 Type *IntTy = SE.getEffectiveSCEVType(IVTy);
2824 const SCEV *LeftOverExpr = 0;
2825 for (IVChain::const_iterator IncI = Chain.begin(),
2826 IncE = Chain.end(); IncI != IncE; ++IncI) {
2828 Instruction *InsertPt = IncI->UserInst;
2829 if (isa<PHINode>(InsertPt))
2830 InsertPt = L->getLoopLatch()->getTerminator();
2832 // IVOper will replace the current IV User's operand. IVSrc is the IV
2833 // value currently held in a register.
2834 Value *IVOper = IVSrc;
2835 if (!IncI->IncExpr->isZero()) {
2836 // IncExpr was the result of subtraction of two narrow values, so must
2838 const SCEV *IncExpr = SE.getNoopOrSignExtend(IncI->IncExpr, IntTy);
2839 LeftOverExpr = LeftOverExpr ?
2840 SE.getAddExpr(LeftOverExpr, IncExpr) : IncExpr;
2842 if (LeftOverExpr && !LeftOverExpr->isZero()) {
2843 // Expand the IV increment.
2844 Rewriter.clearPostInc();
2845 Value *IncV = Rewriter.expandCodeFor(LeftOverExpr, IntTy, InsertPt);
2846 const SCEV *IVOperExpr = SE.getAddExpr(SE.getUnknown(IVSrc),
2847 SE.getUnknown(IncV));
2848 IVOper = Rewriter.expandCodeFor(IVOperExpr, IVTy, InsertPt);
2850 // If an IV increment can't be folded, use it as the next IV value.
2851 if (!canFoldIVIncExpr(LeftOverExpr, IncI->UserInst, IncI->IVOperand,
2853 assert(IVTy == IVOper->getType() && "inconsistent IV increment type");
2858 Type *OperTy = IncI->IVOperand->getType();
2859 if (IVTy != OperTy) {
2860 assert(SE.getTypeSizeInBits(IVTy) >= SE.getTypeSizeInBits(OperTy) &&
2861 "cannot extend a chained IV");
2862 IRBuilder<> Builder(InsertPt);
2863 IVOper = Builder.CreateTruncOrBitCast(IVOper, OperTy, "lsr.chain");
2865 IncI->UserInst->replaceUsesOfWith(IncI->IVOperand, IVOper);
2866 DeadInsts.push_back(IncI->IVOperand);
2868 // If LSR created a new, wider phi, we may also replace its postinc. We only
2869 // do this if we also found a wide value for the head of the chain.
2870 if (isa<PHINode>(Chain.tailUserInst())) {
2871 for (BasicBlock::iterator I = L->getHeader()->begin();
2872 PHINode *Phi = dyn_cast<PHINode>(I); ++I) {
2873 if (!isCompatibleIVType(Phi, IVSrc))
2875 Instruction *PostIncV = dyn_cast<Instruction>(
2876 Phi->getIncomingValueForBlock(L->getLoopLatch()));
2877 if (!PostIncV || (SE.getSCEV(PostIncV) != SE.getSCEV(IVSrc)))
2879 Value *IVOper = IVSrc;
2880 Type *PostIncTy = PostIncV->getType();
2881 if (IVTy != PostIncTy) {
2882 assert(PostIncTy->isPointerTy() && "mixing int/ptr IV types");
2883 IRBuilder<> Builder(L->getLoopLatch()->getTerminator());
2884 Builder.SetCurrentDebugLocation(PostIncV->getDebugLoc());
2885 IVOper = Builder.CreatePointerCast(IVSrc, PostIncTy, "lsr.chain");
2887 Phi->replaceUsesOfWith(PostIncV, IVOper);
2888 DeadInsts.push_back(PostIncV);
2893 void LSRInstance::CollectFixupsAndInitialFormulae() {
2894 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI) {
2895 Instruction *UserInst = UI->getUser();
2896 // Skip IV users that are part of profitable IV Chains.
2897 User::op_iterator UseI = std::find(UserInst->op_begin(), UserInst->op_end(),
2898 UI->getOperandValToReplace());
2899 assert(UseI != UserInst->op_end() && "cannot find IV operand");
2900 if (IVIncSet.count(UseI))
2904 LSRFixup &LF = getNewFixup();
2905 LF.UserInst = UserInst;
2906 LF.OperandValToReplace = UI->getOperandValToReplace();
2907 LF.PostIncLoops = UI->getPostIncLoops();
2909 LSRUse::KindType Kind = LSRUse::Basic;
2911 if (isAddressUse(LF.UserInst, LF.OperandValToReplace)) {
2912 Kind = LSRUse::Address;
2913 AccessTy = getAccessType(LF.UserInst);
2916 const SCEV *S = IU.getExpr(*UI);
2918 // Equality (== and !=) ICmps are special. We can rewrite (i == N) as
2919 // (N - i == 0), and this allows (N - i) to be the expression that we work
2920 // with rather than just N or i, so we can consider the register
2921 // requirements for both N and i at the same time. Limiting this code to
2922 // equality icmps is not a problem because all interesting loops use
2923 // equality icmps, thanks to IndVarSimplify.
2924 if (ICmpInst *CI = dyn_cast<ICmpInst>(LF.UserInst))
2925 if (CI->isEquality()) {
2926 // Swap the operands if needed to put the OperandValToReplace on the
2927 // left, for consistency.
2928 Value *NV = CI->getOperand(1);
2929 if (NV == LF.OperandValToReplace) {
2930 CI->setOperand(1, CI->getOperand(0));
2931 CI->setOperand(0, NV);
2932 NV = CI->getOperand(1);
2936 // x == y --> x - y == 0
2937 const SCEV *N = SE.getSCEV(NV);
2938 if (SE.isLoopInvariant(N, L) && isSafeToExpand(N)) {
2939 // S is normalized, so normalize N before folding it into S
2940 // to keep the result normalized.
2941 N = TransformForPostIncUse(Normalize, N, CI, 0,
2942 LF.PostIncLoops, SE, DT);
2943 Kind = LSRUse::ICmpZero;
2944 S = SE.getMinusSCEV(N, S);
2947 // -1 and the negations of all interesting strides (except the negation
2948 // of -1) are now also interesting.
2949 for (size_t i = 0, e = Factors.size(); i != e; ++i)
2950 if (Factors[i] != -1)
2951 Factors.insert(-(uint64_t)Factors[i]);
2955 // Set up the initial formula for this use.
2956 std::pair<size_t, int64_t> P = getUse(S, Kind, AccessTy);
2958 LF.Offset = P.second;
2959 LSRUse &LU = Uses[LF.LUIdx];
2960 LU.AllFixupsOutsideLoop &= LF.isUseFullyOutsideLoop(L);
2961 if (!LU.WidestFixupType ||
2962 SE.getTypeSizeInBits(LU.WidestFixupType) <
2963 SE.getTypeSizeInBits(LF.OperandValToReplace->getType()))
2964 LU.WidestFixupType = LF.OperandValToReplace->getType();
2966 // If this is the first use of this LSRUse, give it a formula.
2967 if (LU.Formulae.empty()) {
2968 InsertInitialFormula(S, LU, LF.LUIdx);
2969 CountRegisters(LU.Formulae.back(), LF.LUIdx);
2973 DEBUG(print_fixups(dbgs()));
2976 /// InsertInitialFormula - Insert a formula for the given expression into
2977 /// the given use, separating out loop-variant portions from loop-invariant
2978 /// and loop-computable portions.
2980 LSRInstance::InsertInitialFormula(const SCEV *S, LSRUse &LU, size_t LUIdx) {
2982 F.InitialMatch(S, L, SE);
2983 bool Inserted = InsertFormula(LU, LUIdx, F);
2984 assert(Inserted && "Initial formula already exists!"); (void)Inserted;
2987 /// InsertSupplementalFormula - Insert a simple single-register formula for
2988 /// the given expression into the given use.
2990 LSRInstance::InsertSupplementalFormula(const SCEV *S,
2991 LSRUse &LU, size_t LUIdx) {
2993 F.BaseRegs.push_back(S);
2994 F.HasBaseReg = true;
2995 bool Inserted = InsertFormula(LU, LUIdx, F);
2996 assert(Inserted && "Supplemental formula already exists!"); (void)Inserted;
2999 /// CountRegisters - Note which registers are used by the given formula,
3000 /// updating RegUses.
3001 void LSRInstance::CountRegisters(const Formula &F, size_t LUIdx) {
3003 RegUses.CountRegister(F.ScaledReg, LUIdx);
3004 for (SmallVectorImpl<const SCEV *>::const_iterator I = F.BaseRegs.begin(),
3005 E = F.BaseRegs.end(); I != E; ++I)
3006 RegUses.CountRegister(*I, LUIdx);
3009 /// InsertFormula - If the given formula has not yet been inserted, add it to
3010 /// the list, and return true. Return false otherwise.
3011 bool LSRInstance::InsertFormula(LSRUse &LU, unsigned LUIdx, const Formula &F) {
3012 if (!LU.InsertFormula(F))
3015 CountRegisters(F, LUIdx);
3019 /// CollectLoopInvariantFixupsAndFormulae - Check for other uses of
3020 /// loop-invariant values which we're tracking. These other uses will pin these
3021 /// values in registers, making them less profitable for elimination.
3022 /// TODO: This currently misses non-constant addrec step registers.
3023 /// TODO: Should this give more weight to users inside the loop?
3025 LSRInstance::CollectLoopInvariantFixupsAndFormulae() {
3026 SmallVector<const SCEV *, 8> Worklist(RegUses.begin(), RegUses.end());
3027 SmallPtrSet<const SCEV *, 8> Inserted;
3029 while (!Worklist.empty()) {
3030 const SCEV *S = Worklist.pop_back_val();
3032 if (const SCEVNAryExpr *N = dyn_cast<SCEVNAryExpr>(S))
3033 Worklist.append(N->op_begin(), N->op_end());
3034 else if (const SCEVCastExpr *C = dyn_cast<SCEVCastExpr>(S))
3035 Worklist.push_back(C->getOperand());
3036 else if (const SCEVUDivExpr *D = dyn_cast<SCEVUDivExpr>(S)) {
3037 Worklist.push_back(D->getLHS());
3038 Worklist.push_back(D->getRHS());
3039 } else if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(S)) {
3040 if (!Inserted.insert(U)) continue;
3041 const Value *V = U->getValue();
3042 if (const Instruction *Inst = dyn_cast<Instruction>(V)) {
3043 // Look for instructions defined outside the loop.
3044 if (L->contains(Inst)) continue;
3045 } else if (isa<UndefValue>(V))
3046 // Undef doesn't have a live range, so it doesn't matter.
3048 for (Value::const_use_iterator UI = V->use_begin(), UE = V->use_end();
3050 const Instruction *UserInst = dyn_cast<Instruction>(*UI);
3051 // Ignore non-instructions.
3054 // Ignore instructions in other functions (as can happen with
3056 if (UserInst->getParent()->getParent() != L->getHeader()->getParent())
3058 // Ignore instructions not dominated by the loop.
3059 const BasicBlock *UseBB = !isa<PHINode>(UserInst) ?
3060 UserInst->getParent() :
3061 cast<PHINode>(UserInst)->getIncomingBlock(
3062 PHINode::getIncomingValueNumForOperand(UI.getOperandNo()));
3063 if (!DT.dominates(L->getHeader(), UseBB))
3065 // Ignore uses which are part of other SCEV expressions, to avoid
3066 // analyzing them multiple times.
3067 if (SE.isSCEVable(UserInst->getType())) {
3068 const SCEV *UserS = SE.getSCEV(const_cast<Instruction *>(UserInst));
3069 // If the user is a no-op, look through to its uses.
3070 if (!isa<SCEVUnknown>(UserS))
3074 SE.getUnknown(const_cast<Instruction *>(UserInst)));
3078 // Ignore icmp instructions which are already being analyzed.
3079 if (const ICmpInst *ICI = dyn_cast<ICmpInst>(UserInst)) {
3080 unsigned OtherIdx = !UI.getOperandNo();
3081 Value *OtherOp = const_cast<Value *>(ICI->getOperand(OtherIdx));
3082 if (SE.hasComputableLoopEvolution(SE.getSCEV(OtherOp), L))
3086 LSRFixup &LF = getNewFixup();
3087 LF.UserInst = const_cast<Instruction *>(UserInst);
3088 LF.OperandValToReplace = UI.getUse();
3089 std::pair<size_t, int64_t> P = getUse(S, LSRUse::Basic, 0);
3091 LF.Offset = P.second;
3092 LSRUse &LU = Uses[LF.LUIdx];
3093 LU.AllFixupsOutsideLoop &= LF.isUseFullyOutsideLoop(L);
3094 if (!LU.WidestFixupType ||
3095 SE.getTypeSizeInBits(LU.WidestFixupType) <
3096 SE.getTypeSizeInBits(LF.OperandValToReplace->getType()))
3097 LU.WidestFixupType = LF.OperandValToReplace->getType();
3098 InsertSupplementalFormula(U, LU, LF.LUIdx);
3099 CountRegisters(LU.Formulae.back(), Uses.size() - 1);
3106 /// CollectSubexprs - Split S into subexpressions which can be pulled out into
3107 /// separate registers. If C is non-null, multiply each subexpression by C.
3109 /// Return remainder expression after factoring the subexpressions captured by
3110 /// Ops. If Ops is complete, return NULL.
3111 static const SCEV *CollectSubexprs(const SCEV *S, const SCEVConstant *C,
3112 SmallVectorImpl<const SCEV *> &Ops,
3114 ScalarEvolution &SE,
3115 unsigned Depth = 0) {
3116 // Arbitrarily cap recursion to protect compile time.
3120 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
3121 // Break out add operands.
3122 for (SCEVAddExpr::op_iterator I = Add->op_begin(), E = Add->op_end();
3124 const SCEV *Remainder = CollectSubexprs(*I, C, Ops, L, SE, Depth+1);
3126 Ops.push_back(C ? SE.getMulExpr(C, Remainder) : Remainder);
3129 } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
3130 // Split a non-zero base out of an addrec.
3131 if (AR->getStart()->isZero())
3134 const SCEV *Remainder = CollectSubexprs(AR->getStart(),
3135 C, Ops, L, SE, Depth+1);
3136 // Split the non-zero AddRec unless it is part of a nested recurrence that
3137 // does not pertain to this loop.
3138 if (Remainder && (AR->getLoop() == L || !isa<SCEVAddRecExpr>(Remainder))) {
3139 Ops.push_back(C ? SE.getMulExpr(C, Remainder) : Remainder);
3142 if (Remainder != AR->getStart()) {
3144 Remainder = SE.getConstant(AR->getType(), 0);
3145 return SE.getAddRecExpr(Remainder,
3146 AR->getStepRecurrence(SE),
3148 //FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
3151 } else if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S)) {
3152 // Break (C * (a + b + c)) into C*a + C*b + C*c.
3153 if (Mul->getNumOperands() != 2)
3155 if (const SCEVConstant *Op0 =
3156 dyn_cast<SCEVConstant>(Mul->getOperand(0))) {
3157 C = C ? cast<SCEVConstant>(SE.getMulExpr(C, Op0)) : Op0;
3158 const SCEV *Remainder =
3159 CollectSubexprs(Mul->getOperand(1), C, Ops, L, SE, Depth+1);
3161 Ops.push_back(SE.getMulExpr(C, Remainder));
3168 /// GenerateReassociations - Split out subexpressions from adds and the bases of
3170 void LSRInstance::GenerateReassociations(LSRUse &LU, unsigned LUIdx,
3173 // Arbitrarily cap recursion to protect compile time.
3174 if (Depth >= 3) return;
3176 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i) {
3177 const SCEV *BaseReg = Base.BaseRegs[i];
3179 SmallVector<const SCEV *, 8> AddOps;
3180 const SCEV *Remainder = CollectSubexprs(BaseReg, 0, AddOps, L, SE);
3182 AddOps.push_back(Remainder);
3184 if (AddOps.size() == 1) continue;
3186 for (SmallVectorImpl<const SCEV *>::const_iterator J = AddOps.begin(),
3187 JE = AddOps.end(); J != JE; ++J) {
3189 // Loop-variant "unknown" values are uninteresting; we won't be able to
3190 // do anything meaningful with them.
3191 if (isa<SCEVUnknown>(*J) && !SE.isLoopInvariant(*J, L))
3194 // Don't pull a constant into a register if the constant could be folded
3195 // into an immediate field.
3196 if (isAlwaysFoldable(TTI, SE, LU.MinOffset, LU.MaxOffset, LU.Kind,
3197 LU.AccessTy, *J, Base.getNumRegs() > 1))
3200 // Collect all operands except *J.
3201 SmallVector<const SCEV *, 8> InnerAddOps
3202 (((const SmallVector<const SCEV *, 8> &)AddOps).begin(), J);
3204 (llvm::next(J), ((const SmallVector<const SCEV *, 8> &)AddOps).end());
3206 // Don't leave just a constant behind in a register if the constant could
3207 // be folded into an immediate field.
3208 if (InnerAddOps.size() == 1 &&
3209 isAlwaysFoldable(TTI, SE, LU.MinOffset, LU.MaxOffset, LU.Kind,
3210 LU.AccessTy, InnerAddOps[0], Base.getNumRegs() > 1))
3213 const SCEV *InnerSum = SE.getAddExpr(InnerAddOps);
3214 if (InnerSum->isZero())
3218 // Add the remaining pieces of the add back into the new formula.
3219 const SCEVConstant *InnerSumSC = dyn_cast<SCEVConstant>(InnerSum);
3221 SE.getTypeSizeInBits(InnerSumSC->getType()) <= 64 &&
3222 TTI.isLegalAddImmediate((uint64_t)F.UnfoldedOffset +
3223 InnerSumSC->getValue()->getZExtValue())) {
3224 F.UnfoldedOffset = (uint64_t)F.UnfoldedOffset +
3225 InnerSumSC->getValue()->getZExtValue();
3226 F.BaseRegs.erase(F.BaseRegs.begin() + i);
3228 F.BaseRegs[i] = InnerSum;
3230 // Add J as its own register, or an unfolded immediate.
3231 const SCEVConstant *SC = dyn_cast<SCEVConstant>(*J);
3232 if (SC && SE.getTypeSizeInBits(SC->getType()) <= 64 &&
3233 TTI.isLegalAddImmediate((uint64_t)F.UnfoldedOffset +
3234 SC->getValue()->getZExtValue()))
3235 F.UnfoldedOffset = (uint64_t)F.UnfoldedOffset +
3236 SC->getValue()->getZExtValue();
3238 F.BaseRegs.push_back(*J);
3240 if (InsertFormula(LU, LUIdx, F))
3241 // If that formula hadn't been seen before, recurse to find more like
3243 GenerateReassociations(LU, LUIdx, LU.Formulae.back(), Depth+1);
3248 /// GenerateCombinations - Generate a formula consisting of all of the
3249 /// loop-dominating registers added into a single register.
3250 void LSRInstance::GenerateCombinations(LSRUse &LU, unsigned LUIdx,
3252 // This method is only interesting on a plurality of registers.
3253 if (Base.BaseRegs.size() <= 1) return;
3257 SmallVector<const SCEV *, 4> Ops;
3258 for (SmallVectorImpl<const SCEV *>::const_iterator
3259 I = Base.BaseRegs.begin(), E = Base.BaseRegs.end(); I != E; ++I) {
3260 const SCEV *BaseReg = *I;
3261 if (SE.properlyDominates(BaseReg, L->getHeader()) &&
3262 !SE.hasComputableLoopEvolution(BaseReg, L))
3263 Ops.push_back(BaseReg);
3265 F.BaseRegs.push_back(BaseReg);
3267 if (Ops.size() > 1) {
3268 const SCEV *Sum = SE.getAddExpr(Ops);
3269 // TODO: If Sum is zero, it probably means ScalarEvolution missed an
3270 // opportunity to fold something. For now, just ignore such cases
3271 // rather than proceed with zero in a register.
3272 if (!Sum->isZero()) {
3273 F.BaseRegs.push_back(Sum);
3274 (void)InsertFormula(LU, LUIdx, F);
3279 /// GenerateSymbolicOffsets - Generate reuse formulae using symbolic offsets.
3280 void LSRInstance::GenerateSymbolicOffsets(LSRUse &LU, unsigned LUIdx,
3282 // We can't add a symbolic offset if the address already contains one.
3283 if (Base.BaseGV) return;
3285 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i) {
3286 const SCEV *G = Base.BaseRegs[i];
3287 GlobalValue *GV = ExtractSymbol(G, SE);
3288 if (G->isZero() || !GV)
3292 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F))
3295 (void)InsertFormula(LU, LUIdx, F);
3299 /// GenerateConstantOffsets - Generate reuse formulae using symbolic offsets.
3300 void LSRInstance::GenerateConstantOffsets(LSRUse &LU, unsigned LUIdx,
3302 // TODO: For now, just add the min and max offset, because it usually isn't
3303 // worthwhile looking at everything inbetween.
3304 SmallVector<int64_t, 2> Worklist;
3305 Worklist.push_back(LU.MinOffset);
3306 if (LU.MaxOffset != LU.MinOffset)
3307 Worklist.push_back(LU.MaxOffset);
3309 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i) {
3310 const SCEV *G = Base.BaseRegs[i];
3312 for (SmallVectorImpl<int64_t>::const_iterator I = Worklist.begin(),
3313 E = Worklist.end(); I != E; ++I) {
3315 F.BaseOffset = (uint64_t)Base.BaseOffset - *I;
3316 if (isLegalUse(TTI, LU.MinOffset - *I, LU.MaxOffset - *I, LU.Kind,
3318 // Add the offset to the base register.
3319 const SCEV *NewG = SE.getAddExpr(SE.getConstant(G->getType(), *I), G);
3320 // If it cancelled out, drop the base register, otherwise update it.
3321 if (NewG->isZero()) {
3322 std::swap(F.BaseRegs[i], F.BaseRegs.back());
3323 F.BaseRegs.pop_back();
3325 F.BaseRegs[i] = NewG;
3327 (void)InsertFormula(LU, LUIdx, F);
3331 int64_t Imm = ExtractImmediate(G, SE);
3332 if (G->isZero() || Imm == 0)
3335 F.BaseOffset = (uint64_t)F.BaseOffset + Imm;
3336 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F))
3339 (void)InsertFormula(LU, LUIdx, F);
3343 /// GenerateICmpZeroScales - For ICmpZero, check to see if we can scale up
3344 /// the comparison. For example, x == y -> x*c == y*c.
3345 void LSRInstance::GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx,
3347 if (LU.Kind != LSRUse::ICmpZero) return;
3349 // Determine the integer type for the base formula.
3350 Type *IntTy = Base.getType();
3352 if (SE.getTypeSizeInBits(IntTy) > 64) return;
3354 // Don't do this if there is more than one offset.
3355 if (LU.MinOffset != LU.MaxOffset) return;
3357 assert(!Base.BaseGV && "ICmpZero use is not legal!");
3359 // Check each interesting stride.
3360 for (SmallSetVector<int64_t, 8>::const_iterator
3361 I = Factors.begin(), E = Factors.end(); I != E; ++I) {
3362 int64_t Factor = *I;
3364 // Check that the multiplication doesn't overflow.
3365 if (Base.BaseOffset == INT64_MIN && Factor == -1)
3367 int64_t NewBaseOffset = (uint64_t)Base.BaseOffset * Factor;
3368 if (NewBaseOffset / Factor != Base.BaseOffset)
3371 // Check that multiplying with the use offset doesn't overflow.
3372 int64_t Offset = LU.MinOffset;
3373 if (Offset == INT64_MIN && Factor == -1)
3375 Offset = (uint64_t)Offset * Factor;
3376 if (Offset / Factor != LU.MinOffset)
3380 F.BaseOffset = NewBaseOffset;
3382 // Check that this scale is legal.
3383 if (!isLegalUse(TTI, Offset, Offset, LU.Kind, LU.AccessTy, F))
3386 // Compensate for the use having MinOffset built into it.
3387 F.BaseOffset = (uint64_t)F.BaseOffset + Offset - LU.MinOffset;
3389 const SCEV *FactorS = SE.getConstant(IntTy, Factor);
3391 // Check that multiplying with each base register doesn't overflow.
3392 for (size_t i = 0, e = F.BaseRegs.size(); i != e; ++i) {
3393 F.BaseRegs[i] = SE.getMulExpr(F.BaseRegs[i], FactorS);
3394 if (getExactSDiv(F.BaseRegs[i], FactorS, SE) != Base.BaseRegs[i])
3398 // Check that multiplying with the scaled register doesn't overflow.
3400 F.ScaledReg = SE.getMulExpr(F.ScaledReg, FactorS);
3401 if (getExactSDiv(F.ScaledReg, FactorS, SE) != Base.ScaledReg)
3405 // Check that multiplying with the unfolded offset doesn't overflow.
3406 if (F.UnfoldedOffset != 0) {
3407 if (F.UnfoldedOffset == INT64_MIN && Factor == -1)
3409 F.UnfoldedOffset = (uint64_t)F.UnfoldedOffset * Factor;
3410 if (F.UnfoldedOffset / Factor != Base.UnfoldedOffset)
3414 // If we make it here and it's legal, add it.
3415 (void)InsertFormula(LU, LUIdx, F);
3420 /// GenerateScales - Generate stride factor reuse formulae by making use of
3421 /// scaled-offset address modes, for example.
3422 void LSRInstance::GenerateScales(LSRUse &LU, unsigned LUIdx, Formula Base) {
3423 // Determine the integer type for the base formula.
3424 Type *IntTy = Base.getType();
3427 // If this Formula already has a scaled register, we can't add another one.
3428 if (Base.Scale != 0) return;
3430 // Check each interesting stride.
3431 for (SmallSetVector<int64_t, 8>::const_iterator
3432 I = Factors.begin(), E = Factors.end(); I != E; ++I) {
3433 int64_t Factor = *I;
3435 Base.Scale = Factor;
3436 Base.HasBaseReg = Base.BaseRegs.size() > 1;
3437 // Check whether this scale is going to be legal.
3438 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
3440 // As a special-case, handle special out-of-loop Basic users specially.
3441 // TODO: Reconsider this special case.
3442 if (LU.Kind == LSRUse::Basic &&
3443 isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LSRUse::Special,
3444 LU.AccessTy, Base) &&
3445 LU.AllFixupsOutsideLoop)
3446 LU.Kind = LSRUse::Special;
3450 // For an ICmpZero, negating a solitary base register won't lead to
3452 if (LU.Kind == LSRUse::ICmpZero &&
3453 !Base.HasBaseReg && Base.BaseOffset == 0 && !Base.BaseGV)
3455 // For each addrec base reg, apply the scale, if possible.
3456 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3457 if (const SCEVAddRecExpr *AR =
3458 dyn_cast<SCEVAddRecExpr>(Base.BaseRegs[i])) {
3459 const SCEV *FactorS = SE.getConstant(IntTy, Factor);
3460 if (FactorS->isZero())
3462 // Divide out the factor, ignoring high bits, since we'll be
3463 // scaling the value back up in the end.
3464 if (const SCEV *Quotient = getExactSDiv(AR, FactorS, SE, true)) {
3465 // TODO: This could be optimized to avoid all the copying.
3467 F.ScaledReg = Quotient;
3468 F.DeleteBaseReg(F.BaseRegs[i]);
3469 (void)InsertFormula(LU, LUIdx, F);
3475 /// GenerateTruncates - Generate reuse formulae from different IV types.
3476 void LSRInstance::GenerateTruncates(LSRUse &LU, unsigned LUIdx, Formula Base) {
3477 // Don't bother truncating symbolic values.
3478 if (Base.BaseGV) return;
3480 // Determine the integer type for the base formula.
3481 Type *DstTy = Base.getType();
3483 DstTy = SE.getEffectiveSCEVType(DstTy);
3485 for (SmallSetVector<Type *, 4>::const_iterator
3486 I = Types.begin(), E = Types.end(); I != E; ++I) {
3488 if (SrcTy != DstTy && TTI.isTruncateFree(SrcTy, DstTy)) {
3491 if (F.ScaledReg) F.ScaledReg = SE.getAnyExtendExpr(F.ScaledReg, *I);
3492 for (SmallVectorImpl<const SCEV *>::iterator J = F.BaseRegs.begin(),
3493 JE = F.BaseRegs.end(); J != JE; ++J)
3494 *J = SE.getAnyExtendExpr(*J, SrcTy);
3496 // TODO: This assumes we've done basic processing on all uses and
3497 // have an idea what the register usage is.
3498 if (!F.hasRegsUsedByUsesOtherThan(LUIdx, RegUses))
3501 (void)InsertFormula(LU, LUIdx, F);
3508 /// WorkItem - Helper class for GenerateCrossUseConstantOffsets. It's used to
3509 /// defer modifications so that the search phase doesn't have to worry about
3510 /// the data structures moving underneath it.
3514 const SCEV *OrigReg;
3516 WorkItem(size_t LI, int64_t I, const SCEV *R)
3517 : LUIdx(LI), Imm(I), OrigReg(R) {}
3519 void print(raw_ostream &OS) const;
3525 void WorkItem::print(raw_ostream &OS) const {
3526 OS << "in formulae referencing " << *OrigReg << " in use " << LUIdx
3527 << " , add offset " << Imm;
3530 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
3531 void WorkItem::dump() const {
3532 print(errs()); errs() << '\n';
3536 /// GenerateCrossUseConstantOffsets - Look for registers which are a constant
3537 /// distance apart and try to form reuse opportunities between them.
3538 void LSRInstance::GenerateCrossUseConstantOffsets() {
3539 // Group the registers by their value without any added constant offset.
3540 typedef std::map<int64_t, const SCEV *> ImmMapTy;
3541 typedef DenseMap<const SCEV *, ImmMapTy> RegMapTy;
3543 DenseMap<const SCEV *, SmallBitVector> UsedByIndicesMap;
3544 SmallVector<const SCEV *, 8> Sequence;
3545 for (RegUseTracker::const_iterator I = RegUses.begin(), E = RegUses.end();
3547 const SCEV *Reg = *I;
3548 int64_t Imm = ExtractImmediate(Reg, SE);
3549 std::pair<RegMapTy::iterator, bool> Pair =
3550 Map.insert(std::make_pair(Reg, ImmMapTy()));
3552 Sequence.push_back(Reg);
3553 Pair.first->second.insert(std::make_pair(Imm, *I));
3554 UsedByIndicesMap[Reg] |= RegUses.getUsedByIndices(*I);
3557 // Now examine each set of registers with the same base value. Build up
3558 // a list of work to do and do the work in a separate step so that we're
3559 // not adding formulae and register counts while we're searching.
3560 SmallVector<WorkItem, 32> WorkItems;
3561 SmallSet<std::pair<size_t, int64_t>, 32> UniqueItems;
3562 for (SmallVectorImpl<const SCEV *>::const_iterator I = Sequence.begin(),
3563 E = Sequence.end(); I != E; ++I) {
3564 const SCEV *Reg = *I;
3565 const ImmMapTy &Imms = Map.find(Reg)->second;
3567 // It's not worthwhile looking for reuse if there's only one offset.
3568 if (Imms.size() == 1)
3571 DEBUG(dbgs() << "Generating cross-use offsets for " << *Reg << ':';
3572 for (ImmMapTy::const_iterator J = Imms.begin(), JE = Imms.end();
3574 dbgs() << ' ' << J->first;
3577 // Examine each offset.
3578 for (ImmMapTy::const_iterator J = Imms.begin(), JE = Imms.end();
3580 const SCEV *OrigReg = J->second;
3582 int64_t JImm = J->first;
3583 const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(OrigReg);
3585 if (!isa<SCEVConstant>(OrigReg) &&
3586 UsedByIndicesMap[Reg].count() == 1) {
3587 DEBUG(dbgs() << "Skipping cross-use reuse for " << *OrigReg << '\n');
3591 // Conservatively examine offsets between this orig reg a few selected
3593 ImmMapTy::const_iterator OtherImms[] = {
3594 Imms.begin(), prior(Imms.end()),
3595 Imms.lower_bound((Imms.begin()->first + prior(Imms.end())->first) / 2)
3597 for (size_t i = 0, e = array_lengthof(OtherImms); i != e; ++i) {
3598 ImmMapTy::const_iterator M = OtherImms[i];
3599 if (M == J || M == JE) continue;
3601 // Compute the difference between the two.
3602 int64_t Imm = (uint64_t)JImm - M->first;
3603 for (int LUIdx = UsedByIndices.find_first(); LUIdx != -1;
3604 LUIdx = UsedByIndices.find_next(LUIdx))
3605 // Make a memo of this use, offset, and register tuple.
3606 if (UniqueItems.insert(std::make_pair(LUIdx, Imm)))
3607 WorkItems.push_back(WorkItem(LUIdx, Imm, OrigReg));
3614 UsedByIndicesMap.clear();
3615 UniqueItems.clear();
3617 // Now iterate through the worklist and add new formulae.
3618 for (SmallVectorImpl<WorkItem>::const_iterator I = WorkItems.begin(),
3619 E = WorkItems.end(); I != E; ++I) {
3620 const WorkItem &WI = *I;
3621 size_t LUIdx = WI.LUIdx;
3622 LSRUse &LU = Uses[LUIdx];
3623 int64_t Imm = WI.Imm;
3624 const SCEV *OrigReg = WI.OrigReg;
3626 Type *IntTy = SE.getEffectiveSCEVType(OrigReg->getType());
3627 const SCEV *NegImmS = SE.getSCEV(ConstantInt::get(IntTy, -(uint64_t)Imm));
3628 unsigned BitWidth = SE.getTypeSizeInBits(IntTy);
3630 // TODO: Use a more targeted data structure.
3631 for (size_t L = 0, LE = LU.Formulae.size(); L != LE; ++L) {
3632 const Formula &F = LU.Formulae[L];
3633 // Use the immediate in the scaled register.
3634 if (F.ScaledReg == OrigReg) {
3635 int64_t Offset = (uint64_t)F.BaseOffset + Imm * (uint64_t)F.Scale;
3636 // Don't create 50 + reg(-50).
3637 if (F.referencesReg(SE.getSCEV(
3638 ConstantInt::get(IntTy, -(uint64_t)Offset))))
3641 NewF.BaseOffset = Offset;
3642 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
3645 NewF.ScaledReg = SE.getAddExpr(NegImmS, NewF.ScaledReg);
3647 // If the new scale is a constant in a register, and adding the constant
3648 // value to the immediate would produce a value closer to zero than the
3649 // immediate itself, then the formula isn't worthwhile.
3650 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(NewF.ScaledReg))
3651 if (C->getValue()->isNegative() !=
3652 (NewF.BaseOffset < 0) &&
3653 (C->getValue()->getValue().abs() * APInt(BitWidth, F.Scale))
3654 .ule(abs64(NewF.BaseOffset)))
3658 (void)InsertFormula(LU, LUIdx, NewF);
3660 // Use the immediate in a base register.
3661 for (size_t N = 0, NE = F.BaseRegs.size(); N != NE; ++N) {
3662 const SCEV *BaseReg = F.BaseRegs[N];
3663 if (BaseReg != OrigReg)
3666 NewF.BaseOffset = (uint64_t)NewF.BaseOffset + Imm;
3667 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset,
3668 LU.Kind, LU.AccessTy, NewF)) {
3669 if (!TTI.isLegalAddImmediate((uint64_t)NewF.UnfoldedOffset + Imm))
3672 NewF.UnfoldedOffset = (uint64_t)NewF.UnfoldedOffset + Imm;
3674 NewF.BaseRegs[N] = SE.getAddExpr(NegImmS, BaseReg);
3676 // If the new formula has a constant in a register, and adding the
3677 // constant value to the immediate would produce a value closer to
3678 // zero than the immediate itself, then the formula isn't worthwhile.
3679 for (SmallVectorImpl<const SCEV *>::const_iterator
3680 J = NewF.BaseRegs.begin(), JE = NewF.BaseRegs.end();
3682 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(*J))
3683 if ((C->getValue()->getValue() + NewF.BaseOffset).abs().slt(
3684 abs64(NewF.BaseOffset)) &&
3685 (C->getValue()->getValue() +
3686 NewF.BaseOffset).countTrailingZeros() >=
3687 countTrailingZeros<uint64_t>(NewF.BaseOffset))
3691 (void)InsertFormula(LU, LUIdx, NewF);
3700 /// GenerateAllReuseFormulae - Generate formulae for each use.
3702 LSRInstance::GenerateAllReuseFormulae() {
3703 // This is split into multiple loops so that hasRegsUsedByUsesOtherThan
3704 // queries are more precise.
3705 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3706 LSRUse &LU = Uses[LUIdx];
3707 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3708 GenerateReassociations(LU, LUIdx, LU.Formulae[i]);
3709 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3710 GenerateCombinations(LU, LUIdx, LU.Formulae[i]);
3712 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3713 LSRUse &LU = Uses[LUIdx];
3714 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3715 GenerateSymbolicOffsets(LU, LUIdx, LU.Formulae[i]);
3716 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3717 GenerateConstantOffsets(LU, LUIdx, LU.Formulae[i]);
3718 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3719 GenerateICmpZeroScales(LU, LUIdx, LU.Formulae[i]);
3720 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3721 GenerateScales(LU, LUIdx, LU.Formulae[i]);
3723 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3724 LSRUse &LU = Uses[LUIdx];
3725 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
3726 GenerateTruncates(LU, LUIdx, LU.Formulae[i]);
3729 GenerateCrossUseConstantOffsets();
3731 DEBUG(dbgs() << "\n"
3732 "After generating reuse formulae:\n";
3733 print_uses(dbgs()));
3736 /// If there are multiple formulae with the same set of registers used
3737 /// by other uses, pick the best one and delete the others.
3738 void LSRInstance::FilterOutUndesirableDedicatedRegisters() {
3739 DenseSet<const SCEV *> VisitedRegs;
3740 SmallPtrSet<const SCEV *, 16> Regs;
3741 SmallPtrSet<const SCEV *, 16> LoserRegs;
3743 bool ChangedFormulae = false;
3746 // Collect the best formula for each unique set of shared registers. This
3747 // is reset for each use.
3748 typedef DenseMap<SmallVector<const SCEV *, 4>, size_t, UniquifierDenseMapInfo>
3750 BestFormulaeTy BestFormulae;
3752 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3753 LSRUse &LU = Uses[LUIdx];
3754 DEBUG(dbgs() << "Filtering for use "; LU.print(dbgs()); dbgs() << '\n');
3757 for (size_t FIdx = 0, NumForms = LU.Formulae.size();
3758 FIdx != NumForms; ++FIdx) {
3759 Formula &F = LU.Formulae[FIdx];
3761 // Some formulas are instant losers. For example, they may depend on
3762 // nonexistent AddRecs from other loops. These need to be filtered
3763 // immediately, otherwise heuristics could choose them over others leading
3764 // to an unsatisfactory solution. Passing LoserRegs into RateFormula here
3765 // avoids the need to recompute this information across formulae using the
3766 // same bad AddRec. Passing LoserRegs is also essential unless we remove
3767 // the corresponding bad register from the Regs set.
3770 CostF.RateFormula(TTI, F, Regs, VisitedRegs, L, LU.Offsets, SE, DT, LU,
3772 if (CostF.isLoser()) {
3773 // During initial formula generation, undesirable formulae are generated
3774 // by uses within other loops that have some non-trivial address mode or
3775 // use the postinc form of the IV. LSR needs to provide these formulae
3776 // as the basis of rediscovering the desired formula that uses an AddRec
3777 // corresponding to the existing phi. Once all formulae have been
3778 // generated, these initial losers may be pruned.
3779 DEBUG(dbgs() << " Filtering loser "; F.print(dbgs());
3783 SmallVector<const SCEV *, 4> Key;
3784 for (SmallVectorImpl<const SCEV *>::const_iterator J = F.BaseRegs.begin(),
3785 JE = F.BaseRegs.end(); J != JE; ++J) {
3786 const SCEV *Reg = *J;
3787 if (RegUses.isRegUsedByUsesOtherThan(Reg, LUIdx))
3791 RegUses.isRegUsedByUsesOtherThan(F.ScaledReg, LUIdx))
3792 Key.push_back(F.ScaledReg);
3793 // Unstable sort by host order ok, because this is only used for
3795 std::sort(Key.begin(), Key.end());
3797 std::pair<BestFormulaeTy::const_iterator, bool> P =
3798 BestFormulae.insert(std::make_pair(Key, FIdx));
3802 Formula &Best = LU.Formulae[P.first->second];
3806 CostBest.RateFormula(TTI, Best, Regs, VisitedRegs, L, LU.Offsets, SE,
3808 if (CostF < CostBest)
3810 DEBUG(dbgs() << " Filtering out formula "; F.print(dbgs());
3812 " in favor of formula "; Best.print(dbgs());
3816 ChangedFormulae = true;
3818 LU.DeleteFormula(F);
3824 // Now that we've filtered out some formulae, recompute the Regs set.
3826 LU.RecomputeRegs(LUIdx, RegUses);
3828 // Reset this to prepare for the next use.
3829 BestFormulae.clear();
3832 DEBUG(if (ChangedFormulae) {
3834 "After filtering out undesirable candidates:\n";
3839 // This is a rough guess that seems to work fairly well.
3840 static const size_t ComplexityLimit = UINT16_MAX;
3842 /// EstimateSearchSpaceComplexity - Estimate the worst-case number of
3843 /// solutions the solver might have to consider. It almost never considers
3844 /// this many solutions because it prune the search space, but the pruning
3845 /// isn't always sufficient.
3846 size_t LSRInstance::EstimateSearchSpaceComplexity() const {
3848 for (SmallVectorImpl<LSRUse>::const_iterator I = Uses.begin(),
3849 E = Uses.end(); I != E; ++I) {
3850 size_t FSize = I->Formulae.size();
3851 if (FSize >= ComplexityLimit) {
3852 Power = ComplexityLimit;
3856 if (Power >= ComplexityLimit)
3862 /// NarrowSearchSpaceByDetectingSupersets - When one formula uses a superset
3863 /// of the registers of another formula, it won't help reduce register
3864 /// pressure (though it may not necessarily hurt register pressure); remove
3865 /// it to simplify the system.
3866 void LSRInstance::NarrowSearchSpaceByDetectingSupersets() {
3867 if (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
3868 DEBUG(dbgs() << "The search space is too complex.\n");
3870 DEBUG(dbgs() << "Narrowing the search space by eliminating formulae "
3871 "which use a superset of registers used by other "
3874 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3875 LSRUse &LU = Uses[LUIdx];
3877 for (size_t i = 0, e = LU.Formulae.size(); i != e; ++i) {
3878 Formula &F = LU.Formulae[i];
3879 // Look for a formula with a constant or GV in a register. If the use
3880 // also has a formula with that same value in an immediate field,
3881 // delete the one that uses a register.
3882 for (SmallVectorImpl<const SCEV *>::const_iterator
3883 I = F.BaseRegs.begin(), E = F.BaseRegs.end(); I != E; ++I) {
3884 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(*I)) {
3886 NewF.BaseOffset += C->getValue()->getSExtValue();
3887 NewF.BaseRegs.erase(NewF.BaseRegs.begin() +
3888 (I - F.BaseRegs.begin()));
3889 if (LU.HasFormulaWithSameRegs(NewF)) {
3890 DEBUG(dbgs() << " Deleting "; F.print(dbgs()); dbgs() << '\n');
3891 LU.DeleteFormula(F);
3897 } else if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(*I)) {
3898 if (GlobalValue *GV = dyn_cast<GlobalValue>(U->getValue()))
3902 NewF.BaseRegs.erase(NewF.BaseRegs.begin() +
3903 (I - F.BaseRegs.begin()));
3904 if (LU.HasFormulaWithSameRegs(NewF)) {
3905 DEBUG(dbgs() << " Deleting "; F.print(dbgs());
3907 LU.DeleteFormula(F);
3918 LU.RecomputeRegs(LUIdx, RegUses);
3921 DEBUG(dbgs() << "After pre-selection:\n";
3922 print_uses(dbgs()));
3926 /// NarrowSearchSpaceByCollapsingUnrolledCode - When there are many registers
3927 /// for expressions like A, A+1, A+2, etc., allocate a single register for
3929 void LSRInstance::NarrowSearchSpaceByCollapsingUnrolledCode() {
3930 if (EstimateSearchSpaceComplexity() < ComplexityLimit)
3933 DEBUG(dbgs() << "The search space is too complex.\n"
3934 "Narrowing the search space by assuming that uses separated "
3935 "by a constant offset will use the same registers.\n");
3937 // This is especially useful for unrolled loops.
3939 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
3940 LSRUse &LU = Uses[LUIdx];
3941 for (SmallVectorImpl<Formula>::const_iterator I = LU.Formulae.begin(),
3942 E = LU.Formulae.end(); I != E; ++I) {
3943 const Formula &F = *I;
3944 if (F.BaseOffset == 0 || F.Scale != 0)
3947 LSRUse *LUThatHas = FindUseWithSimilarFormula(F, LU);
3951 if (!reconcileNewOffset(*LUThatHas, F.BaseOffset, /*HasBaseReg=*/ false,
3952 LU.Kind, LU.AccessTy))
3955 DEBUG(dbgs() << " Deleting use "; LU.print(dbgs()); dbgs() << '\n');
3957 LUThatHas->AllFixupsOutsideLoop &= LU.AllFixupsOutsideLoop;
3959 // Update the relocs to reference the new use.
3960 for (SmallVectorImpl<LSRFixup>::iterator I = Fixups.begin(),
3961 E = Fixups.end(); I != E; ++I) {
3962 LSRFixup &Fixup = *I;
3963 if (Fixup.LUIdx == LUIdx) {
3964 Fixup.LUIdx = LUThatHas - &Uses.front();
3965 Fixup.Offset += F.BaseOffset;
3966 // Add the new offset to LUThatHas' offset list.
3967 if (LUThatHas->Offsets.back() != Fixup.Offset) {
3968 LUThatHas->Offsets.push_back(Fixup.Offset);
3969 if (Fixup.Offset > LUThatHas->MaxOffset)
3970 LUThatHas->MaxOffset = Fixup.Offset;
3971 if (Fixup.Offset < LUThatHas->MinOffset)
3972 LUThatHas->MinOffset = Fixup.Offset;
3974 DEBUG(dbgs() << "New fixup has offset " << Fixup.Offset << '\n');
3976 if (Fixup.LUIdx == NumUses-1)
3977 Fixup.LUIdx = LUIdx;
3980 // Delete formulae from the new use which are no longer legal.
3982 for (size_t i = 0, e = LUThatHas->Formulae.size(); i != e; ++i) {
3983 Formula &F = LUThatHas->Formulae[i];
3984 if (!isLegalUse(TTI, LUThatHas->MinOffset, LUThatHas->MaxOffset,
3985 LUThatHas->Kind, LUThatHas->AccessTy, F)) {
3986 DEBUG(dbgs() << " Deleting "; F.print(dbgs());
3988 LUThatHas->DeleteFormula(F);
3996 LUThatHas->RecomputeRegs(LUThatHas - &Uses.front(), RegUses);
3998 // Delete the old use.
3999 DeleteUse(LU, LUIdx);
4006 DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
4009 /// NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters - Call
4010 /// FilterOutUndesirableDedicatedRegisters again, if necessary, now that
4011 /// we've done more filtering, as it may be able to find more formulae to
4013 void LSRInstance::NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters(){
4014 if (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
4015 DEBUG(dbgs() << "The search space is too complex.\n");
4017 DEBUG(dbgs() << "Narrowing the search space by re-filtering out "
4018 "undesirable dedicated registers.\n");
4020 FilterOutUndesirableDedicatedRegisters();
4022 DEBUG(dbgs() << "After pre-selection:\n";
4023 print_uses(dbgs()));
4027 /// NarrowSearchSpaceByPickingWinnerRegs - Pick a register which seems likely
4028 /// to be profitable, and then in any use which has any reference to that
4029 /// register, delete all formulae which do not reference that register.
4030 void LSRInstance::NarrowSearchSpaceByPickingWinnerRegs() {
4031 // With all other options exhausted, loop until the system is simple
4032 // enough to handle.
4033 SmallPtrSet<const SCEV *, 4> Taken;
4034 while (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
4035 // Ok, we have too many of formulae on our hands to conveniently handle.
4036 // Use a rough heuristic to thin out the list.
4037 DEBUG(dbgs() << "The search space is too complex.\n");
4039 // Pick the register which is used by the most LSRUses, which is likely
4040 // to be a good reuse register candidate.
4041 const SCEV *Best = 0;
4042 unsigned BestNum = 0;
4043 for (RegUseTracker::const_iterator I = RegUses.begin(), E = RegUses.end();
4045 const SCEV *Reg = *I;
4046 if (Taken.count(Reg))
4051 unsigned Count = RegUses.getUsedByIndices(Reg).count();
4052 if (Count > BestNum) {
4059 DEBUG(dbgs() << "Narrowing the search space by assuming " << *Best
4060 << " will yield profitable reuse.\n");
4063 // In any use with formulae which references this register, delete formulae
4064 // which don't reference it.
4065 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4066 LSRUse &LU = Uses[LUIdx];
4067 if (!LU.Regs.count(Best)) continue;
4070 for (size_t i = 0, e = LU.Formulae.size(); i != e; ++i) {
4071 Formula &F = LU.Formulae[i];
4072 if (!F.referencesReg(Best)) {
4073 DEBUG(dbgs() << " Deleting "; F.print(dbgs()); dbgs() << '\n');
4074 LU.DeleteFormula(F);
4078 assert(e != 0 && "Use has no formulae left! Is Regs inconsistent?");
4084 LU.RecomputeRegs(LUIdx, RegUses);
4087 DEBUG(dbgs() << "After pre-selection:\n";
4088 print_uses(dbgs()));
4092 /// NarrowSearchSpaceUsingHeuristics - If there are an extraordinary number of
4093 /// formulae to choose from, use some rough heuristics to prune down the number
4094 /// of formulae. This keeps the main solver from taking an extraordinary amount
4095 /// of time in some worst-case scenarios.
4096 void LSRInstance::NarrowSearchSpaceUsingHeuristics() {
4097 NarrowSearchSpaceByDetectingSupersets();
4098 NarrowSearchSpaceByCollapsingUnrolledCode();
4099 NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters();
4100 NarrowSearchSpaceByPickingWinnerRegs();
4103 /// SolveRecurse - This is the recursive solver.
4104 void LSRInstance::SolveRecurse(SmallVectorImpl<const Formula *> &Solution,
4106 SmallVectorImpl<const Formula *> &Workspace,
4107 const Cost &CurCost,
4108 const SmallPtrSet<const SCEV *, 16> &CurRegs,
4109 DenseSet<const SCEV *> &VisitedRegs) const {
4112 // - use more aggressive filtering
4113 // - sort the formula so that the most profitable solutions are found first
4114 // - sort the uses too
4116 // - don't compute a cost, and then compare. compare while computing a cost
4118 // - track register sets with SmallBitVector
4120 const LSRUse &LU = Uses[Workspace.size()];
4122 // If this use references any register that's already a part of the
4123 // in-progress solution, consider it a requirement that a formula must
4124 // reference that register in order to be considered. This prunes out
4125 // unprofitable searching.
4126 SmallSetVector<const SCEV *, 4> ReqRegs;
4127 for (SmallPtrSet<const SCEV *, 16>::const_iterator I = CurRegs.begin(),
4128 E = CurRegs.end(); I != E; ++I)
4129 if (LU.Regs.count(*I))
4132 SmallPtrSet<const SCEV *, 16> NewRegs;
4134 for (SmallVectorImpl<Formula>::const_iterator I = LU.Formulae.begin(),
4135 E = LU.Formulae.end(); I != E; ++I) {
4136 const Formula &F = *I;
4138 // Ignore formulae which do not use any of the required registers.
4139 bool SatisfiedReqReg = true;
4140 for (SmallSetVector<const SCEV *, 4>::const_iterator J = ReqRegs.begin(),
4141 JE = ReqRegs.end(); J != JE; ++J) {
4142 const SCEV *Reg = *J;
4143 if ((!F.ScaledReg || F.ScaledReg != Reg) &&
4144 std::find(F.BaseRegs.begin(), F.BaseRegs.end(), Reg) ==
4146 SatisfiedReqReg = false;
4150 if (!SatisfiedReqReg) {
4151 // If none of the formulae satisfied the required registers, then we could
4152 // clear ReqRegs and try again. Currently, we simply give up in this case.
4156 // Evaluate the cost of the current formula. If it's already worse than
4157 // the current best, prune the search at that point.
4160 NewCost.RateFormula(TTI, F, NewRegs, VisitedRegs, L, LU.Offsets, SE, DT,
4162 if (NewCost < SolutionCost) {
4163 Workspace.push_back(&F);
4164 if (Workspace.size() != Uses.size()) {
4165 SolveRecurse(Solution, SolutionCost, Workspace, NewCost,
4166 NewRegs, VisitedRegs);
4167 if (F.getNumRegs() == 1 && Workspace.size() == 1)
4168 VisitedRegs.insert(F.ScaledReg ? F.ScaledReg : F.BaseRegs[0]);
4170 DEBUG(dbgs() << "New best at "; NewCost.print(dbgs());
4171 dbgs() << ".\n Regs:";
4172 for (SmallPtrSet<const SCEV *, 16>::const_iterator
4173 I = NewRegs.begin(), E = NewRegs.end(); I != E; ++I)
4174 dbgs() << ' ' << **I;
4177 SolutionCost = NewCost;
4178 Solution = Workspace;
4180 Workspace.pop_back();
4185 /// Solve - Choose one formula from each use. Return the results in the given
4186 /// Solution vector.
4187 void LSRInstance::Solve(SmallVectorImpl<const Formula *> &Solution) const {
4188 SmallVector<const Formula *, 8> Workspace;
4190 SolutionCost.Loose();
4192 SmallPtrSet<const SCEV *, 16> CurRegs;
4193 DenseSet<const SCEV *> VisitedRegs;
4194 Workspace.reserve(Uses.size());
4196 // SolveRecurse does all the work.
4197 SolveRecurse(Solution, SolutionCost, Workspace, CurCost,
4198 CurRegs, VisitedRegs);
4199 if (Solution.empty()) {
4200 DEBUG(dbgs() << "\nNo Satisfactory Solution\n");
4204 // Ok, we've now made all our decisions.
4205 DEBUG(dbgs() << "\n"
4206 "The chosen solution requires "; SolutionCost.print(dbgs());
4208 for (size_t i = 0, e = Uses.size(); i != e; ++i) {
4210 Uses[i].print(dbgs());
4213 Solution[i]->print(dbgs());
4217 assert(Solution.size() == Uses.size() && "Malformed solution!");
4220 /// HoistInsertPosition - Helper for AdjustInsertPositionForExpand. Climb up
4221 /// the dominator tree far as we can go while still being dominated by the
4222 /// input positions. This helps canonicalize the insert position, which
4223 /// encourages sharing.
4224 BasicBlock::iterator
4225 LSRInstance::HoistInsertPosition(BasicBlock::iterator IP,
4226 const SmallVectorImpl<Instruction *> &Inputs)
4229 const Loop *IPLoop = LI.getLoopFor(IP->getParent());
4230 unsigned IPLoopDepth = IPLoop ? IPLoop->getLoopDepth() : 0;
4233 for (DomTreeNode *Rung = DT.getNode(IP->getParent()); ; ) {
4234 if (!Rung) return IP;
4235 Rung = Rung->getIDom();
4236 if (!Rung) return IP;
4237 IDom = Rung->getBlock();
4239 // Don't climb into a loop though.
4240 const Loop *IDomLoop = LI.getLoopFor(IDom);
4241 unsigned IDomDepth = IDomLoop ? IDomLoop->getLoopDepth() : 0;
4242 if (IDomDepth <= IPLoopDepth &&
4243 (IDomDepth != IPLoopDepth || IDomLoop == IPLoop))
4247 bool AllDominate = true;
4248 Instruction *BetterPos = 0;
4249 Instruction *Tentative = IDom->getTerminator();
4250 for (SmallVectorImpl<Instruction *>::const_iterator I = Inputs.begin(),
4251 E = Inputs.end(); I != E; ++I) {
4252 Instruction *Inst = *I;
4253 if (Inst == Tentative || !DT.dominates(Inst, Tentative)) {
4254 AllDominate = false;
4257 // Attempt to find an insert position in the middle of the block,
4258 // instead of at the end, so that it can be used for other expansions.
4259 if (IDom == Inst->getParent() &&
4260 (!BetterPos || !DT.dominates(Inst, BetterPos)))
4261 BetterPos = llvm::next(BasicBlock::iterator(Inst));
4274 /// AdjustInsertPositionForExpand - Determine an input position which will be
4275 /// dominated by the operands and which will dominate the result.
4276 BasicBlock::iterator
4277 LSRInstance::AdjustInsertPositionForExpand(BasicBlock::iterator LowestIP,
4280 SCEVExpander &Rewriter) const {
4281 // Collect some instructions which must be dominated by the
4282 // expanding replacement. These must be dominated by any operands that
4283 // will be required in the expansion.
4284 SmallVector<Instruction *, 4> Inputs;
4285 if (Instruction *I = dyn_cast<Instruction>(LF.OperandValToReplace))
4286 Inputs.push_back(I);
4287 if (LU.Kind == LSRUse::ICmpZero)
4288 if (Instruction *I =
4289 dyn_cast<Instruction>(cast<ICmpInst>(LF.UserInst)->getOperand(1)))
4290 Inputs.push_back(I);
4291 if (LF.PostIncLoops.count(L)) {
4292 if (LF.isUseFullyOutsideLoop(L))
4293 Inputs.push_back(L->getLoopLatch()->getTerminator());
4295 Inputs.push_back(IVIncInsertPos);
4297 // The expansion must also be dominated by the increment positions of any
4298 // loops it for which it is using post-inc mode.
4299 for (PostIncLoopSet::const_iterator I = LF.PostIncLoops.begin(),
4300 E = LF.PostIncLoops.end(); I != E; ++I) {
4301 const Loop *PIL = *I;
4302 if (PIL == L) continue;
4304 // Be dominated by the loop exit.
4305 SmallVector<BasicBlock *, 4> ExitingBlocks;
4306 PIL->getExitingBlocks(ExitingBlocks);
4307 if (!ExitingBlocks.empty()) {
4308 BasicBlock *BB = ExitingBlocks[0];
4309 for (unsigned i = 1, e = ExitingBlocks.size(); i != e; ++i)
4310 BB = DT.findNearestCommonDominator(BB, ExitingBlocks[i]);
4311 Inputs.push_back(BB->getTerminator());
4315 assert(!isa<PHINode>(LowestIP) && !isa<LandingPadInst>(LowestIP)
4316 && !isa<DbgInfoIntrinsic>(LowestIP) &&
4317 "Insertion point must be a normal instruction");
4319 // Then, climb up the immediate dominator tree as far as we can go while
4320 // still being dominated by the input positions.
4321 BasicBlock::iterator IP = HoistInsertPosition(LowestIP, Inputs);
4323 // Don't insert instructions before PHI nodes.
4324 while (isa<PHINode>(IP)) ++IP;
4326 // Ignore landingpad instructions.
4327 while (isa<LandingPadInst>(IP)) ++IP;
4329 // Ignore debug intrinsics.
4330 while (isa<DbgInfoIntrinsic>(IP)) ++IP;
4332 // Set IP below instructions recently inserted by SCEVExpander. This keeps the
4333 // IP consistent across expansions and allows the previously inserted
4334 // instructions to be reused by subsequent expansion.
4335 while (Rewriter.isInsertedInstruction(IP) && IP != LowestIP) ++IP;
4340 /// Expand - Emit instructions for the leading candidate expression for this
4341 /// LSRUse (this is called "expanding").
4342 Value *LSRInstance::Expand(const LSRFixup &LF,
4344 BasicBlock::iterator IP,
4345 SCEVExpander &Rewriter,
4346 SmallVectorImpl<WeakVH> &DeadInsts) const {
4347 const LSRUse &LU = Uses[LF.LUIdx];
4349 // Determine an input position which will be dominated by the operands and
4350 // which will dominate the result.
4351 IP = AdjustInsertPositionForExpand(IP, LF, LU, Rewriter);
4353 // Inform the Rewriter if we have a post-increment use, so that it can
4354 // perform an advantageous expansion.
4355 Rewriter.setPostInc(LF.PostIncLoops);
4357 // This is the type that the user actually needs.
4358 Type *OpTy = LF.OperandValToReplace->getType();
4359 // This will be the type that we'll initially expand to.
4360 Type *Ty = F.getType();
4362 // No type known; just expand directly to the ultimate type.
4364 else if (SE.getEffectiveSCEVType(Ty) == SE.getEffectiveSCEVType(OpTy))
4365 // Expand directly to the ultimate type if it's the right size.
4367 // This is the type to do integer arithmetic in.
4368 Type *IntTy = SE.getEffectiveSCEVType(Ty);
4370 // Build up a list of operands to add together to form the full base.
4371 SmallVector<const SCEV *, 8> Ops;
4373 // Expand the BaseRegs portion.
4374 for (SmallVectorImpl<const SCEV *>::const_iterator I = F.BaseRegs.begin(),
4375 E = F.BaseRegs.end(); I != E; ++I) {
4376 const SCEV *Reg = *I;
4377 assert(!Reg->isZero() && "Zero allocated in a base register!");
4379 // If we're expanding for a post-inc user, make the post-inc adjustment.
4380 PostIncLoopSet &Loops = const_cast<PostIncLoopSet &>(LF.PostIncLoops);
4381 Reg = TransformForPostIncUse(Denormalize, Reg,
4382 LF.UserInst, LF.OperandValToReplace,
4385 Ops.push_back(SE.getUnknown(Rewriter.expandCodeFor(Reg, 0, IP)));
4388 // Expand the ScaledReg portion.
4389 Value *ICmpScaledV = 0;
4391 const SCEV *ScaledS = F.ScaledReg;
4393 // If we're expanding for a post-inc user, make the post-inc adjustment.
4394 PostIncLoopSet &Loops = const_cast<PostIncLoopSet &>(LF.PostIncLoops);
4395 ScaledS = TransformForPostIncUse(Denormalize, ScaledS,
4396 LF.UserInst, LF.OperandValToReplace,
4399 if (LU.Kind == LSRUse::ICmpZero) {
4400 // An interesting way of "folding" with an icmp is to use a negated
4401 // scale, which we'll implement by inserting it into the other operand
4403 assert(F.Scale == -1 &&
4404 "The only scale supported by ICmpZero uses is -1!");
4405 ICmpScaledV = Rewriter.expandCodeFor(ScaledS, 0, IP);
4407 // Otherwise just expand the scaled register and an explicit scale,
4408 // which is expected to be matched as part of the address.
4410 // Flush the operand list to suppress SCEVExpander hoisting address modes.
4411 if (!Ops.empty() && LU.Kind == LSRUse::Address) {
4412 Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, IP);
4414 Ops.push_back(SE.getUnknown(FullV));
4416 ScaledS = SE.getUnknown(Rewriter.expandCodeFor(ScaledS, 0, IP));
4417 ScaledS = SE.getMulExpr(ScaledS,
4418 SE.getConstant(ScaledS->getType(), F.Scale));
4419 Ops.push_back(ScaledS);
4423 // Expand the GV portion.
4425 // Flush the operand list to suppress SCEVExpander hoisting.
4427 Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, IP);
4429 Ops.push_back(SE.getUnknown(FullV));
4431 Ops.push_back(SE.getUnknown(F.BaseGV));
4434 // Flush the operand list to suppress SCEVExpander hoisting of both folded and
4435 // unfolded offsets. LSR assumes they both live next to their uses.
4437 Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, IP);
4439 Ops.push_back(SE.getUnknown(FullV));
4442 // Expand the immediate portion.
4443 int64_t Offset = (uint64_t)F.BaseOffset + LF.Offset;
4445 if (LU.Kind == LSRUse::ICmpZero) {
4446 // The other interesting way of "folding" with an ICmpZero is to use a
4447 // negated immediate.
4449 ICmpScaledV = ConstantInt::get(IntTy, -(uint64_t)Offset);
4451 Ops.push_back(SE.getUnknown(ICmpScaledV));
4452 ICmpScaledV = ConstantInt::get(IntTy, Offset);
4455 // Just add the immediate values. These again are expected to be matched
4456 // as part of the address.
4457 Ops.push_back(SE.getUnknown(ConstantInt::getSigned(IntTy, Offset)));
4461 // Expand the unfolded offset portion.
4462 int64_t UnfoldedOffset = F.UnfoldedOffset;
4463 if (UnfoldedOffset != 0) {
4464 // Just add the immediate values.
4465 Ops.push_back(SE.getUnknown(ConstantInt::getSigned(IntTy,
4469 // Emit instructions summing all the operands.
4470 const SCEV *FullS = Ops.empty() ?
4471 SE.getConstant(IntTy, 0) :
4473 Value *FullV = Rewriter.expandCodeFor(FullS, Ty, IP);
4475 // We're done expanding now, so reset the rewriter.
4476 Rewriter.clearPostInc();
4478 // An ICmpZero Formula represents an ICmp which we're handling as a
4479 // comparison against zero. Now that we've expanded an expression for that
4480 // form, update the ICmp's other operand.
4481 if (LU.Kind == LSRUse::ICmpZero) {
4482 ICmpInst *CI = cast<ICmpInst>(LF.UserInst);
4483 DeadInsts.push_back(CI->getOperand(1));
4484 assert(!F.BaseGV && "ICmp does not support folding a global value and "
4485 "a scale at the same time!");
4486 if (F.Scale == -1) {
4487 if (ICmpScaledV->getType() != OpTy) {
4489 CastInst::Create(CastInst::getCastOpcode(ICmpScaledV, false,
4491 ICmpScaledV, OpTy, "tmp", CI);
4494 CI->setOperand(1, ICmpScaledV);
4496 assert(F.Scale == 0 &&
4497 "ICmp does not support folding a global value and "
4498 "a scale at the same time!");
4499 Constant *C = ConstantInt::getSigned(SE.getEffectiveSCEVType(OpTy),
4501 if (C->getType() != OpTy)
4502 C = ConstantExpr::getCast(CastInst::getCastOpcode(C, false,
4506 CI->setOperand(1, C);
4513 /// RewriteForPHI - Helper for Rewrite. PHI nodes are special because the use
4514 /// of their operands effectively happens in their predecessor blocks, so the
4515 /// expression may need to be expanded in multiple places.
4516 void LSRInstance::RewriteForPHI(PHINode *PN,
4519 SCEVExpander &Rewriter,
4520 SmallVectorImpl<WeakVH> &DeadInsts,
4522 DenseMap<BasicBlock *, Value *> Inserted;
4523 for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
4524 if (PN->getIncomingValue(i) == LF.OperandValToReplace) {
4525 BasicBlock *BB = PN->getIncomingBlock(i);
4527 // If this is a critical edge, split the edge so that we do not insert
4528 // the code on all predecessor/successor paths. We do this unless this
4529 // is the canonical backedge for this loop, which complicates post-inc
4531 if (e != 1 && BB->getTerminator()->getNumSuccessors() > 1 &&
4532 !isa<IndirectBrInst>(BB->getTerminator())) {
4533 BasicBlock *Parent = PN->getParent();
4534 Loop *PNLoop = LI.getLoopFor(Parent);
4535 if (!PNLoop || Parent != PNLoop->getHeader()) {
4536 // Split the critical edge.
4537 BasicBlock *NewBB = 0;
4538 if (!Parent->isLandingPad()) {
4539 NewBB = SplitCriticalEdge(BB, Parent, P,
4540 /*MergeIdenticalEdges=*/true,
4541 /*DontDeleteUselessPhis=*/true);
4543 SmallVector<BasicBlock*, 2> NewBBs;
4544 SplitLandingPadPredecessors(Parent, BB, "", "", P, NewBBs);
4547 // If NewBB==NULL, then SplitCriticalEdge refused to split because all
4548 // phi predecessors are identical. The simple thing to do is skip
4549 // splitting in this case rather than complicate the API.
4551 // If PN is outside of the loop and BB is in the loop, we want to
4552 // move the block to be immediately before the PHI block, not
4553 // immediately after BB.
4554 if (L->contains(BB) && !L->contains(PN))
4555 NewBB->moveBefore(PN->getParent());
4557 // Splitting the edge can reduce the number of PHI entries we have.
4558 e = PN->getNumIncomingValues();
4560 i = PN->getBasicBlockIndex(BB);
4565 std::pair<DenseMap<BasicBlock *, Value *>::iterator, bool> Pair =
4566 Inserted.insert(std::make_pair(BB, static_cast<Value *>(0)));
4568 PN->setIncomingValue(i, Pair.first->second);
4570 Value *FullV = Expand(LF, F, BB->getTerminator(), Rewriter, DeadInsts);
4572 // If this is reuse-by-noop-cast, insert the noop cast.
4573 Type *OpTy = LF.OperandValToReplace->getType();
4574 if (FullV->getType() != OpTy)
4576 CastInst::Create(CastInst::getCastOpcode(FullV, false,
4578 FullV, LF.OperandValToReplace->getType(),
4579 "tmp", BB->getTerminator());
4581 PN->setIncomingValue(i, FullV);
4582 Pair.first->second = FullV;
4587 /// Rewrite - Emit instructions for the leading candidate expression for this
4588 /// LSRUse (this is called "expanding"), and update the UserInst to reference
4589 /// the newly expanded value.
4590 void LSRInstance::Rewrite(const LSRFixup &LF,
4592 SCEVExpander &Rewriter,
4593 SmallVectorImpl<WeakVH> &DeadInsts,
4595 // First, find an insertion point that dominates UserInst. For PHI nodes,
4596 // find the nearest block which dominates all the relevant uses.
4597 if (PHINode *PN = dyn_cast<PHINode>(LF.UserInst)) {
4598 RewriteForPHI(PN, LF, F, Rewriter, DeadInsts, P);
4600 Value *FullV = Expand(LF, F, LF.UserInst, Rewriter, DeadInsts);
4602 // If this is reuse-by-noop-cast, insert the noop cast.
4603 Type *OpTy = LF.OperandValToReplace->getType();
4604 if (FullV->getType() != OpTy) {
4606 CastInst::Create(CastInst::getCastOpcode(FullV, false, OpTy, false),
4607 FullV, OpTy, "tmp", LF.UserInst);
4611 // Update the user. ICmpZero is handled specially here (for now) because
4612 // Expand may have updated one of the operands of the icmp already, and
4613 // its new value may happen to be equal to LF.OperandValToReplace, in
4614 // which case doing replaceUsesOfWith leads to replacing both operands
4615 // with the same value. TODO: Reorganize this.
4616 if (Uses[LF.LUIdx].Kind == LSRUse::ICmpZero)
4617 LF.UserInst->setOperand(0, FullV);
4619 LF.UserInst->replaceUsesOfWith(LF.OperandValToReplace, FullV);
4622 DeadInsts.push_back(LF.OperandValToReplace);
4625 /// ImplementSolution - Rewrite all the fixup locations with new values,
4626 /// following the chosen solution.
4628 LSRInstance::ImplementSolution(const SmallVectorImpl<const Formula *> &Solution,
4630 // Keep track of instructions we may have made dead, so that
4631 // we can remove them after we are done working.
4632 SmallVector<WeakVH, 16> DeadInsts;
4634 SCEVExpander Rewriter(SE, "lsr");
4636 Rewriter.setDebugType(DEBUG_TYPE);
4638 Rewriter.disableCanonicalMode();
4639 Rewriter.enableLSRMode();
4640 Rewriter.setIVIncInsertPos(L, IVIncInsertPos);
4642 // Mark phi nodes that terminate chains so the expander tries to reuse them.
4643 for (SmallVectorImpl<IVChain>::const_iterator ChainI = IVChainVec.begin(),
4644 ChainE = IVChainVec.end(); ChainI != ChainE; ++ChainI) {
4645 if (PHINode *PN = dyn_cast<PHINode>(ChainI->tailUserInst()))
4646 Rewriter.setChainedPhi(PN);
4649 // Expand the new value definitions and update the users.
4650 for (SmallVectorImpl<LSRFixup>::const_iterator I = Fixups.begin(),
4651 E = Fixups.end(); I != E; ++I) {
4652 const LSRFixup &Fixup = *I;
4654 Rewrite(Fixup, *Solution[Fixup.LUIdx], Rewriter, DeadInsts, P);
4659 for (SmallVectorImpl<IVChain>::const_iterator ChainI = IVChainVec.begin(),
4660 ChainE = IVChainVec.end(); ChainI != ChainE; ++ChainI) {
4661 GenerateIVChain(*ChainI, Rewriter, DeadInsts);
4664 // Clean up after ourselves. This must be done before deleting any
4668 Changed |= DeleteTriviallyDeadInstructions(DeadInsts);
4671 LSRInstance::LSRInstance(Loop *L, Pass *P)
4672 : IU(P->getAnalysis<IVUsers>()), SE(P->getAnalysis<ScalarEvolution>()),
4673 DT(P->getAnalysis<DominatorTree>()), LI(P->getAnalysis<LoopInfo>()),
4674 TTI(P->getAnalysis<TargetTransformInfo>()), L(L), Changed(false),
4676 // If LoopSimplify form is not available, stay out of trouble.
4677 if (!L->isLoopSimplifyForm())
4680 // If there's no interesting work to be done, bail early.
4681 if (IU.empty()) return;
4683 // If there's too much analysis to be done, bail early. We won't be able to
4684 // model the problem anyway.
4685 unsigned NumUsers = 0;
4686 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI) {
4687 if (++NumUsers > MaxIVUsers) {
4688 DEBUG(dbgs() << "LSR skipping loop, too many IV Users in " << *L
4695 // All dominating loops must have preheaders, or SCEVExpander may not be able
4696 // to materialize an AddRecExpr whose Start is an outer AddRecExpr.
4698 // IVUsers analysis should only create users that are dominated by simple loop
4699 // headers. Since this loop should dominate all of its users, its user list
4700 // should be empty if this loop itself is not within a simple loop nest.
4701 for (DomTreeNode *Rung = DT.getNode(L->getLoopPreheader());
4702 Rung; Rung = Rung->getIDom()) {
4703 BasicBlock *BB = Rung->getBlock();
4704 const Loop *DomLoop = LI.getLoopFor(BB);
4705 if (DomLoop && DomLoop->getHeader() == BB) {
4706 assert(DomLoop->getLoopPreheader() && "LSR needs a simplified loop nest");
4711 DEBUG(dbgs() << "\nLSR on loop ";
4712 WriteAsOperand(dbgs(), L->getHeader(), /*PrintType=*/false);
4715 // First, perform some low-level loop optimizations.
4717 OptimizeLoopTermCond();
4719 // If loop preparation eliminates all interesting IV users, bail.
4720 if (IU.empty()) return;
4722 // Skip nested loops until we can model them better with formulae.
4724 DEBUG(dbgs() << "LSR skipping outer loop " << *L << "\n");
4728 // Start collecting data and preparing for the solver.
4730 CollectInterestingTypesAndFactors();
4731 CollectFixupsAndInitialFormulae();
4732 CollectLoopInvariantFixupsAndFormulae();
4734 assert(!Uses.empty() && "IVUsers reported at least one use");
4735 DEBUG(dbgs() << "LSR found " << Uses.size() << " uses:\n";
4736 print_uses(dbgs()));
4738 // Now use the reuse data to generate a bunch of interesting ways
4739 // to formulate the values needed for the uses.
4740 GenerateAllReuseFormulae();
4742 FilterOutUndesirableDedicatedRegisters();
4743 NarrowSearchSpaceUsingHeuristics();
4745 SmallVector<const Formula *, 8> Solution;
4748 // Release memory that is no longer needed.
4753 if (Solution.empty())
4757 // Formulae should be legal.
4758 for (SmallVectorImpl<LSRUse>::const_iterator I = Uses.begin(), E = Uses.end();
4760 const LSRUse &LU = *I;
4761 for (SmallVectorImpl<Formula>::const_iterator J = LU.Formulae.begin(),
4762 JE = LU.Formulae.end();
4764 assert(isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
4765 *J) && "Illegal formula generated!");
4769 // Now that we've decided what we want, make it so.
4770 ImplementSolution(Solution, P);
4773 void LSRInstance::print_factors_and_types(raw_ostream &OS) const {
4774 if (Factors.empty() && Types.empty()) return;
4776 OS << "LSR has identified the following interesting factors and types: ";
4779 for (SmallSetVector<int64_t, 8>::const_iterator
4780 I = Factors.begin(), E = Factors.end(); I != E; ++I) {
4781 if (!First) OS << ", ";
4786 for (SmallSetVector<Type *, 4>::const_iterator
4787 I = Types.begin(), E = Types.end(); I != E; ++I) {
4788 if (!First) OS << ", ";
4790 OS << '(' << **I << ')';
4795 void LSRInstance::print_fixups(raw_ostream &OS) const {
4796 OS << "LSR is examining the following fixup sites:\n";
4797 for (SmallVectorImpl<LSRFixup>::const_iterator I = Fixups.begin(),
4798 E = Fixups.end(); I != E; ++I) {
4805 void LSRInstance::print_uses(raw_ostream &OS) const {
4806 OS << "LSR is examining the following uses:\n";
4807 for (SmallVectorImpl<LSRUse>::const_iterator I = Uses.begin(),
4808 E = Uses.end(); I != E; ++I) {
4809 const LSRUse &LU = *I;
4813 for (SmallVectorImpl<Formula>::const_iterator J = LU.Formulae.begin(),
4814 JE = LU.Formulae.end(); J != JE; ++J) {
4822 void LSRInstance::print(raw_ostream &OS) const {
4823 print_factors_and_types(OS);
4828 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
4829 void LSRInstance::dump() const {
4830 print(errs()); errs() << '\n';
4836 class LoopStrengthReduce : public LoopPass {
4838 static char ID; // Pass ID, replacement for typeid
4839 LoopStrengthReduce();
4842 bool runOnLoop(Loop *L, LPPassManager &LPM);
4843 void getAnalysisUsage(AnalysisUsage &AU) const;
4848 char LoopStrengthReduce::ID = 0;
4849 INITIALIZE_PASS_BEGIN(LoopStrengthReduce, "loop-reduce",
4850 "Loop Strength Reduction", false, false)
4851 INITIALIZE_AG_DEPENDENCY(TargetTransformInfo)
4852 INITIALIZE_PASS_DEPENDENCY(DominatorTree)
4853 INITIALIZE_PASS_DEPENDENCY(ScalarEvolution)
4854 INITIALIZE_PASS_DEPENDENCY(IVUsers)
4855 INITIALIZE_PASS_DEPENDENCY(LoopInfo)
4856 INITIALIZE_PASS_DEPENDENCY(LoopSimplify)
4857 INITIALIZE_PASS_END(LoopStrengthReduce, "loop-reduce",
4858 "Loop Strength Reduction", false, false)
4861 Pass *llvm::createLoopStrengthReducePass() {
4862 return new LoopStrengthReduce();
4865 LoopStrengthReduce::LoopStrengthReduce() : LoopPass(ID) {
4866 initializeLoopStrengthReducePass(*PassRegistry::getPassRegistry());
4869 void LoopStrengthReduce::getAnalysisUsage(AnalysisUsage &AU) const {
4870 // We split critical edges, so we change the CFG. However, we do update
4871 // many analyses if they are around.
4872 AU.addPreservedID(LoopSimplifyID);
4874 AU.addRequired<LoopInfo>();
4875 AU.addPreserved<LoopInfo>();
4876 AU.addRequiredID(LoopSimplifyID);
4877 AU.addRequired<DominatorTree>();
4878 AU.addPreserved<DominatorTree>();
4879 AU.addRequired<ScalarEvolution>();
4880 AU.addPreserved<ScalarEvolution>();
4881 // Requiring LoopSimplify a second time here prevents IVUsers from running
4882 // twice, since LoopSimplify was invalidated by running ScalarEvolution.
4883 AU.addRequiredID(LoopSimplifyID);
4884 AU.addRequired<IVUsers>();
4885 AU.addPreserved<IVUsers>();
4886 AU.addRequired<TargetTransformInfo>();
4889 bool LoopStrengthReduce::runOnLoop(Loop *L, LPPassManager & /*LPM*/) {
4890 bool Changed = false;
4892 // Run the main LSR transformation.
4893 Changed |= LSRInstance(L, this).getChanged();
4895 // Remove any extra phis created by processing inner loops.
4896 Changed |= DeleteDeadPHIs(L->getHeader());
4897 if (EnablePhiElim && L->isLoopSimplifyForm()) {
4898 SmallVector<WeakVH, 16> DeadInsts;
4899 SCEVExpander Rewriter(getAnalysis<ScalarEvolution>(), "lsr");
4901 Rewriter.setDebugType(DEBUG_TYPE);
4903 unsigned numFolded =
4904 Rewriter.replaceCongruentIVs(L, &getAnalysis<DominatorTree>(),
4906 &getAnalysis<TargetTransformInfo>());
4909 DeleteTriviallyDeadInstructions(DeadInsts);
4910 DeleteDeadPHIs(L->getHeader());