1 //===- PromoteMemoryToRegister.cpp - Convert allocas to registers ---------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file promotes memory references to be register references. It promotes
11 // alloca instructions which only have loads and stores as uses. An alloca is
12 // transformed by using iterated dominator frontiers to place PHI nodes, then
13 // traversing the function in depth-first order to rewrite loads and stores as
16 // The algorithm used here is based on:
18 // Sreedhar and Gao. A linear time algorithm for placing phi-nodes.
19 // In Proceedings of the 22nd ACM SIGPLAN-SIGACT Symposium on Principles of
20 // Programming Languages
21 // POPL '95. ACM, New York, NY, 62-73.
23 // It has been modified to not explicitly use the DJ graph data structure and to
24 // directly compute pruned SSA using per-variable liveness information.
26 //===----------------------------------------------------------------------===//
28 #include "llvm/Transforms/Utils/PromoteMemToReg.h"
29 #include "llvm/ADT/ArrayRef.h"
30 #include "llvm/ADT/DenseMap.h"
31 #include "llvm/ADT/STLExtras.h"
32 #include "llvm/ADT/SmallPtrSet.h"
33 #include "llvm/ADT/SmallVector.h"
34 #include "llvm/ADT/Statistic.h"
35 #include "llvm/Analysis/AliasSetTracker.h"
36 #include "llvm/Analysis/InstructionSimplify.h"
37 #include "llvm/Analysis/ValueTracking.h"
38 #include "llvm/IR/CFG.h"
39 #include "llvm/IR/Constants.h"
40 #include "llvm/IR/DIBuilder.h"
41 #include "llvm/IR/DebugInfo.h"
42 #include "llvm/IR/DerivedTypes.h"
43 #include "llvm/IR/Dominators.h"
44 #include "llvm/IR/Function.h"
45 #include "llvm/IR/Instructions.h"
46 #include "llvm/IR/IntrinsicInst.h"
47 #include "llvm/IR/Metadata.h"
48 #include "llvm/Transforms/Utils/Local.h"
53 #define DEBUG_TYPE "mem2reg"
55 STATISTIC(NumLocalPromoted, "Number of alloca's promoted within one block");
56 STATISTIC(NumSingleStore, "Number of alloca's promoted with a single store");
57 STATISTIC(NumDeadAlloca, "Number of dead alloca's removed");
58 STATISTIC(NumPHIInsert, "Number of PHI nodes inserted");
60 bool llvm::isAllocaPromotable(const AllocaInst *AI) {
61 // FIXME: If the memory unit is of pointer or integer type, we can permit
62 // assignments to subsections of the memory unit.
63 unsigned AS = AI->getType()->getAddressSpace();
65 // Only allow direct and non-volatile loads and stores...
66 for (const User *U : AI->users()) {
67 if (const LoadInst *LI = dyn_cast<LoadInst>(U)) {
68 // Note that atomic loads can be transformed; atomic semantics do
69 // not have any meaning for a local alloca.
72 } else if (const StoreInst *SI = dyn_cast<StoreInst>(U)) {
73 if (SI->getOperand(0) == AI)
74 return false; // Don't allow a store OF the AI, only INTO the AI.
75 // Note that atomic stores can be transformed; atomic semantics do
76 // not have any meaning for a local alloca.
79 } else if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(U)) {
80 if (II->getIntrinsicID() != Intrinsic::lifetime_start &&
81 II->getIntrinsicID() != Intrinsic::lifetime_end)
83 } else if (const BitCastInst *BCI = dyn_cast<BitCastInst>(U)) {
84 if (BCI->getType() != Type::getInt8PtrTy(U->getContext(), AS))
86 if (!onlyUsedByLifetimeMarkers(BCI))
88 } else if (const GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(U)) {
89 if (GEPI->getType() != Type::getInt8PtrTy(U->getContext(), AS))
91 if (!GEPI->hasAllZeroIndices())
93 if (!onlyUsedByLifetimeMarkers(GEPI))
106 SmallVector<BasicBlock *, 32> DefiningBlocks;
107 SmallVector<BasicBlock *, 32> UsingBlocks;
109 StoreInst *OnlyStore;
110 BasicBlock *OnlyBlock;
111 bool OnlyUsedInOneBlock;
113 Value *AllocaPointerVal;
114 DbgDeclareInst *DbgDeclare;
117 DefiningBlocks.clear();
121 OnlyUsedInOneBlock = true;
122 AllocaPointerVal = nullptr;
123 DbgDeclare = nullptr;
126 /// Scan the uses of the specified alloca, filling in the AllocaInfo used
127 /// by the rest of the pass to reason about the uses of this alloca.
128 void AnalyzeAlloca(AllocaInst *AI) {
131 // As we scan the uses of the alloca instruction, keep track of stores,
132 // and decide whether all of the loads and stores to the alloca are within
133 // the same basic block.
134 for (auto UI = AI->user_begin(), E = AI->user_end(); UI != E;) {
135 Instruction *User = cast<Instruction>(*UI++);
137 if (StoreInst *SI = dyn_cast<StoreInst>(User)) {
138 // Remember the basic blocks which define new values for the alloca
139 DefiningBlocks.push_back(SI->getParent());
140 AllocaPointerVal = SI->getOperand(0);
143 LoadInst *LI = cast<LoadInst>(User);
144 // Otherwise it must be a load instruction, keep track of variable
146 UsingBlocks.push_back(LI->getParent());
147 AllocaPointerVal = LI;
150 if (OnlyUsedInOneBlock) {
152 OnlyBlock = User->getParent();
153 else if (OnlyBlock != User->getParent())
154 OnlyUsedInOneBlock = false;
158 DbgDeclare = FindAllocaDbgDeclare(AI);
162 // Data package used by RenamePass()
163 class RenamePassData {
165 typedef std::vector<Value *> ValVector;
167 RenamePassData() : BB(nullptr), Pred(nullptr), Values() {}
168 RenamePassData(BasicBlock *B, BasicBlock *P, const ValVector &V)
169 : BB(B), Pred(P), Values(V) {}
174 void swap(RenamePassData &RHS) {
175 std::swap(BB, RHS.BB);
176 std::swap(Pred, RHS.Pred);
177 Values.swap(RHS.Values);
181 /// \brief This assigns and keeps a per-bb relative ordering of load/store
182 /// instructions in the block that directly load or store an alloca.
184 /// This functionality is important because it avoids scanning large basic
185 /// blocks multiple times when promoting many allocas in the same block.
186 class LargeBlockInfo {
187 /// \brief For each instruction that we track, keep the index of the
190 /// The index starts out as the number of the instruction from the start of
192 DenseMap<const Instruction *, unsigned> InstNumbers;
196 /// This code only looks at accesses to allocas.
197 static bool isInterestingInstruction(const Instruction *I) {
198 return (isa<LoadInst>(I) && isa<AllocaInst>(I->getOperand(0))) ||
199 (isa<StoreInst>(I) && isa<AllocaInst>(I->getOperand(1)));
202 /// Get or calculate the index of the specified instruction.
203 unsigned getInstructionIndex(const Instruction *I) {
204 assert(isInterestingInstruction(I) &&
205 "Not a load/store to/from an alloca?");
207 // If we already have this instruction number, return it.
208 DenseMap<const Instruction *, unsigned>::iterator It = InstNumbers.find(I);
209 if (It != InstNumbers.end())
212 // Scan the whole block to get the instruction. This accumulates
213 // information for every interesting instruction in the block, in order to
214 // avoid gratuitus rescans.
215 const BasicBlock *BB = I->getParent();
217 for (BasicBlock::const_iterator BBI = BB->begin(), E = BB->end(); BBI != E;
219 if (isInterestingInstruction(BBI))
220 InstNumbers[BBI] = InstNo++;
221 It = InstNumbers.find(I);
223 assert(It != InstNumbers.end() && "Didn't insert instruction?");
227 void deleteValue(const Instruction *I) { InstNumbers.erase(I); }
229 void clear() { InstNumbers.clear(); }
232 struct PromoteMem2Reg {
233 /// The alloca instructions being promoted.
234 std::vector<AllocaInst *> Allocas;
238 /// An AliasSetTracker object to update. If null, don't update it.
239 AliasSetTracker *AST;
241 /// A cache of @llvm.assume intrinsics used by SimplifyInstruction.
242 AssumptionTracker *AT;
244 /// Reverse mapping of Allocas.
245 DenseMap<AllocaInst *, unsigned> AllocaLookup;
247 /// \brief The PhiNodes we're adding.
249 /// That map is used to simplify some Phi nodes as we iterate over it, so
250 /// it should have deterministic iterators. We could use a MapVector, but
251 /// since we already maintain a map from BasicBlock* to a stable numbering
252 /// (BBNumbers), the DenseMap is more efficient (also supports removal).
253 DenseMap<std::pair<unsigned, unsigned>, PHINode *> NewPhiNodes;
255 /// For each PHI node, keep track of which entry in Allocas it corresponds
257 DenseMap<PHINode *, unsigned> PhiToAllocaMap;
259 /// If we are updating an AliasSetTracker, then for each alloca that is of
260 /// pointer type, we keep track of what to copyValue to the inserted PHI
262 std::vector<Value *> PointerAllocaValues;
264 /// For each alloca, we keep track of the dbg.declare intrinsic that
265 /// describes it, if any, so that we can convert it to a dbg.value
266 /// intrinsic if the alloca gets promoted.
267 SmallVector<DbgDeclareInst *, 8> AllocaDbgDeclares;
269 /// The set of basic blocks the renamer has already visited.
271 SmallPtrSet<BasicBlock *, 16> Visited;
273 /// Contains a stable numbering of basic blocks to avoid non-determinstic
275 DenseMap<BasicBlock *, unsigned> BBNumbers;
277 /// Maps DomTreeNodes to their level in the dominator tree.
278 DenseMap<DomTreeNode *, unsigned> DomLevels;
280 /// Lazily compute the number of predecessors a block has.
281 DenseMap<const BasicBlock *, unsigned> BBNumPreds;
284 PromoteMem2Reg(ArrayRef<AllocaInst *> Allocas, DominatorTree &DT,
285 AliasSetTracker *AST, AssumptionTracker *AT)
286 : Allocas(Allocas.begin(), Allocas.end()), DT(DT),
287 DIB(*DT.getRoot()->getParent()->getParent()), AST(AST), AT(AT) {}
292 void RemoveFromAllocasList(unsigned &AllocaIdx) {
293 Allocas[AllocaIdx] = Allocas.back();
298 unsigned getNumPreds(const BasicBlock *BB) {
299 unsigned &NP = BBNumPreds[BB];
301 NP = std::distance(pred_begin(BB), pred_end(BB)) + 1;
305 void DetermineInsertionPoint(AllocaInst *AI, unsigned AllocaNum,
307 void ComputeLiveInBlocks(AllocaInst *AI, AllocaInfo &Info,
308 const SmallPtrSetImpl<BasicBlock *> &DefBlocks,
309 SmallPtrSetImpl<BasicBlock *> &LiveInBlocks);
310 void RenamePass(BasicBlock *BB, BasicBlock *Pred,
311 RenamePassData::ValVector &IncVals,
312 std::vector<RenamePassData> &Worklist);
313 bool QueuePhiNode(BasicBlock *BB, unsigned AllocaIdx, unsigned &Version);
316 } // end of anonymous namespace
318 static void removeLifetimeIntrinsicUsers(AllocaInst *AI) {
319 // Knowing that this alloca is promotable, we know that it's safe to kill all
320 // instructions except for load and store.
322 for (auto UI = AI->user_begin(), UE = AI->user_end(); UI != UE;) {
323 Instruction *I = cast<Instruction>(*UI);
325 if (isa<LoadInst>(I) || isa<StoreInst>(I))
328 if (!I->getType()->isVoidTy()) {
329 // The only users of this bitcast/GEP instruction are lifetime intrinsics.
330 // Follow the use/def chain to erase them now instead of leaving it for
331 // dead code elimination later.
332 for (auto UUI = I->user_begin(), UUE = I->user_end(); UUI != UUE;) {
333 Instruction *Inst = cast<Instruction>(*UUI);
335 Inst->eraseFromParent();
338 I->eraseFromParent();
342 /// \brief Rewrite as many loads as possible given a single store.
344 /// When there is only a single store, we can use the domtree to trivially
345 /// replace all of the dominated loads with the stored value. Do so, and return
346 /// true if this has successfully promoted the alloca entirely. If this returns
347 /// false there were some loads which were not dominated by the single store
348 /// and thus must be phi-ed with undef. We fall back to the standard alloca
349 /// promotion algorithm in that case.
350 static bool rewriteSingleStoreAlloca(AllocaInst *AI, AllocaInfo &Info,
353 AliasSetTracker *AST) {
354 StoreInst *OnlyStore = Info.OnlyStore;
355 bool StoringGlobalVal = !isa<Instruction>(OnlyStore->getOperand(0));
356 BasicBlock *StoreBB = OnlyStore->getParent();
359 // Clear out UsingBlocks. We will reconstruct it here if needed.
360 Info.UsingBlocks.clear();
362 for (auto UI = AI->user_begin(), E = AI->user_end(); UI != E;) {
363 Instruction *UserInst = cast<Instruction>(*UI++);
364 if (!isa<LoadInst>(UserInst)) {
365 assert(UserInst == OnlyStore && "Should only have load/stores");
368 LoadInst *LI = cast<LoadInst>(UserInst);
370 // Okay, if we have a load from the alloca, we want to replace it with the
371 // only value stored to the alloca. We can do this if the value is
372 // dominated by the store. If not, we use the rest of the mem2reg machinery
373 // to insert the phi nodes as needed.
374 if (!StoringGlobalVal) { // Non-instructions are always dominated.
375 if (LI->getParent() == StoreBB) {
376 // If we have a use that is in the same block as the store, compare the
377 // indices of the two instructions to see which one came first. If the
378 // load came before the store, we can't handle it.
379 if (StoreIndex == -1)
380 StoreIndex = LBI.getInstructionIndex(OnlyStore);
382 if (unsigned(StoreIndex) > LBI.getInstructionIndex(LI)) {
383 // Can't handle this load, bail out.
384 Info.UsingBlocks.push_back(StoreBB);
388 } else if (LI->getParent() != StoreBB &&
389 !DT.dominates(StoreBB, LI->getParent())) {
390 // If the load and store are in different blocks, use BB dominance to
391 // check their relationships. If the store doesn't dom the use, bail
393 Info.UsingBlocks.push_back(LI->getParent());
398 // Otherwise, we *can* safely rewrite this load.
399 Value *ReplVal = OnlyStore->getOperand(0);
400 // If the replacement value is the load, this must occur in unreachable
403 ReplVal = UndefValue::get(LI->getType());
404 LI->replaceAllUsesWith(ReplVal);
405 if (AST && LI->getType()->isPointerTy())
406 AST->deleteValue(LI);
407 LI->eraseFromParent();
411 // Finally, after the scan, check to see if the store is all that is left.
412 if (!Info.UsingBlocks.empty())
413 return false; // If not, we'll have to fall back for the remainder.
415 // Record debuginfo for the store and remove the declaration's
417 if (DbgDeclareInst *DDI = Info.DbgDeclare) {
418 DIBuilder DIB(*AI->getParent()->getParent()->getParent());
419 ConvertDebugDeclareToDebugValue(DDI, Info.OnlyStore, DIB);
420 DDI->eraseFromParent();
421 LBI.deleteValue(DDI);
423 // Remove the (now dead) store and alloca.
424 Info.OnlyStore->eraseFromParent();
425 LBI.deleteValue(Info.OnlyStore);
428 AST->deleteValue(AI);
429 AI->eraseFromParent();
434 /// Many allocas are only used within a single basic block. If this is the
435 /// case, avoid traversing the CFG and inserting a lot of potentially useless
436 /// PHI nodes by just performing a single linear pass over the basic block
437 /// using the Alloca.
439 /// If we cannot promote this alloca (because it is read before it is written),
440 /// return true. This is necessary in cases where, due to control flow, the
441 /// alloca is potentially undefined on some control flow paths. e.g. code like
442 /// this is potentially correct:
444 /// for (...) { if (c) { A = undef; undef = B; } }
446 /// ... so long as A is not used before undef is set.
447 static void promoteSingleBlockAlloca(AllocaInst *AI, const AllocaInfo &Info,
449 AliasSetTracker *AST) {
450 // The trickiest case to handle is when we have large blocks. Because of this,
451 // this code is optimized assuming that large blocks happen. This does not
452 // significantly pessimize the small block case. This uses LargeBlockInfo to
453 // make it efficient to get the index of various operations in the block.
455 // Walk the use-def list of the alloca, getting the locations of all stores.
456 typedef SmallVector<std::pair<unsigned, StoreInst *>, 64> StoresByIndexTy;
457 StoresByIndexTy StoresByIndex;
459 for (User *U : AI->users())
460 if (StoreInst *SI = dyn_cast<StoreInst>(U))
461 StoresByIndex.push_back(std::make_pair(LBI.getInstructionIndex(SI), SI));
463 // Sort the stores by their index, making it efficient to do a lookup with a
465 std::sort(StoresByIndex.begin(), StoresByIndex.end(), less_first());
467 // Walk all of the loads from this alloca, replacing them with the nearest
468 // store above them, if any.
469 for (auto UI = AI->user_begin(), E = AI->user_end(); UI != E;) {
470 LoadInst *LI = dyn_cast<LoadInst>(*UI++);
474 unsigned LoadIdx = LBI.getInstructionIndex(LI);
476 // Find the nearest store that has a lower index than this load.
477 StoresByIndexTy::iterator I =
478 std::lower_bound(StoresByIndex.begin(), StoresByIndex.end(),
479 std::make_pair(LoadIdx,
480 static_cast<StoreInst *>(nullptr)),
483 if (I == StoresByIndex.begin())
484 // If there is no store before this load, the load takes the undef value.
485 LI->replaceAllUsesWith(UndefValue::get(LI->getType()));
487 // Otherwise, there was a store before this load, the load takes its value.
488 LI->replaceAllUsesWith(std::prev(I)->second->getOperand(0));
490 if (AST && LI->getType()->isPointerTy())
491 AST->deleteValue(LI);
492 LI->eraseFromParent();
496 // Remove the (now dead) stores and alloca.
497 while (!AI->use_empty()) {
498 StoreInst *SI = cast<StoreInst>(AI->user_back());
499 // Record debuginfo for the store before removing it.
500 if (DbgDeclareInst *DDI = Info.DbgDeclare) {
501 DIBuilder DIB(*AI->getParent()->getParent()->getParent());
502 ConvertDebugDeclareToDebugValue(DDI, SI, DIB);
504 SI->eraseFromParent();
509 AST->deleteValue(AI);
510 AI->eraseFromParent();
513 // The alloca's debuginfo can be removed as well.
514 if (DbgDeclareInst *DDI = Info.DbgDeclare) {
515 DDI->eraseFromParent();
516 LBI.deleteValue(DDI);
522 void PromoteMem2Reg::run() {
523 Function &F = *DT.getRoot()->getParent();
526 PointerAllocaValues.resize(Allocas.size());
527 AllocaDbgDeclares.resize(Allocas.size());
532 for (unsigned AllocaNum = 0; AllocaNum != Allocas.size(); ++AllocaNum) {
533 AllocaInst *AI = Allocas[AllocaNum];
535 assert(isAllocaPromotable(AI) && "Cannot promote non-promotable alloca!");
536 assert(AI->getParent()->getParent() == &F &&
537 "All allocas should be in the same function, which is same as DF!");
539 removeLifetimeIntrinsicUsers(AI);
541 if (AI->use_empty()) {
542 // If there are no uses of the alloca, just delete it now.
544 AST->deleteValue(AI);
545 AI->eraseFromParent();
547 // Remove the alloca from the Allocas list, since it has been processed
548 RemoveFromAllocasList(AllocaNum);
553 // Calculate the set of read and write-locations for each alloca. This is
554 // analogous to finding the 'uses' and 'definitions' of each variable.
555 Info.AnalyzeAlloca(AI);
557 // If there is only a single store to this value, replace any loads of
558 // it that are directly dominated by the definition with the value stored.
559 if (Info.DefiningBlocks.size() == 1) {
560 if (rewriteSingleStoreAlloca(AI, Info, LBI, DT, AST)) {
561 // The alloca has been processed, move on.
562 RemoveFromAllocasList(AllocaNum);
568 // If the alloca is only read and written in one basic block, just perform a
569 // linear sweep over the block to eliminate it.
570 if (Info.OnlyUsedInOneBlock) {
571 promoteSingleBlockAlloca(AI, Info, LBI, AST);
573 // The alloca has been processed, move on.
574 RemoveFromAllocasList(AllocaNum);
578 // If we haven't computed dominator tree levels, do so now.
579 if (DomLevels.empty()) {
580 SmallVector<DomTreeNode *, 32> Worklist;
582 DomTreeNode *Root = DT.getRootNode();
584 Worklist.push_back(Root);
586 while (!Worklist.empty()) {
587 DomTreeNode *Node = Worklist.pop_back_val();
588 unsigned ChildLevel = DomLevels[Node] + 1;
589 for (DomTreeNode::iterator CI = Node->begin(), CE = Node->end();
591 DomLevels[*CI] = ChildLevel;
592 Worklist.push_back(*CI);
597 // If we haven't computed a numbering for the BB's in the function, do so
599 if (BBNumbers.empty()) {
601 for (Function::iterator I = F.begin(), E = F.end(); I != E; ++I)
605 // If we have an AST to keep updated, remember some pointer value that is
606 // stored into the alloca.
608 PointerAllocaValues[AllocaNum] = Info.AllocaPointerVal;
610 // Remember the dbg.declare intrinsic describing this alloca, if any.
612 AllocaDbgDeclares[AllocaNum] = Info.DbgDeclare;
614 // Keep the reverse mapping of the 'Allocas' array for the rename pass.
615 AllocaLookup[Allocas[AllocaNum]] = AllocaNum;
617 // At this point, we're committed to promoting the alloca using IDF's, and
618 // the standard SSA construction algorithm. Determine which blocks need PHI
619 // nodes and see if we can optimize out some work by avoiding insertion of
621 DetermineInsertionPoint(AI, AllocaNum, Info);
625 return; // All of the allocas must have been trivial!
629 // Set the incoming values for the basic block to be null values for all of
630 // the alloca's. We do this in case there is a load of a value that has not
631 // been stored yet. In this case, it will get this null value.
633 RenamePassData::ValVector Values(Allocas.size());
634 for (unsigned i = 0, e = Allocas.size(); i != e; ++i)
635 Values[i] = UndefValue::get(Allocas[i]->getAllocatedType());
637 // Walks all basic blocks in the function performing the SSA rename algorithm
638 // and inserting the phi nodes we marked as necessary
640 std::vector<RenamePassData> RenamePassWorkList;
641 RenamePassWorkList.push_back(RenamePassData(F.begin(), nullptr, Values));
644 RPD.swap(RenamePassWorkList.back());
645 RenamePassWorkList.pop_back();
646 // RenamePass may add new worklist entries.
647 RenamePass(RPD.BB, RPD.Pred, RPD.Values, RenamePassWorkList);
648 } while (!RenamePassWorkList.empty());
650 // The renamer uses the Visited set to avoid infinite loops. Clear it now.
653 // Remove the allocas themselves from the function.
654 for (unsigned i = 0, e = Allocas.size(); i != e; ++i) {
655 Instruction *A = Allocas[i];
657 // If there are any uses of the alloca instructions left, they must be in
658 // unreachable basic blocks that were not processed by walking the dominator
659 // tree. Just delete the users now.
661 A->replaceAllUsesWith(UndefValue::get(A->getType()));
664 A->eraseFromParent();
667 // Remove alloca's dbg.declare instrinsics from the function.
668 for (unsigned i = 0, e = AllocaDbgDeclares.size(); i != e; ++i)
669 if (DbgDeclareInst *DDI = AllocaDbgDeclares[i])
670 DDI->eraseFromParent();
672 // Loop over all of the PHI nodes and see if there are any that we can get
673 // rid of because they merge all of the same incoming values. This can
674 // happen due to undef values coming into the PHI nodes. This process is
675 // iterative, because eliminating one PHI node can cause others to be removed.
676 bool EliminatedAPHI = true;
677 while (EliminatedAPHI) {
678 EliminatedAPHI = false;
680 // Iterating over NewPhiNodes is deterministic, so it is safe to try to
681 // simplify and RAUW them as we go. If it was not, we could add uses to
682 // the values we replace with in a non-deterministic order, thus creating
683 // non-deterministic def->use chains.
684 for (DenseMap<std::pair<unsigned, unsigned>, PHINode *>::iterator
685 I = NewPhiNodes.begin(),
686 E = NewPhiNodes.end();
688 PHINode *PN = I->second;
690 // If this PHI node merges one value and/or undefs, get the value.
691 if (Value *V = SimplifyInstruction(PN, nullptr, nullptr, &DT, AT)) {
692 if (AST && PN->getType()->isPointerTy())
693 AST->deleteValue(PN);
694 PN->replaceAllUsesWith(V);
695 PN->eraseFromParent();
696 NewPhiNodes.erase(I++);
697 EliminatedAPHI = true;
704 // At this point, the renamer has added entries to PHI nodes for all reachable
705 // code. Unfortunately, there may be unreachable blocks which the renamer
706 // hasn't traversed. If this is the case, the PHI nodes may not
707 // have incoming values for all predecessors. Loop over all PHI nodes we have
708 // created, inserting undef values if they are missing any incoming values.
710 for (DenseMap<std::pair<unsigned, unsigned>, PHINode *>::iterator
711 I = NewPhiNodes.begin(),
712 E = NewPhiNodes.end();
714 // We want to do this once per basic block. As such, only process a block
715 // when we find the PHI that is the first entry in the block.
716 PHINode *SomePHI = I->second;
717 BasicBlock *BB = SomePHI->getParent();
718 if (&BB->front() != SomePHI)
721 // Only do work here if there the PHI nodes are missing incoming values. We
722 // know that all PHI nodes that were inserted in a block will have the same
723 // number of incoming values, so we can just check any of them.
724 if (SomePHI->getNumIncomingValues() == getNumPreds(BB))
727 // Get the preds for BB.
728 SmallVector<BasicBlock *, 16> Preds(pred_begin(BB), pred_end(BB));
730 // Ok, now we know that all of the PHI nodes are missing entries for some
731 // basic blocks. Start by sorting the incoming predecessors for efficient
733 std::sort(Preds.begin(), Preds.end());
735 // Now we loop through all BB's which have entries in SomePHI and remove
736 // them from the Preds list.
737 for (unsigned i = 0, e = SomePHI->getNumIncomingValues(); i != e; ++i) {
738 // Do a log(n) search of the Preds list for the entry we want.
739 SmallVectorImpl<BasicBlock *>::iterator EntIt = std::lower_bound(
740 Preds.begin(), Preds.end(), SomePHI->getIncomingBlock(i));
741 assert(EntIt != Preds.end() && *EntIt == SomePHI->getIncomingBlock(i) &&
742 "PHI node has entry for a block which is not a predecessor!");
748 // At this point, the blocks left in the preds list must have dummy
749 // entries inserted into every PHI nodes for the block. Update all the phi
750 // nodes in this block that we are inserting (there could be phis before
752 unsigned NumBadPreds = SomePHI->getNumIncomingValues();
753 BasicBlock::iterator BBI = BB->begin();
754 while ((SomePHI = dyn_cast<PHINode>(BBI++)) &&
755 SomePHI->getNumIncomingValues() == NumBadPreds) {
756 Value *UndefVal = UndefValue::get(SomePHI->getType());
757 for (unsigned pred = 0, e = Preds.size(); pred != e; ++pred)
758 SomePHI->addIncoming(UndefVal, Preds[pred]);
765 /// \brief Determine which blocks the value is live in.
767 /// These are blocks which lead to uses. Knowing this allows us to avoid
768 /// inserting PHI nodes into blocks which don't lead to uses (thus, the
769 /// inserted phi nodes would be dead).
770 void PromoteMem2Reg::ComputeLiveInBlocks(
771 AllocaInst *AI, AllocaInfo &Info,
772 const SmallPtrSetImpl<BasicBlock *> &DefBlocks,
773 SmallPtrSetImpl<BasicBlock *> &LiveInBlocks) {
775 // To determine liveness, we must iterate through the predecessors of blocks
776 // where the def is live. Blocks are added to the worklist if we need to
777 // check their predecessors. Start with all the using blocks.
778 SmallVector<BasicBlock *, 64> LiveInBlockWorklist(Info.UsingBlocks.begin(),
779 Info.UsingBlocks.end());
781 // If any of the using blocks is also a definition block, check to see if the
782 // definition occurs before or after the use. If it happens before the use,
783 // the value isn't really live-in.
784 for (unsigned i = 0, e = LiveInBlockWorklist.size(); i != e; ++i) {
785 BasicBlock *BB = LiveInBlockWorklist[i];
786 if (!DefBlocks.count(BB))
789 // Okay, this is a block that both uses and defines the value. If the first
790 // reference to the alloca is a def (store), then we know it isn't live-in.
791 for (BasicBlock::iterator I = BB->begin();; ++I) {
792 if (StoreInst *SI = dyn_cast<StoreInst>(I)) {
793 if (SI->getOperand(1) != AI)
796 // We found a store to the alloca before a load. The alloca is not
797 // actually live-in here.
798 LiveInBlockWorklist[i] = LiveInBlockWorklist.back();
799 LiveInBlockWorklist.pop_back();
804 if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
805 if (LI->getOperand(0) != AI)
808 // Okay, we found a load before a store to the alloca. It is actually
809 // live into this block.
815 // Now that we have a set of blocks where the phi is live-in, recursively add
816 // their predecessors until we find the full region the value is live.
817 while (!LiveInBlockWorklist.empty()) {
818 BasicBlock *BB = LiveInBlockWorklist.pop_back_val();
820 // The block really is live in here, insert it into the set. If already in
821 // the set, then it has already been processed.
822 if (!LiveInBlocks.insert(BB))
825 // Since the value is live into BB, it is either defined in a predecessor or
826 // live into it to. Add the preds to the worklist unless they are a
828 for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI) {
831 // The value is not live into a predecessor if it defines the value.
832 if (DefBlocks.count(P))
835 // Otherwise it is, add to the worklist.
836 LiveInBlockWorklist.push_back(P);
841 /// At this point, we're committed to promoting the alloca using IDF's, and the
842 /// standard SSA construction algorithm. Determine which blocks need phi nodes
843 /// and see if we can optimize out some work by avoiding insertion of dead phi
845 void PromoteMem2Reg::DetermineInsertionPoint(AllocaInst *AI, unsigned AllocaNum,
847 // Unique the set of defining blocks for efficient lookup.
848 SmallPtrSet<BasicBlock *, 32> DefBlocks;
849 DefBlocks.insert(Info.DefiningBlocks.begin(), Info.DefiningBlocks.end());
851 // Determine which blocks the value is live in. These are blocks which lead
853 SmallPtrSet<BasicBlock *, 32> LiveInBlocks;
854 ComputeLiveInBlocks(AI, Info, DefBlocks, LiveInBlocks);
856 // Use a priority queue keyed on dominator tree level so that inserted nodes
857 // are handled from the bottom of the dominator tree upwards.
858 typedef std::pair<DomTreeNode *, unsigned> DomTreeNodePair;
859 typedef std::priority_queue<DomTreeNodePair, SmallVector<DomTreeNodePair, 32>,
860 less_second> IDFPriorityQueue;
863 for (BasicBlock *BB : DefBlocks) {
864 if (DomTreeNode *Node = DT.getNode(BB))
865 PQ.push(std::make_pair(Node, DomLevels[Node]));
868 SmallVector<std::pair<unsigned, BasicBlock *>, 32> DFBlocks;
869 SmallPtrSet<DomTreeNode *, 32> Visited;
870 SmallVector<DomTreeNode *, 32> Worklist;
871 while (!PQ.empty()) {
872 DomTreeNodePair RootPair = PQ.top();
874 DomTreeNode *Root = RootPair.first;
875 unsigned RootLevel = RootPair.second;
877 // Walk all dominator tree children of Root, inspecting their CFG edges with
878 // targets elsewhere on the dominator tree. Only targets whose level is at
879 // most Root's level are added to the iterated dominance frontier of the
883 Worklist.push_back(Root);
885 while (!Worklist.empty()) {
886 DomTreeNode *Node = Worklist.pop_back_val();
887 BasicBlock *BB = Node->getBlock();
889 for (succ_iterator SI = succ_begin(BB), SE = succ_end(BB); SI != SE;
891 DomTreeNode *SuccNode = DT.getNode(*SI);
893 // Quickly skip all CFG edges that are also dominator tree edges instead
894 // of catching them below.
895 if (SuccNode->getIDom() == Node)
898 unsigned SuccLevel = DomLevels[SuccNode];
899 if (SuccLevel > RootLevel)
902 if (!Visited.insert(SuccNode))
905 BasicBlock *SuccBB = SuccNode->getBlock();
906 if (!LiveInBlocks.count(SuccBB))
909 DFBlocks.push_back(std::make_pair(BBNumbers[SuccBB], SuccBB));
910 if (!DefBlocks.count(SuccBB))
911 PQ.push(std::make_pair(SuccNode, SuccLevel));
914 for (DomTreeNode::iterator CI = Node->begin(), CE = Node->end(); CI != CE;
916 if (!Visited.count(*CI))
917 Worklist.push_back(*CI);
922 if (DFBlocks.size() > 1)
923 std::sort(DFBlocks.begin(), DFBlocks.end());
925 unsigned CurrentVersion = 0;
926 for (unsigned i = 0, e = DFBlocks.size(); i != e; ++i)
927 QueuePhiNode(DFBlocks[i].second, AllocaNum, CurrentVersion);
930 /// \brief Queue a phi-node to be added to a basic-block for a specific Alloca.
932 /// Returns true if there wasn't already a phi-node for that variable
933 bool PromoteMem2Reg::QueuePhiNode(BasicBlock *BB, unsigned AllocaNo,
935 // Look up the basic-block in question.
936 PHINode *&PN = NewPhiNodes[std::make_pair(BBNumbers[BB], AllocaNo)];
938 // If the BB already has a phi node added for the i'th alloca then we're done!
942 // Create a PhiNode using the dereferenced type... and add the phi-node to the
944 PN = PHINode::Create(Allocas[AllocaNo]->getAllocatedType(), getNumPreds(BB),
945 Allocas[AllocaNo]->getName() + "." + Twine(Version++),
948 PhiToAllocaMap[PN] = AllocaNo;
950 if (AST && PN->getType()->isPointerTy())
951 AST->copyValue(PointerAllocaValues[AllocaNo], PN);
956 /// \brief Recursively traverse the CFG of the function, renaming loads and
957 /// stores to the allocas which we are promoting.
959 /// IncomingVals indicates what value each Alloca contains on exit from the
960 /// predecessor block Pred.
961 void PromoteMem2Reg::RenamePass(BasicBlock *BB, BasicBlock *Pred,
962 RenamePassData::ValVector &IncomingVals,
963 std::vector<RenamePassData> &Worklist) {
965 // If we are inserting any phi nodes into this BB, they will already be in the
967 if (PHINode *APN = dyn_cast<PHINode>(BB->begin())) {
968 // If we have PHI nodes to update, compute the number of edges from Pred to
970 if (PhiToAllocaMap.count(APN)) {
971 // We want to be able to distinguish between PHI nodes being inserted by
972 // this invocation of mem2reg from those phi nodes that already existed in
973 // the IR before mem2reg was run. We determine that APN is being inserted
974 // because it is missing incoming edges. All other PHI nodes being
975 // inserted by this pass of mem2reg will have the same number of incoming
976 // operands so far. Remember this count.
977 unsigned NewPHINumOperands = APN->getNumOperands();
979 unsigned NumEdges = std::count(succ_begin(Pred), succ_end(Pred), BB);
980 assert(NumEdges && "Must be at least one edge from Pred to BB!");
982 // Add entries for all the phis.
983 BasicBlock::iterator PNI = BB->begin();
985 unsigned AllocaNo = PhiToAllocaMap[APN];
987 // Add N incoming values to the PHI node.
988 for (unsigned i = 0; i != NumEdges; ++i)
989 APN->addIncoming(IncomingVals[AllocaNo], Pred);
991 // The currently active variable for this block is now the PHI.
992 IncomingVals[AllocaNo] = APN;
994 // Get the next phi node.
996 APN = dyn_cast<PHINode>(PNI);
1000 // Verify that it is missing entries. If not, it is not being inserted
1001 // by this mem2reg invocation so we want to ignore it.
1002 } while (APN->getNumOperands() == NewPHINumOperands);
1006 // Don't revisit blocks.
1007 if (!Visited.insert(BB))
1010 for (BasicBlock::iterator II = BB->begin(); !isa<TerminatorInst>(II);) {
1011 Instruction *I = II++; // get the instruction, increment iterator
1013 if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
1014 AllocaInst *Src = dyn_cast<AllocaInst>(LI->getPointerOperand());
1018 DenseMap<AllocaInst *, unsigned>::iterator AI = AllocaLookup.find(Src);
1019 if (AI == AllocaLookup.end())
1022 Value *V = IncomingVals[AI->second];
1024 // Anything using the load now uses the current value.
1025 LI->replaceAllUsesWith(V);
1026 if (AST && LI->getType()->isPointerTy())
1027 AST->deleteValue(LI);
1028 BB->getInstList().erase(LI);
1029 } else if (StoreInst *SI = dyn_cast<StoreInst>(I)) {
1030 // Delete this instruction and mark the name as the current holder of the
1032 AllocaInst *Dest = dyn_cast<AllocaInst>(SI->getPointerOperand());
1036 DenseMap<AllocaInst *, unsigned>::iterator ai = AllocaLookup.find(Dest);
1037 if (ai == AllocaLookup.end())
1040 // what value were we writing?
1041 IncomingVals[ai->second] = SI->getOperand(0);
1042 // Record debuginfo for the store before removing it.
1043 if (DbgDeclareInst *DDI = AllocaDbgDeclares[ai->second])
1044 ConvertDebugDeclareToDebugValue(DDI, SI, DIB);
1045 BB->getInstList().erase(SI);
1049 // 'Recurse' to our successors.
1050 succ_iterator I = succ_begin(BB), E = succ_end(BB);
1054 // Keep track of the successors so we don't visit the same successor twice
1055 SmallPtrSet<BasicBlock *, 8> VisitedSuccs;
1057 // Handle the first successor without using the worklist.
1058 VisitedSuccs.insert(*I);
1064 if (VisitedSuccs.insert(*I))
1065 Worklist.push_back(RenamePassData(*I, Pred, IncomingVals));
1070 void llvm::PromoteMemToReg(ArrayRef<AllocaInst *> Allocas, DominatorTree &DT,
1071 AliasSetTracker *AST, AssumptionTracker *AT) {
1072 // If there is nothing to do, bail out...
1073 if (Allocas.empty())
1076 PromoteMem2Reg(Allocas, DT, AST, AT).run();