1 //===- PromoteMemoryToRegister.cpp - Convert allocas to registers ---------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file promotes memory references to be register references. It promotes
11 // alloca instructions which only have loads and stores as uses. An alloca is
12 // transformed by using iterated dominator frontiers to place PHI nodes, then
13 // traversing the function in depth-first order to rewrite loads and stores as
16 // The algorithm used here is based on:
18 // Sreedhar and Gao. A linear time algorithm for placing phi-nodes.
19 // In Proceedings of the 22nd ACM SIGPLAN-SIGACT Symposium on Principles of
20 // Programming Languages
21 // POPL '95. ACM, New York, NY, 62-73.
23 // It has been modified to not explicitly use the DJ graph data structure and to
24 // directly compute pruned SSA using per-variable liveness information.
26 //===----------------------------------------------------------------------===//
28 #define DEBUG_TYPE "mem2reg"
29 #include "llvm/Transforms/Utils/PromoteMemToReg.h"
30 #include "llvm/Constants.h"
31 #include "llvm/DerivedTypes.h"
32 #include "llvm/Function.h"
33 #include "llvm/Instructions.h"
34 #include "llvm/IntrinsicInst.h"
35 #include "llvm/Metadata.h"
36 #include "llvm/Analysis/AliasSetTracker.h"
37 #include "llvm/Analysis/DebugInfo.h"
38 #include "llvm/Analysis/DIBuilder.h"
39 #include "llvm/Analysis/Dominators.h"
40 #include "llvm/Analysis/InstructionSimplify.h"
41 #include "llvm/Transforms/Utils/Local.h"
42 #include "llvm/ADT/DenseMap.h"
43 #include "llvm/ADT/SmallPtrSet.h"
44 #include "llvm/ADT/SmallVector.h"
45 #include "llvm/ADT/Statistic.h"
46 #include "llvm/ADT/STLExtras.h"
47 #include "llvm/Support/CFG.h"
52 STATISTIC(NumLocalPromoted, "Number of alloca's promoted within one block");
53 STATISTIC(NumSingleStore, "Number of alloca's promoted with a single store");
54 STATISTIC(NumDeadAlloca, "Number of dead alloca's removed");
55 STATISTIC(NumPHIInsert, "Number of PHI nodes inserted");
59 struct DenseMapInfo<std::pair<BasicBlock*, unsigned> > {
60 typedef std::pair<BasicBlock*, unsigned> EltTy;
61 static inline EltTy getEmptyKey() {
62 return EltTy(reinterpret_cast<BasicBlock*>(-1), ~0U);
64 static inline EltTy getTombstoneKey() {
65 return EltTy(reinterpret_cast<BasicBlock*>(-2), 0U);
67 static unsigned getHashValue(const std::pair<BasicBlock*, unsigned> &Val) {
68 return DenseMapInfo<void*>::getHashValue(Val.first) + Val.second*2;
70 static bool isEqual(const EltTy &LHS, const EltTy &RHS) {
76 /// isAllocaPromotable - Return true if this alloca is legal for promotion.
77 /// This is true if there are only loads and stores to the alloca.
79 bool llvm::isAllocaPromotable(const AllocaInst *AI) {
80 // FIXME: If the memory unit is of pointer or integer type, we can permit
81 // assignments to subsections of the memory unit.
83 // Only allow direct and non-volatile loads and stores...
84 for (Value::const_use_iterator UI = AI->use_begin(), UE = AI->use_end();
85 UI != UE; ++UI) { // Loop over all of the uses of the alloca
87 if (const LoadInst *LI = dyn_cast<LoadInst>(U)) {
90 } else if (const StoreInst *SI = dyn_cast<StoreInst>(U)) {
91 if (SI->getOperand(0) == AI)
92 return false; // Don't allow a store OF the AI, only INTO the AI.
103 /// FindAllocaDbgDeclare - Finds the llvm.dbg.declare intrinsic describing the
104 /// alloca 'V', if any.
105 static DbgDeclareInst *FindAllocaDbgDeclare(Value *V) {
106 if (MDNode *DebugNode = MDNode::getIfExists(V->getContext(), V))
107 for (Value::use_iterator UI = DebugNode->use_begin(),
108 E = DebugNode->use_end(); UI != E; ++UI)
109 if (DbgDeclareInst *DDI = dyn_cast<DbgDeclareInst>(*UI))
118 // Data package used by RenamePass()
119 class RenamePassData {
121 typedef std::vector<Value *> ValVector;
123 RenamePassData() : BB(NULL), Pred(NULL), Values() {}
124 RenamePassData(BasicBlock *B, BasicBlock *P,
125 const ValVector &V) : BB(B), Pred(P), Values(V) {}
130 void swap(RenamePassData &RHS) {
131 std::swap(BB, RHS.BB);
132 std::swap(Pred, RHS.Pred);
133 Values.swap(RHS.Values);
137 /// LargeBlockInfo - This assigns and keeps a per-bb relative ordering of
138 /// load/store instructions in the block that directly load or store an alloca.
140 /// This functionality is important because it avoids scanning large basic
141 /// blocks multiple times when promoting many allocas in the same block.
142 class LargeBlockInfo {
143 /// InstNumbers - For each instruction that we track, keep the index of the
144 /// instruction. The index starts out as the number of the instruction from
145 /// the start of the block.
146 DenseMap<const Instruction *, unsigned> InstNumbers;
149 /// isInterestingInstruction - This code only looks at accesses to allocas.
150 static bool isInterestingInstruction(const Instruction *I) {
151 return (isa<LoadInst>(I) && isa<AllocaInst>(I->getOperand(0))) ||
152 (isa<StoreInst>(I) && isa<AllocaInst>(I->getOperand(1)));
155 /// getInstructionIndex - Get or calculate the index of the specified
157 unsigned getInstructionIndex(const Instruction *I) {
158 assert(isInterestingInstruction(I) &&
159 "Not a load/store to/from an alloca?");
161 // If we already have this instruction number, return it.
162 DenseMap<const Instruction *, unsigned>::iterator It = InstNumbers.find(I);
163 if (It != InstNumbers.end()) return It->second;
165 // Scan the whole block to get the instruction. This accumulates
166 // information for every interesting instruction in the block, in order to
167 // avoid gratuitus rescans.
168 const BasicBlock *BB = I->getParent();
170 for (BasicBlock::const_iterator BBI = BB->begin(), E = BB->end();
172 if (isInterestingInstruction(BBI))
173 InstNumbers[BBI] = InstNo++;
174 It = InstNumbers.find(I);
176 assert(It != InstNumbers.end() && "Didn't insert instruction?");
180 void deleteValue(const Instruction *I) {
181 InstNumbers.erase(I);
189 struct PromoteMem2Reg {
190 /// Allocas - The alloca instructions being promoted.
192 std::vector<AllocaInst*> Allocas;
196 /// AST - An AliasSetTracker object to update. If null, don't update it.
198 AliasSetTracker *AST;
200 /// AllocaLookup - Reverse mapping of Allocas.
202 DenseMap<AllocaInst*, unsigned> AllocaLookup;
204 /// NewPhiNodes - The PhiNodes we're adding.
206 DenseMap<std::pair<BasicBlock*, unsigned>, PHINode*> NewPhiNodes;
208 /// PhiToAllocaMap - For each PHI node, keep track of which entry in Allocas
209 /// it corresponds to.
210 DenseMap<PHINode*, unsigned> PhiToAllocaMap;
212 /// PointerAllocaValues - If we are updating an AliasSetTracker, then for
213 /// each alloca that is of pointer type, we keep track of what to copyValue
214 /// to the inserted PHI nodes here.
216 std::vector<Value*> PointerAllocaValues;
218 /// AllocaDbgDeclares - For each alloca, we keep track of the dbg.declare
219 /// intrinsic that describes it, if any, so that we can convert it to a
220 /// dbg.value intrinsic if the alloca gets promoted.
221 SmallVector<DbgDeclareInst*, 8> AllocaDbgDeclares;
223 /// Visited - The set of basic blocks the renamer has already visited.
225 SmallPtrSet<BasicBlock*, 16> Visited;
227 /// BBNumbers - Contains a stable numbering of basic blocks to avoid
228 /// non-determinstic behavior.
229 DenseMap<BasicBlock*, unsigned> BBNumbers;
231 /// DomLevels - Maps DomTreeNodes to their level in the dominator tree.
232 DenseMap<DomTreeNode*, unsigned> DomLevels;
234 /// BBNumPreds - Lazily compute the number of predecessors a block has.
235 DenseMap<const BasicBlock*, unsigned> BBNumPreds;
237 PromoteMem2Reg(const std::vector<AllocaInst*> &A, DominatorTree &dt,
238 AliasSetTracker *ast)
239 : Allocas(A), DT(dt), DIB(0), AST(ast) {}
246 /// dominates - Return true if BB1 dominates BB2 using the DominatorTree.
248 bool dominates(BasicBlock *BB1, BasicBlock *BB2) const {
249 return DT.dominates(BB1, BB2);
253 void RemoveFromAllocasList(unsigned &AllocaIdx) {
254 Allocas[AllocaIdx] = Allocas.back();
259 unsigned getNumPreds(const BasicBlock *BB) {
260 unsigned &NP = BBNumPreds[BB];
262 NP = std::distance(pred_begin(BB), pred_end(BB))+1;
266 void DetermineInsertionPoint(AllocaInst *AI, unsigned AllocaNum,
268 void ComputeLiveInBlocks(AllocaInst *AI, AllocaInfo &Info,
269 const SmallPtrSet<BasicBlock*, 32> &DefBlocks,
270 SmallPtrSet<BasicBlock*, 32> &LiveInBlocks);
272 void RewriteSingleStoreAlloca(AllocaInst *AI, AllocaInfo &Info,
273 LargeBlockInfo &LBI);
274 void PromoteSingleBlockAlloca(AllocaInst *AI, AllocaInfo &Info,
275 LargeBlockInfo &LBI);
277 void RenamePass(BasicBlock *BB, BasicBlock *Pred,
278 RenamePassData::ValVector &IncVals,
279 std::vector<RenamePassData> &Worklist);
280 bool QueuePhiNode(BasicBlock *BB, unsigned AllocaIdx, unsigned &Version);
284 SmallVector<BasicBlock*, 32> DefiningBlocks;
285 SmallVector<BasicBlock*, 32> UsingBlocks;
287 StoreInst *OnlyStore;
288 BasicBlock *OnlyBlock;
289 bool OnlyUsedInOneBlock;
291 Value *AllocaPointerVal;
292 DbgDeclareInst *DbgDeclare;
295 DefiningBlocks.clear();
299 OnlyUsedInOneBlock = true;
300 AllocaPointerVal = 0;
304 /// AnalyzeAlloca - Scan the uses of the specified alloca, filling in our
306 void AnalyzeAlloca(AllocaInst *AI) {
309 // As we scan the uses of the alloca instruction, keep track of stores,
310 // and decide whether all of the loads and stores to the alloca are within
311 // the same basic block.
312 for (Value::use_iterator UI = AI->use_begin(), E = AI->use_end();
314 Instruction *User = cast<Instruction>(*UI++);
316 if (StoreInst *SI = dyn_cast<StoreInst>(User)) {
317 // Remember the basic blocks which define new values for the alloca
318 DefiningBlocks.push_back(SI->getParent());
319 AllocaPointerVal = SI->getOperand(0);
322 LoadInst *LI = cast<LoadInst>(User);
323 // Otherwise it must be a load instruction, keep track of variable
325 UsingBlocks.push_back(LI->getParent());
326 AllocaPointerVal = LI;
329 if (OnlyUsedInOneBlock) {
331 OnlyBlock = User->getParent();
332 else if (OnlyBlock != User->getParent())
333 OnlyUsedInOneBlock = false;
337 DbgDeclare = FindAllocaDbgDeclare(AI);
341 typedef std::pair<DomTreeNode*, unsigned> DomTreeNodePair;
343 struct DomTreeNodeCompare {
344 bool operator()(const DomTreeNodePair &LHS, const DomTreeNodePair &RHS) {
345 return LHS.second < RHS.second;
348 } // end of anonymous namespace
351 void PromoteMem2Reg::run() {
352 Function &F = *DT.getRoot()->getParent();
354 if (AST) PointerAllocaValues.resize(Allocas.size());
355 AllocaDbgDeclares.resize(Allocas.size());
360 for (unsigned AllocaNum = 0; AllocaNum != Allocas.size(); ++AllocaNum) {
361 AllocaInst *AI = Allocas[AllocaNum];
363 assert(isAllocaPromotable(AI) &&
364 "Cannot promote non-promotable alloca!");
365 assert(AI->getParent()->getParent() == &F &&
366 "All allocas should be in the same function, which is same as DF!");
368 if (AI->use_empty()) {
369 // If there are no uses of the alloca, just delete it now.
370 if (AST) AST->deleteValue(AI);
371 AI->eraseFromParent();
373 // Remove the alloca from the Allocas list, since it has been processed
374 RemoveFromAllocasList(AllocaNum);
379 // Calculate the set of read and write-locations for each alloca. This is
380 // analogous to finding the 'uses' and 'definitions' of each variable.
381 Info.AnalyzeAlloca(AI);
383 // If there is only a single store to this value, replace any loads of
384 // it that are directly dominated by the definition with the value stored.
385 if (Info.DefiningBlocks.size() == 1) {
386 RewriteSingleStoreAlloca(AI, Info, LBI);
388 // Finally, after the scan, check to see if the store is all that is left.
389 if (Info.UsingBlocks.empty()) {
390 // Record debuginfo for the store and remove the declaration's debuginfo.
391 if (DbgDeclareInst *DDI = Info.DbgDeclare) {
393 DIB = new DIBuilder(*DDI->getParent()->getParent()->getParent());
394 ConvertDebugDeclareToDebugValue(DDI, Info.OnlyStore, *DIB);
395 DDI->eraseFromParent();
397 // Remove the (now dead) store and alloca.
398 Info.OnlyStore->eraseFromParent();
399 LBI.deleteValue(Info.OnlyStore);
401 if (AST) AST->deleteValue(AI);
402 AI->eraseFromParent();
405 // The alloca has been processed, move on.
406 RemoveFromAllocasList(AllocaNum);
413 // If the alloca is only read and written in one basic block, just perform a
414 // linear sweep over the block to eliminate it.
415 if (Info.OnlyUsedInOneBlock) {
416 PromoteSingleBlockAlloca(AI, Info, LBI);
418 // Finally, after the scan, check to see if the stores are all that is
420 if (Info.UsingBlocks.empty()) {
422 // Remove the (now dead) stores and alloca.
423 while (!AI->use_empty()) {
424 StoreInst *SI = cast<StoreInst>(AI->use_back());
425 // Record debuginfo for the store before removing it.
426 if (DbgDeclareInst *DDI = Info.DbgDeclare) {
428 DIB = new DIBuilder(*SI->getParent()->getParent()->getParent());
429 ConvertDebugDeclareToDebugValue(DDI, SI, *DIB);
431 SI->eraseFromParent();
435 if (AST) AST->deleteValue(AI);
436 AI->eraseFromParent();
439 // The alloca has been processed, move on.
440 RemoveFromAllocasList(AllocaNum);
442 // The alloca's debuginfo can be removed as well.
443 if (DbgDeclareInst *DDI = Info.DbgDeclare)
444 DDI->eraseFromParent();
451 // If we haven't computed dominator tree levels, do so now.
452 if (DomLevels.empty()) {
453 SmallVector<DomTreeNode*, 32> Worklist;
455 DomTreeNode *Root = DT.getRootNode();
457 Worklist.push_back(Root);
459 while (!Worklist.empty()) {
460 DomTreeNode *Node = Worklist.pop_back_val();
461 unsigned ChildLevel = DomLevels[Node] + 1;
462 for (DomTreeNode::iterator CI = Node->begin(), CE = Node->end();
464 DomLevels[*CI] = ChildLevel;
465 Worklist.push_back(*CI);
470 // If we haven't computed a numbering for the BB's in the function, do so
472 if (BBNumbers.empty()) {
474 for (Function::iterator I = F.begin(), E = F.end(); I != E; ++I)
478 // If we have an AST to keep updated, remember some pointer value that is
479 // stored into the alloca.
481 PointerAllocaValues[AllocaNum] = Info.AllocaPointerVal;
483 // Remember the dbg.declare intrinsic describing this alloca, if any.
484 if (Info.DbgDeclare) AllocaDbgDeclares[AllocaNum] = Info.DbgDeclare;
486 // Keep the reverse mapping of the 'Allocas' array for the rename pass.
487 AllocaLookup[Allocas[AllocaNum]] = AllocaNum;
489 // At this point, we're committed to promoting the alloca using IDF's, and
490 // the standard SSA construction algorithm. Determine which blocks need PHI
491 // nodes and see if we can optimize out some work by avoiding insertion of
493 DetermineInsertionPoint(AI, AllocaNum, Info);
497 return; // All of the allocas must have been trivial!
502 // Set the incoming values for the basic block to be null values for all of
503 // the alloca's. We do this in case there is a load of a value that has not
504 // been stored yet. In this case, it will get this null value.
506 RenamePassData::ValVector Values(Allocas.size());
507 for (unsigned i = 0, e = Allocas.size(); i != e; ++i)
508 Values[i] = UndefValue::get(Allocas[i]->getAllocatedType());
510 // Walks all basic blocks in the function performing the SSA rename algorithm
511 // and inserting the phi nodes we marked as necessary
513 std::vector<RenamePassData> RenamePassWorkList;
514 RenamePassWorkList.push_back(RenamePassData(F.begin(), 0, Values));
517 RPD.swap(RenamePassWorkList.back());
518 RenamePassWorkList.pop_back();
519 // RenamePass may add new worklist entries.
520 RenamePass(RPD.BB, RPD.Pred, RPD.Values, RenamePassWorkList);
521 } while (!RenamePassWorkList.empty());
523 // The renamer uses the Visited set to avoid infinite loops. Clear it now.
526 // Remove the allocas themselves from the function.
527 for (unsigned i = 0, e = Allocas.size(); i != e; ++i) {
528 Instruction *A = Allocas[i];
530 // If there are any uses of the alloca instructions left, they must be in
531 // unreachable basic blocks that were not processed by walking the dominator
532 // tree. Just delete the users now.
534 A->replaceAllUsesWith(UndefValue::get(A->getType()));
535 if (AST) AST->deleteValue(A);
536 A->eraseFromParent();
539 // Remove alloca's dbg.declare instrinsics from the function.
540 for (unsigned i = 0, e = AllocaDbgDeclares.size(); i != e; ++i)
541 if (DbgDeclareInst *DDI = AllocaDbgDeclares[i])
542 DDI->eraseFromParent();
544 // Loop over all of the PHI nodes and see if there are any that we can get
545 // rid of because they merge all of the same incoming values. This can
546 // happen due to undef values coming into the PHI nodes. This process is
547 // iterative, because eliminating one PHI node can cause others to be removed.
548 bool EliminatedAPHI = true;
549 while (EliminatedAPHI) {
550 EliminatedAPHI = false;
552 for (DenseMap<std::pair<BasicBlock*, unsigned>, PHINode*>::iterator I =
553 NewPhiNodes.begin(), E = NewPhiNodes.end(); I != E;) {
554 PHINode *PN = I->second;
556 // If this PHI node merges one value and/or undefs, get the value.
557 if (Value *V = SimplifyInstruction(PN, 0, &DT)) {
558 if (AST && PN->getType()->isPointerTy())
559 AST->deleteValue(PN);
560 PN->replaceAllUsesWith(V);
561 PN->eraseFromParent();
562 NewPhiNodes.erase(I++);
563 EliminatedAPHI = true;
570 // At this point, the renamer has added entries to PHI nodes for all reachable
571 // code. Unfortunately, there may be unreachable blocks which the renamer
572 // hasn't traversed. If this is the case, the PHI nodes may not
573 // have incoming values for all predecessors. Loop over all PHI nodes we have
574 // created, inserting undef values if they are missing any incoming values.
576 for (DenseMap<std::pair<BasicBlock*, unsigned>, PHINode*>::iterator I =
577 NewPhiNodes.begin(), E = NewPhiNodes.end(); I != E; ++I) {
578 // We want to do this once per basic block. As such, only process a block
579 // when we find the PHI that is the first entry in the block.
580 PHINode *SomePHI = I->second;
581 BasicBlock *BB = SomePHI->getParent();
582 if (&BB->front() != SomePHI)
585 // Only do work here if there the PHI nodes are missing incoming values. We
586 // know that all PHI nodes that were inserted in a block will have the same
587 // number of incoming values, so we can just check any of them.
588 if (SomePHI->getNumIncomingValues() == getNumPreds(BB))
591 // Get the preds for BB.
592 SmallVector<BasicBlock*, 16> Preds(pred_begin(BB), pred_end(BB));
594 // Ok, now we know that all of the PHI nodes are missing entries for some
595 // basic blocks. Start by sorting the incoming predecessors for efficient
597 std::sort(Preds.begin(), Preds.end());
599 // Now we loop through all BB's which have entries in SomePHI and remove
600 // them from the Preds list.
601 for (unsigned i = 0, e = SomePHI->getNumIncomingValues(); i != e; ++i) {
602 // Do a log(n) search of the Preds list for the entry we want.
603 SmallVector<BasicBlock*, 16>::iterator EntIt =
604 std::lower_bound(Preds.begin(), Preds.end(),
605 SomePHI->getIncomingBlock(i));
606 assert(EntIt != Preds.end() && *EntIt == SomePHI->getIncomingBlock(i)&&
607 "PHI node has entry for a block which is not a predecessor!");
613 // At this point, the blocks left in the preds list must have dummy
614 // entries inserted into every PHI nodes for the block. Update all the phi
615 // nodes in this block that we are inserting (there could be phis before
617 unsigned NumBadPreds = SomePHI->getNumIncomingValues();
618 BasicBlock::iterator BBI = BB->begin();
619 while ((SomePHI = dyn_cast<PHINode>(BBI++)) &&
620 SomePHI->getNumIncomingValues() == NumBadPreds) {
621 Value *UndefVal = UndefValue::get(SomePHI->getType());
622 for (unsigned pred = 0, e = Preds.size(); pred != e; ++pred)
623 SomePHI->addIncoming(UndefVal, Preds[pred]);
631 /// ComputeLiveInBlocks - Determine which blocks the value is live in. These
632 /// are blocks which lead to uses. Knowing this allows us to avoid inserting
633 /// PHI nodes into blocks which don't lead to uses (thus, the inserted phi nodes
635 void PromoteMem2Reg::
636 ComputeLiveInBlocks(AllocaInst *AI, AllocaInfo &Info,
637 const SmallPtrSet<BasicBlock*, 32> &DefBlocks,
638 SmallPtrSet<BasicBlock*, 32> &LiveInBlocks) {
640 // To determine liveness, we must iterate through the predecessors of blocks
641 // where the def is live. Blocks are added to the worklist if we need to
642 // check their predecessors. Start with all the using blocks.
643 SmallVector<BasicBlock*, 64> LiveInBlockWorklist(Info.UsingBlocks.begin(),
644 Info.UsingBlocks.end());
646 // If any of the using blocks is also a definition block, check to see if the
647 // definition occurs before or after the use. If it happens before the use,
648 // the value isn't really live-in.
649 for (unsigned i = 0, e = LiveInBlockWorklist.size(); i != e; ++i) {
650 BasicBlock *BB = LiveInBlockWorklist[i];
651 if (!DefBlocks.count(BB)) continue;
653 // Okay, this is a block that both uses and defines the value. If the first
654 // reference to the alloca is a def (store), then we know it isn't live-in.
655 for (BasicBlock::iterator I = BB->begin(); ; ++I) {
656 if (StoreInst *SI = dyn_cast<StoreInst>(I)) {
657 if (SI->getOperand(1) != AI) continue;
659 // We found a store to the alloca before a load. The alloca is not
660 // actually live-in here.
661 LiveInBlockWorklist[i] = LiveInBlockWorklist.back();
662 LiveInBlockWorklist.pop_back();
667 if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
668 if (LI->getOperand(0) != AI) continue;
670 // Okay, we found a load before a store to the alloca. It is actually
671 // live into this block.
677 // Now that we have a set of blocks where the phi is live-in, recursively add
678 // their predecessors until we find the full region the value is live.
679 while (!LiveInBlockWorklist.empty()) {
680 BasicBlock *BB = LiveInBlockWorklist.pop_back_val();
682 // The block really is live in here, insert it into the set. If already in
683 // the set, then it has already been processed.
684 if (!LiveInBlocks.insert(BB))
687 // Since the value is live into BB, it is either defined in a predecessor or
688 // live into it to. Add the preds to the worklist unless they are a
690 for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI) {
693 // The value is not live into a predecessor if it defines the value.
694 if (DefBlocks.count(P))
697 // Otherwise it is, add to the worklist.
698 LiveInBlockWorklist.push_back(P);
703 /// DetermineInsertionPoint - At this point, we're committed to promoting the
704 /// alloca using IDF's, and the standard SSA construction algorithm. Determine
705 /// which blocks need phi nodes and see if we can optimize out some work by
706 /// avoiding insertion of dead phi nodes.
707 void PromoteMem2Reg::DetermineInsertionPoint(AllocaInst *AI, unsigned AllocaNum,
709 // Unique the set of defining blocks for efficient lookup.
710 SmallPtrSet<BasicBlock*, 32> DefBlocks;
711 DefBlocks.insert(Info.DefiningBlocks.begin(), Info.DefiningBlocks.end());
713 // Determine which blocks the value is live in. These are blocks which lead
715 SmallPtrSet<BasicBlock*, 32> LiveInBlocks;
716 ComputeLiveInBlocks(AI, Info, DefBlocks, LiveInBlocks);
718 // Use a priority queue keyed on dominator tree level so that inserted nodes
719 // are handled from the bottom of the dominator tree upwards.
720 typedef std::priority_queue<DomTreeNodePair, SmallVector<DomTreeNodePair, 32>,
721 DomTreeNodeCompare> IDFPriorityQueue;
724 for (SmallPtrSet<BasicBlock*, 32>::const_iterator I = DefBlocks.begin(),
725 E = DefBlocks.end(); I != E; ++I) {
726 if (DomTreeNode *Node = DT.getNode(*I))
727 PQ.push(std::make_pair(Node, DomLevels[Node]));
730 SmallVector<std::pair<unsigned, BasicBlock*>, 32> DFBlocks;
731 SmallPtrSet<DomTreeNode*, 32> Visited;
732 SmallVector<DomTreeNode*, 32> Worklist;
733 while (!PQ.empty()) {
734 DomTreeNodePair RootPair = PQ.top();
736 DomTreeNode *Root = RootPair.first;
737 unsigned RootLevel = RootPair.second;
739 // Walk all dominator tree children of Root, inspecting their CFG edges with
740 // targets elsewhere on the dominator tree. Only targets whose level is at
741 // most Root's level are added to the iterated dominance frontier of the
745 Worklist.push_back(Root);
747 while (!Worklist.empty()) {
748 DomTreeNode *Node = Worklist.pop_back_val();
749 BasicBlock *BB = Node->getBlock();
751 for (succ_iterator SI = succ_begin(BB), SE = succ_end(BB); SI != SE;
753 DomTreeNode *SuccNode = DT.getNode(*SI);
755 // Quickly skip all CFG edges that are also dominator tree edges instead
756 // of catching them below.
757 if (SuccNode->getIDom() == Node)
760 unsigned SuccLevel = DomLevels[SuccNode];
761 if (SuccLevel > RootLevel)
764 if (!Visited.insert(SuccNode))
767 BasicBlock *SuccBB = SuccNode->getBlock();
768 if (!LiveInBlocks.count(SuccBB))
771 DFBlocks.push_back(std::make_pair(BBNumbers[SuccBB], SuccBB));
772 if (!DefBlocks.count(SuccBB))
773 PQ.push(std::make_pair(SuccNode, SuccLevel));
776 for (DomTreeNode::iterator CI = Node->begin(), CE = Node->end(); CI != CE;
778 if (!Visited.count(*CI))
779 Worklist.push_back(*CI);
784 if (DFBlocks.size() > 1)
785 std::sort(DFBlocks.begin(), DFBlocks.end());
787 unsigned CurrentVersion = 0;
788 for (unsigned i = 0, e = DFBlocks.size(); i != e; ++i)
789 QueuePhiNode(DFBlocks[i].second, AllocaNum, CurrentVersion);
792 /// RewriteSingleStoreAlloca - If there is only a single store to this value,
793 /// replace any loads of it that are directly dominated by the definition with
794 /// the value stored.
795 void PromoteMem2Reg::RewriteSingleStoreAlloca(AllocaInst *AI,
797 LargeBlockInfo &LBI) {
798 StoreInst *OnlyStore = Info.OnlyStore;
799 bool StoringGlobalVal = !isa<Instruction>(OnlyStore->getOperand(0));
800 BasicBlock *StoreBB = OnlyStore->getParent();
803 // Clear out UsingBlocks. We will reconstruct it here if needed.
804 Info.UsingBlocks.clear();
806 for (Value::use_iterator UI = AI->use_begin(), E = AI->use_end(); UI != E; ) {
807 Instruction *UserInst = cast<Instruction>(*UI++);
808 if (!isa<LoadInst>(UserInst)) {
809 assert(UserInst == OnlyStore && "Should only have load/stores");
812 LoadInst *LI = cast<LoadInst>(UserInst);
814 // Okay, if we have a load from the alloca, we want to replace it with the
815 // only value stored to the alloca. We can do this if the value is
816 // dominated by the store. If not, we use the rest of the mem2reg machinery
817 // to insert the phi nodes as needed.
818 if (!StoringGlobalVal) { // Non-instructions are always dominated.
819 if (LI->getParent() == StoreBB) {
820 // If we have a use that is in the same block as the store, compare the
821 // indices of the two instructions to see which one came first. If the
822 // load came before the store, we can't handle it.
823 if (StoreIndex == -1)
824 StoreIndex = LBI.getInstructionIndex(OnlyStore);
826 if (unsigned(StoreIndex) > LBI.getInstructionIndex(LI)) {
827 // Can't handle this load, bail out.
828 Info.UsingBlocks.push_back(StoreBB);
832 } else if (LI->getParent() != StoreBB &&
833 !dominates(StoreBB, LI->getParent())) {
834 // If the load and store are in different blocks, use BB dominance to
835 // check their relationships. If the store doesn't dom the use, bail
837 Info.UsingBlocks.push_back(LI->getParent());
842 // Otherwise, we *can* safely rewrite this load.
843 Value *ReplVal = OnlyStore->getOperand(0);
844 // If the replacement value is the load, this must occur in unreachable
847 ReplVal = UndefValue::get(LI->getType());
848 LI->replaceAllUsesWith(ReplVal);
849 if (AST && LI->getType()->isPointerTy())
850 AST->deleteValue(LI);
851 LI->eraseFromParent();
858 /// StoreIndexSearchPredicate - This is a helper predicate used to search by the
859 /// first element of a pair.
860 struct StoreIndexSearchPredicate {
861 bool operator()(const std::pair<unsigned, StoreInst*> &LHS,
862 const std::pair<unsigned, StoreInst*> &RHS) {
863 return LHS.first < RHS.first;
869 /// PromoteSingleBlockAlloca - Many allocas are only used within a single basic
870 /// block. If this is the case, avoid traversing the CFG and inserting a lot of
871 /// potentially useless PHI nodes by just performing a single linear pass over
872 /// the basic block using the Alloca.
874 /// If we cannot promote this alloca (because it is read before it is written),
875 /// return true. This is necessary in cases where, due to control flow, the
876 /// alloca is potentially undefined on some control flow paths. e.g. code like
877 /// this is potentially correct:
879 /// for (...) { if (c) { A = undef; undef = B; } }
881 /// ... so long as A is not used before undef is set.
883 void PromoteMem2Reg::PromoteSingleBlockAlloca(AllocaInst *AI, AllocaInfo &Info,
884 LargeBlockInfo &LBI) {
885 // The trickiest case to handle is when we have large blocks. Because of this,
886 // this code is optimized assuming that large blocks happen. This does not
887 // significantly pessimize the small block case. This uses LargeBlockInfo to
888 // make it efficient to get the index of various operations in the block.
890 // Clear out UsingBlocks. We will reconstruct it here if needed.
891 Info.UsingBlocks.clear();
893 // Walk the use-def list of the alloca, getting the locations of all stores.
894 typedef SmallVector<std::pair<unsigned, StoreInst*>, 64> StoresByIndexTy;
895 StoresByIndexTy StoresByIndex;
897 for (Value::use_iterator UI = AI->use_begin(), E = AI->use_end();
899 if (StoreInst *SI = dyn_cast<StoreInst>(*UI))
900 StoresByIndex.push_back(std::make_pair(LBI.getInstructionIndex(SI), SI));
902 // If there are no stores to the alloca, just replace any loads with undef.
903 if (StoresByIndex.empty()) {
904 for (Value::use_iterator UI = AI->use_begin(), E = AI->use_end(); UI != E;)
905 if (LoadInst *LI = dyn_cast<LoadInst>(*UI++)) {
906 LI->replaceAllUsesWith(UndefValue::get(LI->getType()));
907 if (AST && LI->getType()->isPointerTy())
908 AST->deleteValue(LI);
910 LI->eraseFromParent();
915 // Sort the stores by their index, making it efficient to do a lookup with a
917 std::sort(StoresByIndex.begin(), StoresByIndex.end());
919 // Walk all of the loads from this alloca, replacing them with the nearest
920 // store above them, if any.
921 for (Value::use_iterator UI = AI->use_begin(), E = AI->use_end(); UI != E;) {
922 LoadInst *LI = dyn_cast<LoadInst>(*UI++);
925 unsigned LoadIdx = LBI.getInstructionIndex(LI);
927 // Find the nearest store that has a lower than this load.
928 StoresByIndexTy::iterator I =
929 std::lower_bound(StoresByIndex.begin(), StoresByIndex.end(),
930 std::pair<unsigned, StoreInst*>(LoadIdx, static_cast<StoreInst*>(0)),
931 StoreIndexSearchPredicate());
933 // If there is no store before this load, then we can't promote this load.
934 if (I == StoresByIndex.begin()) {
935 // Can't handle this load, bail out.
936 Info.UsingBlocks.push_back(LI->getParent());
940 // Otherwise, there was a store before this load, the load takes its value.
942 LI->replaceAllUsesWith(I->second->getOperand(0));
943 if (AST && LI->getType()->isPointerTy())
944 AST->deleteValue(LI);
945 LI->eraseFromParent();
950 // QueuePhiNode - queues a phi-node to be added to a basic-block for a specific
951 // Alloca returns true if there wasn't already a phi-node for that variable
953 bool PromoteMem2Reg::QueuePhiNode(BasicBlock *BB, unsigned AllocaNo,
955 // Look up the basic-block in question.
956 PHINode *&PN = NewPhiNodes[std::make_pair(BB, AllocaNo)];
958 // If the BB already has a phi node added for the i'th alloca then we're done!
959 if (PN) return false;
961 // Create a PhiNode using the dereferenced type... and add the phi-node to the
963 PN = PHINode::Create(Allocas[AllocaNo]->getAllocatedType(), getNumPreds(BB),
964 Allocas[AllocaNo]->getName() + "." + Twine(Version++),
967 PhiToAllocaMap[PN] = AllocaNo;
969 if (AST && PN->getType()->isPointerTy())
970 AST->copyValue(PointerAllocaValues[AllocaNo], PN);
975 // RenamePass - Recursively traverse the CFG of the function, renaming loads and
976 // stores to the allocas which we are promoting. IncomingVals indicates what
977 // value each Alloca contains on exit from the predecessor block Pred.
979 void PromoteMem2Reg::RenamePass(BasicBlock *BB, BasicBlock *Pred,
980 RenamePassData::ValVector &IncomingVals,
981 std::vector<RenamePassData> &Worklist) {
983 // If we are inserting any phi nodes into this BB, they will already be in the
985 if (PHINode *APN = dyn_cast<PHINode>(BB->begin())) {
986 // If we have PHI nodes to update, compute the number of edges from Pred to
988 if (PhiToAllocaMap.count(APN)) {
989 // We want to be able to distinguish between PHI nodes being inserted by
990 // this invocation of mem2reg from those phi nodes that already existed in
991 // the IR before mem2reg was run. We determine that APN is being inserted
992 // because it is missing incoming edges. All other PHI nodes being
993 // inserted by this pass of mem2reg will have the same number of incoming
994 // operands so far. Remember this count.
995 unsigned NewPHINumOperands = APN->getNumOperands();
997 unsigned NumEdges = 0;
998 for (succ_iterator I = succ_begin(Pred), E = succ_end(Pred); I != E; ++I)
1001 assert(NumEdges && "Must be at least one edge from Pred to BB!");
1003 // Add entries for all the phis.
1004 BasicBlock::iterator PNI = BB->begin();
1006 unsigned AllocaNo = PhiToAllocaMap[APN];
1008 // Add N incoming values to the PHI node.
1009 for (unsigned i = 0; i != NumEdges; ++i)
1010 APN->addIncoming(IncomingVals[AllocaNo], Pred);
1012 // The currently active variable for this block is now the PHI.
1013 IncomingVals[AllocaNo] = APN;
1015 // Get the next phi node.
1017 APN = dyn_cast<PHINode>(PNI);
1018 if (APN == 0) break;
1020 // Verify that it is missing entries. If not, it is not being inserted
1021 // by this mem2reg invocation so we want to ignore it.
1022 } while (APN->getNumOperands() == NewPHINumOperands);
1026 // Don't revisit blocks.
1027 if (!Visited.insert(BB)) return;
1029 for (BasicBlock::iterator II = BB->begin(); !isa<TerminatorInst>(II); ) {
1030 Instruction *I = II++; // get the instruction, increment iterator
1032 if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
1033 AllocaInst *Src = dyn_cast<AllocaInst>(LI->getPointerOperand());
1036 DenseMap<AllocaInst*, unsigned>::iterator AI = AllocaLookup.find(Src);
1037 if (AI == AllocaLookup.end()) continue;
1039 Value *V = IncomingVals[AI->second];
1041 // Anything using the load now uses the current value.
1042 LI->replaceAllUsesWith(V);
1043 if (AST && LI->getType()->isPointerTy())
1044 AST->deleteValue(LI);
1045 BB->getInstList().erase(LI);
1046 } else if (StoreInst *SI = dyn_cast<StoreInst>(I)) {
1047 // Delete this instruction and mark the name as the current holder of the
1049 AllocaInst *Dest = dyn_cast<AllocaInst>(SI->getPointerOperand());
1050 if (!Dest) continue;
1052 DenseMap<AllocaInst *, unsigned>::iterator ai = AllocaLookup.find(Dest);
1053 if (ai == AllocaLookup.end())
1056 // what value were we writing?
1057 IncomingVals[ai->second] = SI->getOperand(0);
1058 // Record debuginfo for the store before removing it.
1059 if (DbgDeclareInst *DDI = AllocaDbgDeclares[ai->second]) {
1061 DIB = new DIBuilder(*SI->getParent()->getParent()->getParent());
1062 ConvertDebugDeclareToDebugValue(DDI, SI, *DIB);
1064 BB->getInstList().erase(SI);
1068 // 'Recurse' to our successors.
1069 succ_iterator I = succ_begin(BB), E = succ_end(BB);
1072 // Keep track of the successors so we don't visit the same successor twice
1073 SmallPtrSet<BasicBlock*, 8> VisitedSuccs;
1075 // Handle the first successor without using the worklist.
1076 VisitedSuccs.insert(*I);
1082 if (VisitedSuccs.insert(*I))
1083 Worklist.push_back(RenamePassData(*I, Pred, IncomingVals));
1088 /// PromoteMemToReg - Promote the specified list of alloca instructions into
1089 /// scalar registers, inserting PHI nodes as appropriate. This function does
1090 /// not modify the CFG of the function at all. All allocas must be from the
1093 /// If AST is specified, the specified tracker is updated to reflect changes
1096 void llvm::PromoteMemToReg(const std::vector<AllocaInst*> &Allocas,
1097 DominatorTree &DT, AliasSetTracker *AST) {
1098 // If there is nothing to do, bail out...
1099 if (Allocas.empty()) return;
1101 PromoteMem2Reg(Allocas, DT, AST).run();