1 //===- PromoteMemoryToRegister.cpp - Convert memory refs to regs ----------===//
3 // This file is used to promote memory references to be register references. A
4 // simple example of the transformation performed by this function is:
7 // %X = alloca int, uint 1 ret int 42
8 // store int 42, int *%X
12 // The code is transformed by looping over all of the alloca instruction,
13 // calculating dominator frontiers, then inserting phi-nodes following the usual
14 // SSA construction algorithm. This code does not modify the CFG of the
17 //===----------------------------------------------------------------------===//
19 #include "llvm/Transforms/Utils/PromoteMemToReg.h"
20 #include "llvm/Analysis/Dominators.h"
21 #include "llvm/iMemory.h"
22 #include "llvm/iPHINode.h"
23 #include "llvm/iTerminators.h"
24 #include "llvm/Function.h"
25 #include "llvm/Constant.h"
26 #include "llvm/Type.h"
27 #include "llvm/Support/CFG.h"
28 #include "Support/StringExtras.h"
30 /// isAllocaPromotable - Return true if this alloca is legal for promotion.
31 /// This is true if there are only loads and stores to the alloca...
33 bool isAllocaPromotable(const AllocaInst *AI, const TargetData &TD) {
34 // FIXME: If the memory unit is of pointer or integer type, we can permit
35 // assignments to subsections of the memory unit.
37 // Only allow direct loads and stores...
38 for (Value::use_const_iterator UI = AI->use_begin(), UE = AI->use_end();
39 UI != UE; ++UI) // Loop over all of the uses of the alloca
40 if (!isa<LoadInst>(*UI))
41 if (const StoreInst *SI = dyn_cast<StoreInst>(*UI)) {
42 if (SI->getOperand(0) == AI)
43 return false; // Don't allow a store of the AI, only INTO the AI.
45 return false; // Not a load or store?
53 struct PromoteMem2Reg {
54 const std::vector<AllocaInst*> &Allocas; // the alloca instructions..
55 std::vector<unsigned> VersionNumbers; // Current version counters
56 DominanceFrontier &DF;
59 std::map<Instruction*, unsigned> AllocaLookup; // reverse mapping of above
61 std::vector<std::vector<BasicBlock*> > PhiNodes;// Idx corresponds 2 Allocas
63 // List of instructions to remove at end of pass
64 std::vector<Instruction *> KillList;
67 std::vector<PHINode*> > NewPhiNodes; // the PhiNodes we're adding
70 PromoteMem2Reg(const std::vector<AllocaInst*> &A, DominanceFrontier &df,
72 : Allocas(A), DF(df), TD(td) {}
77 void RenamePass(BasicBlock *BB, BasicBlock *Pred,
78 std::vector<Value*> &IncVals,
79 std::set<BasicBlock*> &Visited);
80 bool QueuePhiNode(BasicBlock *BB, unsigned AllocaIdx);
82 } // end of anonymous namespace
85 void PromoteMem2Reg::run() {
86 // If there is nothing to do, bail out...
87 if (Allocas.empty()) return;
89 Function &F = *DF.getRoot()->getParent();
90 VersionNumbers.resize(Allocas.size());
92 for (unsigned i = 0, e = Allocas.size(); i != e; ++i) {
93 assert(isAllocaPromotable(Allocas[i], TD) &&
94 "Cannot promote non-promotable alloca!");
95 assert(Allocas[i]->getParent()->getParent() == &F &&
96 "All allocas should be in the same function, which is same as DF!");
97 AllocaLookup[Allocas[i]] = i;
101 // Add each alloca to the KillList. Note: KillList is destroyed MOST recently
102 // added to least recently.
103 KillList.assign(Allocas.begin(), Allocas.end());
105 // Calculate the set of write-locations for each alloca. This is analogous to
106 // counting the number of 'redefinitions' of each variable.
107 std::vector<std::vector<BasicBlock*> > WriteSets;// Idx corresponds to Allocas
108 WriteSets.resize(Allocas.size());
109 for (unsigned i = 0; i != Allocas.size(); ++i) {
110 AllocaInst *AI = Allocas[i];
111 for (Value::use_iterator U =AI->use_begin(), E = AI->use_end(); U != E; ++U)
112 if (StoreInst *SI = dyn_cast<StoreInst>(*U))
113 // jot down the basic-block it came from
114 WriteSets[i].push_back(SI->getParent());
117 // Compute the locations where PhiNodes need to be inserted. Look at the
118 // dominance frontier of EACH basic-block we have a write in
120 PhiNodes.resize(Allocas.size());
121 for (unsigned i = 0; i != Allocas.size(); ++i) {
122 for (unsigned j = 0; j != WriteSets[i].size(); j++) {
123 // Look up the DF for this write, add it to PhiNodes
124 DominanceFrontier::const_iterator it = DF.find(WriteSets[i][j]);
125 if (it != DF.end()) {
126 const DominanceFrontier::DomSetType &S = it->second;
127 for (DominanceFrontier::DomSetType::iterator P = S.begin(),PE = S.end();
133 // Perform iterative step
134 for (unsigned k = 0; k != PhiNodes[i].size(); k++) {
135 DominanceFrontier::const_iterator it = DF.find(PhiNodes[i][k]);
136 if (it != DF.end()) {
137 const DominanceFrontier::DomSetType &S = it->second;
138 for (DominanceFrontier::DomSetType::iterator P = S.begin(),PE = S.end();
145 // Set the incoming values for the basic block to be null values for all of
146 // the alloca's. We do this in case there is a load of a value that has not
147 // been stored yet. In this case, it will get this null value.
149 std::vector<Value *> Values(Allocas.size());
150 for (unsigned i = 0, e = Allocas.size(); i != e; ++i)
151 Values[i] = Constant::getNullValue(Allocas[i]->getAllocatedType());
153 // Walks all basic blocks in the function performing the SSA rename algorithm
154 // and inserting the phi nodes we marked as necessary
156 std::set<BasicBlock*> Visited; // The basic blocks we've already visited
157 RenamePass(F.begin(), 0, Values, Visited);
159 // Remove all instructions marked by being placed in the KillList...
161 while (!KillList.empty()) {
162 Instruction *I = KillList.back();
165 // If there are any uses of these instructions left, they must be in
166 // sections of dead code that were not processed on the dominance frontier.
167 // Just delete the users now.
169 while (!I->use_empty()) {
170 Instruction *U = cast<Instruction>(I->use_back());
171 if (!U->use_empty()) // If uses remain in dead code segment...
172 U->replaceAllUsesWith(Constant::getNullValue(U->getType()));
173 U->getParent()->getInstList().erase(U);
176 I->getParent()->getInstList().erase(I);
181 // QueuePhiNode - queues a phi-node to be added to a basic-block for a specific
182 // Alloca returns true if there wasn't already a phi-node for that variable
184 bool PromoteMem2Reg::QueuePhiNode(BasicBlock *BB, unsigned AllocaNo) {
185 // Look up the basic-block in question
186 std::vector<PHINode*> &BBPNs = NewPhiNodes[BB];
187 if (BBPNs.empty()) BBPNs.resize(Allocas.size());
189 // If the BB already has a phi node added for the i'th alloca then we're done!
190 if (BBPNs[AllocaNo]) return false;
192 // Create a PhiNode using the dereferenced type... and add the phi-node to the
194 PHINode *PN = new PHINode(Allocas[AllocaNo]->getAllocatedType(),
195 Allocas[AllocaNo]->getName() + "." +
196 utostr(VersionNumbers[AllocaNo]++),
199 // Add null incoming values for all predecessors. This ensures that if one of
200 // the predecessors is not found in the depth-first traversal of the CFG (ie,
201 // because it is an unreachable predecessor), that all PHI nodes will have the
202 // correct number of entries for their predecessors.
203 Value *NullVal = Constant::getNullValue(PN->getType());
205 // This is neccesary because adding incoming values to the PHI node adds uses
206 // to the basic blocks being used, which can invalidate the predecessor
208 std::vector<BasicBlock*> Preds(pred_begin(BB), pred_end(BB));
209 for (unsigned i = 0, e = Preds.size(); i != e; ++i)
210 PN->addIncoming(NullVal, Preds[i]);
212 BBPNs[AllocaNo] = PN;
213 PhiNodes[AllocaNo].push_back(BB);
217 void PromoteMem2Reg::RenamePass(BasicBlock *BB, BasicBlock *Pred,
218 std::vector<Value*> &IncomingVals,
219 std::set<BasicBlock*> &Visited) {
220 // If this is a BB needing a phi node, lookup/create the phinode for each
221 // variable we need phinodes for.
222 std::vector<PHINode *> &BBPNs = NewPhiNodes[BB];
223 for (unsigned k = 0; k != BBPNs.size(); ++k)
224 if (PHINode *PN = BBPNs[k]) {
225 // The PHI node may have multiple entries for this predecessor. We must
226 // make sure we update all of them.
227 for (unsigned i = 0, e = PN->getNumOperands(); i != e; i += 2) {
228 if (PN->getOperand(i+1) == Pred)
229 // At this point we can assume that the array has phi nodes.. let's
230 // update the incoming data.
231 PN->setOperand(i, IncomingVals[k]);
233 // also note that the active variable IS designated by the phi node
234 IncomingVals[k] = PN;
237 // don't revisit nodes
238 if (Visited.count(BB)) return;
243 // keep track of the value of each variable we're watching.. how?
244 for (BasicBlock::iterator II = BB->begin(); II != BB->end(); ++II) {
245 Instruction *I = II; // get the instruction
247 if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
248 if (AllocaInst *Src = dyn_cast<AllocaInst>(LI->getPointerOperand())) {
249 std::map<Instruction*, unsigned>::iterator AI = AllocaLookup.find(Src);
250 if (AI != AllocaLookup.end()) {
251 Value *V = IncomingVals[AI->second];
253 // walk the use list of this load and replace all uses with r
254 LI->replaceAllUsesWith(V);
255 KillList.push_back(LI); // Mark the load to be deleted
258 } else if (StoreInst *SI = dyn_cast<StoreInst>(I)) {
259 // Delete this instruction and mark the name as the current holder of the
261 if (AllocaInst *Dest = dyn_cast<AllocaInst>(SI->getPointerOperand())) {
262 std::map<Instruction *, unsigned>::iterator ai =AllocaLookup.find(Dest);
263 if (ai != AllocaLookup.end()) {
264 // what value were we writing?
265 IncomingVals[ai->second] = SI->getOperand(0);
266 KillList.push_back(SI); // Mark the store to be deleted
270 } else if (TerminatorInst *TI = dyn_cast<TerminatorInst>(I)) {
271 // Recurse across our successors
272 for (unsigned i = 0; i != TI->getNumSuccessors(); i++) {
273 std::vector<Value*> OutgoingVals(IncomingVals);
274 RenamePass(TI->getSuccessor(i), BB, OutgoingVals, Visited);
280 /// PromoteMemToReg - Promote the specified list of alloca instructions into
281 /// scalar registers, inserting PHI nodes as appropriate. This function makes
282 /// use of DominanceFrontier information. This function does not modify the CFG
283 /// of the function at all. All allocas must be from the same function.
285 void PromoteMemToReg(const std::vector<AllocaInst*> &Allocas,
286 DominanceFrontier &DF, const TargetData &TD) {
287 PromoteMem2Reg(Allocas, DF, TD).run();