package/boot/uboot-layerscape/patches/0067-armv8-ls1012a-DDR-optmizations.patch

   1 From 8b6c309e5e55670f429730449d9921987636c8ec Mon Sep 17 00:00:00 2001
   2 From: Calvin Johnson <calvin.johnson@freescale.com>
   3 Date: Wed, 8 Jun 2016 17:04:58 +0530
   4 Subject: [PATCH 67/93] armv8: ls1012a: DDR optmizations
   5
   6 Enable DDR row-bank-column decoding. DDR address will
   7 be decoded as row-bank-column instead of bank-row-column.
   8 This will improve performance of serial data transfers.
   9
  10 Refresh cycle value must be selected based on the frequency
  11 of DDR. tREFI = 7.8 us as per JEDEC. The value for MDREF[REF_CNT]
  12 should be based on round up (tREFI/tCK) formula. For 500MHz, mdref
  13 value should be 0x0f3c8000.
  14
  15 Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
  16 ---
  17  board/freescale/ls1012afrdm/ls1012afrdm.c |    4 ++--
  18  board/freescale/ls1012aqds/ls1012aqds.c   |    4 ++--
  19  board/freescale/ls1012ardb/ls1012ardb.c   |    4 ++--
  20  3 files changed, 6 insertions(+), 6 deletions(-)
  21
  22 diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c b/board/freescale/ls1012afrdm/ls1012afrdm.c
  23 index c691a76..4b7902a 100644
  24 --- a/board/freescale/ls1012afrdm/ls1012afrdm.c
  25 +++ b/board/freescale/ls1012afrdm/ls1012afrdm.c
  26 @@ -59,7 +59,7 @@ void mmdc_init(void)
  27         out_be32(&mmdc->mdcfg2, 0x01ff00db);
  28
  29         /* other parms  */
  30 -       out_be32(&mmdc->mdmisc,    0x00000680);
  31 +       out_be32(&mmdc->mdmisc,    0x00001680);
  32         out_be32(&mmdc->mpmur0,    0x00000800);
  33         out_be32(&mmdc->mdrwd,     0x00002000);
  34         out_be32(&mmdc->mpodtctrl, 0x0000022a);
  35 @@ -118,7 +118,7 @@ void mmdc_init(void)
  36         out_be32(&mmdc->mapsr, 0x00001067);
  37
  38         /* refresh scheme */
  39 -       set_wait_for_bits_clear(&mmdc->mdref, 0x103e8000, 0x00000001);
  40 +       set_wait_for_bits_clear(&mmdc->mdref, 0x0f3c8000, 0x00000001);
  41
  42         /* disable CON_REQ */
  43         out_be32(&mmdc->mdscr, 0x0);
  44 diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c
  45 index 516f0c3..4ae8def 100644
  46 --- a/board/freescale/ls1012aqds/ls1012aqds.c
  47 +++ b/board/freescale/ls1012aqds/ls1012aqds.c
  48 @@ -82,7 +82,7 @@ void mmdc_init(void)
  49         out_be32(&mmdc->mdcfg2, 0x01ff00db);
  50
  51         /* other parms  */
  52 -       out_be32(&mmdc->mdmisc,    0x00000680);
  53 +       out_be32(&mmdc->mdmisc,    0x00001680);
  54         out_be32(&mmdc->mpmur0,    0x00000800);
  55         out_be32(&mmdc->mdrwd,     0x00002000);
  56         out_be32(&mmdc->mpodtctrl, 0x0000022a);
  57 @@ -142,7 +142,7 @@ void mmdc_init(void)
  58         out_be32(&mmdc->mapsr, 0x00001067);
  59
  60         /* refresh scheme */
  61 -       set_wait_for_bits_clear(&mmdc->mdref, 0x103e8000, 0x00000001);
  62 +       set_wait_for_bits_clear(&mmdc->mdref, 0x0f3c8000, 0x00000001);
  63
  64         /* disable CON_REQ */
  65         out_be32(&mmdc->mdscr, 0x0);
  66 diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
  67 index 7f7503c..06e1f6b 100644
  68 --- a/board/freescale/ls1012ardb/ls1012ardb.c
  69 +++ b/board/freescale/ls1012ardb/ls1012ardb.c
  70 @@ -88,7 +88,7 @@ void mmdc_init(void)
  71         out_be32(&mmdc->mdcfg2, 0x01ff00db);
  72
  73         /* other parms  */
  74 -       out_be32(&mmdc->mdmisc,    0x00000680);
  75 +       out_be32(&mmdc->mdmisc,    0x00001680);
  76         out_be32(&mmdc->mpmur0,    0x00000800);
  77         out_be32(&mmdc->mdrwd,     0x00002000);
  78         out_be32(&mmdc->mpodtctrl, 0x0000022a);
  79 @@ -148,7 +148,7 @@ void mmdc_init(void)
  80         out_be32(&mmdc->mapsr, 0x00001067);
  81
  82         /* refresh scheme */
  83 -       set_wait_for_bits_clear(&mmdc->mdref, 0x103e8000, 0x00000001);
  84 +       set_wait_for_bits_clear(&mmdc->mdref, 0x0f3c8000, 0x00000001);
  85
  86         /* disable CON_REQ */
  87         out_be32(&mmdc->mdscr, 0x0);
  88 --
  89 1.7.9.5
  90