1 ; RUN: llc < %s -march=ppc64le -mcpu=pwr8 -mattr=+altivec | FileCheck %s
3 target datalayout = "e-m:e-i64:64-n32:64"
4 target triple = "powerpc64le-unknown-linux-gnu"
7 ; Verify use of registers for float/vector aggregate return.
10 define [8 x float] @return_float([8 x float] %x) {
14 ; CHECK-LABEL: @return_float
18 define [8 x double] @return_double([8 x double] %x) {
22 ; CHECK-LABEL: @return_double
26 define [4 x ppc_fp128] @return_ppcf128([4 x ppc_fp128] %x) {
28 ret [4 x ppc_fp128] %x
30 ; CHECK-LABEL: @return_ppcf128
34 define [8 x <4 x i32>] @return_v4i32([8 x <4 x i32>] %x) {
36 ret [8 x <4 x i32>] %x
38 ; CHECK-LABEL: @return_v4i32
44 ; Verify amount of space taken up by aggregates in the parameter save area.
47 define i64 @callee_float([7 x float] %a, [7 x float] %b, i64 %c) {
51 ; CHECK-LABEL: @callee_float
55 define void @caller_float(i64 %x, [7 x float] %y) {
57 tail call void @test_float([7 x float] %y, [7 x float] %y, i64 %x)
60 ; CHECK-LABEL: @caller_float
62 ; CHECK: bl test_float
64 declare void @test_float([7 x float], [7 x float], i64)
66 define i64 @callee_double(i64 %a, [7 x double] %b, i64 %c) {
70 ; CHECK-LABEL: @callee_double
74 define void @caller_double(i64 %x, [7 x double] %y) {
76 tail call void @test_double(i64 %x, [7 x double] %y, i64 %x)
79 ; CHECK-LABEL: @caller_double
81 ; CHECK: bl test_double
83 declare void @test_double(i64, [7 x double], i64)
85 define i64 @callee_ppcf128(i64 %a, [4 x ppc_fp128] %b, i64 %c) {
89 ; CHECK-LABEL: @callee_ppcf128
93 define void @caller_ppcf128(i64 %x, [4 x ppc_fp128] %y) {
95 tail call void @test_ppcf128(i64 %x, [4 x ppc_fp128] %y, i64 %x)
98 ; CHECK-LABEL: @caller_ppcf128
99 ; CHECK: std 3, 104(1)
100 ; CHECK: bl test_ppcf128
102 declare void @test_ppcf128(i64, [4 x ppc_fp128], i64)
104 define i64 @callee_i64(i64 %a, [7 x i64] %b, i64 %c) {
108 ; CHECK-LABEL: @callee_i64
112 define void @caller_i64(i64 %x, [7 x i64] %y) {
114 tail call void @test_i64(i64 %x, [7 x i64] %y, i64 %x)
117 ; CHECK-LABEL: @caller_i64
118 ; CHECK: std 3, 96(1)
121 declare void @test_i64(i64, [7 x i64], i64)
123 define i64 @callee_i128(i64 %a, [4 x i128] %b, i64 %c) {
127 ; CHECK-LABEL: @callee_i128
128 ; CHECK: ld 3, 112(1)
131 define void @caller_i128(i64 %x, [4 x i128] %y) {
133 tail call void @test_i128(i64 %x, [4 x i128] %y, i64 %x)
136 ; CHECK-LABEL: @caller_i128
137 ; CHECK: std 3, 112(1)
138 ; CHECK: bl test_i128
140 declare void @test_i128(i64, [4 x i128], i64)
142 define i64 @callee_v4i32(i64 %a, [4 x <4 x i32>] %b, i64 %c) {
146 ; CHECK-LABEL: @callee_v4i32
147 ; CHECK: ld 3, 112(1)
150 define void @caller_v4i32(i64 %x, [4 x <4 x i32>] %y) {
152 tail call void @test_v4i32(i64 %x, [4 x <4 x i32>] %y, i64 %x)
155 ; CHECK-LABEL: @caller_v4i32
156 ; CHECK: std 3, 112(1)
157 ; CHECK: bl test_v4i32
159 declare void @test_v4i32(i64, [4 x <4 x i32>], i64)
163 ; Verify handling of floating point arguments in GPRs
166 %struct.float8 = type { [8 x float] }
167 %struct.float5 = type { [5 x float] }
168 %struct.float2 = type { [2 x float] }
170 @g8 = common global %struct.float8 zeroinitializer, align 4
171 @g5 = common global %struct.float5 zeroinitializer, align 4
172 @g2 = common global %struct.float2 zeroinitializer, align 4
174 define float @callee0([7 x float] %a, [7 x float] %b) {
176 %b.extract = extractvalue [7 x float] %b, 6
179 ; CHECK-LABEL: @callee0
180 ; CHECK: stw 10, [[OFF:.*]](1)
181 ; CHECK: lfs 1, [[OFF]](1)
184 define void @caller0([7 x float] %a) {
186 tail call void @test0([7 x float] %a, [7 x float] %a)
189 ; CHECK-LABEL: @caller0
190 ; CHECK-DAG: fmr 8, 1
191 ; CHECK-DAG: fmr 9, 2
192 ; CHECK-DAG: fmr 10, 3
193 ; CHECK-DAG: fmr 11, 4
194 ; CHECK-DAG: fmr 12, 5
195 ; CHECK-DAG: fmr 13, 6
196 ; CHECK-DAG: stfs 7, [[OFF:[0-9]+]](1)
197 ; CHECK-DAG: lwz 10, [[OFF]](1)
200 declare void @test0([7 x float], [7 x float])
202 define float @callee1([8 x float] %a, [8 x float] %b) {
204 %b.extract = extractvalue [8 x float] %b, 7
207 ; CHECK-LABEL: @callee1
208 ; CHECK: rldicl [[REG:[0-9]+]], 10, 32, 32
209 ; CHECK: stw [[REG]], [[OFF:.*]](1)
210 ; CHECK: lfs 1, [[OFF]](1)
213 define void @caller1([8 x float] %a) {
215 tail call void @test1([8 x float] %a, [8 x float] %a)
218 ; CHECK-LABEL: @caller1
219 ; CHECK-DAG: fmr 9, 1
220 ; CHECK-DAG: fmr 10, 2
221 ; CHECK-DAG: fmr 11, 3
222 ; CHECK-DAG: fmr 12, 4
223 ; CHECK-DAG: fmr 13, 5
224 ; CHECK-DAG: stfs 5, [[OFF0:[0-9]+]](1)
225 ; CHECK-DAG: stfs 6, [[OFF1:[0-9]+]](1)
226 ; CHECK-DAG: stfs 7, [[OFF2:[0-9]+]](1)
227 ; CHECK-DAG: stfs 8, [[OFF3:[0-9]+]](1)
228 ; CHECK-DAG: lwz [[REG0:[0-9]+]], [[OFF0]](1)
229 ; CHECK-DAG: lwz [[REG1:[0-9]+]], [[OFF1]](1)
230 ; CHECK-DAG: lwz [[REG2:[0-9]+]], [[OFF2]](1)
231 ; CHECK-DAG: lwz [[REG3:[0-9]+]], [[OFF3]](1)
232 ; CHECK-DAG: sldi [[REG1]], [[REG1]], 32
233 ; CHECK-DAG: sldi [[REG3]], [[REG3]], 32
234 ; CHECK-DAG: or 9, [[REG0]], [[REG1]]
235 ; CHECK-DAG: or 10, [[REG2]], [[REG3]]
238 declare void @test1([8 x float], [8 x float])
240 define float @callee2([8 x float] %a, [5 x float] %b, [2 x float] %c) {
242 %c.extract = extractvalue [2 x float] %c, 1
245 ; CHECK-LABEL: @callee2
246 ; CHECK: rldicl [[REG:[0-9]+]], 10, 32, 32
247 ; CHECK: stw [[REG]], [[OFF:.*]](1)
248 ; CHECK: lfs 1, [[OFF]](1)
251 define void @caller2() {
253 %0 = load [8 x float]* getelementptr inbounds (%struct.float8* @g8, i64 0, i32 0), align 4
254 %1 = load [5 x float]* getelementptr inbounds (%struct.float5* @g5, i64 0, i32 0), align 4
255 %2 = load [2 x float]* getelementptr inbounds (%struct.float2* @g2, i64 0, i32 0), align 4
256 tail call void @test2([8 x float] %0, [5 x float] %1, [2 x float] %2)
259 ; CHECK-LABEL: @caller2
260 ; CHECK: ld [[REG:[0-9]+]], .LC
261 ; CHECK-DAG: lfs 1, 0([[REG]])
262 ; CHECK-DAG: lfs 2, 4([[REG]])
263 ; CHECK-DAG: lfs 3, 8([[REG]])
264 ; CHECK-DAG: lfs 4, 12([[REG]])
265 ; CHECK-DAG: lfs 5, 16([[REG]])
266 ; CHECK-DAG: lfs 6, 20([[REG]])
267 ; CHECK-DAG: lfs 7, 24([[REG]])
268 ; CHECK-DAG: lfs 8, 28([[REG]])
269 ; CHECK: ld [[REG:[0-9]+]], .LC
270 ; CHECK-DAG: lfs 9, 0([[REG]])
271 ; CHECK-DAG: lfs 10, 4([[REG]])
272 ; CHECK-DAG: lfs 11, 8([[REG]])
273 ; CHECK-DAG: lfs 12, 12([[REG]])
274 ; CHECK-DAG: lfs 13, 16([[REG]])
275 ; CHECK: ld [[REG:[0-9]+]], .LC
276 ; CHECK-DAG: lwz [[REG0:[0-9]+]], 0([[REG]])
277 ; CHECK-DAG: lwz [[REG1:[0-9]+]], 4([[REG]])
278 ; CHECK-DAG: sldi [[REG1]], [[REG1]], 32
279 ; CHECK-DAG: or 10, [[REG0]], [[REG1]]
282 declare void @test2([8 x float], [5 x float], [2 x float])
284 define double @callee3([8 x float] %a, [5 x float] %b, double %c) {
288 ; CHECK-LABEL: @callee3
289 ; CHECK: std 10, [[OFF:.*]](1)
290 ; CHECK: lfd 1, [[OFF]](1)
293 define void @caller3(double %d) {
295 %0 = load [8 x float]* getelementptr inbounds (%struct.float8* @g8, i64 0, i32 0), align 4
296 %1 = load [5 x float]* getelementptr inbounds (%struct.float5* @g5, i64 0, i32 0), align 4
297 tail call void @test3([8 x float] %0, [5 x float] %1, double %d)
300 ; CHECK-LABEL: @caller3
301 ; CHECK: stfd 1, [[OFF:.*]](1)
302 ; CHECK: ld 10, [[OFF]](1)
305 declare void @test3([8 x float], [5 x float], double)
307 define float @callee4([8 x float] %a, [5 x float] %b, float %c) {
311 ; CHECK-LABEL: @callee4
312 ; CHECK: stw 10, [[OFF:.*]](1)
313 ; CHECK: lfs 1, [[OFF]](1)
316 define void @caller4(float %f) {
318 %0 = load [8 x float]* getelementptr inbounds (%struct.float8* @g8, i64 0, i32 0), align 4
319 %1 = load [5 x float]* getelementptr inbounds (%struct.float5* @g5, i64 0, i32 0), align 4
320 tail call void @test4([8 x float] %0, [5 x float] %1, float %f)
323 ; CHECK-LABEL: @caller4
324 ; CHECK: stfs 1, [[OFF:.*]](1)
325 ; CHECK: lwz 10, [[OFF]](1)
328 declare void @test4([8 x float], [5 x float], float)