2 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
4 * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Documentation: ARM DDI 0173B
12 #include <linux/module.h>
13 #include <linux/delay.h>
14 #include <linux/init.h>
15 #include <linux/ioport.h>
16 #include <linux/device.h>
17 #include <linux/spinlock.h>
18 #include <linux/interrupt.h>
19 #include <linux/err.h>
20 #include <linux/amba/bus.h>
23 #include <sound/core.h>
24 #include <sound/initval.h>
25 #include <sound/ac97_codec.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
31 #define DRIVER_NAME "aaci-pl041"
34 * PM support is not complete. Turn it off.
38 static void aaci_ac97_select_codec(struct aaci *aaci, struct snd_ac97 *ac97)
40 u32 v, maincr = aaci->maincr | MAINCR_SCRA(ac97->num);
43 * Ensure that the slot 1/2 RX registers are empty.
45 v = readl(aaci->base + AACI_SLFR);
47 readl(aaci->base + AACI_SL2RX);
49 readl(aaci->base + AACI_SL1RX);
51 writel(maincr, aaci->base + AACI_MAINCR);
56 * The recommended use of programming the external codec through slot 1
57 * and slot 2 data is to use the channels during setup routines and the
58 * slot register at any other time. The data written into slot 1, slot 2
59 * and slot 12 registers is transmitted only when their corresponding
60 * SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR
63 static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
66 struct aaci *aaci = ac97->private_data;
73 mutex_lock(&aaci->ac97_sem);
75 aaci_ac97_select_codec(aaci, ac97);
78 * P54: You must ensure that AACI_SL2TX is always written
79 * to, if required, before data is written to AACI_SL1TX.
81 writel(val << 4, aaci->base + AACI_SL2TX);
82 writel(reg << 12, aaci->base + AACI_SL1TX);
85 * Wait for the transmission of both slots to complete.
88 v = readl(aaci->base + AACI_SLFR);
89 } while ((v & (SLFR_1TXB|SLFR_2TXB)) && --timeout);
92 dev_err(&aaci->dev->dev,
93 "timeout waiting for write to complete\n");
95 mutex_unlock(&aaci->ac97_sem);
99 * Read an AC'97 register.
101 static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
103 struct aaci *aaci = ac97->private_data;
111 mutex_lock(&aaci->ac97_sem);
113 aaci_ac97_select_codec(aaci, ac97);
116 * Write the register address to slot 1.
118 writel((reg << 12) | (1 << 19), aaci->base + AACI_SL1TX);
121 * Wait for the transmission to complete.
124 v = readl(aaci->base + AACI_SLFR);
125 } while ((v & SLFR_1TXB) && --timeout);
128 dev_err(&aaci->dev->dev, "timeout on slot 1 TX busy\n");
134 * Give the AC'97 codec more than enough time
135 * to respond. (42us = ~2 frames at 48kHz.)
140 * Wait for slot 2 to indicate data.
145 v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV);
146 } while ((v != (SLFR_1RXV|SLFR_2RXV)) && --timeout);
149 dev_err(&aaci->dev->dev, "timeout on RX valid\n");
155 v = readl(aaci->base + AACI_SL1RX) >> 12;
157 v = readl(aaci->base + AACI_SL2RX) >> 4;
159 } else if (--retries) {
160 dev_warn(&aaci->dev->dev,
161 "ac97 read back fail. retry\n");
164 dev_warn(&aaci->dev->dev,
165 "wrong ac97 register read back (%x != %x)\n",
171 mutex_unlock(&aaci->ac97_sem);
175 static inline void aaci_chan_wait_ready(struct aaci_runtime *aacirun)
181 val = readl(aacirun->base + AACI_SR);
182 } while (val & (SR_TXB|SR_RXB) && timeout--);
190 static void aaci_fifo_irq(struct aaci *aaci, int channel, u32 mask)
192 if (mask & ISR_ORINTR) {
193 dev_warn(&aaci->dev->dev, "RX overrun on chan %d\n", channel);
194 writel(ICLR_RXOEC1 << channel, aaci->base + AACI_INTCLR);
197 if (mask & ISR_RXTOINTR) {
198 dev_warn(&aaci->dev->dev, "RX timeout on chan %d\n", channel);
199 writel(ICLR_RXTOFEC1 << channel, aaci->base + AACI_INTCLR);
202 if (mask & ISR_RXINTR) {
203 struct aaci_runtime *aacirun = &aaci->capture;
206 if (!aacirun->substream || !aacirun->start) {
207 dev_warn(&aaci->dev->dev, "RX interrupt???\n");
208 writel(0, aacirun->base + AACI_IE);
214 unsigned int len = aacirun->fifosz;
217 if (aacirun->bytes <= 0) {
218 aacirun->bytes += aacirun->period;
220 spin_unlock(&aaci->lock);
221 snd_pcm_period_elapsed(aacirun->substream);
222 spin_lock(&aaci->lock);
224 if (!(aacirun->cr & CR_EN))
227 val = readl(aacirun->base + AACI_SR);
228 if (!(val & SR_RXHF))
230 if (!(val & SR_RXFF))
233 aacirun->bytes -= len;
235 /* reading 16 bytes at a time */
236 for( ; len > 0; len -= 16) {
238 "ldmia %1, {r0, r1, r2, r3}\n\t"
239 "stmia %0!, {r0, r1, r2, r3}"
241 : "r" (aacirun->fifo)
242 : "r0", "r1", "r2", "r3", "cc");
244 if (ptr >= aacirun->end)
245 ptr = aacirun->start;
251 if (mask & ISR_URINTR) {
252 dev_dbg(&aaci->dev->dev, "TX underrun on chan %d\n", channel);
253 writel(ICLR_TXUEC1 << channel, aaci->base + AACI_INTCLR);
256 if (mask & ISR_TXINTR) {
257 struct aaci_runtime *aacirun = &aaci->playback;
260 if (!aacirun->substream || !aacirun->start) {
261 dev_warn(&aaci->dev->dev, "TX interrupt???\n");
262 writel(0, aacirun->base + AACI_IE);
268 unsigned int len = aacirun->fifosz;
271 if (aacirun->bytes <= 0) {
272 aacirun->bytes += aacirun->period;
274 spin_unlock(&aaci->lock);
275 snd_pcm_period_elapsed(aacirun->substream);
276 spin_lock(&aaci->lock);
278 if (!(aacirun->cr & CR_EN))
281 val = readl(aacirun->base + AACI_SR);
282 if (!(val & SR_TXHE))
284 if (!(val & SR_TXFE))
287 aacirun->bytes -= len;
289 /* writing 16 bytes at a time */
290 for ( ; len > 0; len -= 16) {
292 "ldmia %0!, {r0, r1, r2, r3}\n\t"
293 "stmia %1, {r0, r1, r2, r3}"
295 : "r" (aacirun->fifo)
296 : "r0", "r1", "r2", "r3", "cc");
298 if (ptr >= aacirun->end)
299 ptr = aacirun->start;
307 static irqreturn_t aaci_irq(int irq, void *devid)
309 struct aaci *aaci = devid;
313 spin_lock(&aaci->lock);
314 mask = readl(aaci->base + AACI_ALLINTS);
317 for (i = 0; i < 4; i++, m >>= 7) {
319 aaci_fifo_irq(aaci, i, m);
323 spin_unlock(&aaci->lock);
325 return mask ? IRQ_HANDLED : IRQ_NONE;
333 static struct snd_pcm_hardware aaci_hw_info = {
334 .info = SNDRV_PCM_INFO_MMAP |
335 SNDRV_PCM_INFO_MMAP_VALID |
336 SNDRV_PCM_INFO_INTERLEAVED |
337 SNDRV_PCM_INFO_BLOCK_TRANSFER |
338 SNDRV_PCM_INFO_RESUME,
341 * ALSA doesn't support 18-bit or 20-bit packed into 32-bit
342 * words. It also doesn't support 12-bit at all.
344 .formats = SNDRV_PCM_FMTBIT_S16_LE,
346 /* rates are setup from the AC'97 codec */
349 .buffer_bytes_max = 64 * 1024,
350 .period_bytes_min = 256,
351 .period_bytes_max = PAGE_SIZE,
353 .periods_max = PAGE_SIZE / 16,
356 static int __aaci_pcm_open(struct aaci *aaci,
357 struct snd_pcm_substream *substream,
358 struct aaci_runtime *aacirun)
360 struct snd_pcm_runtime *runtime = substream->runtime;
363 aacirun->substream = substream;
364 runtime->private_data = aacirun;
365 runtime->hw = aaci_hw_info;
366 runtime->hw.rates = aacirun->pcm->rates;
367 snd_pcm_limit_hw_rates(runtime);
370 * FIXME: ALSA specifies fifo_size in bytes. If we're in normal
371 * mode, each 32-bit word contains one sample. If we're in
372 * compact mode, each 32-bit word contains two samples, effectively
373 * halving the FIFO size. However, we don't know for sure which
374 * we'll be using at this point. We set this to the lower limit.
376 runtime->hw.fifo_size = aaci->fifosize * 2;
378 ret = request_irq(aaci->dev->irq[0], aaci_irq, IRQF_SHARED|IRQF_DISABLED,
393 static int aaci_pcm_close(struct snd_pcm_substream *substream)
395 struct aaci *aaci = substream->private_data;
396 struct aaci_runtime *aacirun = substream->runtime->private_data;
398 WARN_ON(aacirun->cr & CR_EN);
400 aacirun->substream = NULL;
401 free_irq(aaci->dev->irq[0], aaci);
406 static int aaci_pcm_hw_free(struct snd_pcm_substream *substream)
408 struct aaci_runtime *aacirun = substream->runtime->private_data;
411 * This must not be called with the device enabled.
413 WARN_ON(aacirun->cr & CR_EN);
415 if (aacirun->pcm_open)
416 snd_ac97_pcm_close(aacirun->pcm);
417 aacirun->pcm_open = 0;
420 * Clear out the DMA and any allocated buffers.
422 snd_pcm_lib_free_pages(substream);
427 static int aaci_pcm_hw_params(struct snd_pcm_substream *substream,
428 struct aaci_runtime *aacirun,
429 struct snd_pcm_hw_params *params)
433 aaci_pcm_hw_free(substream);
434 if (aacirun->pcm_open) {
435 snd_ac97_pcm_close(aacirun->pcm);
436 aacirun->pcm_open = 0;
439 err = snd_pcm_lib_malloc_pages(substream,
440 params_buffer_bytes(params));
442 err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params),
443 params_channels(params),
444 aacirun->pcm->r[0].slots);
446 aacirun->pcm_open = err == 0;
447 aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
448 aacirun->fifosz = aaci->fifosize * 4;
450 if (aacirun->cr & CR_COMPACT)
451 aacirun->fifosz >>= 1;
457 static int aaci_pcm_prepare(struct snd_pcm_substream *substream)
459 struct snd_pcm_runtime *runtime = substream->runtime;
460 struct aaci_runtime *aacirun = runtime->private_data;
462 aacirun->start = runtime->dma_area;
463 aacirun->end = aacirun->start + snd_pcm_lib_buffer_bytes(substream);
464 aacirun->ptr = aacirun->start;
466 aacirun->bytes = frames_to_bytes(runtime, runtime->period_size);
471 static snd_pcm_uframes_t aaci_pcm_pointer(struct snd_pcm_substream *substream)
473 struct snd_pcm_runtime *runtime = substream->runtime;
474 struct aaci_runtime *aacirun = runtime->private_data;
475 ssize_t bytes = aacirun->ptr - aacirun->start;
477 return bytes_to_frames(runtime, bytes);
482 * Playback specific ALSA stuff
484 static const u32 channels_to_txmask[] = {
485 [2] = CR_SL3 | CR_SL4,
486 [4] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8,
487 [6] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8 | CR_SL6 | CR_SL9,
491 * We can support two and four channel audio. Unfortunately
492 * six channel audio requires a non-standard channel ordering:
494 * 4 -> FL(3), FR(4), SL(7), SR(8)
495 * 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required)
496 * FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual)
497 * This requires an ALSA configuration file to correct.
499 static unsigned int channel_list[] = { 2, 4, 6 };
502 aaci_rule_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
504 struct aaci *aaci = rule->private;
505 unsigned int chan_mask = 1 << 0, slots;
508 * pcms[0] is the our 5.1 PCM instance.
510 slots = aaci->ac97_bus->pcms[0].r[0].slots;
511 if (slots & (1 << AC97_SLOT_PCM_SLEFT)) {
513 if (slots & (1 << AC97_SLOT_LFE))
517 return snd_interval_list(hw_param_interval(p, rule->var),
518 ARRAY_SIZE(channel_list), channel_list,
522 static int aaci_pcm_open(struct snd_pcm_substream *substream)
524 struct aaci *aaci = substream->private_data;
528 * Add rule describing channel dependency.
530 ret = snd_pcm_hw_rule_add(substream->runtime, 0,
531 SNDRV_PCM_HW_PARAM_CHANNELS,
532 aaci_rule_channels, aaci,
533 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
537 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
538 ret = __aaci_pcm_open(aaci, substream, &aaci->playback);
540 ret = __aaci_pcm_open(aaci, substream, &aaci->capture);
545 static int aaci_pcm_playback_hw_params(struct snd_pcm_substream *substream,
546 struct snd_pcm_hw_params *params)
548 struct aaci *aaci = substream->private_data;
549 struct aaci_runtime *aacirun = substream->runtime->private_data;
550 unsigned int channels = params_channels(params);
553 WARN_ON(channels >= ARRAY_SIZE(channels_to_txmask) ||
554 !channels_to_txmask[channels]);
556 ret = aaci_pcm_hw_params(substream, aacirun, params);
559 * Enable FIFO, compact mode, 16 bits per sample.
560 * FIXME: double rate slots?
563 aacirun->cr |= channels_to_txmask[channels];
568 static void aaci_pcm_playback_stop(struct aaci_runtime *aacirun)
572 ie = readl(aacirun->base + AACI_IE);
573 ie &= ~(IE_URIE|IE_TXIE);
574 writel(ie, aacirun->base + AACI_IE);
575 aacirun->cr &= ~CR_EN;
576 aaci_chan_wait_ready(aacirun);
577 writel(aacirun->cr, aacirun->base + AACI_TXCR);
580 static void aaci_pcm_playback_start(struct aaci_runtime *aacirun)
584 aaci_chan_wait_ready(aacirun);
585 aacirun->cr |= CR_EN;
587 ie = readl(aacirun->base + AACI_IE);
588 ie |= IE_URIE | IE_TXIE;
589 writel(ie, aacirun->base + AACI_IE);
590 writel(aacirun->cr, aacirun->base + AACI_TXCR);
593 static int aaci_pcm_playback_trigger(struct snd_pcm_substream *substream, int cmd)
595 struct aaci *aaci = substream->private_data;
596 struct aaci_runtime *aacirun = substream->runtime->private_data;
600 spin_lock_irqsave(&aaci->lock, flags);
602 case SNDRV_PCM_TRIGGER_START:
603 aaci_pcm_playback_start(aacirun);
606 case SNDRV_PCM_TRIGGER_RESUME:
607 aaci_pcm_playback_start(aacirun);
610 case SNDRV_PCM_TRIGGER_STOP:
611 aaci_pcm_playback_stop(aacirun);
614 case SNDRV_PCM_TRIGGER_SUSPEND:
615 aaci_pcm_playback_stop(aacirun);
618 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
621 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
627 spin_unlock_irqrestore(&aaci->lock, flags);
632 static struct snd_pcm_ops aaci_playback_ops = {
633 .open = aaci_pcm_open,
634 .close = aaci_pcm_close,
635 .ioctl = snd_pcm_lib_ioctl,
636 .hw_params = aaci_pcm_playback_hw_params,
637 .hw_free = aaci_pcm_hw_free,
638 .prepare = aaci_pcm_prepare,
639 .trigger = aaci_pcm_playback_trigger,
640 .pointer = aaci_pcm_pointer,
643 static int aaci_pcm_capture_hw_params(struct snd_pcm_substream *substream,
644 struct snd_pcm_hw_params *params)
646 struct aaci *aaci = substream->private_data;
647 struct aaci_runtime *aacirun = substream->runtime->private_data;
650 ret = aaci_pcm_hw_params(substream, aacirun, params);
652 /* Line in record: slot 3 and 4 */
653 aacirun->cr |= CR_SL3 | CR_SL4;
658 static void aaci_pcm_capture_stop(struct aaci_runtime *aacirun)
662 aaci_chan_wait_ready(aacirun);
664 ie = readl(aacirun->base + AACI_IE);
665 ie &= ~(IE_ORIE | IE_RXIE);
666 writel(ie, aacirun->base+AACI_IE);
668 aacirun->cr &= ~CR_EN;
670 writel(aacirun->cr, aacirun->base + AACI_RXCR);
673 static void aaci_pcm_capture_start(struct aaci_runtime *aacirun)
677 aaci_chan_wait_ready(aacirun);
680 /* RX Timeout value: bits 28:17 in RXCR */
681 aacirun->cr |= 0xf << 17;
684 aacirun->cr |= CR_EN;
685 writel(aacirun->cr, aacirun->base + AACI_RXCR);
687 ie = readl(aacirun->base + AACI_IE);
688 ie |= IE_ORIE |IE_RXIE; // overrun and rx interrupt -- half full
689 writel(ie, aacirun->base + AACI_IE);
692 static int aaci_pcm_capture_trigger(struct snd_pcm_substream *substream, int cmd)
694 struct aaci *aaci = substream->private_data;
695 struct aaci_runtime *aacirun = substream->runtime->private_data;
699 spin_lock_irqsave(&aaci->lock, flags);
702 case SNDRV_PCM_TRIGGER_START:
703 aaci_pcm_capture_start(aacirun);
706 case SNDRV_PCM_TRIGGER_RESUME:
707 aaci_pcm_capture_start(aacirun);
710 case SNDRV_PCM_TRIGGER_STOP:
711 aaci_pcm_capture_stop(aacirun);
714 case SNDRV_PCM_TRIGGER_SUSPEND:
715 aaci_pcm_capture_stop(aacirun);
718 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
721 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
728 spin_unlock_irqrestore(&aaci->lock, flags);
733 static int aaci_pcm_capture_prepare(struct snd_pcm_substream *substream)
735 struct snd_pcm_runtime *runtime = substream->runtime;
736 struct aaci *aaci = substream->private_data;
738 aaci_pcm_prepare(substream);
740 /* allow changing of sample rate */
741 aaci_ac97_write(aaci->ac97, AC97_EXTENDED_STATUS, 0x0001); /* VRA */
742 aaci_ac97_write(aaci->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
743 aaci_ac97_write(aaci->ac97, AC97_PCM_MIC_ADC_RATE, runtime->rate);
745 /* Record select: Mic: 0, Aux: 3, Line: 4 */
746 aaci_ac97_write(aaci->ac97, AC97_REC_SEL, 0x0404);
751 static struct snd_pcm_ops aaci_capture_ops = {
752 .open = aaci_pcm_open,
753 .close = aaci_pcm_close,
754 .ioctl = snd_pcm_lib_ioctl,
755 .hw_params = aaci_pcm_capture_hw_params,
756 .hw_free = aaci_pcm_hw_free,
757 .prepare = aaci_pcm_capture_prepare,
758 .trigger = aaci_pcm_capture_trigger,
759 .pointer = aaci_pcm_pointer,
766 static int aaci_do_suspend(struct snd_card *card, unsigned int state)
768 struct aaci *aaci = card->private_data;
769 snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
770 snd_pcm_suspend_all(aaci->pcm);
774 static int aaci_do_resume(struct snd_card *card, unsigned int state)
776 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
780 static int aaci_suspend(struct amba_device *dev, pm_message_t state)
782 struct snd_card *card = amba_get_drvdata(dev);
783 return card ? aaci_do_suspend(card) : 0;
786 static int aaci_resume(struct amba_device *dev)
788 struct snd_card *card = amba_get_drvdata(dev);
789 return card ? aaci_do_resume(card) : 0;
792 #define aaci_do_suspend NULL
793 #define aaci_do_resume NULL
794 #define aaci_suspend NULL
795 #define aaci_resume NULL
799 static struct ac97_pcm ac97_defs[] __devinitdata = {
800 [0] = { /* Front PCM */
804 .slots = (1 << AC97_SLOT_PCM_LEFT) |
805 (1 << AC97_SLOT_PCM_RIGHT) |
806 (1 << AC97_SLOT_PCM_CENTER) |
807 (1 << AC97_SLOT_PCM_SLEFT) |
808 (1 << AC97_SLOT_PCM_SRIGHT) |
809 (1 << AC97_SLOT_LFE),
818 .slots = (1 << AC97_SLOT_PCM_LEFT) |
819 (1 << AC97_SLOT_PCM_RIGHT),
828 .slots = (1 << AC97_SLOT_MIC),
834 static struct snd_ac97_bus_ops aaci_bus_ops = {
835 .write = aaci_ac97_write,
836 .read = aaci_ac97_read,
839 static int __devinit aaci_probe_ac97(struct aaci *aaci)
841 struct snd_ac97_template ac97_template;
842 struct snd_ac97_bus *ac97_bus;
843 struct snd_ac97 *ac97;
846 writel(0, aaci->base + AC97_POWERDOWN);
848 * Assert AACIRESET for 2us
850 writel(0, aaci->base + AACI_RESET);
852 writel(RESET_NRST, aaci->base + AACI_RESET);
855 * Give the AC'97 codec more than enough time
856 * to wake up. (42us = ~2 frames at 48kHz.)
860 ret = snd_ac97_bus(aaci->card, 0, &aaci_bus_ops, aaci, &ac97_bus);
864 ac97_bus->clock = 48000;
865 aaci->ac97_bus = ac97_bus;
867 memset(&ac97_template, 0, sizeof(struct snd_ac97_template));
868 ac97_template.private_data = aaci;
869 ac97_template.num = 0;
870 ac97_template.scaps = AC97_SCAP_SKIP_MODEM;
872 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &ac97);
878 * Disable AC97 PC Beep input on audio codecs.
880 if (ac97_is_audio(ac97))
881 snd_ac97_write_cache(ac97, AC97_PC_BEEP, 0x801e);
883 ret = snd_ac97_pcm_assign(ac97_bus, ARRAY_SIZE(ac97_defs), ac97_defs);
887 aaci->playback.pcm = &ac97_bus->pcms[0];
888 aaci->capture.pcm = &ac97_bus->pcms[1];
894 static void aaci_free_card(struct snd_card *card)
896 struct aaci *aaci = card->private_data;
901 static struct aaci * __devinit aaci_init_card(struct amba_device *dev)
904 struct snd_card *card;
907 err = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
908 THIS_MODULE, sizeof(struct aaci), &card);
912 card->private_free = aaci_free_card;
914 strlcpy(card->driver, DRIVER_NAME, sizeof(card->driver));
915 strlcpy(card->shortname, "ARM AC'97 Interface", sizeof(card->shortname));
916 snprintf(card->longname, sizeof(card->longname),
917 "%s at 0x%016llx, irq %d",
918 card->shortname, (unsigned long long)dev->res.start,
921 aaci = card->private_data;
922 mutex_init(&aaci->ac97_sem);
923 spin_lock_init(&aaci->lock);
927 /* Set MAINCR to allow slot 1 and 2 data IO */
928 aaci->maincr = MAINCR_IE | MAINCR_SL1RXEN | MAINCR_SL1TXEN |
929 MAINCR_SL2RXEN | MAINCR_SL2TXEN;
934 static int __devinit aaci_init_pcm(struct aaci *aaci)
939 ret = snd_pcm_new(aaci->card, "AACI AC'97", 0, 1, 1, &pcm);
942 pcm->private_data = aaci;
945 strlcpy(pcm->name, DRIVER_NAME, sizeof(pcm->name));
947 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &aaci_playback_ops);
948 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &aaci_capture_ops);
949 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
956 static unsigned int __devinit aaci_size_fifo(struct aaci *aaci)
958 struct aaci_runtime *aacirun = &aaci->playback;
961 writel(CR_FEN | CR_SZ16 | CR_EN, aacirun->base + AACI_TXCR);
963 for (i = 0; !(readl(aacirun->base + AACI_SR) & SR_TXFF) && i < 4096; i++)
964 writel(0, aacirun->fifo);
966 writel(0, aacirun->base + AACI_TXCR);
969 * Re-initialise the AACI after the FIFO depth test, to
970 * ensure that the FIFOs are empty. Unfortunately, merely
971 * disabling the channel doesn't clear the FIFO.
973 writel(aaci->maincr & ~MAINCR_IE, aaci->base + AACI_MAINCR);
974 writel(aaci->maincr, aaci->base + AACI_MAINCR);
977 * If we hit 4096, we failed. Go back to the specified
986 static int __devinit aaci_probe(struct amba_device *dev, struct amba_id *id)
991 ret = amba_request_regions(dev, NULL);
995 aaci = aaci_init_card(dev);
1001 aaci->base = ioremap(dev->res.start, resource_size(&dev->res));
1008 * Playback uses AACI channel 0
1010 aaci->playback.base = aaci->base + AACI_CSCH1;
1011 aaci->playback.fifo = aaci->base + AACI_DR1;
1014 * Capture uses AACI channel 0
1016 aaci->capture.base = aaci->base + AACI_CSCH1;
1017 aaci->capture.fifo = aaci->base + AACI_DR1;
1019 for (i = 0; i < 4; i++) {
1020 void __iomem *base = aaci->base + i * 0x14;
1022 writel(0, base + AACI_IE);
1023 writel(0, base + AACI_TXCR);
1024 writel(0, base + AACI_RXCR);
1027 writel(0x1fff, aaci->base + AACI_INTCLR);
1028 writel(aaci->maincr, aaci->base + AACI_MAINCR);
1030 ret = aaci_probe_ac97(aaci);
1035 * Size the FIFOs (must be multiple of 16).
1037 aaci->fifosize = aaci_size_fifo(aaci);
1038 if (aaci->fifosize & 15) {
1039 printk(KERN_WARNING "AACI: fifosize = %d not supported\n",
1045 ret = aaci_init_pcm(aaci);
1049 snd_card_set_dev(aaci->card, &dev->dev);
1051 ret = snd_card_register(aaci->card);
1053 dev_info(&dev->dev, "%s, fifo %d\n", aaci->card->longname,
1055 amba_set_drvdata(dev, aaci->card);
1061 snd_card_free(aaci->card);
1062 amba_release_regions(dev);
1066 static int __devexit aaci_remove(struct amba_device *dev)
1068 struct snd_card *card = amba_get_drvdata(dev);
1070 amba_set_drvdata(dev, NULL);
1073 struct aaci *aaci = card->private_data;
1074 writel(0, aaci->base + AACI_MAINCR);
1076 snd_card_free(card);
1077 amba_release_regions(dev);
1083 static struct amba_id aaci_ids[] = {
1091 static struct amba_driver aaci_driver = {
1093 .name = DRIVER_NAME,
1095 .probe = aaci_probe,
1096 .remove = __devexit_p(aaci_remove),
1097 .suspend = aaci_suspend,
1098 .resume = aaci_resume,
1099 .id_table = aaci_ids,
1102 static int __init aaci_init(void)
1104 return amba_driver_register(&aaci_driver);
1107 static void __exit aaci_exit(void)
1109 amba_driver_unregister(&aaci_driver);
1112 module_init(aaci_init);
1113 module_exit(aaci_exit);
1115 MODULE_LICENSE("GPL");
1116 MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver");