sound/firewire/dice.c

   1 /*
   2  * TC Applied Technologies Digital Interface Communications Engine driver
   3  *
   4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
   5  * Licensed under the terms of the GNU General Public License, version 2.
   6  */
   7
   8 #include <linux/compat.h>
   9 #include <linux/completion.h>
  10 #include <linux/delay.h>
  11 #include <linux/device.h>
  12 #include <linux/firewire.h>
  13 #include <linux/firewire-constants.h>
  14 #include <linux/jiffies.h>
  15 #include <linux/module.h>
  16 #include <linux/mod_devicetable.h>
  17 #include <linux/mutex.h>
  18 #include <linux/slab.h>
  19 #include <linux/spinlock.h>
  20 #include <linux/wait.h>
  21 #include <sound/control.h>
  22 #include <sound/core.h>
  23 #include <sound/firewire.h>
  24 #include <sound/hwdep.h>
  25 #include <sound/info.h>
  26 #include <sound/initval.h>
  27 #include <sound/pcm.h>
  28 #include <sound/pcm_params.h>
  29 #include "amdtp.h"
  30 #include "iso-resources.h"
  31 #include "lib.h"
  32 #include "dice-interface.h"
  33
  34
  35 struct dice {
  36         struct snd_card *card;
  37         struct fw_unit *unit;
  38         spinlock_t lock;
  39         struct mutex mutex;
  40         unsigned int global_offset;
  41         unsigned int rx_offset;
  42         unsigned int clock_caps;
  43         unsigned int rx_channels[3];
  44         unsigned int rx_midi_ports[3];
  45         struct fw_address_handler notification_handler;
  46         int owner_generation;
  47         int dev_lock_count; /* > 0 driver, < 0 userspace */
  48         bool dev_lock_changed;
  49         bool global_enabled;
  50         struct completion clock_accepted;
  51         wait_queue_head_t hwdep_wait;
  52         u32 notification_bits;
  53         struct fw_iso_resources resources;
  54         struct amdtp_stream stream;
  55 };
  56
  57 MODULE_DESCRIPTION("DICE driver");
  58 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
  59 MODULE_LICENSE("GPL v2");
  60
  61 static const unsigned int dice_rates[] = {
  62         /* mode 0 */
  63         [0] =  32000,
  64         [1] =  44100,
  65         [2] =  48000,
  66         /* mode 1 */
  67         [3] =  88200,
  68         [4] =  96000,
  69         /* mode 2 */
  70         [5] = 176400,
  71         [6] = 192000,
  72 };
  73
  74 static unsigned int rate_to_index(unsigned int rate)
  75 {
  76         unsigned int i;
  77
  78         for (i = 0; i < ARRAY_SIZE(dice_rates); ++i)
  79                 if (dice_rates[i] == rate)
  80                         return i;
  81
  82         return 0;
  83 }
  84
  85 static unsigned int rate_index_to_mode(unsigned int rate_index)
  86 {
  87         return ((int)rate_index - 1) / 2;
  88 }
  89
  90 static void dice_lock_changed(struct dice *dice)
  91 {
  92         dice->dev_lock_changed = true;
  93         wake_up(&dice->hwdep_wait);
  94 }
  95
  96 static int dice_try_lock(struct dice *dice)
  97 {
  98         int err;
  99
 100         spin_lock_irq(&dice->lock);
 101
 102         if (dice->dev_lock_count < 0) {
 103                 err = -EBUSY;
 104                 goto out;
 105         }
 106
 107         if (dice->dev_lock_count++ == 0)
 108                 dice_lock_changed(dice);
 109         err = 0;
 110
 111 out:
 112         spin_unlock_irq(&dice->lock);
 113
 114         return err;
 115 }
 116
 117 static void dice_unlock(struct dice *dice)
 118 {
 119         spin_lock_irq(&dice->lock);
 120
 121         if (WARN_ON(dice->dev_lock_count <= 0))
 122                 goto out;
 123
 124         if (--dice->dev_lock_count == 0)
 125                 dice_lock_changed(dice);
 126
 127 out:
 128         spin_unlock_irq(&dice->lock);
 129 }
 130
 131 static inline u64 global_address(struct dice *dice, unsigned int offset)
 132 {
 133         return DICE_PRIVATE_SPACE + dice->global_offset + offset;
 134 }
 135
 136 // TODO: rx index
 137 static inline u64 rx_address(struct dice *dice, unsigned int offset)
 138 {
 139         return DICE_PRIVATE_SPACE + dice->rx_offset + offset;
 140 }
 141
 142 static int dice_owner_set(struct dice *dice)
 143 {
 144         struct fw_device *device = fw_parent_device(dice->unit);
 145         __be64 *buffer;
 146         int err, errors = 0;
 147
 148         buffer = kmalloc(2 * 8, GFP_KERNEL);
 149         if (!buffer)
 150                 return -ENOMEM;
 151
 152         for (;;) {
 153                 buffer[0] = cpu_to_be64(OWNER_NO_OWNER);
 154                 buffer[1] = cpu_to_be64(
 155                         ((u64)device->card->node_id << OWNER_NODE_SHIFT) |
 156                         dice->notification_handler.offset);
 157
 158                 dice->owner_generation = device->generation;
 159                 smp_rmb(); /* node_id vs. generation */
 160                 err = snd_fw_transaction(dice->unit,
 161                                          TCODE_LOCK_COMPARE_SWAP,
 162                                          global_address(dice, GLOBAL_OWNER),
 163                                          buffer, 2 * 8,
 164                                          FW_FIXED_GENERATION |
 165                                                         dice->owner_generation);
 166
 167                 if (err == 0) {
 168                         if (buffer[0] != cpu_to_be64(OWNER_NO_OWNER)) {
 169                                 dev_err(&dice->unit->device,
 170                                         "device is already in use\n");
 171                                 err = -EBUSY;
 172                         }
 173                         break;
 174                 }
 175                 if (err != -EAGAIN || ++errors >= 3)
 176                         break;
 177
 178                 msleep(20);
 179         }
 180
 181         kfree(buffer);
 182
 183         return err;
 184 }
 185
 186 static int dice_owner_update(struct dice *dice)
 187 {
 188         struct fw_device *device = fw_parent_device(dice->unit);
 189         __be64 *buffer;
 190         int err;
 191
 192         if (dice->owner_generation == -1)
 193                 return 0;
 194
 195         buffer = kmalloc(2 * 8, GFP_KERNEL);
 196         if (!buffer)
 197                 return -ENOMEM;
 198
 199         buffer[0] = cpu_to_be64(OWNER_NO_OWNER);
 200         buffer[1] = cpu_to_be64(
 201                 ((u64)device->card->node_id << OWNER_NODE_SHIFT) |
 202                 dice->notification_handler.offset);
 203
 204         dice->owner_generation = device->generation;
 205         smp_rmb(); /* node_id vs. generation */
 206         err = snd_fw_transaction(dice->unit, TCODE_LOCK_COMPARE_SWAP,
 207                                  global_address(dice, GLOBAL_OWNER),
 208                                  buffer, 2 * 8,
 209                                  FW_FIXED_GENERATION | dice->owner_generation);
 210
 211         if (err == 0) {
 212                 if (buffer[0] != cpu_to_be64(OWNER_NO_OWNER)) {
 213                         dev_err(&dice->unit->device,
 214                                 "device is already in use\n");
 215                         err = -EBUSY;
 216                 }
 217         } else if (err == -EAGAIN) {
 218                 err = 0; /* try again later */
 219         }
 220
 221         kfree(buffer);
 222
 223         if (err < 0)
 224                 dice->owner_generation = -1;
 225
 226         return err;
 227 }
 228
 229 static void dice_owner_clear(struct dice *dice)
 230 {
 231         struct fw_device *device = fw_parent_device(dice->unit);
 232         __be64 *buffer;
 233
 234         buffer = kmalloc(2 * 8, GFP_KERNEL);
 235         if (!buffer)
 236                 return;
 237
 238         buffer[0] = cpu_to_be64(
 239                 ((u64)device->card->node_id << OWNER_NODE_SHIFT) |
 240                 dice->notification_handler.offset);
 241         buffer[1] = cpu_to_be64(OWNER_NO_OWNER);
 242         snd_fw_transaction(dice->unit, TCODE_LOCK_COMPARE_SWAP,
 243                            global_address(dice, GLOBAL_OWNER),
 244                            buffer, 2 * 8, FW_QUIET |
 245                            FW_FIXED_GENERATION | dice->owner_generation);
 246
 247         kfree(buffer);
 248
 249         dice->owner_generation = -1;
 250 }
 251
 252 static int dice_enable_set(struct dice *dice)
 253 {
 254         __be32 value;
 255         int err;
 256
 257         value = cpu_to_be32(1);
 258         err = snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
 259                                  global_address(dice, GLOBAL_ENABLE),
 260                                  &value, 4,
 261                                  FW_FIXED_GENERATION | dice->owner_generation);
 262         if (err < 0)
 263                 return err;
 264
 265         dice->global_enabled = true;
 266
 267         return 0;
 268 }
 269
 270 static void dice_enable_clear(struct dice *dice)
 271 {
 272         __be32 value;
 273
 274         if (!dice->global_enabled)
 275                 return;
 276
 277         value = 0;
 278         snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
 279                            global_address(dice, GLOBAL_ENABLE),
 280                            &value, 4, FW_QUIET |
 281                            FW_FIXED_GENERATION | dice->owner_generation);
 282
 283         dice->global_enabled = false;
 284 }
 285
 286 static void dice_notification(struct fw_card *card, struct fw_request *request,
 287                               int tcode, int destination, int source,
 288                               int generation, unsigned long long offset,
 289                               void *data, size_t length, void *callback_data)
 290 {
 291         struct dice *dice = callback_data;
 292         u32 bits;
 293         unsigned long flags;
 294
 295         if (tcode != TCODE_WRITE_QUADLET_REQUEST) {
 296                 fw_send_response(card, request, RCODE_TYPE_ERROR);
 297                 return;
 298         }
 299         if ((offset & 3) != 0) {
 300                 fw_send_response(card, request, RCODE_ADDRESS_ERROR);
 301                 return;
 302         }
 303
 304         bits = be32_to_cpup(data);
 305
 306         spin_lock_irqsave(&dice->lock, flags);
 307         dice->notification_bits |= bits;
 308         spin_unlock_irqrestore(&dice->lock, flags);
 309
 310         fw_send_response(card, request, RCODE_COMPLETE);
 311
 312         if (bits & NOTIFY_CLOCK_ACCEPTED)
 313                 complete(&dice->clock_accepted);
 314         wake_up(&dice->hwdep_wait);
 315 }
 316
 317 static int dice_rate_constraint(struct snd_pcm_hw_params *params,
 318                                 struct snd_pcm_hw_rule *rule)
 319 {
 320         struct dice *dice = rule->private;
 321         const struct snd_interval *channels =
 322                 hw_param_interval_c(params, SNDRV_PCM_HW_PARAM_CHANNELS);
 323         struct snd_interval *rate =
 324                 hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
 325         struct snd_interval allowed_rates = {
 326                 .min = UINT_MAX, .max = 0, .integer = 1
 327         };
 328         unsigned int i, mode;
 329
 330         for (i = 0; i < ARRAY_SIZE(dice_rates); ++i) {
 331                 mode = rate_index_to_mode(i);
 332                 if ((dice->clock_caps & (1 << i)) &&
 333                     snd_interval_test(channels, dice->rx_channels[mode])) {
 334                         allowed_rates.min = min(allowed_rates.min,
 335                                                 dice_rates[i]);
 336                         allowed_rates.max = max(allowed_rates.max,
 337                                                 dice_rates[i]);
 338                 }
 339         }
 340
 341         return snd_interval_refine(rate, &allowed_rates);
 342 }
 343
 344 static int dice_channels_constraint(struct snd_pcm_hw_params *params,
 345                                     struct snd_pcm_hw_rule *rule)
 346 {
 347         struct dice *dice = rule->private;
 348         const struct snd_interval *rate =
 349                 hw_param_interval_c(params, SNDRV_PCM_HW_PARAM_RATE);
 350         struct snd_interval *channels =
 351                 hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
 352         struct snd_interval allowed_channels = {
 353                 .min = UINT_MAX, .max = 0, .integer = 1
 354         };
 355         unsigned int i, mode;
 356
 357         for (i = 0; i < ARRAY_SIZE(dice_rates); ++i)
 358                 if ((dice->clock_caps & (1 << i)) &&
 359                     snd_interval_test(rate, dice_rates[i])) {
 360                         mode = rate_index_to_mode(i);
 361                         allowed_channels.min = min(allowed_channels.min,
 362                                                    dice->rx_channels[mode]);
 363                         allowed_channels.max = max(allowed_channels.max,
 364                                                    dice->rx_channels[mode]);
 365                 }
 366
 367         return snd_interval_refine(channels, &allowed_channels);
 368 }
 369
 370 static int dice_open(struct snd_pcm_substream *substream)
 371 {
 372         static const struct snd_pcm_hardware hardware = {
 373                 .info = SNDRV_PCM_INFO_MMAP |
 374                         SNDRV_PCM_INFO_MMAP_VALID |
 375                         SNDRV_PCM_INFO_BATCH |
 376                         SNDRV_PCM_INFO_INTERLEAVED |
 377                         SNDRV_PCM_INFO_BLOCK_TRANSFER,
 378                 .formats = AMDTP_OUT_PCM_FORMAT_BITS,
 379                 .channels_min = UINT_MAX,
 380                 .channels_max = 0,
 381                 .buffer_bytes_max = 16 * 1024 * 1024,
 382                 .period_bytes_min = 1,
 383                 .period_bytes_max = UINT_MAX,
 384                 .periods_min = 1,
 385                 .periods_max = UINT_MAX,
 386         };
 387         struct dice *dice = substream->private_data;
 388         struct snd_pcm_runtime *runtime = substream->runtime;
 389         unsigned int i;
 390         int err;
 391
 392         err = dice_try_lock(dice);
 393         if (err < 0)
 394                 goto error;
 395
 396         runtime->hw = hardware;
 397
 398         for (i = 0; i < ARRAY_SIZE(dice_rates); ++i)
 399                 if (dice->clock_caps & (1 << i))
 400                         runtime->hw.rates |=
 401                                 snd_pcm_rate_to_rate_bit(dice_rates[i]);
 402         snd_pcm_limit_hw_rates(runtime);
 403
 404         for (i = 0; i < 3; ++i)
 405                 if (dice->rx_channels[i]) {
 406                         runtime->hw.channels_min = min(runtime->hw.channels_min,
 407                                                        dice->rx_channels[i]);
 408                         runtime->hw.channels_max = max(runtime->hw.channels_max,
 409                                                        dice->rx_channels[i]);
 410                 }
 411
 412         err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
 413                                   dice_rate_constraint, dice,
 414                                   SNDRV_PCM_HW_PARAM_CHANNELS, -1);
 415         if (err < 0)
 416                 goto err_lock;
 417         err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
 418                                   dice_channels_constraint, dice,
 419                                   SNDRV_PCM_HW_PARAM_RATE, -1);
 420         if (err < 0)
 421                 goto err_lock;
 422
 423         err = snd_pcm_hw_constraint_step(runtime, 0,
 424                                          SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 32);
 425         if (err < 0)
 426                 goto err_lock;
 427         err = snd_pcm_hw_constraint_step(runtime, 0,
 428                                          SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 32);
 429         if (err < 0)
 430                 goto err_lock;
 431
 432         err = snd_pcm_hw_constraint_minmax(runtime,
 433                                            SNDRV_PCM_HW_PARAM_PERIOD_TIME,
 434                                            5000, UINT_MAX);
 435         if (err < 0)
 436                 goto err_lock;
 437
 438         err = snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
 439         if (err < 0)
 440                 goto err_lock;
 441
 442         return 0;
 443
 444 err_lock:
 445         dice_unlock(dice);
 446 error:
 447         return err;
 448 }
 449
 450 static int dice_close(struct snd_pcm_substream *substream)
 451 {
 452         struct dice *dice = substream->private_data;
 453
 454         dice_unlock(dice);
 455
 456         return 0;
 457 }
 458
 459 static int dice_stream_start_packets(struct dice *dice)
 460 {
 461         int err;
 462
 463         if (amdtp_stream_running(&dice->stream))
 464                 return 0;
 465
 466         err = amdtp_stream_start(&dice->stream, dice->resources.channel,
 467                                  fw_parent_device(dice->unit)->max_speed);
 468         if (err < 0)
 469                 return err;
 470
 471         err = dice_enable_set(dice);
 472         if (err < 0) {
 473                 amdtp_stream_stop(&dice->stream);
 474                 return err;
 475         }
 476
 477         return 0;
 478 }
 479
 480 static int dice_stream_start(struct dice *dice)
 481 {
 482         __be32 channel;
 483         int err;
 484
 485         if (!dice->resources.allocated) {
 486                 err = fw_iso_resources_allocate(&dice->resources,
 487                                 amdtp_stream_get_max_payload(&dice->stream),
 488                                 fw_parent_device(dice->unit)->max_speed);
 489                 if (err < 0)
 490                         goto error;
 491
 492                 channel = cpu_to_be32(dice->resources.channel);
 493                 err = snd_fw_transaction(dice->unit,
 494                                          TCODE_WRITE_QUADLET_REQUEST,
 495                                          rx_address(dice, RX_ISOCHRONOUS),
 496                                          &channel, 4, 0);
 497                 if (err < 0)
 498                         goto err_resources;
 499         }
 500
 501         err = dice_stream_start_packets(dice);
 502         if (err < 0)
 503                 goto err_rx_channel;
 504
 505         return 0;
 506
 507 err_rx_channel:
 508         channel = cpu_to_be32((u32)-1);
 509         snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
 510                            rx_address(dice, RX_ISOCHRONOUS), &channel, 4, 0);
 511 err_resources:
 512         fw_iso_resources_free(&dice->resources);
 513 error:
 514         return err;
 515 }
 516
 517 static void dice_stream_stop_packets(struct dice *dice)
 518 {
 519         if (amdtp_stream_running(&dice->stream)) {
 520                 dice_enable_clear(dice);
 521                 amdtp_stream_stop(&dice->stream);
 522         }
 523 }
 524
 525 static void dice_stream_stop(struct dice *dice)
 526 {
 527         __be32 channel;
 528
 529         dice_stream_stop_packets(dice);
 530
 531         if (!dice->resources.allocated)
 532                 return;
 533
 534         channel = cpu_to_be32((u32)-1);
 535         snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
 536                            rx_address(dice, RX_ISOCHRONOUS), &channel, 4, 0);
 537
 538         fw_iso_resources_free(&dice->resources);
 539 }
 540
 541 static int dice_change_rate(struct dice *dice, unsigned int clock_rate)
 542 {
 543         __be32 value;
 544         int err;
 545
 546         reinit_completion(&dice->clock_accepted);
 547
 548         value = cpu_to_be32(clock_rate | CLOCK_SOURCE_ARX1);
 549         err = snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
 550                                  global_address(dice, GLOBAL_CLOCK_SELECT),
 551                                  &value, 4, 0);
 552         if (err < 0)
 553                 return err;
 554
 555         if (!wait_for_completion_timeout(&dice->clock_accepted,
 556                                          msecs_to_jiffies(100)))
 557                 dev_warn(&dice->unit->device, "clock change timed out\n");
 558
 559         return 0;
 560 }
 561
 562 static int dice_hw_params(struct snd_pcm_substream *substream,
 563                           struct snd_pcm_hw_params *hw_params)
 564 {
 565         struct dice *dice = substream->private_data;
 566         unsigned int rate_index, mode, rate, channels, i;
 567         int err;
 568
 569         mutex_lock(&dice->mutex);
 570         dice_stream_stop(dice);
 571         mutex_unlock(&dice->mutex);
 572
 573         err = snd_pcm_lib_alloc_vmalloc_buffer(substream,
 574                                                params_buffer_bytes(hw_params));
 575         if (err < 0)
 576                 return err;
 577
 578         rate = params_rate(hw_params);
 579         rate_index = rate_to_index(rate);
 580         err = dice_change_rate(dice, rate_index << CLOCK_RATE_SHIFT);
 581         if (err < 0)
 582                 return err;
 583
 584         /*
 585          * At rates above 96 kHz, pretend that the stream runs at half the
 586          * actual sample rate with twice the number of channels; two samples
 587          * of a channel are stored consecutively in the packet. Requires
 588          * blocking mode and PCM buffer size should be aligned to SYT_INTERVAL.
 589          */
 590         channels = params_channels(hw_params);
 591         if (rate_index > 4) {
 592                 if (channels > AMDTP_MAX_CHANNELS_FOR_PCM / 2) {
 593                         err = -ENOSYS;
 594                         return err;
 595                 }
 596
 597                 for (i = 0; i < channels; i++) {
 598                         dice->stream.pcm_positions[i * 2] = i;
 599                         dice->stream.pcm_positions[i * 2 + 1] = i + channels;
 600                 }
 601
 602                 rate /= 2;
 603                 channels *= 2;
 604         }
 605
 606         mode = rate_index_to_mode(rate_index);
 607         amdtp_stream_set_parameters(&dice->stream, rate, channels,
 608                                     dice->rx_midi_ports[mode]);
 609         amdtp_stream_set_pcm_format(&dice->stream,
 610                                     params_format(hw_params));
 611
 612         return 0;
 613 }
 614
 615 static int dice_hw_free(struct snd_pcm_substream *substream)
 616 {
 617         struct dice *dice = substream->private_data;
 618
 619         mutex_lock(&dice->mutex);
 620         dice_stream_stop(dice);
 621         mutex_unlock(&dice->mutex);
 622
 623         return snd_pcm_lib_free_vmalloc_buffer(substream);
 624 }
 625
 626 static int dice_prepare(struct snd_pcm_substream *substream)
 627 {
 628         struct dice *dice = substream->private_data;
 629         int err;
 630
 631         mutex_lock(&dice->mutex);
 632
 633         if (amdtp_streaming_error(&dice->stream))
 634                 dice_stream_stop_packets(dice);
 635
 636         err = dice_stream_start(dice);
 637         if (err < 0) {
 638                 mutex_unlock(&dice->mutex);
 639                 return err;
 640         }
 641
 642         mutex_unlock(&dice->mutex);
 643
 644         amdtp_stream_pcm_prepare(&dice->stream);
 645
 646         return 0;
 647 }
 648
 649 static int dice_trigger(struct snd_pcm_substream *substream, int cmd)
 650 {
 651         struct dice *dice = substream->private_data;
 652         struct snd_pcm_substream *pcm;
 653
 654         switch (cmd) {
 655         case SNDRV_PCM_TRIGGER_START:
 656                 pcm = substream;
 657                 break;
 658         case SNDRV_PCM_TRIGGER_STOP:
 659                 pcm = NULL;
 660                 break;
 661         default:
 662                 return -EINVAL;
 663         }
 664         amdtp_stream_pcm_trigger(&dice->stream, pcm);
 665
 666         return 0;
 667 }
 668
 669 static snd_pcm_uframes_t dice_pointer(struct snd_pcm_substream *substream)
 670 {
 671         struct dice *dice = substream->private_data;
 672
 673         return amdtp_stream_pcm_pointer(&dice->stream);
 674 }
 675
 676 static int dice_create_pcm(struct dice *dice)
 677 {
 678         static struct snd_pcm_ops ops = {
 679                 .open      = dice_open,
 680                 .close     = dice_close,
 681                 .ioctl     = snd_pcm_lib_ioctl,
 682                 .hw_params = dice_hw_params,
 683                 .hw_free   = dice_hw_free,
 684                 .prepare   = dice_prepare,
 685                 .trigger   = dice_trigger,
 686                 .pointer   = dice_pointer,
 687                 .page      = snd_pcm_lib_get_vmalloc_page,
 688                 .mmap      = snd_pcm_lib_mmap_vmalloc,
 689         };
 690         struct snd_pcm *pcm;
 691         int err;
 692
 693         err = snd_pcm_new(dice->card, "DICE", 0, 1, 0, &pcm);
 694         if (err < 0)
 695                 return err;
 696         pcm->private_data = dice;
 697         strcpy(pcm->name, dice->card->shortname);
 698         pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->ops = &ops;
 699
 700         return 0;
 701 }
 702
 703 static long dice_hwdep_read(struct snd_hwdep *hwdep, char __user *buf,
 704                             long count, loff_t *offset)
 705 {
 706         struct dice *dice = hwdep->private_data;
 707         DEFINE_WAIT(wait);
 708         union snd_firewire_event event;
 709
 710         spin_lock_irq(&dice->lock);
 711
 712         while (!dice->dev_lock_changed && dice->notification_bits == 0) {
 713                 prepare_to_wait(&dice->hwdep_wait, &wait, TASK_INTERRUPTIBLE);
 714                 spin_unlock_irq(&dice->lock);
 715                 schedule();
 716                 finish_wait(&dice->hwdep_wait, &wait);
 717                 if (signal_pending(current))
 718                         return -ERESTARTSYS;
 719                 spin_lock_irq(&dice->lock);
 720         }
 721
 722         memset(&event, 0, sizeof(event));
 723         if (dice->dev_lock_changed) {
 724                 event.lock_status.type = SNDRV_FIREWIRE_EVENT_LOCK_STATUS;
 725                 event.lock_status.status = dice->dev_lock_count > 0;
 726                 dice->dev_lock_changed = false;
 727
 728                 count = min(count, (long)sizeof(event.lock_status));
 729         } else {
 730                 event.dice_notification.type = SNDRV_FIREWIRE_EVENT_DICE_NOTIFICATION;
 731                 event.dice_notification.notification = dice->notification_bits;
 732                 dice->notification_bits = 0;
 733
 734                 count = min(count, (long)sizeof(event.dice_notification));
 735         }
 736
 737         spin_unlock_irq(&dice->lock);
 738
 739         if (copy_to_user(buf, &event, count))
 740                 return -EFAULT;
 741
 742         return count;
 743 }
 744
 745 static unsigned int dice_hwdep_poll(struct snd_hwdep *hwdep, struct file *file,
 746                                     poll_table *wait)
 747 {
 748         struct dice *dice = hwdep->private_data;
 749         unsigned int events;
 750
 751         poll_wait(file, &dice->hwdep_wait, wait);
 752
 753         spin_lock_irq(&dice->lock);
 754         if (dice->dev_lock_changed || dice->notification_bits != 0)
 755                 events = POLLIN | POLLRDNORM;
 756         else
 757                 events = 0;
 758         spin_unlock_irq(&dice->lock);
 759
 760         return events;
 761 }
 762
 763 static int dice_hwdep_get_info(struct dice *dice, void __user *arg)
 764 {
 765         struct fw_device *dev = fw_parent_device(dice->unit);
 766         struct snd_firewire_get_info info;
 767
 768         memset(&info, 0, sizeof(info));
 769         info.type = SNDRV_FIREWIRE_TYPE_DICE;
 770         info.card = dev->card->index;
 771         *(__be32 *)&info.guid[0] = cpu_to_be32(dev->config_rom[3]);
 772         *(__be32 *)&info.guid[4] = cpu_to_be32(dev->config_rom[4]);
 773         strlcpy(info.device_name, dev_name(&dev->device),
 774                 sizeof(info.device_name));
 775
 776         if (copy_to_user(arg, &info, sizeof(info)))
 777                 return -EFAULT;
 778
 779         return 0;
 780 }
 781
 782 static int dice_hwdep_lock(struct dice *dice)
 783 {
 784         int err;
 785
 786         spin_lock_irq(&dice->lock);
 787
 788         if (dice->dev_lock_count == 0) {
 789                 dice->dev_lock_count = -1;
 790                 err = 0;
 791         } else {
 792                 err = -EBUSY;
 793         }
 794
 795         spin_unlock_irq(&dice->lock);
 796
 797         return err;
 798 }
 799
 800 static int dice_hwdep_unlock(struct dice *dice)
 801 {
 802         int err;
 803
 804         spin_lock_irq(&dice->lock);
 805
 806         if (dice->dev_lock_count == -1) {
 807                 dice->dev_lock_count = 0;
 808                 err = 0;
 809         } else {
 810                 err = -EBADFD;
 811         }
 812
 813         spin_unlock_irq(&dice->lock);
 814
 815         return err;
 816 }
 817
 818 static int dice_hwdep_release(struct snd_hwdep *hwdep, struct file *file)
 819 {
 820         struct dice *dice = hwdep->private_data;
 821
 822         spin_lock_irq(&dice->lock);
 823         if (dice->dev_lock_count == -1)
 824                 dice->dev_lock_count = 0;
 825         spin_unlock_irq(&dice->lock);
 826
 827         return 0;
 828 }
 829
 830 static int dice_hwdep_ioctl(struct snd_hwdep *hwdep, struct file *file,
 831                             unsigned int cmd, unsigned long arg)
 832 {
 833         struct dice *dice = hwdep->private_data;
 834
 835         switch (cmd) {
 836         case SNDRV_FIREWIRE_IOCTL_GET_INFO:
 837                 return dice_hwdep_get_info(dice, (void __user *)arg);
 838         case SNDRV_FIREWIRE_IOCTL_LOCK:
 839                 return dice_hwdep_lock(dice);
 840         case SNDRV_FIREWIRE_IOCTL_UNLOCK:
 841                 return dice_hwdep_unlock(dice);
 842         default:
 843                 return -ENOIOCTLCMD;
 844         }
 845 }
 846
 847 #ifdef CONFIG_COMPAT
 848 static int dice_hwdep_compat_ioctl(struct snd_hwdep *hwdep, struct file *file,
 849                                    unsigned int cmd, unsigned long arg)
 850 {
 851         return dice_hwdep_ioctl(hwdep, file, cmd,
 852                                 (unsigned long)compat_ptr(arg));
 853 }
 854 #else
 855 #define dice_hwdep_compat_ioctl NULL
 856 #endif
 857
 858 static int dice_create_hwdep(struct dice *dice)
 859 {
 860         static const struct snd_hwdep_ops ops = {
 861                 .read         = dice_hwdep_read,
 862                 .release      = dice_hwdep_release,
 863                 .poll         = dice_hwdep_poll,
 864                 .ioctl        = dice_hwdep_ioctl,
 865                 .ioctl_compat = dice_hwdep_compat_ioctl,
 866         };
 867         struct snd_hwdep *hwdep;
 868         int err;
 869
 870         err = snd_hwdep_new(dice->card, "DICE", 0, &hwdep);
 871         if (err < 0)
 872                 return err;
 873         strcpy(hwdep->name, "DICE");
 874         hwdep->iface = SNDRV_HWDEP_IFACE_FW_DICE;
 875         hwdep->ops = ops;
 876         hwdep->private_data = dice;
 877         hwdep->exclusive = true;
 878
 879         return 0;
 880 }
 881
 882 static int dice_proc_read_mem(struct dice *dice, void *buffer,
 883                               unsigned int offset_q, unsigned int quadlets)
 884 {
 885         unsigned int i;
 886         int err;
 887
 888         err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST,
 889                                  DICE_PRIVATE_SPACE + 4 * offset_q,
 890                                  buffer, 4 * quadlets, 0);
 891         if (err < 0)
 892                 return err;
 893
 894         for (i = 0; i < quadlets; ++i)
 895                 be32_to_cpus(&((u32 *)buffer)[i]);
 896
 897         return 0;
 898 }
 899
 900 static const char *str_from_array(const char *const strs[], unsigned int count,
 901                                   unsigned int i)
 902 {
 903         if (i < count)
 904                 return strs[i];
 905         else
 906                 return "(unknown)";
 907 }
 908
 909 static void dice_proc_fixup_string(char *s, unsigned int size)
 910 {
 911         unsigned int i;
 912
 913         for (i = 0; i < size; i += 4)
 914                 cpu_to_le32s((u32 *)(s + i));
 915
 916         for (i = 0; i < size - 2; ++i) {
 917                 if (s[i] == '\0')
 918                         return;
 919                 if (s[i] == '\\' && s[i + 1] == '\\') {
 920                         s[i + 2] = '\0';
 921                         return;
 922                 }
 923         }
 924         s[size - 1] = '\0';
 925 }
 926
 927 static void dice_proc_read(struct snd_info_entry *entry,
 928                            struct snd_info_buffer *buffer)
 929 {
 930         static const char *const section_names[5] = {
 931                 "global", "tx", "rx", "ext_sync", "unused2"
 932         };
 933         static const char *const clock_sources[] = {
 934                 "aes1", "aes2", "aes3", "aes4", "aes", "adat", "tdif",
 935                 "wc", "arx1", "arx2", "arx3", "arx4", "internal"
 936         };
 937         static const char *const rates[] = {
 938                 "32000", "44100", "48000", "88200", "96000", "176400", "192000",
 939                 "any low", "any mid", "any high", "none"
 940         };
 941         struct dice *dice = entry->private_data;
 942         u32 sections[ARRAY_SIZE(section_names) * 2];
 943         struct {
 944                 u32 number;
 945                 u32 size;
 946         } tx_rx_header;
 947         union {
 948                 struct {
 949                         u32 owner_hi, owner_lo;
 950                         u32 notification;
 951                         char nick_name[NICK_NAME_SIZE];
 952                         u32 clock_select;
 953                         u32 enable;
 954                         u32 status;
 955                         u32 extended_status;
 956                         u32 sample_rate;
 957                         u32 version;
 958                         u32 clock_caps;
 959                         char clock_source_names[CLOCK_SOURCE_NAMES_SIZE];
 960                 } global;
 961                 struct {
 962                         u32 iso;
 963                         u32 number_audio;
 964                         u32 number_midi;
 965                         u32 speed;
 966                         char names[TX_NAMES_SIZE];
 967                         u32 ac3_caps;
 968                         u32 ac3_enable;
 969                 } tx;
 970                 struct {
 971                         u32 iso;
 972                         u32 seq_start;
 973                         u32 number_audio;
 974                         u32 number_midi;
 975                         char names[RX_NAMES_SIZE];
 976                         u32 ac3_caps;
 977                         u32 ac3_enable;
 978                 } rx;
 979                 struct {
 980                         u32 clock_source;
 981                         u32 locked;
 982                         u32 rate;
 983                         u32 adat_user_data;
 984                 } ext_sync;
 985         } buf;
 986         unsigned int quadlets, stream, i;
 987
 988         if (dice_proc_read_mem(dice, sections, 0, ARRAY_SIZE(sections)) < 0)
 989                 return;
 990         snd_iprintf(buffer, "sections:\n");
 991         for (i = 0; i < ARRAY_SIZE(section_names); ++i)
 992                 snd_iprintf(buffer, "  %s: offset %u, size %u\n",
 993                             section_names[i],
 994                             sections[i * 2], sections[i * 2 + 1]);
 995
 996         quadlets = min_t(u32, sections[1], sizeof(buf.global) / 4);
 997         if (dice_proc_read_mem(dice, &buf.global, sections[0], quadlets) < 0)
 998                 return;
 999         snd_iprintf(buffer, "global:\n");
1000         snd_iprintf(buffer, "  owner: %04x:%04x%08x\n",
1001                     buf.global.owner_hi >> 16,
1002                     buf.global.owner_hi & 0xffff, buf.global.owner_lo);
1003         snd_iprintf(buffer, "  notification: %08x\n", buf.global.notification);
1004         dice_proc_fixup_string(buf.global.nick_name, NICK_NAME_SIZE);
1005         snd_iprintf(buffer, "  nick name: %s\n", buf.global.nick_name);
1006         snd_iprintf(buffer, "  clock select: %s %s\n",
1007                     str_from_array(clock_sources, ARRAY_SIZE(clock_sources),
1008                                    buf.global.clock_select & CLOCK_SOURCE_MASK),
1009                     str_from_array(rates, ARRAY_SIZE(rates),
1010                                    (buf.global.clock_select & CLOCK_RATE_MASK)
1011                                    >> CLOCK_RATE_SHIFT));
1012         snd_iprintf(buffer, "  enable: %u\n", buf.global.enable);
1013         snd_iprintf(buffer, "  status: %slocked %s\n",
1014                     buf.global.status & STATUS_SOURCE_LOCKED ? "" : "un",
1015                     str_from_array(rates, ARRAY_SIZE(rates),
1016                                    (buf.global.status &
1017                                     STATUS_NOMINAL_RATE_MASK)
1018                                    >> CLOCK_RATE_SHIFT));
1019         snd_iprintf(buffer, "  ext status: %08x\n", buf.global.extended_status);
1020         snd_iprintf(buffer, "  sample rate: %u\n", buf.global.sample_rate);
1021         snd_iprintf(buffer, "  version: %u.%u.%u.%u\n",
1022                     (buf.global.version >> 24) & 0xff,
1023                     (buf.global.version >> 16) & 0xff,
1024                     (buf.global.version >>  8) & 0xff,
1025                     (buf.global.version >>  0) & 0xff);
1026         if (quadlets >= 90) {
1027                 snd_iprintf(buffer, "  clock caps:");
1028                 for (i = 0; i <= 6; ++i)
1029                         if (buf.global.clock_caps & (1 << i))
1030                                 snd_iprintf(buffer, " %s", rates[i]);
1031                 for (i = 0; i <= 12; ++i)
1032                         if (buf.global.clock_caps & (1 << (16 + i)))
1033                                 snd_iprintf(buffer, " %s", clock_sources[i]);
1034                 snd_iprintf(buffer, "\n");
1035                 dice_proc_fixup_string(buf.global.clock_source_names,
1036                                        CLOCK_SOURCE_NAMES_SIZE);
1037                 snd_iprintf(buffer, "  clock source names: %s\n",
1038                             buf.global.clock_source_names);
1039         }
1040
1041         if (dice_proc_read_mem(dice, &tx_rx_header, sections[2], 2) < 0)
1042                 return;
1043         quadlets = min_t(u32, tx_rx_header.size, sizeof(buf.tx) / 4);
1044         for (stream = 0; stream < tx_rx_header.number; ++stream) {
1045                 if (dice_proc_read_mem(dice, &buf.tx, sections[2] + 2 +
1046                                        stream * tx_rx_header.size,
1047                                        quadlets) < 0)
1048                         break;
1049                 snd_iprintf(buffer, "tx %u:\n", stream);
1050                 snd_iprintf(buffer, "  iso channel: %d\n", (int)buf.tx.iso);
1051                 snd_iprintf(buffer, "  audio channels: %u\n",
1052                             buf.tx.number_audio);
1053                 snd_iprintf(buffer, "  midi ports: %u\n", buf.tx.number_midi);
1054                 snd_iprintf(buffer, "  speed: S%u\n", 100u << buf.tx.speed);
1055                 if (quadlets >= 68) {
1056                         dice_proc_fixup_string(buf.tx.names, TX_NAMES_SIZE);
1057                         snd_iprintf(buffer, "  names: %s\n", buf.tx.names);
1058                 }
1059                 if (quadlets >= 70) {
1060                         snd_iprintf(buffer, "  ac3 caps: %08x\n",
1061                                     buf.tx.ac3_caps);
1062                         snd_iprintf(buffer, "  ac3 enable: %08x\n",
1063                                     buf.tx.ac3_enable);
1064                 }
1065         }
1066
1067         if (dice_proc_read_mem(dice, &tx_rx_header, sections[4], 2) < 0)
1068                 return;
1069         quadlets = min_t(u32, tx_rx_header.size, sizeof(buf.rx) / 4);
1070         for (stream = 0; stream < tx_rx_header.number; ++stream) {
1071                 if (dice_proc_read_mem(dice, &buf.rx, sections[4] + 2 +
1072                                        stream * tx_rx_header.size,
1073                                        quadlets) < 0)
1074                         break;
1075                 snd_iprintf(buffer, "rx %u:\n", stream);
1076                 snd_iprintf(buffer, "  iso channel: %d\n", (int)buf.rx.iso);
1077                 snd_iprintf(buffer, "  sequence start: %u\n", buf.rx.seq_start);
1078                 snd_iprintf(buffer, "  audio channels: %u\n",
1079                             buf.rx.number_audio);
1080                 snd_iprintf(buffer, "  midi ports: %u\n", buf.rx.number_midi);
1081                 if (quadlets >= 68) {
1082                         dice_proc_fixup_string(buf.rx.names, RX_NAMES_SIZE);
1083                         snd_iprintf(buffer, "  names: %s\n", buf.rx.names);
1084                 }
1085                 if (quadlets >= 70) {
1086                         snd_iprintf(buffer, "  ac3 caps: %08x\n",
1087                                     buf.rx.ac3_caps);
1088                         snd_iprintf(buffer, "  ac3 enable: %08x\n",
1089                                     buf.rx.ac3_enable);
1090                 }
1091         }
1092
1093         quadlets = min_t(u32, sections[7], sizeof(buf.ext_sync) / 4);
1094         if (quadlets >= 4) {
1095                 if (dice_proc_read_mem(dice, &buf.ext_sync,
1096                                        sections[6], 4) < 0)
1097                         return;
1098                 snd_iprintf(buffer, "ext status:\n");
1099                 snd_iprintf(buffer, "  clock source: %s\n",
1100                             str_from_array(clock_sources,
1101                                            ARRAY_SIZE(clock_sources),
1102                                            buf.ext_sync.clock_source));
1103                 snd_iprintf(buffer, "  locked: %u\n", buf.ext_sync.locked);
1104                 snd_iprintf(buffer, "  rate: %s\n",
1105                             str_from_array(rates, ARRAY_SIZE(rates),
1106                                            buf.ext_sync.rate));
1107                 snd_iprintf(buffer, "  adat user data: ");
1108                 if (buf.ext_sync.adat_user_data & ADAT_USER_DATA_NO_DATA)
1109                         snd_iprintf(buffer, "-\n");
1110                 else
1111                         snd_iprintf(buffer, "%x\n",
1112                                     buf.ext_sync.adat_user_data);
1113         }
1114 }
1115
1116 static void dice_create_proc(struct dice *dice)
1117 {
1118         struct snd_info_entry *entry;
1119
1120         if (!snd_card_proc_new(dice->card, "dice", &entry))
1121                 snd_info_set_text_ops(entry, dice, dice_proc_read);
1122 }
1123
1124 static void dice_card_free(struct snd_card *card)
1125 {
1126         struct dice *dice = card->private_data;
1127
1128         amdtp_stream_destroy(&dice->stream);
1129         fw_core_remove_address_handler(&dice->notification_handler);
1130         mutex_destroy(&dice->mutex);
1131 }
1132
1133 #define OUI_WEISS               0x001c6a
1134
1135 #define DICE_CATEGORY_ID        0x04
1136 #define WEISS_CATEGORY_ID       0x00
1137
1138 static int dice_interface_check(struct fw_unit *unit)
1139 {
1140         static const int min_values[10] = {
1141                 10, 0x64 / 4,
1142                 10, 0x18 / 4,
1143                 10, 0x18 / 4,
1144                 0, 0,
1145                 0, 0,
1146         };
1147         struct fw_device *device = fw_parent_device(unit);
1148         struct fw_csr_iterator it;
1149         int key, value, vendor = -1, model = -1, err;
1150         unsigned int category, i;
1151         __be32 pointers[ARRAY_SIZE(min_values)];
1152         __be32 tx_data[4];
1153         __be32 version;
1154
1155         /*
1156          * Check that GUID and unit directory are constructed according to DICE
1157          * rules, i.e., that the specifier ID is the GUID's OUI, and that the
1158          * GUID chip ID consists of the 8-bit category ID, the 10-bit product
1159          * ID, and a 22-bit serial number.
1160          */
1161         fw_csr_iterator_init(&it, unit->directory);
1162         while (fw_csr_iterator_next(&it, &key, &value)) {
1163                 switch (key) {
1164                 case CSR_SPECIFIER_ID:
1165                         vendor = value;
1166                         break;
1167                 case CSR_MODEL:
1168                         model = value;
1169                         break;
1170                 }
1171         }
1172         if (vendor == OUI_WEISS)
1173                 category = WEISS_CATEGORY_ID;
1174         else
1175                 category = DICE_CATEGORY_ID;
1176         if (device->config_rom[3] != ((vendor << 8) | category) ||
1177             device->config_rom[4] >> 22 != model)
1178                 return -ENODEV;
1179
1180         /*
1181          * Check that the sub address spaces exist and are located inside the
1182          * private address space.  The minimum values are chosen so that all
1183          * minimally required registers are included.
1184          */
1185         err = snd_fw_transaction(unit, TCODE_READ_BLOCK_REQUEST,
1186                                  DICE_PRIVATE_SPACE,
1187                                  pointers, sizeof(pointers), 0);
1188         if (err < 0)
1189                 return -ENODEV;
1190         for (i = 0; i < ARRAY_SIZE(pointers); ++i) {
1191                 value = be32_to_cpu(pointers[i]);
1192                 if (value < min_values[i] || value >= 0x40000)
1193                         return -ENODEV;
1194         }
1195
1196         /* We support playback only. Let capture devices be handled by FFADO. */
1197         err = snd_fw_transaction(unit, TCODE_READ_BLOCK_REQUEST,
1198                                  DICE_PRIVATE_SPACE +
1199                                  be32_to_cpu(pointers[2]) * 4,
1200                                  tx_data, sizeof(tx_data), 0);
1201         if (err < 0 || (tx_data[0] && tx_data[3]))
1202                 return -ENODEV;
1203
1204         /*
1205          * Check that the implemented DICE driver specification major version
1206          * number matches.
1207          */
1208         err = snd_fw_transaction(unit, TCODE_READ_QUADLET_REQUEST,
1209                                  DICE_PRIVATE_SPACE +
1210                                  be32_to_cpu(pointers[0]) * 4 + GLOBAL_VERSION,
1211                                  &version, 4, 0);
1212         if (err < 0)
1213                 return -ENODEV;
1214         if ((version & cpu_to_be32(0xff000000)) != cpu_to_be32(0x01000000)) {
1215                 dev_err(&unit->device,
1216                         "unknown DICE version: 0x%08x\n", be32_to_cpu(version));
1217                 return -ENODEV;
1218         }
1219
1220         return 0;
1221 }
1222
1223 static int highest_supported_mode_rate(struct dice *dice, unsigned int mode)
1224 {
1225         int i;
1226
1227         for (i = ARRAY_SIZE(dice_rates) - 1; i >= 0; --i)
1228                 if ((dice->clock_caps & (1 << i)) &&
1229                     rate_index_to_mode(i) == mode)
1230                         return i;
1231
1232         return -1;
1233 }
1234
1235 static int dice_read_mode_params(struct dice *dice, unsigned int mode)
1236 {
1237         __be32 values[2];
1238         int rate_index, err;
1239
1240         rate_index = highest_supported_mode_rate(dice, mode);
1241         if (rate_index < 0) {
1242                 dice->rx_channels[mode] = 0;
1243                 dice->rx_midi_ports[mode] = 0;
1244                 return 0;
1245         }
1246
1247         err = dice_change_rate(dice, rate_index << CLOCK_RATE_SHIFT);
1248         if (err < 0)
1249                 return err;
1250
1251         err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST,
1252                                  rx_address(dice, RX_NUMBER_AUDIO),
1253                                  values, 2 * 4, 0);
1254         if (err < 0)
1255                 return err;
1256
1257         dice->rx_channels[mode]   = be32_to_cpu(values[0]);
1258         dice->rx_midi_ports[mode] = be32_to_cpu(values[1]);
1259
1260         return 0;
1261 }
1262
1263 static int dice_read_params(struct dice *dice)
1264 {
1265         __be32 pointers[6];
1266         __be32 value;
1267         int mode, err;
1268
1269         err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST,
1270                                  DICE_PRIVATE_SPACE,
1271                                  pointers, sizeof(pointers), 0);
1272         if (err < 0)
1273                 return err;
1274
1275         dice->global_offset = be32_to_cpu(pointers[0]) * 4;
1276         dice->rx_offset = be32_to_cpu(pointers[4]) * 4;
1277
1278         /* some very old firmwares don't tell about their clock support */
1279         if (be32_to_cpu(pointers[1]) * 4 >= GLOBAL_CLOCK_CAPABILITIES + 4) {
1280                 err = snd_fw_transaction(
1281                                 dice->unit, TCODE_READ_QUADLET_REQUEST,
1282                                 global_address(dice, GLOBAL_CLOCK_CAPABILITIES),
1283                                 &value, 4, 0);
1284                 if (err < 0)
1285                         return err;
1286                 dice->clock_caps = be32_to_cpu(value);
1287         } else {
1288                 /* this should be supported by any device */
1289                 dice->clock_caps = CLOCK_CAP_RATE_44100 |
1290                                    CLOCK_CAP_RATE_48000 |
1291                                    CLOCK_CAP_SOURCE_ARX1 |
1292                                    CLOCK_CAP_SOURCE_INTERNAL;
1293         }
1294
1295         for (mode = 2; mode >= 0; --mode) {
1296                 err = dice_read_mode_params(dice, mode);
1297                 if (err < 0)
1298                         return err;
1299         }
1300
1301         return 0;
1302 }
1303
1304 static void dice_card_strings(struct dice *dice)
1305 {
1306         struct snd_card *card = dice->card;
1307         struct fw_device *dev = fw_parent_device(dice->unit);
1308         char vendor[32], model[32];
1309         unsigned int i;
1310         int err;
1311
1312         strcpy(card->driver, "DICE");
1313
1314         strcpy(card->shortname, "DICE");
1315         BUILD_BUG_ON(NICK_NAME_SIZE < sizeof(card->shortname));
1316         err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST,
1317                                  global_address(dice, GLOBAL_NICK_NAME),
1318                                  card->shortname, sizeof(card->shortname), 0);
1319         if (err >= 0) {
1320                 /* DICE strings are returned in "always-wrong" endianness */
1321                 BUILD_BUG_ON(sizeof(card->shortname) % 4 != 0);
1322                 for (i = 0; i < sizeof(card->shortname); i += 4)
1323                         swab32s((u32 *)&card->shortname[i]);
1324                 card->shortname[sizeof(card->shortname) - 1] = '\0';
1325         }
1326
1327         strcpy(vendor, "?");
1328         fw_csr_string(dev->config_rom + 5, CSR_VENDOR, vendor, sizeof(vendor));
1329         strcpy(model, "?");
1330         fw_csr_string(dice->unit->directory, CSR_MODEL, model, sizeof(model));
1331         snprintf(card->longname, sizeof(card->longname),
1332                  "%s %s (serial %u) at %s, S%d",
1333                  vendor, model, dev->config_rom[4] & 0x3fffff,
1334                  dev_name(&dice->unit->device), 100 << dev->max_speed);
1335
1336         strcpy(card->mixername, "DICE");
1337 }
1338
1339 static int dice_probe(struct fw_unit *unit, const struct ieee1394_device_id *id)
1340 {
1341         struct snd_card *card;
1342         struct dice *dice;
1343         __be32 clock_sel;
1344         int err;
1345
1346         err = dice_interface_check(unit);
1347         if (err < 0)
1348                 return err;
1349
1350         err = snd_card_new(&unit->device, -1, NULL, THIS_MODULE,
1351                            sizeof(*dice), &card);
1352         if (err < 0)
1353                 return err;
1354
1355         dice = card->private_data;
1356         dice->card = card;
1357         spin_lock_init(&dice->lock);
1358         mutex_init(&dice->mutex);
1359         dice->unit = unit;
1360         init_completion(&dice->clock_accepted);
1361         init_waitqueue_head(&dice->hwdep_wait);
1362
1363         dice->notification_handler.length = 4;
1364         dice->notification_handler.address_callback = dice_notification;
1365         dice->notification_handler.callback_data = dice;
1366         err = fw_core_add_address_handler(&dice->notification_handler,
1367                                           &fw_high_memory_region);
1368         if (err < 0)
1369                 goto err_mutex;
1370
1371         err = dice_owner_set(dice);
1372         if (err < 0)
1373                 goto err_notification_handler;
1374
1375         err = dice_read_params(dice);
1376         if (err < 0)
1377                 goto err_owner;
1378
1379         err = fw_iso_resources_init(&dice->resources, unit);
1380         if (err < 0)
1381                 goto err_owner;
1382         dice->resources.channels_mask = 0x00000000ffffffffuLL;
1383
1384         err = amdtp_stream_init(&dice->stream, unit, AMDTP_OUT_STREAM,
1385                                 CIP_BLOCKING);
1386         if (err < 0)
1387                 goto err_resources;
1388
1389         card->private_free = dice_card_free;
1390
1391         dice_card_strings(dice);
1392
1393         err = snd_fw_transaction(unit, TCODE_READ_QUADLET_REQUEST,
1394                                  global_address(dice, GLOBAL_CLOCK_SELECT),
1395                                  &clock_sel, 4, 0);
1396         if (err < 0)
1397                 goto error;
1398         clock_sel &= cpu_to_be32(~CLOCK_SOURCE_MASK);
1399         clock_sel |= cpu_to_be32(CLOCK_SOURCE_ARX1);
1400         err = snd_fw_transaction(unit, TCODE_WRITE_QUADLET_REQUEST,
1401                                  global_address(dice, GLOBAL_CLOCK_SELECT),
1402                                  &clock_sel, 4, 0);
1403         if (err < 0)
1404                 goto error;
1405
1406         err = dice_create_pcm(dice);
1407         if (err < 0)
1408                 goto error;
1409
1410         err = dice_create_hwdep(dice);
1411         if (err < 0)
1412                 goto error;
1413
1414         dice_create_proc(dice);
1415
1416         err = snd_card_register(card);
1417         if (err < 0)
1418                 goto error;
1419
1420         dev_set_drvdata(&unit->device, dice);
1421
1422         return 0;
1423
1424 err_resources:
1425         fw_iso_resources_destroy(&dice->resources);
1426 err_owner:
1427         dice_owner_clear(dice);
1428 err_notification_handler:
1429         fw_core_remove_address_handler(&dice->notification_handler);
1430 err_mutex:
1431         mutex_destroy(&dice->mutex);
1432 error:
1433         snd_card_free(card);
1434         return err;
1435 }
1436
1437 static void dice_remove(struct fw_unit *unit)
1438 {
1439         struct dice *dice = dev_get_drvdata(&unit->device);
1440
1441         amdtp_stream_pcm_abort(&dice->stream);
1442
1443         snd_card_disconnect(dice->card);
1444
1445         mutex_lock(&dice->mutex);
1446
1447         dice_stream_stop(dice);
1448         dice_owner_clear(dice);
1449
1450         mutex_unlock(&dice->mutex);
1451
1452         snd_card_free_when_closed(dice->card);
1453 }
1454
1455 static void dice_bus_reset(struct fw_unit *unit)
1456 {
1457         struct dice *dice = dev_get_drvdata(&unit->device);
1458
1459         /*
1460          * On a bus reset, the DICE firmware disables streaming and then goes
1461          * off contemplating its own navel for hundreds of milliseconds before
1462          * it can react to any of our attempts to reenable streaming.  This
1463          * means that we lose synchronization anyway, so we force our streams
1464          * to stop so that the application can restart them in an orderly
1465          * manner.
1466          */
1467         amdtp_stream_pcm_abort(&dice->stream);
1468
1469         mutex_lock(&dice->mutex);
1470
1471         dice->global_enabled = false;
1472         dice_stream_stop_packets(dice);
1473
1474         dice_owner_update(dice);
1475
1476         fw_iso_resources_update(&dice->resources);
1477
1478         mutex_unlock(&dice->mutex);
1479 }
1480
1481 #define DICE_INTERFACE  0x000001
1482
1483 static const struct ieee1394_device_id dice_id_table[] = {
1484         {
1485                 .match_flags = IEEE1394_MATCH_VERSION,
1486                 .version     = DICE_INTERFACE,
1487         },
1488         { }
1489 };
1490 MODULE_DEVICE_TABLE(ieee1394, dice_id_table);
1491
1492 static struct fw_driver dice_driver = {
1493         .driver   = {
1494                 .owner  = THIS_MODULE,
1495                 .name   = KBUILD_MODNAME,
1496                 .bus    = &fw_bus_type,
1497         },
1498         .probe    = dice_probe,
1499         .update   = dice_bus_reset,
1500         .remove   = dice_remove,
1501         .id_table = dice_id_table,
1502 };
1503
1504 static int __init alsa_dice_init(void)
1505 {
1506         return driver_register(&dice_driver.driver);
1507 }
1508
1509 static void __exit alsa_dice_exit(void)
1510 {
1511         driver_unregister(&dice_driver.driver);
1512 }
1513
1514 module_init(alsa_dice_init);
1515 module_exit(alsa_dice_exit);