1 /****************************************************************************/
4 * esssolo1.c -- ESS Technology Solo1 (ES1946) audio driver.
6 * Copyright (C) 1998-2001, 2003 Thomas Sailer (t.sailer@alumni.ethz.ch)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 * Module command line parameters:
26 * /dev/dsp standard /dev/dsp device, (mostly) OSS compatible
27 * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
28 * /dev/midi simple MIDI UART interface, no ioctl
31 * 10.11.1998 0.1 Initial release (without any hardware)
32 * 22.03.1999 0.2 cinfo.blocks should be reset after GETxPTR ioctl.
33 * reported by Johan Maes <joma@telindus.be>
34 * return EAGAIN instead of EBUSY when O_NONBLOCK
35 * read/write cannot be executed
36 * 07.04.1999 0.3 implemented the following ioctl's: SOUND_PCM_READ_RATE,
37 * SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
38 * Alpha fixes reported by Peter Jones <pjones@redhat.com>
39 * 15.06.1999 0.4 Fix bad allocation bug.
40 * Thanks to Deti Fliegl <fliegl@in.tum.de>
41 * 28.06.1999 0.5 Add pci_set_master
42 * 12.08.1999 0.6 Fix MIDI UART crashing the driver
43 * Changed mixer semantics from OSS documented
44 * behaviour to OSS "code behaviour".
45 * Recording might actually work now.
46 * The real DDMA controller address register is at PCI config
47 * 0x60, while the register at 0x18 is used as a placeholder
48 * register for BIOS address allocation. This register
49 * is supposed to be copied into 0x60, according
50 * to the Solo1 datasheet. When I do that, I can access
51 * the DDMA registers except the mask bit, which
52 * is stuck at 1. When I copy the contents of 0x18 +0x10
53 * to the DDMA base register, everything seems to work.
54 * The fun part is that the Windows Solo1 driver doesn't
55 * seem to do these tricks.
56 * Bugs remaining: plops and clicks when starting/stopping playback
57 * 31.08.1999 0.7 add spin_lock_init
58 * replaced current->state = x with set_current_state(x)
59 * 03.09.1999 0.8 change read semantics for MIDI to match
60 * OSS more closely; remove possible wakeup race
61 * 07.10.1999 0.9 Fix initialization; complain if sequencer writes time out
62 * Revised resource grabbing for the FM synthesizer
63 * 28.10.1999 0.10 More waitqueue races fixed
64 * 09.12.1999 0.11 Work around stupid Alpha port issue (virt_to_bus(kmalloc(GFP_DMA)) > 16M)
65 * Disabling recording on Alpha
66 * 12.01.2000 0.12 Prevent some ioctl's from returning bad count values on underrun/overrun;
67 * Tim Janik's BSE (Bedevilled Sound Engine) found this
68 * Integrated (aka redid 8-)) APM support patch by Zach Brown
69 * 07.02.2000 0.13 Use pci_alloc_consistent and pci_register_driver
70 * 19.02.2000 0.14 Use pci_dma_supported to determine if recording should be disabled
71 * 13.03.2000 0.15 Reintroduce initialization of a couple of PCI config space registers
72 * 21.11.2000 0.16 Initialize dma buffers in poll, otherwise poll may return a bogus mask
73 * 12.12.2000 0.17 More dma buffer initializations, patch from
74 * Tjeerd Mulder <tjeerd.mulder@fujitsu-siemens.com>
75 * 31.01.2001 0.18 Register/Unregister gameport, original patch from
76 * Nathaniel Daw <daw@cs.cmu.edu>
77 * Fix SETTRIGGER non OSS API conformity
78 * 10.03.2001 provide abs function, prevent picking up a bogus kernel macro
79 * for abs. Bug report by Andrew Morton <andrewm@uow.edu.au>
80 * 15.05.2001 pci_enable_device moved, return values in probe cleaned
81 * up. Marcus Meissner <mm@caldera.de>
82 * 22.05.2001 0.19 more cleanups, changed PM to PCI 2.4 style, got rid
83 * of global list of devices, using pci device data.
84 * Marcus Meissner <mm@caldera.de>
85 * 03.01.2003 0.20 open_mode fixes from Georg Acher <acher@in.tum.de>
88 /*****************************************************************************/
90 #include <linux/interrupt.h>
91 #include <linux/module.h>
92 #include <linux/string.h>
93 #include <linux/ioport.h>
94 #include <linux/sched.h>
95 #include <linux/delay.h>
96 #include <linux/sound.h>
97 #include <linux/slab.h>
98 #include <linux/soundcard.h>
99 #include <linux/pci.h>
100 #include <linux/bitops.h>
101 #include <linux/init.h>
102 #include <linux/poll.h>
103 #include <linux/spinlock.h>
104 #include <linux/smp_lock.h>
105 #include <linux/gameport.h>
106 #include <linux/wait.h>
109 #include <asm/page.h>
110 #include <asm/uaccess.h>
114 /* --------------------------------------------------------------------- */
116 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
118 /* --------------------------------------------------------------------- */
120 #ifndef PCI_VENDOR_ID_ESS
121 #define PCI_VENDOR_ID_ESS 0x125d
123 #ifndef PCI_DEVICE_ID_ESS_SOLO1
124 #define PCI_DEVICE_ID_ESS_SOLO1 0x1969
127 #define SOLO1_MAGIC ((PCI_VENDOR_ID_ESS<<16)|PCI_DEVICE_ID_ESS_SOLO1)
129 #define DDMABASE_OFFSET 0 /* chip bug workaround kludge */
130 #define DDMABASE_EXTENT 16
132 #define IOBASE_EXTENT 16
133 #define SBBASE_EXTENT 16
134 #define VCBASE_EXTENT (DDMABASE_EXTENT+DDMABASE_OFFSET)
135 #define MPUBASE_EXTENT 4
136 #define GPBASE_EXTENT 4
137 #define GAMEPORT_EXTENT 4
139 #define FMSYNTH_EXTENT 4
141 /* MIDI buffer sizes */
143 #define MIDIINBUF 256
144 #define MIDIOUTBUF 256
146 #define FMODE_MIDI_SHIFT 3
147 #define FMODE_MIDI_READ (FMODE_READ << FMODE_MIDI_SHIFT)
148 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
150 #define FMODE_DMFM 0x10
152 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
153 #define SUPPORT_JOYSTICK 1
156 static struct pci_driver solo1_driver;
158 /* --------------------------------------------------------------------- */
164 /* the corresponding pci_dev structure */
167 /* soundcore stuff */
173 /* hardware resources */
174 unsigned long iobase, sbbase, vcbase, ddmabase, mpubase; /* long for SPARC */
177 /* mixer registers */
179 unsigned short vol[10];
182 unsigned short micpreamp;
189 unsigned char clkdiv;
193 struct semaphore open_sem;
195 wait_queue_head_t open_wait;
203 unsigned hwptr, swptr;
204 unsigned total_bytes;
206 unsigned error; /* over/underrun */
207 wait_queue_head_t wait;
208 /* redundant, but makes calculations easier */
211 unsigned fragsamples;
215 unsigned endcleared:1;
217 unsigned ossfragshift;
219 unsigned subdivision;
224 unsigned ird, iwr, icnt;
225 unsigned ord, owr, ocnt;
226 wait_queue_head_t iwait;
227 wait_queue_head_t owait;
228 struct timer_list timer;
229 unsigned char ibuf[MIDIINBUF];
230 unsigned char obuf[MIDIOUTBUF];
234 struct gameport *gameport;
238 /* --------------------------------------------------------------------- */
240 static inline void write_seq(struct solo1_state *s, unsigned char data)
245 /* the local_irq_save stunt is to send the data within the command window */
246 for (i = 0; i < 0xffff; i++) {
247 local_irq_save(flags);
248 if (!(inb(s->sbbase+0xc) & 0x80)) {
249 outb(data, s->sbbase+0xc);
250 local_irq_restore(flags);
253 local_irq_restore(flags);
255 printk(KERN_ERR "esssolo1: write_seq timeout\n");
256 outb(data, s->sbbase+0xc);
259 static inline int read_seq(struct solo1_state *s, unsigned char *data)
265 for (i = 0; i < 0xffff; i++)
266 if (inb(s->sbbase+0xe) & 0x80) {
267 *data = inb(s->sbbase+0xa);
270 printk(KERN_ERR "esssolo1: read_seq timeout\n");
274 static inline int reset_ctrl(struct solo1_state *s)
278 outb(3, s->sbbase+6); /* clear sequencer and FIFO */
280 outb(0, s->sbbase+6);
281 for (i = 0; i < 0xffff; i++)
282 if (inb(s->sbbase+0xe) & 0x80)
283 if (inb(s->sbbase+0xa) == 0xaa) {
284 write_seq(s, 0xc6); /* enter enhanced mode */
290 static void write_ctrl(struct solo1_state *s, unsigned char reg, unsigned char data)
297 static unsigned char read_ctrl(struct solo1_state *s, unsigned char reg)
308 static void write_mixer(struct solo1_state *s, unsigned char reg, unsigned char data)
310 outb(reg, s->sbbase+4);
311 outb(data, s->sbbase+5);
314 static unsigned char read_mixer(struct solo1_state *s, unsigned char reg)
316 outb(reg, s->sbbase+4);
317 return inb(s->sbbase+5);
320 /* --------------------------------------------------------------------- */
322 static inline unsigned ld2(unsigned int x)
347 /* --------------------------------------------------------------------- */
349 static inline void stop_dac(struct solo1_state *s)
353 spin_lock_irqsave(&s->lock, flags);
354 s->ena &= ~FMODE_WRITE;
355 write_mixer(s, 0x78, 0x10);
356 spin_unlock_irqrestore(&s->lock, flags);
359 static void start_dac(struct solo1_state *s)
363 spin_lock_irqsave(&s->lock, flags);
364 if (!(s->ena & FMODE_WRITE) && (s->dma_dac.mapped || s->dma_dac.count > 0) && s->dma_dac.ready) {
365 s->ena |= FMODE_WRITE;
366 write_mixer(s, 0x78, 0x12);
368 write_mixer(s, 0x78, 0x13);
370 spin_unlock_irqrestore(&s->lock, flags);
373 static inline void stop_adc(struct solo1_state *s)
377 spin_lock_irqsave(&s->lock, flags);
378 s->ena &= ~FMODE_READ;
379 write_ctrl(s, 0xb8, 0xe);
380 spin_unlock_irqrestore(&s->lock, flags);
383 static void start_adc(struct solo1_state *s)
387 spin_lock_irqsave(&s->lock, flags);
388 if (!(s->ena & FMODE_READ) && (s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
389 && s->dma_adc.ready) {
390 s->ena |= FMODE_READ;
391 write_ctrl(s, 0xb8, 0xf);
393 printk(KERN_DEBUG "solo1: DMAbuffer: 0x%08lx\n", (long)s->dma_adc.rawbuf);
394 printk(KERN_DEBUG "solo1: DMA: mask: 0x%02x cnt: 0x%04x addr: 0x%08x stat: 0x%02x\n",
395 inb(s->ddmabase+0xf), inw(s->ddmabase+4), inl(s->ddmabase), inb(s->ddmabase+8));
397 outb(0, s->ddmabase+0xd); /* master reset */
398 outb(1, s->ddmabase+0xf); /* mask */
399 outb(0x54/*0x14*/, s->ddmabase+0xb); /* DMA_MODE_READ | DMA_MODE_AUTOINIT */
400 outl(virt_to_bus(s->dma_adc.rawbuf), s->ddmabase);
401 outw(s->dma_adc.dmasize-1, s->ddmabase+4);
402 outb(0, s->ddmabase+0xf);
404 spin_unlock_irqrestore(&s->lock, flags);
406 printk(KERN_DEBUG "solo1: start DMA: reg B8: 0x%02x SBstat: 0x%02x\n"
407 KERN_DEBUG "solo1: DMA: stat: 0x%02x cnt: 0x%04x mask: 0x%02x\n",
408 read_ctrl(s, 0xb8), inb(s->sbbase+0xc),
409 inb(s->ddmabase+8), inw(s->ddmabase+4), inb(s->ddmabase+0xf));
410 printk(KERN_DEBUG "solo1: A1: 0x%02x A2: 0x%02x A4: 0x%02x A5: 0x%02x A8: 0x%02x\n"
411 KERN_DEBUG "solo1: B1: 0x%02x B2: 0x%02x B4: 0x%02x B7: 0x%02x B8: 0x%02x B9: 0x%02x\n",
412 read_ctrl(s, 0xa1), read_ctrl(s, 0xa2), read_ctrl(s, 0xa4), read_ctrl(s, 0xa5), read_ctrl(s, 0xa8),
413 read_ctrl(s, 0xb1), read_ctrl(s, 0xb2), read_ctrl(s, 0xb4), read_ctrl(s, 0xb7), read_ctrl(s, 0xb8),
418 /* --------------------------------------------------------------------- */
420 #define DMABUF_DEFAULTORDER (15-PAGE_SHIFT)
421 #define DMABUF_MINORDER 1
423 static inline void dealloc_dmabuf(struct solo1_state *s, struct dmabuf *db)
425 struct page *page, *pend;
428 /* undo marking the pages as reserved */
429 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
430 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
431 ClearPageReserved(page);
432 pci_free_consistent(s->dev, PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
435 db->mapped = db->ready = 0;
438 static int prog_dmabuf(struct solo1_state *s, struct dmabuf *db)
441 unsigned bytespersec;
442 unsigned bufs, sample_shift = 0;
443 struct page *page, *pend;
445 db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
447 db->ready = db->mapped = 0;
448 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
449 if ((db->rawbuf = pci_alloc_consistent(s->dev, PAGE_SIZE << order, &db->dmaaddr)))
453 db->buforder = order;
454 /* now mark the pages as reserved; otherwise remap_pfn_range doesn't do what we want */
455 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
456 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
457 SetPageReserved(page);
459 if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
463 bytespersec = s->rate << sample_shift;
464 bufs = PAGE_SIZE << db->buforder;
465 if (db->ossfragshift) {
466 if ((1000 << db->ossfragshift) < bytespersec)
467 db->fragshift = ld2(bytespersec/1000);
469 db->fragshift = db->ossfragshift;
471 db->fragshift = ld2(bytespersec/100/(db->subdivision ? db->subdivision : 1));
472 if (db->fragshift < 3)
475 db->numfrag = bufs >> db->fragshift;
476 while (db->numfrag < 4 && db->fragshift > 3) {
478 db->numfrag = bufs >> db->fragshift;
480 db->fragsize = 1 << db->fragshift;
481 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
482 db->numfrag = db->ossmaxfrags;
483 db->fragsamples = db->fragsize >> sample_shift;
484 db->dmasize = db->numfrag << db->fragshift;
489 static inline int prog_dmabuf_adc(struct solo1_state *s)
495 /* check if PCI implementation supports 24bit busmaster DMA */
496 if (s->dev->dma_mask > 0xffffff)
498 if ((c = prog_dmabuf(s, &s->dma_adc)))
500 va = s->dma_adc.dmaaddr;
501 if ((va & ~((1<<24)-1)))
502 panic("solo1: buffer above 16M boundary");
503 outb(0, s->ddmabase+0xd); /* clear */
504 outb(1, s->ddmabase+0xf); /* mask */
505 /*outb(0, s->ddmabase+8);*/ /* enable (enable is active low!) */
506 outb(0x54, s->ddmabase+0xb); /* DMA_MODE_READ | DMA_MODE_AUTOINIT */
507 outl(va, s->ddmabase);
508 outw(s->dma_adc.dmasize-1, s->ddmabase+4);
509 c = - s->dma_adc.fragsamples;
510 write_ctrl(s, 0xa4, c);
511 write_ctrl(s, 0xa5, c >> 8);
512 outb(0, s->ddmabase+0xf);
513 s->dma_adc.ready = 1;
517 static inline int prog_dmabuf_dac(struct solo1_state *s)
523 if ((c = prog_dmabuf(s, &s->dma_dac)))
525 memset(s->dma_dac.rawbuf, (s->fmt & (AFMT_U8 | AFMT_U16_LE)) ? 0 : 0x80, s->dma_dac.dmasize); /* almost correct for U16 */
526 va = s->dma_dac.dmaaddr;
527 if ((va ^ (va + s->dma_dac.dmasize - 1)) & ~((1<<20)-1))
528 panic("solo1: buffer crosses 1M boundary");
530 /* warning: s->dma_dac.dmasize & 0xffff must not be zero! i.e. this limits us to a 32k buffer */
531 outw(s->dma_dac.dmasize, s->iobase+4);
532 c = - s->dma_dac.fragsamples;
533 write_mixer(s, 0x74, c);
534 write_mixer(s, 0x76, c >> 8);
535 outb(0xa, s->iobase+6);
536 s->dma_dac.ready = 1;
540 static inline void clear_advance(void *buf, unsigned bsize, unsigned bptr, unsigned len, unsigned char c)
542 if (bptr + len > bsize) {
543 unsigned x = bsize - bptr;
544 memset(((char *)buf) + bptr, c, x);
548 memset(((char *)buf) + bptr, c, len);
551 /* call with spinlock held! */
553 static void solo1_update_ptr(struct solo1_state *s)
558 /* update ADC pointer */
559 if (s->ena & FMODE_READ) {
560 hwptr = (s->dma_adc.dmasize - 1 - inw(s->ddmabase+4)) % s->dma_adc.dmasize;
561 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
562 s->dma_adc.hwptr = hwptr;
563 s->dma_adc.total_bytes += diff;
564 s->dma_adc.count += diff;
566 printk(KERN_DEBUG "solo1: rd: hwptr %u swptr %u dmasize %u count %u\n",
567 s->dma_adc.hwptr, s->dma_adc.swptr, s->dma_adc.dmasize, s->dma_adc.count);
569 if (s->dma_adc.mapped) {
570 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
571 wake_up(&s->dma_adc.wait);
573 if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
574 s->ena &= ~FMODE_READ;
575 write_ctrl(s, 0xb8, 0xe);
578 if (s->dma_adc.count > 0)
579 wake_up(&s->dma_adc.wait);
582 /* update DAC pointer */
583 if (s->ena & FMODE_WRITE) {
584 hwptr = (s->dma_dac.dmasize - inw(s->iobase+4)) % s->dma_dac.dmasize;
585 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
586 s->dma_dac.hwptr = hwptr;
587 s->dma_dac.total_bytes += diff;
589 printk(KERN_DEBUG "solo1: wr: hwptr %u swptr %u dmasize %u count %u\n",
590 s->dma_dac.hwptr, s->dma_dac.swptr, s->dma_dac.dmasize, s->dma_dac.count);
592 if (s->dma_dac.mapped) {
593 s->dma_dac.count += diff;
594 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
595 wake_up(&s->dma_dac.wait);
597 s->dma_dac.count -= diff;
598 if (s->dma_dac.count <= 0) {
599 s->ena &= ~FMODE_WRITE;
600 write_mixer(s, 0x78, 0x12);
602 } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
603 clear_advance(s->dma_dac.rawbuf, s->dma_dac.dmasize, s->dma_dac.swptr,
604 s->dma_dac.fragsize, (s->fmt & (AFMT_U8 | AFMT_U16_LE)) ? 0 : 0x80);
605 s->dma_dac.endcleared = 1;
607 if (s->dma_dac.count < (signed)s->dma_dac.dmasize)
608 wake_up(&s->dma_dac.wait);
613 /* --------------------------------------------------------------------- */
615 static void prog_codec(struct solo1_state *s)
623 /* program sampling rates */
624 filter = s->rate * 9 / 20; /* Set filter roll-off to 90% of rate/2 */
625 fdiv = 256 - 7160000 / (filter * 82);
626 spin_lock_irqsave(&s->lock, flags);
627 write_ctrl(s, 0xa1, s->clkdiv);
628 write_ctrl(s, 0xa2, fdiv);
629 write_mixer(s, 0x70, s->clkdiv);
630 write_mixer(s, 0x72, fdiv);
631 /* program ADC parameters */
632 write_ctrl(s, 0xb8, 0xe);
633 write_ctrl(s, 0xb9, /*0x1*/0);
634 write_ctrl(s, 0xa8, (s->channels > 1) ? 0x11 : 0x12);
636 if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
638 if (s->fmt & (AFMT_S16_LE | AFMT_S8))
642 write_ctrl(s, 0xb7, (c & 0x70) | 1);
643 write_ctrl(s, 0xb7, c);
644 write_ctrl(s, 0xb1, 0x50);
645 write_ctrl(s, 0xb2, 0x50);
646 /* program DAC parameters */
648 if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
650 if (s->fmt & (AFMT_S16_LE | AFMT_S8))
654 write_mixer(s, 0x7a, c);
655 write_mixer(s, 0x78, 0x10);
657 spin_unlock_irqrestore(&s->lock, flags);
660 /* --------------------------------------------------------------------- */
662 static const char invalid_magic[] = KERN_CRIT "solo1: invalid magic value\n";
664 #define VALIDATE_STATE(s) \
666 if (!(s) || (s)->magic != SOLO1_MAGIC) { \
667 printk(invalid_magic); \
672 /* --------------------------------------------------------------------- */
674 static int mixer_ioctl(struct solo1_state *s, unsigned int cmd, unsigned long arg)
676 static const unsigned int mixer_src[8] = {
677 SOUND_MASK_MIC, SOUND_MASK_MIC, SOUND_MASK_CD, SOUND_MASK_VOLUME,
678 SOUND_MASK_MIC, 0, SOUND_MASK_LINE, 0
680 static const unsigned char mixtable1[SOUND_MIXER_NRDEVICES] = {
681 [SOUND_MIXER_PCM] = 1, /* voice */
682 [SOUND_MIXER_SYNTH] = 2, /* FM */
683 [SOUND_MIXER_CD] = 3, /* CD */
684 [SOUND_MIXER_LINE] = 4, /* Line */
685 [SOUND_MIXER_LINE1] = 5, /* AUX */
686 [SOUND_MIXER_MIC] = 6, /* Mic */
687 [SOUND_MIXER_LINE2] = 7, /* Mono in */
688 [SOUND_MIXER_SPEAKER] = 8, /* Speaker */
689 [SOUND_MIXER_RECLEV] = 9, /* Recording level */
690 [SOUND_MIXER_VOLUME] = 10 /* Master Volume */
692 static const unsigned char mixreg[] = {
701 unsigned char l, r, rl, rr, vidx;
703 int __user *p = (int __user *)arg;
707 if (cmd == SOUND_MIXER_PRIVATE1) {
708 /* enable/disable/query mixer preamp */
709 if (get_user(val, p))
712 val = val ? 0xff : 0xf7;
713 write_mixer(s, 0x7d, (read_mixer(s, 0x7d) | 0x08) & val);
715 val = (read_mixer(s, 0x7d) & 0x08) ? 1 : 0;
716 return put_user(val, p);
718 if (cmd == SOUND_MIXER_PRIVATE2) {
719 /* enable/disable/query spatializer */
720 if (get_user(val, p))
724 write_mixer(s, 0x52, val);
725 write_mixer(s, 0x50, val ? 0x08 : 0);
727 return put_user(read_mixer(s, 0x52), p);
729 if (cmd == SOUND_MIXER_INFO) {
731 strncpy(info.id, "Solo1", sizeof(info.id));
732 strncpy(info.name, "ESS Solo1", sizeof(info.name));
733 info.modify_counter = s->mix.modcnt;
734 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
738 if (cmd == SOUND_OLD_MIXER_INFO) {
739 _old_mixer_info info;
740 strncpy(info.id, "Solo1", sizeof(info.id));
741 strncpy(info.name, "ESS Solo1", sizeof(info.name));
742 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
746 if (cmd == OSS_GETVERSION)
747 return put_user(SOUND_VERSION, p);
748 if (_IOC_TYPE(cmd) != 'M' || _SIOC_SIZE(cmd) != sizeof(int))
750 if (_SIOC_DIR(cmd) == _SIOC_READ) {
751 switch (_IOC_NR(cmd)) {
752 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
753 return put_user(mixer_src[read_mixer(s, 0x1c) & 7], p);
755 case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
756 return put_user(SOUND_MASK_PCM | SOUND_MASK_SYNTH | SOUND_MASK_CD |
757 SOUND_MASK_LINE | SOUND_MASK_LINE1 | SOUND_MASK_MIC |
758 SOUND_MASK_VOLUME | SOUND_MASK_LINE2 | SOUND_MASK_RECLEV |
759 SOUND_MASK_SPEAKER, p);
761 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
762 return put_user(SOUND_MASK_LINE | SOUND_MASK_MIC | SOUND_MASK_CD | SOUND_MASK_VOLUME, p);
764 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
765 return put_user(SOUND_MASK_PCM | SOUND_MASK_SYNTH | SOUND_MASK_CD |
766 SOUND_MASK_LINE | SOUND_MASK_LINE1 | SOUND_MASK_MIC |
767 SOUND_MASK_VOLUME | SOUND_MASK_LINE2 | SOUND_MASK_RECLEV, p);
769 case SOUND_MIXER_CAPS:
770 return put_user(SOUND_CAP_EXCL_INPUT, p);
774 if (i >= SOUND_MIXER_NRDEVICES || !(vidx = mixtable1[i]))
776 return put_user(s->mix.vol[vidx-1], p);
779 if (_SIOC_DIR(cmd) != (_SIOC_READ|_SIOC_WRITE))
782 switch (_IOC_NR(cmd)) {
783 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
786 static const unsigned char regs[] = {
787 0x1c, 0x1a, 0x36, 0x38, 0x3a, 0x3c, 0x3e, 0x60, 0x62, 0x6d, 0x7c
791 for (i = 0; i < sizeof(regs); i++)
792 printk(KERN_DEBUG "solo1: mixer reg 0x%02x: 0x%02x\n",
793 regs[i], read_mixer(s, regs[i]));
794 printk(KERN_DEBUG "solo1: ctrl reg 0x%02x: 0x%02x\n",
795 0xb4, read_ctrl(s, 0xb4));
798 if (get_user(val, p))
804 val &= ~mixer_src[read_mixer(s, 0x1c) & 7];
805 for (i = 0; i < 8; i++) {
806 if (mixer_src[i] & val)
811 write_mixer(s, 0x1c, i);
814 case SOUND_MIXER_VOLUME:
815 if (get_user(val, p))
820 r = (val >> 8) & 0xff;
827 rl = (l * 2 - 11) / 3;
828 l = (rl * 3 + 11) / 2;
834 rr = (r * 2 - 11) / 3;
835 r = (rr * 3 + 11) / 2;
837 write_mixer(s, 0x60, rl);
838 write_mixer(s, 0x62, rr);
839 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
840 s->mix.vol[9] = ((unsigned int)r << 8) | l;
844 return put_user(s->mix.vol[9], p);
846 case SOUND_MIXER_SPEAKER:
847 if (get_user(val, p))
856 write_mixer(s, 0x3c, rl);
857 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
858 s->mix.vol[7] = l * 0x101;
862 return put_user(s->mix.vol[7], p);
864 case SOUND_MIXER_RECLEV:
865 if (get_user(val, p))
867 l = (val << 1) & 0x1fe;
872 r = (val >> 7) & 0x1fe;
879 r = (rl * 13 + 5) / 2;
880 l = (rr * 13 + 5) / 2;
881 write_ctrl(s, 0xb4, (rl << 4) | rr);
882 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
883 s->mix.vol[8] = ((unsigned int)r << 8) | l;
887 return put_user(s->mix.vol[8], p);
891 if (i >= SOUND_MIXER_NRDEVICES || !(vidx = mixtable1[i]))
893 if (get_user(val, p))
895 l = (val << 1) & 0x1fe;
900 r = (val >> 7) & 0x1fe;
907 r = (rl * 13 + 5) / 2;
908 l = (rr * 13 + 5) / 2;
909 write_mixer(s, mixreg[vidx-1], (rl << 4) | rr);
910 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
911 s->mix.vol[vidx-1] = ((unsigned int)r << 8) | l;
913 s->mix.vol[vidx-1] = val;
915 return put_user(s->mix.vol[vidx-1], p);
919 /* --------------------------------------------------------------------- */
921 static int solo1_open_mixdev(struct inode *inode, struct file *file)
923 unsigned int minor = iminor(inode);
924 struct solo1_state *s = NULL;
925 struct pci_dev *pci_dev = NULL;
927 while ((pci_dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL) {
928 struct pci_driver *drvr;
929 drvr = pci_dev_driver (pci_dev);
930 if (drvr != &solo1_driver)
932 s = (struct solo1_state*)pci_get_drvdata(pci_dev);
935 if (s->dev_mixer == minor)
941 file->private_data = s;
942 return nonseekable_open(inode, file);
945 static int solo1_release_mixdev(struct inode *inode, struct file *file)
947 struct solo1_state *s = (struct solo1_state *)file->private_data;
953 static int solo1_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
955 return mixer_ioctl((struct solo1_state *)file->private_data, cmd, arg);
958 static /*const*/ struct file_operations solo1_mixer_fops = {
959 .owner = THIS_MODULE,
961 .ioctl = solo1_ioctl_mixdev,
962 .open = solo1_open_mixdev,
963 .release = solo1_release_mixdev,
966 /* --------------------------------------------------------------------- */
968 static int drain_dac(struct solo1_state *s, int nonblock)
970 DECLARE_WAITQUEUE(wait, current);
975 if (s->dma_dac.mapped)
977 add_wait_queue(&s->dma_dac.wait, &wait);
979 set_current_state(TASK_INTERRUPTIBLE);
980 spin_lock_irqsave(&s->lock, flags);
981 count = s->dma_dac.count;
982 spin_unlock_irqrestore(&s->lock, flags);
985 if (signal_pending(current))
988 remove_wait_queue(&s->dma_dac.wait, &wait);
989 set_current_state(TASK_RUNNING);
992 tmo = 3 * HZ * (count + s->dma_dac.fragsize) / 2 / s->rate;
993 if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
997 if (!schedule_timeout(tmo + 1))
998 printk(KERN_DEBUG "solo1: dma timed out??\n");
1000 remove_wait_queue(&s->dma_dac.wait, &wait);
1001 set_current_state(TASK_RUNNING);
1002 if (signal_pending(current))
1003 return -ERESTARTSYS;
1007 /* --------------------------------------------------------------------- */
1009 static ssize_t solo1_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1011 struct solo1_state *s = (struct solo1_state *)file->private_data;
1012 DECLARE_WAITQUEUE(wait, current);
1014 unsigned long flags;
1019 if (s->dma_adc.mapped)
1021 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1023 if (!access_ok(VERIFY_WRITE, buffer, count))
1026 add_wait_queue(&s->dma_adc.wait, &wait);
1028 spin_lock_irqsave(&s->lock, flags);
1029 swptr = s->dma_adc.swptr;
1030 cnt = s->dma_adc.dmasize-swptr;
1031 if (s->dma_adc.count < cnt)
1032 cnt = s->dma_adc.count;
1034 __set_current_state(TASK_INTERRUPTIBLE);
1035 spin_unlock_irqrestore(&s->lock, flags);
1039 printk(KERN_DEBUG "solo1_read: reg B8: 0x%02x DMAstat: 0x%02x DMAcnt: 0x%04x SBstat: 0x%02x cnt: %u\n",
1040 read_ctrl(s, 0xb8), inb(s->ddmabase+8), inw(s->ddmabase+4), inb(s->sbbase+0xc), cnt);
1043 if (s->dma_adc.enabled)
1046 printk(KERN_DEBUG "solo1_read: regs: A1: 0x%02x A2: 0x%02x A4: 0x%02x A5: 0x%02x A8: 0x%02x\n"
1047 KERN_DEBUG "solo1_read: regs: B1: 0x%02x B2: 0x%02x B7: 0x%02x B8: 0x%02x B9: 0x%02x\n"
1048 KERN_DEBUG "solo1_read: DMA: addr: 0x%08x cnt: 0x%04x stat: 0x%02x mask: 0x%02x\n"
1049 KERN_DEBUG "solo1_read: SBstat: 0x%02x cnt: %u\n",
1050 read_ctrl(s, 0xa1), read_ctrl(s, 0xa2), read_ctrl(s, 0xa4), read_ctrl(s, 0xa5), read_ctrl(s, 0xa8),
1051 read_ctrl(s, 0xb1), read_ctrl(s, 0xb2), read_ctrl(s, 0xb7), read_ctrl(s, 0xb8), read_ctrl(s, 0xb9),
1052 inl(s->ddmabase), inw(s->ddmabase+4), inb(s->ddmabase+8), inb(s->ddmabase+15), inb(s->sbbase+0xc), cnt);
1054 if (inb(s->ddmabase+15) & 1)
1055 printk(KERN_ERR "solo1: cannot start recording, DDMA mask bit stuck at 1\n");
1056 if (file->f_flags & O_NONBLOCK) {
1063 printk(KERN_DEBUG "solo1_read: regs: A1: 0x%02x A2: 0x%02x A4: 0x%02x A5: 0x%02x A8: 0x%02x\n"
1064 KERN_DEBUG "solo1_read: regs: B1: 0x%02x B2: 0x%02x B7: 0x%02x B8: 0x%02x B9: 0x%02x\n"
1065 KERN_DEBUG "solo1_read: DMA: addr: 0x%08x cnt: 0x%04x stat: 0x%02x mask: 0x%02x\n"
1066 KERN_DEBUG "solo1_read: SBstat: 0x%02x cnt: %u\n",
1067 read_ctrl(s, 0xa1), read_ctrl(s, 0xa2), read_ctrl(s, 0xa4), read_ctrl(s, 0xa5), read_ctrl(s, 0xa8),
1068 read_ctrl(s, 0xb1), read_ctrl(s, 0xb2), read_ctrl(s, 0xb7), read_ctrl(s, 0xb8), read_ctrl(s, 0xb9),
1069 inl(s->ddmabase), inw(s->ddmabase+4), inb(s->ddmabase+8), inb(s->ddmabase+15), inb(s->sbbase+0xc), cnt);
1071 if (signal_pending(current)) {
1078 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
1083 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1084 spin_lock_irqsave(&s->lock, flags);
1085 s->dma_adc.swptr = swptr;
1086 s->dma_adc.count -= cnt;
1087 spin_unlock_irqrestore(&s->lock, flags);
1091 if (s->dma_adc.enabled)
1094 printk(KERN_DEBUG "solo1_read: reg B8: 0x%02x DMAstat: 0x%02x DMAcnt: 0x%04x SBstat: 0x%02x\n",
1095 read_ctrl(s, 0xb8), inb(s->ddmabase+8), inw(s->ddmabase+4), inb(s->sbbase+0xc));
1098 remove_wait_queue(&s->dma_adc.wait, &wait);
1099 set_current_state(TASK_RUNNING);
1103 static ssize_t solo1_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1105 struct solo1_state *s = (struct solo1_state *)file->private_data;
1106 DECLARE_WAITQUEUE(wait, current);
1108 unsigned long flags;
1113 if (s->dma_dac.mapped)
1115 if (!s->dma_dac.ready && (ret = prog_dmabuf_dac(s)))
1117 if (!access_ok(VERIFY_READ, buffer, count))
1120 printk(KERN_DEBUG "solo1_write: reg 70: 0x%02x 71: 0x%02x 72: 0x%02x 74: 0x%02x 76: 0x%02x 78: 0x%02x 7A: 0x%02x\n"
1121 KERN_DEBUG "solo1_write: DMA: addr: 0x%08x cnt: 0x%04x stat: 0x%02x SBstat: 0x%02x\n",
1122 read_mixer(s, 0x70), read_mixer(s, 0x71), read_mixer(s, 0x72), read_mixer(s, 0x74), read_mixer(s, 0x76),
1123 read_mixer(s, 0x78), read_mixer(s, 0x7a), inl(s->iobase), inw(s->iobase+4), inb(s->iobase+6), inb(s->sbbase+0xc));
1124 printk(KERN_DEBUG "solo1_write: reg 78: 0x%02x reg 7A: 0x%02x DMAcnt: 0x%04x DMAstat: 0x%02x SBstat: 0x%02x\n",
1125 read_mixer(s, 0x78), read_mixer(s, 0x7a), inw(s->iobase+4), inb(s->iobase+6), inb(s->sbbase+0xc));
1128 add_wait_queue(&s->dma_dac.wait, &wait);
1130 spin_lock_irqsave(&s->lock, flags);
1131 if (s->dma_dac.count < 0) {
1132 s->dma_dac.count = 0;
1133 s->dma_dac.swptr = s->dma_dac.hwptr;
1135 swptr = s->dma_dac.swptr;
1136 cnt = s->dma_dac.dmasize-swptr;
1137 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
1138 cnt = s->dma_dac.dmasize - s->dma_dac.count;
1140 __set_current_state(TASK_INTERRUPTIBLE);
1141 spin_unlock_irqrestore(&s->lock, flags);
1145 if (s->dma_dac.enabled)
1147 if (file->f_flags & O_NONBLOCK) {
1153 if (signal_pending(current)) {
1160 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt)) {
1165 swptr = (swptr + cnt) % s->dma_dac.dmasize;
1166 spin_lock_irqsave(&s->lock, flags);
1167 s->dma_dac.swptr = swptr;
1168 s->dma_dac.count += cnt;
1169 s->dma_dac.endcleared = 0;
1170 spin_unlock_irqrestore(&s->lock, flags);
1174 if (s->dma_dac.enabled)
1177 remove_wait_queue(&s->dma_dac.wait, &wait);
1178 set_current_state(TASK_RUNNING);
1182 /* No kernel lock - we have our own spinlock */
1183 static unsigned int solo1_poll(struct file *file, struct poll_table_struct *wait)
1185 struct solo1_state *s = (struct solo1_state *)file->private_data;
1186 unsigned long flags;
1187 unsigned int mask = 0;
1190 if (file->f_mode & FMODE_WRITE) {
1191 if (!s->dma_dac.ready && prog_dmabuf_dac(s))
1193 poll_wait(file, &s->dma_dac.wait, wait);
1195 if (file->f_mode & FMODE_READ) {
1196 if (!s->dma_adc.ready && prog_dmabuf_adc(s))
1198 poll_wait(file, &s->dma_adc.wait, wait);
1200 spin_lock_irqsave(&s->lock, flags);
1201 solo1_update_ptr(s);
1202 if (file->f_mode & FMODE_READ) {
1203 if (s->dma_adc.mapped) {
1204 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1205 mask |= POLLIN | POLLRDNORM;
1207 if (s->dma_adc.count > 0)
1208 mask |= POLLIN | POLLRDNORM;
1211 if (file->f_mode & FMODE_WRITE) {
1212 if (s->dma_dac.mapped) {
1213 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1214 mask |= POLLOUT | POLLWRNORM;
1216 if ((signed)s->dma_dac.dmasize > s->dma_dac.count)
1217 mask |= POLLOUT | POLLWRNORM;
1220 spin_unlock_irqrestore(&s->lock, flags);
1225 static int solo1_mmap(struct file *file, struct vm_area_struct *vma)
1227 struct solo1_state *s = (struct solo1_state *)file->private_data;
1234 if (vma->vm_flags & VM_WRITE) {
1235 if ((ret = prog_dmabuf_dac(s)) != 0)
1238 } else if (vma->vm_flags & VM_READ) {
1239 if ((ret = prog_dmabuf_adc(s)) != 0)
1245 if (vma->vm_pgoff != 0)
1247 size = vma->vm_end - vma->vm_start;
1248 if (size > (PAGE_SIZE << db->buforder))
1251 if (remap_pfn_range(vma, vma->vm_start,
1252 virt_to_phys(db->rawbuf) >> PAGE_SHIFT,
1253 size, vma->vm_page_prot))
1262 static int solo1_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1264 struct solo1_state *s = (struct solo1_state *)file->private_data;
1265 unsigned long flags;
1266 audio_buf_info abinfo;
1268 int val, mapped, ret, count;
1270 unsigned rate1, rate2;
1271 void __user *argp = (void __user *)arg;
1272 int __user *p = argp;
1275 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1276 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1278 case OSS_GETVERSION:
1279 return put_user(SOUND_VERSION, p);
1281 case SNDCTL_DSP_SYNC:
1282 if (file->f_mode & FMODE_WRITE)
1283 return drain_dac(s, 0/*file->f_flags & O_NONBLOCK*/);
1286 case SNDCTL_DSP_SETDUPLEX:
1289 case SNDCTL_DSP_GETCAPS:
1290 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
1292 case SNDCTL_DSP_RESET:
1293 if (file->f_mode & FMODE_WRITE) {
1295 synchronize_irq(s->irq);
1296 s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
1298 if (file->f_mode & FMODE_READ) {
1300 synchronize_irq(s->irq);
1301 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1306 case SNDCTL_DSP_SPEED:
1307 if (get_user(val, p))
1312 s->dma_adc.ready = s->dma_dac.ready = 0;
1313 /* program sampling rates */
1318 div1 = (768000 + val / 2) / val;
1319 rate1 = (768000 + div1 / 2) / div1;
1321 div2 = (793800 + val / 2) / val;
1322 rate2 = (793800 + div2 / 2) / div2;
1323 div2 = (-div2) & 0x7f;
1324 if (abs(val - rate2) < abs(val - rate1)) {
1332 return put_user(s->rate, p);
1334 case SNDCTL_DSP_STEREO:
1335 if (get_user(val, p))
1339 s->dma_adc.ready = s->dma_dac.ready = 0;
1340 /* program channels */
1341 s->channels = val ? 2 : 1;
1345 case SNDCTL_DSP_CHANNELS:
1346 if (get_user(val, p))
1351 s->dma_adc.ready = s->dma_dac.ready = 0;
1352 /* program channels */
1353 s->channels = (val >= 2) ? 2 : 1;
1356 return put_user(s->channels, p);
1358 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1359 return put_user(AFMT_S16_LE|AFMT_U16_LE|AFMT_S8|AFMT_U8, p);
1361 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1362 if (get_user(val, p))
1364 if (val != AFMT_QUERY) {
1367 s->dma_adc.ready = s->dma_dac.ready = 0;
1368 /* program format */
1369 if (val != AFMT_S16_LE && val != AFMT_U16_LE &&
1370 val != AFMT_S8 && val != AFMT_U8)
1375 return put_user(s->fmt, p);
1377 case SNDCTL_DSP_POST:
1380 case SNDCTL_DSP_GETTRIGGER:
1382 if (file->f_mode & s->ena & FMODE_READ)
1383 val |= PCM_ENABLE_INPUT;
1384 if (file->f_mode & s->ena & FMODE_WRITE)
1385 val |= PCM_ENABLE_OUTPUT;
1386 return put_user(val, p);
1388 case SNDCTL_DSP_SETTRIGGER:
1389 if (get_user(val, p))
1391 if (file->f_mode & FMODE_READ) {
1392 if (val & PCM_ENABLE_INPUT) {
1393 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1395 s->dma_dac.enabled = 1;
1397 if (inb(s->ddmabase+15) & 1)
1398 printk(KERN_ERR "solo1: cannot start recording, DDMA mask bit stuck at 1\n");
1400 s->dma_dac.enabled = 0;
1404 if (file->f_mode & FMODE_WRITE) {
1405 if (val & PCM_ENABLE_OUTPUT) {
1406 if (!s->dma_dac.ready && (ret = prog_dmabuf_dac(s)))
1408 s->dma_dac.enabled = 1;
1411 s->dma_dac.enabled = 0;
1417 case SNDCTL_DSP_GETOSPACE:
1418 if (!(file->f_mode & FMODE_WRITE))
1420 if (!s->dma_dac.ready && (val = prog_dmabuf_dac(s)) != 0)
1422 spin_lock_irqsave(&s->lock, flags);
1423 solo1_update_ptr(s);
1424 abinfo.fragsize = s->dma_dac.fragsize;
1425 count = s->dma_dac.count;
1428 abinfo.bytes = s->dma_dac.dmasize - count;
1429 abinfo.fragstotal = s->dma_dac.numfrag;
1430 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1431 spin_unlock_irqrestore(&s->lock, flags);
1432 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1434 case SNDCTL_DSP_GETISPACE:
1435 if (!(file->f_mode & FMODE_READ))
1437 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1439 spin_lock_irqsave(&s->lock, flags);
1440 solo1_update_ptr(s);
1441 abinfo.fragsize = s->dma_adc.fragsize;
1442 abinfo.bytes = s->dma_adc.count;
1443 abinfo.fragstotal = s->dma_adc.numfrag;
1444 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1445 spin_unlock_irqrestore(&s->lock, flags);
1446 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1448 case SNDCTL_DSP_NONBLOCK:
1449 file->f_flags |= O_NONBLOCK;
1452 case SNDCTL_DSP_GETODELAY:
1453 if (!(file->f_mode & FMODE_WRITE))
1455 if (!s->dma_dac.ready && (val = prog_dmabuf_dac(s)) != 0)
1457 spin_lock_irqsave(&s->lock, flags);
1458 solo1_update_ptr(s);
1459 count = s->dma_dac.count;
1460 spin_unlock_irqrestore(&s->lock, flags);
1463 return put_user(count, p);
1465 case SNDCTL_DSP_GETIPTR:
1466 if (!(file->f_mode & FMODE_READ))
1468 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1470 spin_lock_irqsave(&s->lock, flags);
1471 solo1_update_ptr(s);
1472 cinfo.bytes = s->dma_adc.total_bytes;
1473 cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
1474 cinfo.ptr = s->dma_adc.hwptr;
1475 if (s->dma_adc.mapped)
1476 s->dma_adc.count &= s->dma_adc.fragsize-1;
1477 spin_unlock_irqrestore(&s->lock, flags);
1478 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1482 case SNDCTL_DSP_GETOPTR:
1483 if (!(file->f_mode & FMODE_WRITE))
1485 if (!s->dma_dac.ready && (val = prog_dmabuf_dac(s)) != 0)
1487 spin_lock_irqsave(&s->lock, flags);
1488 solo1_update_ptr(s);
1489 cinfo.bytes = s->dma_dac.total_bytes;
1490 count = s->dma_dac.count;
1493 cinfo.blocks = count >> s->dma_dac.fragshift;
1494 cinfo.ptr = s->dma_dac.hwptr;
1495 if (s->dma_dac.mapped)
1496 s->dma_dac.count &= s->dma_dac.fragsize-1;
1497 spin_unlock_irqrestore(&s->lock, flags);
1499 printk(KERN_DEBUG "esssolo1: GETOPTR: bytes %u blocks %u ptr %u, buforder %u numfrag %u fragshift %u\n"
1500 KERN_DEBUG "esssolo1: swptr %u count %u fragsize %u dmasize %u fragsamples %u\n",
1501 cinfo.bytes, cinfo.blocks, cinfo.ptr, s->dma_dac.buforder, s->dma_dac.numfrag, s->dma_dac.fragshift,
1502 s->dma_dac.swptr, s->dma_dac.count, s->dma_dac.fragsize, s->dma_dac.dmasize, s->dma_dac.fragsamples);
1504 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1508 case SNDCTL_DSP_GETBLKSIZE:
1509 if (file->f_mode & FMODE_WRITE) {
1510 if ((val = prog_dmabuf_dac(s)))
1512 return put_user(s->dma_dac.fragsize, p);
1514 if ((val = prog_dmabuf_adc(s)))
1516 return put_user(s->dma_adc.fragsize, p);
1518 case SNDCTL_DSP_SETFRAGMENT:
1519 if (get_user(val, p))
1521 if (file->f_mode & FMODE_READ) {
1522 s->dma_adc.ossfragshift = val & 0xffff;
1523 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1524 if (s->dma_adc.ossfragshift < 4)
1525 s->dma_adc.ossfragshift = 4;
1526 if (s->dma_adc.ossfragshift > 15)
1527 s->dma_adc.ossfragshift = 15;
1528 if (s->dma_adc.ossmaxfrags < 4)
1529 s->dma_adc.ossmaxfrags = 4;
1531 if (file->f_mode & FMODE_WRITE) {
1532 s->dma_dac.ossfragshift = val & 0xffff;
1533 s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1534 if (s->dma_dac.ossfragshift < 4)
1535 s->dma_dac.ossfragshift = 4;
1536 if (s->dma_dac.ossfragshift > 15)
1537 s->dma_dac.ossfragshift = 15;
1538 if (s->dma_dac.ossmaxfrags < 4)
1539 s->dma_dac.ossmaxfrags = 4;
1543 case SNDCTL_DSP_SUBDIVIDE:
1544 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1545 (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1547 if (get_user(val, p))
1549 if (val != 1 && val != 2 && val != 4)
1551 if (file->f_mode & FMODE_READ)
1552 s->dma_adc.subdivision = val;
1553 if (file->f_mode & FMODE_WRITE)
1554 s->dma_dac.subdivision = val;
1557 case SOUND_PCM_READ_RATE:
1558 return put_user(s->rate, p);
1560 case SOUND_PCM_READ_CHANNELS:
1561 return put_user(s->channels, p);
1563 case SOUND_PCM_READ_BITS:
1564 return put_user((s->fmt & (AFMT_S8|AFMT_U8)) ? 8 : 16, p);
1566 case SOUND_PCM_WRITE_FILTER:
1567 case SNDCTL_DSP_SETSYNCRO:
1568 case SOUND_PCM_READ_FILTER:
1572 return mixer_ioctl(s, cmd, arg);
1575 static int solo1_release(struct inode *inode, struct file *file)
1577 struct solo1_state *s = (struct solo1_state *)file->private_data;
1581 if (file->f_mode & FMODE_WRITE)
1582 drain_dac(s, file->f_flags & O_NONBLOCK);
1584 if (file->f_mode & FMODE_WRITE) {
1586 outb(0, s->iobase+6); /* disable DMA */
1587 dealloc_dmabuf(s, &s->dma_dac);
1589 if (file->f_mode & FMODE_READ) {
1591 outb(1, s->ddmabase+0xf); /* mask DMA channel */
1592 outb(0, s->ddmabase+0xd); /* DMA master clear */
1593 dealloc_dmabuf(s, &s->dma_adc);
1595 s->open_mode &= ~(FMODE_READ | FMODE_WRITE);
1596 wake_up(&s->open_wait);
1602 static int solo1_open(struct inode *inode, struct file *file)
1604 unsigned int minor = iminor(inode);
1605 DECLARE_WAITQUEUE(wait, current);
1606 struct solo1_state *s = NULL;
1607 struct pci_dev *pci_dev = NULL;
1609 while ((pci_dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL) {
1610 struct pci_driver *drvr;
1612 drvr = pci_dev_driver(pci_dev);
1613 if (drvr != &solo1_driver)
1615 s = (struct solo1_state*)pci_get_drvdata(pci_dev);
1618 if (!((s->dev_audio ^ minor) & ~0xf))
1624 file->private_data = s;
1625 /* wait for device to become free */
1627 while (s->open_mode & (FMODE_READ | FMODE_WRITE)) {
1628 if (file->f_flags & O_NONBLOCK) {
1632 add_wait_queue(&s->open_wait, &wait);
1633 __set_current_state(TASK_INTERRUPTIBLE);
1636 remove_wait_queue(&s->open_wait, &wait);
1637 set_current_state(TASK_RUNNING);
1638 if (signal_pending(current))
1639 return -ERESTARTSYS;
1645 s->clkdiv = 96 | 0x80;
1647 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1648 s->dma_adc.enabled = 1;
1649 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
1650 s->dma_dac.enabled = 1;
1651 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1654 return nonseekable_open(inode, file);
1657 static /*const*/ struct file_operations solo1_audio_fops = {
1658 .owner = THIS_MODULE,
1659 .llseek = no_llseek,
1661 .write = solo1_write,
1663 .ioctl = solo1_ioctl,
1666 .release = solo1_release,
1669 /* --------------------------------------------------------------------- */
1671 /* hold spinlock for the following! */
1672 static void solo1_handle_midi(struct solo1_state *s)
1680 while (!(inb(s->mpubase+1) & 0x80)) {
1681 ch = inb(s->mpubase);
1682 if (s->midi.icnt < MIDIINBUF) {
1683 s->midi.ibuf[s->midi.iwr] = ch;
1684 s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
1690 wake_up(&s->midi.iwait);
1692 while (!(inb(s->mpubase+1) & 0x40) && s->midi.ocnt > 0) {
1693 outb(s->midi.obuf[s->midi.ord], s->mpubase);
1694 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
1696 if (s->midi.ocnt < MIDIOUTBUF-16)
1700 wake_up(&s->midi.owait);
1703 static irqreturn_t solo1_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1705 struct solo1_state *s = (struct solo1_state *)dev_id;
1706 unsigned int intsrc;
1708 /* fastpath out, to ease interrupt sharing */
1709 intsrc = inb(s->iobase+7); /* get interrupt source(s) */
1712 (void)inb(s->sbbase+0xe); /* clear interrupt */
1713 spin_lock(&s->lock);
1714 /* clear audio interrupts first */
1716 write_mixer(s, 0x7a, read_mixer(s, 0x7a) & 0x7f);
1717 solo1_update_ptr(s);
1718 solo1_handle_midi(s);
1719 spin_unlock(&s->lock);
1723 static void solo1_midi_timer(unsigned long data)
1725 struct solo1_state *s = (struct solo1_state *)data;
1726 unsigned long flags;
1728 spin_lock_irqsave(&s->lock, flags);
1729 solo1_handle_midi(s);
1730 spin_unlock_irqrestore(&s->lock, flags);
1731 s->midi.timer.expires = jiffies+1;
1732 add_timer(&s->midi.timer);
1735 /* --------------------------------------------------------------------- */
1737 static ssize_t solo1_midi_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1739 struct solo1_state *s = (struct solo1_state *)file->private_data;
1740 DECLARE_WAITQUEUE(wait, current);
1742 unsigned long flags;
1747 if (!access_ok(VERIFY_WRITE, buffer, count))
1752 add_wait_queue(&s->midi.iwait, &wait);
1754 spin_lock_irqsave(&s->lock, flags);
1756 cnt = MIDIINBUF - ptr;
1757 if (s->midi.icnt < cnt)
1760 __set_current_state(TASK_INTERRUPTIBLE);
1761 spin_unlock_irqrestore(&s->lock, flags);
1765 if (file->f_flags & O_NONBLOCK) {
1771 if (signal_pending(current)) {
1778 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
1783 ptr = (ptr + cnt) % MIDIINBUF;
1784 spin_lock_irqsave(&s->lock, flags);
1786 s->midi.icnt -= cnt;
1787 spin_unlock_irqrestore(&s->lock, flags);
1793 __set_current_state(TASK_RUNNING);
1794 remove_wait_queue(&s->midi.iwait, &wait);
1798 static ssize_t solo1_midi_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1800 struct solo1_state *s = (struct solo1_state *)file->private_data;
1801 DECLARE_WAITQUEUE(wait, current);
1803 unsigned long flags;
1808 if (!access_ok(VERIFY_READ, buffer, count))
1813 add_wait_queue(&s->midi.owait, &wait);
1815 spin_lock_irqsave(&s->lock, flags);
1817 cnt = MIDIOUTBUF - ptr;
1818 if (s->midi.ocnt + cnt > MIDIOUTBUF)
1819 cnt = MIDIOUTBUF - s->midi.ocnt;
1821 __set_current_state(TASK_INTERRUPTIBLE);
1822 solo1_handle_midi(s);
1824 spin_unlock_irqrestore(&s->lock, flags);
1828 if (file->f_flags & O_NONBLOCK) {
1834 if (signal_pending(current)) {
1841 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
1846 ptr = (ptr + cnt) % MIDIOUTBUF;
1847 spin_lock_irqsave(&s->lock, flags);
1849 s->midi.ocnt += cnt;
1850 spin_unlock_irqrestore(&s->lock, flags);
1854 spin_lock_irqsave(&s->lock, flags);
1855 solo1_handle_midi(s);
1856 spin_unlock_irqrestore(&s->lock, flags);
1858 __set_current_state(TASK_RUNNING);
1859 remove_wait_queue(&s->midi.owait, &wait);
1863 /* No kernel lock - we have our own spinlock */
1864 static unsigned int solo1_midi_poll(struct file *file, struct poll_table_struct *wait)
1866 struct solo1_state *s = (struct solo1_state *)file->private_data;
1867 unsigned long flags;
1868 unsigned int mask = 0;
1871 if (file->f_flags & FMODE_WRITE)
1872 poll_wait(file, &s->midi.owait, wait);
1873 if (file->f_flags & FMODE_READ)
1874 poll_wait(file, &s->midi.iwait, wait);
1875 spin_lock_irqsave(&s->lock, flags);
1876 if (file->f_flags & FMODE_READ) {
1877 if (s->midi.icnt > 0)
1878 mask |= POLLIN | POLLRDNORM;
1880 if (file->f_flags & FMODE_WRITE) {
1881 if (s->midi.ocnt < MIDIOUTBUF)
1882 mask |= POLLOUT | POLLWRNORM;
1884 spin_unlock_irqrestore(&s->lock, flags);
1888 static int solo1_midi_open(struct inode *inode, struct file *file)
1890 unsigned int minor = iminor(inode);
1891 DECLARE_WAITQUEUE(wait, current);
1892 unsigned long flags;
1893 struct solo1_state *s = NULL;
1894 struct pci_dev *pci_dev = NULL;
1896 while ((pci_dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL) {
1897 struct pci_driver *drvr;
1899 drvr = pci_dev_driver(pci_dev);
1900 if (drvr != &solo1_driver)
1902 s = (struct solo1_state*)pci_get_drvdata(pci_dev);
1905 if (s->dev_midi == minor)
1911 file->private_data = s;
1912 /* wait for device to become free */
1914 while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
1915 if (file->f_flags & O_NONBLOCK) {
1919 add_wait_queue(&s->open_wait, &wait);
1920 __set_current_state(TASK_INTERRUPTIBLE);
1923 remove_wait_queue(&s->open_wait, &wait);
1924 set_current_state(TASK_RUNNING);
1925 if (signal_pending(current))
1926 return -ERESTARTSYS;
1929 spin_lock_irqsave(&s->lock, flags);
1930 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
1931 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
1932 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
1933 outb(0xff, s->mpubase+1); /* reset command */
1934 outb(0x3f, s->mpubase+1); /* uart command */
1935 if (!(inb(s->mpubase+1) & 0x80))
1937 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
1938 outb(0xb0, s->iobase + 7); /* enable A1, A2, MPU irq's */
1939 init_timer(&s->midi.timer);
1940 s->midi.timer.expires = jiffies+1;
1941 s->midi.timer.data = (unsigned long)s;
1942 s->midi.timer.function = solo1_midi_timer;
1943 add_timer(&s->midi.timer);
1945 if (file->f_mode & FMODE_READ) {
1946 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
1948 if (file->f_mode & FMODE_WRITE) {
1949 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
1951 spin_unlock_irqrestore(&s->lock, flags);
1952 s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
1954 return nonseekable_open(inode, file);
1957 static int solo1_midi_release(struct inode *inode, struct file *file)
1959 struct solo1_state *s = (struct solo1_state *)file->private_data;
1960 DECLARE_WAITQUEUE(wait, current);
1961 unsigned long flags;
1962 unsigned count, tmo;
1967 if (file->f_mode & FMODE_WRITE) {
1968 add_wait_queue(&s->midi.owait, &wait);
1970 __set_current_state(TASK_INTERRUPTIBLE);
1971 spin_lock_irqsave(&s->lock, flags);
1972 count = s->midi.ocnt;
1973 spin_unlock_irqrestore(&s->lock, flags);
1976 if (signal_pending(current))
1978 if (file->f_flags & O_NONBLOCK)
1980 tmo = (count * HZ) / 3100;
1981 if (!schedule_timeout(tmo ? : 1) && tmo)
1982 printk(KERN_DEBUG "solo1: midi timed out??\n");
1984 remove_wait_queue(&s->midi.owait, &wait);
1985 set_current_state(TASK_RUNNING);
1988 s->open_mode &= ~((file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE));
1989 spin_lock_irqsave(&s->lock, flags);
1990 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
1991 outb(0x30, s->iobase + 7); /* enable A1, A2 irq's */
1992 del_timer(&s->midi.timer);
1994 spin_unlock_irqrestore(&s->lock, flags);
1995 wake_up(&s->open_wait);
2001 static /*const*/ struct file_operations solo1_midi_fops = {
2002 .owner = THIS_MODULE,
2003 .llseek = no_llseek,
2004 .read = solo1_midi_read,
2005 .write = solo1_midi_write,
2006 .poll = solo1_midi_poll,
2007 .open = solo1_midi_open,
2008 .release = solo1_midi_release,
2011 /* --------------------------------------------------------------------- */
2013 static int solo1_dmfm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2015 static const unsigned char op_offset[18] = {
2016 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
2017 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
2018 0x10, 0x11, 0x12, 0x13, 0x14, 0x15
2020 struct solo1_state *s = (struct solo1_state *)file->private_data;
2021 struct dm_fm_voice v;
2022 struct dm_fm_note n;
2023 struct dm_fm_params p;
2028 case FM_IOCTL_RESET:
2029 for (regb = 0xb0; regb < 0xb9; regb++) {
2030 outb(regb, s->sbbase);
2031 outb(0, s->sbbase+1);
2032 outb(regb, s->sbbase+2);
2033 outb(0, s->sbbase+3);
2037 case FM_IOCTL_PLAY_NOTE:
2038 if (copy_from_user(&n, (void __user *)arg, sizeof(n)))
2049 outb(0xa0 + regb, io);
2050 outb(n.fnum & 0xff, io+1);
2051 outb(0xb0 + regb, io);
2052 outb(((n.fnum >> 8) & 3) | ((n.octave & 7) << 2) | ((n.key_on & 1) << 5), io+1);
2055 case FM_IOCTL_SET_VOICE:
2056 if (copy_from_user(&v, (void __user *)arg, sizeof(v)))
2060 regb = op_offset[v.voice];
2061 io = s->sbbase + ((v.op & 1) << 1);
2062 outb(0x20 + regb, io);
2063 outb(((v.am & 1) << 7) | ((v.vibrato & 1) << 6) | ((v.do_sustain & 1) << 5) |
2064 ((v.kbd_scale & 1) << 4) | (v.harmonic & 0xf), io+1);
2065 outb(0x40 + regb, io);
2066 outb(((v.scale_level & 0x3) << 6) | (v.volume & 0x3f), io+1);
2067 outb(0x60 + regb, io);
2068 outb(((v.attack & 0xf) << 4) | (v.decay & 0xf), io+1);
2069 outb(0x80 + regb, io);
2070 outb(((v.sustain & 0xf) << 4) | (v.release & 0xf), io+1);
2071 outb(0xe0 + regb, io);
2072 outb(v.waveform & 0x7, io+1);
2080 outb(0xc0 + regb, io);
2081 outb(((v.right & 1) << 5) | ((v.left & 1) << 4) | ((v.feedback & 7) << 1) |
2082 (v.connection & 1), io+1);
2085 case FM_IOCTL_SET_PARAMS:
2086 if (copy_from_user(&p, (void __user *)arg, sizeof(p)))
2088 outb(0x08, s->sbbase);
2089 outb((p.kbd_split & 1) << 6, s->sbbase+1);
2090 outb(0xbd, s->sbbase);
2091 outb(((p.am_depth & 1) << 7) | ((p.vib_depth & 1) << 6) | ((p.rhythm & 1) << 5) | ((p.bass & 1) << 4) |
2092 ((p.snare & 1) << 3) | ((p.tomtom & 1) << 2) | ((p.cymbal & 1) << 1) | (p.hihat & 1), s->sbbase+1);
2095 case FM_IOCTL_SET_OPL:
2096 outb(4, s->sbbase+2);
2097 outb(arg, s->sbbase+3);
2100 case FM_IOCTL_SET_MODE:
2101 outb(5, s->sbbase+2);
2102 outb(arg & 1, s->sbbase+3);
2110 static int solo1_dmfm_open(struct inode *inode, struct file *file)
2112 unsigned int minor = iminor(inode);
2113 DECLARE_WAITQUEUE(wait, current);
2114 struct solo1_state *s = NULL;
2115 struct pci_dev *pci_dev = NULL;
2117 while ((pci_dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL) {
2118 struct pci_driver *drvr;
2120 drvr = pci_dev_driver(pci_dev);
2121 if (drvr != &solo1_driver)
2123 s = (struct solo1_state*)pci_get_drvdata(pci_dev);
2126 if (s->dev_dmfm == minor)
2132 file->private_data = s;
2133 /* wait for device to become free */
2135 while (s->open_mode & FMODE_DMFM) {
2136 if (file->f_flags & O_NONBLOCK) {
2140 add_wait_queue(&s->open_wait, &wait);
2141 __set_current_state(TASK_INTERRUPTIBLE);
2144 remove_wait_queue(&s->open_wait, &wait);
2145 set_current_state(TASK_RUNNING);
2146 if (signal_pending(current))
2147 return -ERESTARTSYS;
2150 if (!request_region(s->sbbase, FMSYNTH_EXTENT, "ESS Solo1")) {
2152 printk(KERN_ERR "solo1: FM synth io ports in use, opl3 loaded?\n");
2155 /* init the stuff */
2157 outb(0x20, s->sbbase+1); /* enable waveforms */
2158 outb(4, s->sbbase+2);
2159 outb(0, s->sbbase+3); /* no 4op enabled */
2160 outb(5, s->sbbase+2);
2161 outb(1, s->sbbase+3); /* enable OPL3 */
2162 s->open_mode |= FMODE_DMFM;
2164 return nonseekable_open(inode, file);
2167 static int solo1_dmfm_release(struct inode *inode, struct file *file)
2169 struct solo1_state *s = (struct solo1_state *)file->private_data;
2175 s->open_mode &= ~FMODE_DMFM;
2176 for (regb = 0xb0; regb < 0xb9; regb++) {
2177 outb(regb, s->sbbase);
2178 outb(0, s->sbbase+1);
2179 outb(regb, s->sbbase+2);
2180 outb(0, s->sbbase+3);
2182 release_region(s->sbbase, FMSYNTH_EXTENT);
2183 wake_up(&s->open_wait);
2189 static /*const*/ struct file_operations solo1_dmfm_fops = {
2190 .owner = THIS_MODULE,
2191 .llseek = no_llseek,
2192 .ioctl = solo1_dmfm_ioctl,
2193 .open = solo1_dmfm_open,
2194 .release = solo1_dmfm_release,
2197 /* --------------------------------------------------------------------- */
2199 static struct initvol {
2202 } initvol[] __devinitdata = {
2203 { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2204 { SOUND_MIXER_WRITE_PCM, 0x4040 },
2205 { SOUND_MIXER_WRITE_SYNTH, 0x4040 },
2206 { SOUND_MIXER_WRITE_CD, 0x4040 },
2207 { SOUND_MIXER_WRITE_LINE, 0x4040 },
2208 { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2209 { SOUND_MIXER_WRITE_LINE2, 0x4040 },
2210 { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2211 { SOUND_MIXER_WRITE_SPEAKER, 0x4040 },
2212 { SOUND_MIXER_WRITE_MIC, 0x4040 }
2215 static int setup_solo1(struct solo1_state *s)
2217 struct pci_dev *pcidev = s->dev;
2221 /* initialize DDMA base address */
2222 printk(KERN_DEBUG "solo1: ddma base address: 0x%lx\n", s->ddmabase);
2223 pci_write_config_word(pcidev, 0x60, (s->ddmabase & (~0xf)) | 1);
2224 /* set DMA policy to DDMA, IRQ emulation off (CLKRUN disabled for now) */
2225 pci_write_config_dword(pcidev, 0x50, 0);
2226 /* disable legacy audio address decode */
2227 pci_write_config_word(pcidev, 0x40, 0x907f);
2229 /* initialize the chips */
2230 if (!reset_ctrl(s)) {
2231 printk(KERN_ERR "esssolo1: cannot reset controller\n");
2234 outb(0xb0, s->iobase+7); /* enable A1, A2, MPU irq's */
2236 /* initialize mixer regs */
2237 write_mixer(s, 0x7f, 0); /* disable music digital recording */
2238 write_mixer(s, 0x7d, 0x0c); /* enable mic preamp, MONO_OUT is 2nd DAC right channel */
2239 write_mixer(s, 0x64, 0x45); /* volume control */
2240 write_mixer(s, 0x48, 0x10); /* enable music DAC/ES6xx interface */
2241 write_mixer(s, 0x50, 0); /* disable spatializer */
2242 write_mixer(s, 0x52, 0);
2243 write_mixer(s, 0x14, 0); /* DAC1 minimum volume */
2244 write_mixer(s, 0x71, 0x20); /* enable new 0xA1 reg format */
2245 outb(0, s->ddmabase+0xd); /* DMA master clear */
2246 outb(1, s->ddmabase+0xf); /* mask channel */
2247 /*outb(0, s->ddmabase+0x8);*/ /* enable controller (enable is low active!!) */
2249 pci_set_master(pcidev); /* enable bus mastering */
2253 val = SOUND_MASK_LINE;
2254 mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2255 for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2256 val = initvol[i].vol;
2257 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
2259 val = 1; /* enable mic preamp */
2260 mixer_ioctl(s, SOUND_MIXER_PRIVATE1, (unsigned long)&val);
2266 solo1_suspend(struct pci_dev *pci_dev, pm_message_t state) {
2267 struct solo1_state *s = (struct solo1_state*)pci_get_drvdata(pci_dev);
2270 outb(0, s->iobase+6);
2271 /* DMA master clear */
2272 outb(0, s->ddmabase+0xd);
2273 /* reset sequencer and FIFO */
2274 outb(3, s->sbbase+6);
2275 /* turn off DDMA controller address space */
2276 pci_write_config_word(s->dev, 0x60, 0);
2281 solo1_resume(struct pci_dev *pci_dev) {
2282 struct solo1_state *s = (struct solo1_state*)pci_get_drvdata(pci_dev);
2289 #ifdef SUPPORT_JOYSTICK
2290 static int __devinit solo1_register_gameport(struct solo1_state *s, int io_port)
2292 struct gameport *gp;
2294 if (!request_region(io_port, GAMEPORT_EXTENT, "ESS Solo1")) {
2295 printk(KERN_ERR "solo1: gameport io ports are in use\n");
2299 s->gameport = gp = gameport_allocate_port();
2301 printk(KERN_ERR "solo1: can not allocate memory for gameport\n");
2302 release_region(io_port, GAMEPORT_EXTENT);
2306 gameport_set_name(gp, "ESS Solo1 Gameport");
2307 gameport_set_phys(gp, "isa%04x/gameport0", io_port);
2308 gp->dev.parent = &s->dev->dev;
2311 gameport_register_port(gp);
2316 static inline void solo1_unregister_gameport(struct solo1_state *s)
2319 int gpio = s->gameport->io;
2320 gameport_unregister_port(s->gameport);
2321 release_region(gpio, GAMEPORT_EXTENT);
2325 static inline int solo1_register_gameport(struct solo1_state *s, int io_port) { return -ENOSYS; }
2326 static inline void solo1_unregister_gameport(struct solo1_state *s) { }
2327 #endif /* SUPPORT_JOYSTICK */
2329 static int __devinit solo1_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
2331 struct solo1_state *s;
2335 if ((ret=pci_enable_device(pcidev)))
2337 if (!(pci_resource_flags(pcidev, 0) & IORESOURCE_IO) ||
2338 !(pci_resource_flags(pcidev, 1) & IORESOURCE_IO) ||
2339 !(pci_resource_flags(pcidev, 2) & IORESOURCE_IO) ||
2340 !(pci_resource_flags(pcidev, 3) & IORESOURCE_IO))
2342 if (pcidev->irq == 0)
2345 /* Recording requires 24-bit DMA, so attempt to set dma mask
2346 * to 24 bits first, then 32 bits (playback only) if that fails.
2348 if (pci_set_dma_mask(pcidev, 0x00ffffff) &&
2349 pci_set_dma_mask(pcidev, 0xffffffff)) {
2350 printk(KERN_WARNING "solo1: architecture does not support 24bit or 32bit PCI busmaster DMA\n");
2354 if (!(s = kmalloc(sizeof(struct solo1_state), GFP_KERNEL))) {
2355 printk(KERN_WARNING "solo1: out of memory\n");
2358 memset(s, 0, sizeof(struct solo1_state));
2359 init_waitqueue_head(&s->dma_adc.wait);
2360 init_waitqueue_head(&s->dma_dac.wait);
2361 init_waitqueue_head(&s->open_wait);
2362 init_waitqueue_head(&s->midi.iwait);
2363 init_waitqueue_head(&s->midi.owait);
2364 init_MUTEX(&s->open_sem);
2365 spin_lock_init(&s->lock);
2366 s->magic = SOLO1_MAGIC;
2368 s->iobase = pci_resource_start(pcidev, 0);
2369 s->sbbase = pci_resource_start(pcidev, 1);
2370 s->vcbase = pci_resource_start(pcidev, 2);
2371 s->ddmabase = s->vcbase + DDMABASE_OFFSET;
2372 s->mpubase = pci_resource_start(pcidev, 3);
2373 gpio = pci_resource_start(pcidev, 4);
2374 s->irq = pcidev->irq;
2376 if (!request_region(s->iobase, IOBASE_EXTENT, "ESS Solo1")) {
2377 printk(KERN_ERR "solo1: io ports in use\n");
2380 if (!request_region(s->sbbase+FMSYNTH_EXTENT, SBBASE_EXTENT-FMSYNTH_EXTENT, "ESS Solo1")) {
2381 printk(KERN_ERR "solo1: io ports in use\n");
2384 if (!request_region(s->ddmabase, DDMABASE_EXTENT, "ESS Solo1")) {
2385 printk(KERN_ERR "solo1: io ports in use\n");
2388 if (!request_region(s->mpubase, MPUBASE_EXTENT, "ESS Solo1")) {
2389 printk(KERN_ERR "solo1: io ports in use\n");
2392 if ((ret=request_irq(s->irq,solo1_interrupt,SA_SHIRQ,"ESS Solo1",s))) {
2393 printk(KERN_ERR "solo1: irq %u in use\n", s->irq);
2396 /* register devices */
2397 if ((s->dev_audio = register_sound_dsp(&solo1_audio_fops, -1)) < 0) {
2401 if ((s->dev_mixer = register_sound_mixer(&solo1_mixer_fops, -1)) < 0) {
2405 if ((s->dev_midi = register_sound_midi(&solo1_midi_fops, -1)) < 0) {
2409 if ((s->dev_dmfm = register_sound_special(&solo1_dmfm_fops, 15 /* ?? */)) < 0) {
2413 if (setup_solo1(s)) {
2417 /* register gameport */
2418 solo1_register_gameport(s, gpio);
2419 /* store it in the driver field */
2420 pci_set_drvdata(pcidev, s);
2424 unregister_sound_special(s->dev_dmfm);
2426 unregister_sound_midi(s->dev_midi);
2428 unregister_sound_mixer(s->dev_mixer);
2430 unregister_sound_dsp(s->dev_audio);
2432 printk(KERN_ERR "solo1: initialisation error\n");
2433 free_irq(s->irq, s);
2435 release_region(s->mpubase, MPUBASE_EXTENT);
2437 release_region(s->ddmabase, DDMABASE_EXTENT);
2439 release_region(s->sbbase+FMSYNTH_EXTENT, SBBASE_EXTENT-FMSYNTH_EXTENT);
2441 release_region(s->iobase, IOBASE_EXTENT);
2447 static void __devexit solo1_remove(struct pci_dev *dev)
2449 struct solo1_state *s = pci_get_drvdata(dev);
2453 /* stop DMA controller */
2454 outb(0, s->iobase+6);
2455 outb(0, s->ddmabase+0xd); /* DMA master clear */
2456 outb(3, s->sbbase+6); /* reset sequencer and FIFO */
2457 synchronize_irq(s->irq);
2458 pci_write_config_word(s->dev, 0x60, 0); /* turn off DDMA controller address space */
2459 free_irq(s->irq, s);
2460 solo1_unregister_gameport(s);
2461 release_region(s->iobase, IOBASE_EXTENT);
2462 release_region(s->sbbase+FMSYNTH_EXTENT, SBBASE_EXTENT-FMSYNTH_EXTENT);
2463 release_region(s->ddmabase, DDMABASE_EXTENT);
2464 release_region(s->mpubase, MPUBASE_EXTENT);
2465 unregister_sound_dsp(s->dev_audio);
2466 unregister_sound_mixer(s->dev_mixer);
2467 unregister_sound_midi(s->dev_midi);
2468 unregister_sound_special(s->dev_dmfm);
2470 pci_set_drvdata(dev, NULL);
2473 static struct pci_device_id id_table[] = {
2474 { PCI_VENDOR_ID_ESS, PCI_DEVICE_ID_ESS_SOLO1, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
2478 MODULE_DEVICE_TABLE(pci, id_table);
2480 static struct pci_driver solo1_driver = {
2481 .name = "ESS Solo1",
2482 .id_table = id_table,
2483 .probe = solo1_probe,
2484 .remove = __devexit_p(solo1_remove),
2485 .suspend = solo1_suspend,
2486 .resume = solo1_resume,
2490 static int __init init_solo1(void)
2492 printk(KERN_INFO "solo1: version v0.20 time " __TIME__ " " __DATE__ "\n");
2493 return pci_register_driver(&solo1_driver);
2496 /* --------------------------------------------------------------------- */
2498 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2499 MODULE_DESCRIPTION("ESS Solo1 Driver");
2500 MODULE_LICENSE("GPL");
2503 static void __exit cleanup_solo1(void)
2505 printk(KERN_INFO "solo1: unloading\n");
2506 pci_unregister_driver(&solo1_driver);
2509 /* --------------------------------------------------------------------- */
2511 module_init(init_solo1);
2512 module_exit(cleanup_solo1);