3 * hda_intel.c - Implementation of primary alsa driver code base
6 * Copyright(c) 2004 Intel Corporation. All rights reserved.
8 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
9 * PeiSen Hou <pshou@realtek.com.tw>
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the Free
13 * Software Foundation; either version 2 of the License, or (at your option)
16 * This program is distributed in the hope that it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc., 59
23 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 * Matt Jared matt.jared@intel.com
28 * Andy Kopp andy.kopp@intel.com
29 * Dan Kogan dan.d.kogan@intel.com
33 * 2004.12.01 Major rewrite by tiwai, merged the work of pshou
37 #include <linux/delay.h>
38 #include <linux/interrupt.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/dma-mapping.h>
42 #include <linux/moduleparam.h>
43 #include <linux/init.h>
44 #include <linux/slab.h>
45 #include <linux/pci.h>
46 #include <linux/mutex.h>
47 #include <linux/reboot.h>
49 #include <linux/pm_runtime.h>
50 #include <linux/clocksource.h>
51 #include <linux/time.h>
52 #include <linux/completion.h>
55 /* for snoop control */
56 #include <asm/pgtable.h>
57 #include <asm/cacheflush.h>
59 #include <sound/core.h>
60 #include <sound/initval.h>
61 #include <linux/vgaarb.h>
62 #include <linux/vga_switcheroo.h>
63 #include <linux/firmware.h>
64 #include "hda_codec.h"
66 #include "hda_controller.h"
70 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
71 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
72 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
73 static char *model[SNDRV_CARDS];
74 static int position_fix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
75 static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
76 static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
77 static int probe_only[SNDRV_CARDS];
78 static int jackpoll_ms[SNDRV_CARDS];
79 static bool single_cmd;
80 static int enable_msi = -1;
81 #ifdef CONFIG_SND_HDA_PATCH_LOADER
82 static char *patch[SNDRV_CARDS];
84 #ifdef CONFIG_SND_HDA_INPUT_BEEP
85 static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
86 CONFIG_SND_HDA_INPUT_BEEP_MODE};
89 module_param_array(index, int, NULL, 0444);
90 MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
91 module_param_array(id, charp, NULL, 0444);
92 MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
93 module_param_array(enable, bool, NULL, 0444);
94 MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
95 module_param_array(model, charp, NULL, 0444);
96 MODULE_PARM_DESC(model, "Use the given board model.");
97 module_param_array(position_fix, int, NULL, 0444);
98 MODULE_PARM_DESC(position_fix, "DMA pointer read method."
99 "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO).");
100 module_param_array(bdl_pos_adj, int, NULL, 0644);
101 MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");
102 module_param_array(probe_mask, int, NULL, 0444);
103 MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
104 module_param_array(probe_only, int, NULL, 0444);
105 MODULE_PARM_DESC(probe_only, "Only probing and no codec initialization.");
106 module_param_array(jackpoll_ms, int, NULL, 0444);
107 MODULE_PARM_DESC(jackpoll_ms, "Ms between polling for jack events (default = 0, using unsol events only)");
108 module_param(single_cmd, bool, 0444);
109 MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
110 "(for debugging only).");
111 module_param(enable_msi, bint, 0444);
112 MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
113 #ifdef CONFIG_SND_HDA_PATCH_LOADER
114 module_param_array(patch, charp, NULL, 0444);
115 MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface.");
117 #ifdef CONFIG_SND_HDA_INPUT_BEEP
118 module_param_array(beep_mode, bool, NULL, 0444);
119 MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
120 "(0=off, 1=on) (default=1).");
124 static int param_set_xint(const char *val, const struct kernel_param *kp);
125 static struct kernel_param_ops param_ops_xint = {
126 .set = param_set_xint,
127 .get = param_get_int,
129 #define param_check_xint param_check_int
131 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
132 static int *power_save_addr = &power_save;
133 module_param(power_save, xint, 0644);
134 MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
135 "(in second, 0 = disable).");
137 /* reset the HD-audio controller in power save mode.
138 * this may give more power-saving, but will take longer time to
141 static bool power_save_controller = 1;
142 module_param(power_save_controller, bool, 0644);
143 MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
145 static int *power_save_addr;
146 #endif /* CONFIG_PM */
148 static int align_buffer_size = -1;
149 module_param(align_buffer_size, bint, 0644);
150 MODULE_PARM_DESC(align_buffer_size,
151 "Force buffer and period sizes to be multiple of 128 bytes.");
154 static bool hda_snoop = true;
155 module_param_named(snoop, hda_snoop, bool, 0444);
156 MODULE_PARM_DESC(snoop, "Enable/disable snooping");
158 #define hda_snoop true
162 MODULE_LICENSE("GPL");
163 MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
195 MODULE_DESCRIPTION("Intel HDA driver");
197 #if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
198 #if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
199 #define SUPPORT_VGA_SWITCHEROO
215 AZX_DRIVER_ATIHDMI_NS,
224 AZX_NUM_DRIVERS, /* keep this as last entry */
227 /* quirks for Intel PCH */
228 #define AZX_DCAPS_INTEL_PCH_NOPM \
229 (AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_BUFSIZE | \
230 AZX_DCAPS_COUNT_LPIB_DELAY)
232 #define AZX_DCAPS_INTEL_PCH \
233 (AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_PM_RUNTIME)
235 #define AZX_DCAPS_INTEL_HASWELL \
236 (AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_ALIGN_BUFSIZE | \
237 AZX_DCAPS_COUNT_LPIB_DELAY | AZX_DCAPS_PM_RUNTIME | \
238 AZX_DCAPS_I915_POWERWELL)
240 /* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
241 #define AZX_DCAPS_INTEL_BROADWELL \
242 (AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_ALIGN_BUFSIZE | \
243 AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_PM_RUNTIME | \
244 AZX_DCAPS_I915_POWERWELL)
246 /* quirks for ATI SB / AMD Hudson */
247 #define AZX_DCAPS_PRESET_ATI_SB \
248 (AZX_DCAPS_ATI_SNOOP | AZX_DCAPS_NO_TCSEL | \
249 AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB)
251 /* quirks for ATI/AMD HDMI */
252 #define AZX_DCAPS_PRESET_ATI_HDMI \
253 (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB)
255 /* quirks for Nvidia */
256 #define AZX_DCAPS_PRESET_NVIDIA \
257 (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\
258 AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT |\
259 AZX_DCAPS_CORBRP_SELF_CLEAR)
261 #define AZX_DCAPS_PRESET_CTHDA \
262 (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_4K_BDLE_BOUNDARY)
265 * VGA-switcher support
267 #ifdef SUPPORT_VGA_SWITCHEROO
268 #define use_vga_switcheroo(chip) ((chip)->use_vga_switcheroo)
270 #define use_vga_switcheroo(chip) 0
273 static char *driver_short_names[] = {
274 [AZX_DRIVER_ICH] = "HDA Intel",
275 [AZX_DRIVER_PCH] = "HDA Intel PCH",
276 [AZX_DRIVER_SCH] = "HDA Intel MID",
277 [AZX_DRIVER_HDMI] = "HDA Intel HDMI",
278 [AZX_DRIVER_ATI] = "HDA ATI SB",
279 [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
280 [AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
281 [AZX_DRIVER_VIA] = "HDA VIA VT82xx",
282 [AZX_DRIVER_SIS] = "HDA SIS966",
283 [AZX_DRIVER_ULI] = "HDA ULI M5461",
284 [AZX_DRIVER_NVIDIA] = "HDA NVidia",
285 [AZX_DRIVER_TERA] = "HDA Teradici",
286 [AZX_DRIVER_CTX] = "HDA Creative",
287 [AZX_DRIVER_CTHDA] = "HDA Creative",
288 [AZX_DRIVER_GENERIC] = "HD-Audio Generic",
292 /* Intel HSW/BDW display HDA controller Extended Mode registers.
293 * EM4 (M value) and EM5 (N Value) are used to convert CDClk (Core Display
294 * Clock) to 24MHz BCLK: BCLK = CDCLK * M / N
295 * The values will be lost when the display power well is disabled.
297 #define ICH6_REG_EM4 0x100c
298 #define ICH6_REG_EM5 0x1010
303 /* HSW/BDW display HDA controller to restore BCLK from CDCLK */
310 static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on)
316 if (!dmab || !dmab->area || !dmab->bytes)
319 #ifdef CONFIG_SND_DMA_SGBUF
320 if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
321 struct snd_sg_buf *sgbuf = dmab->private_data;
323 set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
325 set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
330 pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
332 set_memory_wc((unsigned long)dmab->area, pages);
334 set_memory_wb((unsigned long)dmab->area, pages);
337 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
340 __mark_pages_wc(chip, buf, on);
342 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
343 struct snd_pcm_substream *substream, bool on)
345 if (azx_dev->wc_marked != on) {
346 __mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
347 azx_dev->wc_marked = on;
351 /* NOP for other archs */
352 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
356 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
357 struct snd_pcm_substream *substream, bool on)
362 static int azx_acquire_irq(struct azx *chip, int do_disconnect);
365 * initialize the PCI registers
367 /* update bits in a PCI register byte */
368 static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
369 unsigned char mask, unsigned char val)
373 pci_read_config_byte(pci, reg, &data);
375 data |= (val & mask);
376 pci_write_config_byte(pci, reg, data);
379 static void azx_init_pci(struct azx *chip)
381 /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
382 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
383 * Ensuring these bits are 0 clears playback static on some HD Audio
385 * The PCI register TCSEL is defined in the Intel manuals.
387 if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) {
388 dev_dbg(chip->card->dev, "Clearing TCSEL\n");
389 update_pci_byte(chip->pci, ICH6_PCIREG_TCSEL, 0x07, 0);
392 /* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
393 * we need to enable snoop.
395 if (chip->driver_caps & AZX_DCAPS_ATI_SNOOP) {
396 dev_dbg(chip->card->dev, "Setting ATI snoop: %d\n",
398 update_pci_byte(chip->pci,
399 ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07,
400 azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0);
403 /* For NVIDIA HDA, enable snoop */
404 if (chip->driver_caps & AZX_DCAPS_NVIDIA_SNOOP) {
405 dev_dbg(chip->card->dev, "Setting Nvidia snoop: %d\n",
407 update_pci_byte(chip->pci,
408 NVIDIA_HDA_TRANSREG_ADDR,
409 0x0f, NVIDIA_HDA_ENABLE_COHBITS);
410 update_pci_byte(chip->pci,
411 NVIDIA_HDA_ISTRM_COH,
412 0x01, NVIDIA_HDA_ENABLE_COHBIT);
413 update_pci_byte(chip->pci,
414 NVIDIA_HDA_OSTRM_COH,
415 0x01, NVIDIA_HDA_ENABLE_COHBIT);
418 /* Enable SCH/PCH snoop if needed */
419 if (chip->driver_caps & AZX_DCAPS_SCH_SNOOP) {
420 unsigned short snoop;
421 pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
422 if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) ||
423 (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) {
424 snoop &= ~INTEL_SCH_HDA_DEVC_NOSNOOP;
425 if (!azx_snoop(chip))
426 snoop |= INTEL_SCH_HDA_DEVC_NOSNOOP;
427 pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop);
428 pci_read_config_word(chip->pci,
429 INTEL_SCH_HDA_DEVC, &snoop);
431 dev_dbg(chip->card->dev, "SCH snoop: %s\n",
432 (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) ?
433 "Disabled" : "Enabled");
437 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);
439 /* called from IRQ */
440 static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev)
444 ok = azx_position_ok(chip, azx_dev);
446 azx_dev->irq_pending = 0;
448 } else if (ok == 0 && chip->bus && chip->bus->workq) {
449 /* bogus IRQ, process it later */
450 azx_dev->irq_pending = 1;
451 queue_work(chip->bus->workq, &chip->irq_pending_work);
457 * Check whether the current DMA position is acceptable for updating
458 * periods. Returns non-zero if it's OK.
460 * Many HD-audio controllers appear pretty inaccurate about
461 * the update-IRQ timing. The IRQ is issued before actually the
462 * data is processed. So, we need to process it afterwords in a
465 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
470 wallclk = azx_readl(chip, WALLCLK) - azx_dev->start_wallclk;
471 if (wallclk < (azx_dev->period_wallclk * 2) / 3)
472 return -1; /* bogus (too early) interrupt */
474 pos = azx_get_position(chip, azx_dev, true);
476 if (WARN_ONCE(!azx_dev->period_bytes,
477 "hda-intel: zero azx_dev->period_bytes"))
478 return -1; /* this shouldn't happen! */
479 if (wallclk < (azx_dev->period_wallclk * 5) / 4 &&
480 pos % azx_dev->period_bytes > azx_dev->period_bytes / 2)
481 /* NG - it's below the first next period boundary */
482 return chip->bdl_pos_adj[chip->dev_index] ? 0 : -1;
483 azx_dev->start_wallclk += wallclk;
484 return 1; /* OK, it's fine */
488 * The work for pending PCM period updates.
490 static void azx_irq_pending_work(struct work_struct *work)
492 struct azx *chip = container_of(work, struct azx, irq_pending_work);
495 if (!chip->irq_pending_warned) {
496 dev_info(chip->card->dev,
497 "IRQ timing workaround is activated for card #%d. Suggest a bigger bdl_pos_adj.\n",
499 chip->irq_pending_warned = 1;
504 spin_lock_irq(&chip->reg_lock);
505 for (i = 0; i < chip->num_streams; i++) {
506 struct azx_dev *azx_dev = &chip->azx_dev[i];
507 if (!azx_dev->irq_pending ||
508 !azx_dev->substream ||
511 ok = azx_position_ok(chip, azx_dev);
513 azx_dev->irq_pending = 0;
514 spin_unlock(&chip->reg_lock);
515 snd_pcm_period_elapsed(azx_dev->substream);
516 spin_lock(&chip->reg_lock);
518 pending = 0; /* too early */
522 spin_unlock_irq(&chip->reg_lock);
529 /* clear irq_pending flags and assure no on-going workq */
530 static void azx_clear_irq_pending(struct azx *chip)
534 spin_lock_irq(&chip->reg_lock);
535 for (i = 0; i < chip->num_streams; i++)
536 chip->azx_dev[i].irq_pending = 0;
537 spin_unlock_irq(&chip->reg_lock);
540 static int azx_acquire_irq(struct azx *chip, int do_disconnect)
542 if (request_irq(chip->pci->irq, azx_interrupt,
543 chip->msi ? 0 : IRQF_SHARED,
544 KBUILD_MODNAME, chip)) {
545 dev_err(chip->card->dev,
546 "unable to grab IRQ %d, disabling device\n",
549 snd_card_disconnect(chip->card);
552 chip->irq = chip->pci->irq;
553 pci_intx(chip->pci, !chip->msi);
558 static DEFINE_MUTEX(card_list_lock);
559 static LIST_HEAD(card_list);
561 static void azx_add_card_list(struct azx *chip)
563 mutex_lock(&card_list_lock);
564 list_add(&chip->list, &card_list);
565 mutex_unlock(&card_list_lock);
568 static void azx_del_card_list(struct azx *chip)
570 mutex_lock(&card_list_lock);
571 list_del_init(&chip->list);
572 mutex_unlock(&card_list_lock);
575 /* trigger power-save check at writing parameter */
576 static int param_set_xint(const char *val, const struct kernel_param *kp)
580 int prev = power_save;
581 int ret = param_set_int(val, kp);
583 if (ret || prev == power_save)
586 mutex_lock(&card_list_lock);
587 list_for_each_entry(chip, &card_list, list) {
588 if (!chip->bus || chip->disabled)
590 list_for_each_entry(c, &chip->bus->codec_list, list)
591 snd_hda_power_sync(c);
593 mutex_unlock(&card_list_lock);
597 #define azx_add_card_list(chip) /* NOP */
598 #define azx_del_card_list(chip) /* NOP */
599 #endif /* CONFIG_PM */
601 static void haswell_save_bclk(struct azx *chip)
603 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
605 hda->bclk_m = azx_readw(chip, EM4);
606 hda->bclk_n = azx_readw(chip, EM5);
609 static void haswell_restore_bclk(struct azx *chip)
611 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
613 azx_writew(chip, EM4, hda->bclk_m);
614 azx_writew(chip, EM5, hda->bclk_n);
617 #if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO)
621 static int azx_suspend(struct device *dev)
623 struct pci_dev *pci = to_pci_dev(dev);
624 struct snd_card *card = dev_get_drvdata(dev);
625 struct azx *chip = card->private_data;
631 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
632 azx_clear_irq_pending(chip);
633 list_for_each_entry(p, &chip->pcm_list, list)
634 snd_pcm_suspend_all(p->pcm);
635 if (chip->initialized)
636 snd_hda_suspend(chip->bus);
638 azx_enter_link_reset(chip);
639 if (chip->irq >= 0) {
640 free_irq(chip->irq, chip);
644 /* Save BCLK M/N values before they become invalid in D3.
645 * Will test if display power well can be released now.
647 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
648 haswell_save_bclk(chip);
651 pci_disable_msi(chip->pci);
652 pci_disable_device(pci);
654 pci_set_power_state(pci, PCI_D3hot);
655 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
656 hda_display_power(false);
660 static int azx_resume(struct device *dev)
662 struct pci_dev *pci = to_pci_dev(dev);
663 struct snd_card *card = dev_get_drvdata(dev);
664 struct azx *chip = card->private_data;
669 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
670 hda_display_power(true);
671 haswell_restore_bclk(chip);
673 pci_set_power_state(pci, PCI_D0);
674 pci_restore_state(pci);
675 if (pci_enable_device(pci) < 0) {
676 dev_err(chip->card->dev,
677 "pci_enable_device failed, disabling device\n");
678 snd_card_disconnect(card);
683 if (pci_enable_msi(pci) < 0)
685 if (azx_acquire_irq(chip, 1) < 0)
689 azx_init_chip(chip, true);
691 snd_hda_resume(chip->bus);
692 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
695 #endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */
697 #ifdef CONFIG_PM_RUNTIME
698 static int azx_runtime_suspend(struct device *dev)
700 struct snd_card *card = dev_get_drvdata(dev);
701 struct azx *chip = card->private_data;
706 if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
709 /* enable controller wake up event */
710 azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
714 azx_enter_link_reset(chip);
715 azx_clear_irq_pending(chip);
716 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
717 haswell_save_bclk(chip);
718 hda_display_power(false);
723 static int azx_runtime_resume(struct device *dev)
725 struct snd_card *card = dev_get_drvdata(dev);
726 struct azx *chip = card->private_data;
728 struct hda_codec *codec;
734 if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
737 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
738 hda_display_power(true);
739 haswell_restore_bclk(chip);
742 /* Read STATESTS before controller reset */
743 status = azx_readw(chip, STATESTS);
746 azx_init_chip(chip, true);
750 list_for_each_entry(codec, &bus->codec_list, list)
751 if (status & (1 << codec->addr))
752 queue_delayed_work(codec->bus->workq,
753 &codec->jackpoll_work, codec->jackpoll_interval);
756 /* disable controller Wake Up event*/
757 azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
763 static int azx_runtime_idle(struct device *dev)
765 struct snd_card *card = dev_get_drvdata(dev);
766 struct azx *chip = card->private_data;
771 if (!power_save_controller ||
772 !(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
778 #endif /* CONFIG_PM_RUNTIME */
781 static const struct dev_pm_ops azx_pm = {
782 SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
783 SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
786 #define AZX_PM_OPS &azx_pm
788 #define AZX_PM_OPS NULL
789 #endif /* CONFIG_PM */
793 * reboot notifier for hang-up problem at power-down
795 static int azx_halt(struct notifier_block *nb, unsigned long event, void *buf)
797 struct azx *chip = container_of(nb, struct azx, reboot_notifier);
798 snd_hda_bus_reboot_notify(chip->bus);
803 static void azx_notifier_register(struct azx *chip)
805 chip->reboot_notifier.notifier_call = azx_halt;
806 register_reboot_notifier(&chip->reboot_notifier);
809 static void azx_notifier_unregister(struct azx *chip)
811 if (chip->reboot_notifier.notifier_call)
812 unregister_reboot_notifier(&chip->reboot_notifier);
815 static int azx_probe_continue(struct azx *chip);
817 #ifdef SUPPORT_VGA_SWITCHEROO
818 static struct pci_dev *get_bound_vga(struct pci_dev *pci);
820 static void azx_vs_set_state(struct pci_dev *pci,
821 enum vga_switcheroo_state state)
823 struct snd_card *card = pci_get_drvdata(pci);
824 struct azx *chip = card->private_data;
827 wait_for_completion(&chip->probe_wait);
828 if (chip->init_failed)
831 disabled = (state == VGA_SWITCHEROO_OFF);
832 if (chip->disabled == disabled)
836 chip->disabled = disabled;
838 dev_info(chip->card->dev,
839 "Start delayed initialization\n");
840 if (azx_probe_continue(chip) < 0) {
841 dev_err(chip->card->dev, "initialization error\n");
842 chip->init_failed = true;
846 dev_info(chip->card->dev, "%s via VGA-switcheroo\n",
847 disabled ? "Disabling" : "Enabling");
849 pm_runtime_put_sync_suspend(card->dev);
850 azx_suspend(card->dev);
851 /* when we get suspended by vga switcheroo we end up in D3cold,
852 * however we have no ACPI handle, so pci/acpi can't put us there,
853 * put ourselves there */
854 pci->current_state = PCI_D3cold;
855 chip->disabled = true;
856 if (snd_hda_lock_devices(chip->bus))
857 dev_warn(chip->card->dev,
858 "Cannot lock devices!\n");
860 snd_hda_unlock_devices(chip->bus);
861 pm_runtime_get_noresume(card->dev);
862 chip->disabled = false;
863 azx_resume(card->dev);
868 static bool azx_vs_can_switch(struct pci_dev *pci)
870 struct snd_card *card = pci_get_drvdata(pci);
871 struct azx *chip = card->private_data;
873 wait_for_completion(&chip->probe_wait);
874 if (chip->init_failed)
876 if (chip->disabled || !chip->bus)
878 if (snd_hda_lock_devices(chip->bus))
880 snd_hda_unlock_devices(chip->bus);
884 static void init_vga_switcheroo(struct azx *chip)
886 struct pci_dev *p = get_bound_vga(chip->pci);
888 dev_info(chip->card->dev,
889 "Handle VGA-switcheroo audio client\n");
890 chip->use_vga_switcheroo = 1;
895 static const struct vga_switcheroo_client_ops azx_vs_ops = {
896 .set_gpu_state = azx_vs_set_state,
897 .can_switch = azx_vs_can_switch,
900 static int register_vga_switcheroo(struct azx *chip)
904 if (!chip->use_vga_switcheroo)
906 /* FIXME: currently only handling DIS controller
907 * is there any machine with two switchable HDMI audio controllers?
909 err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops,
914 chip->vga_switcheroo_registered = 1;
916 /* register as an optimus hdmi audio power domain */
917 vga_switcheroo_init_domain_pm_optimus_hdmi_audio(chip->card->dev,
918 &chip->hdmi_pm_domain);
922 #define init_vga_switcheroo(chip) /* NOP */
923 #define register_vga_switcheroo(chip) 0
924 #define check_hdmi_disabled(pci) false
925 #endif /* SUPPORT_VGA_SWITCHER */
930 static int azx_free(struct azx *chip)
932 struct pci_dev *pci = chip->pci;
933 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
937 if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME)
939 pm_runtime_get_noresume(&pci->dev);
941 azx_del_card_list(chip);
943 azx_notifier_unregister(chip);
945 chip->init_failed = 1; /* to be sure */
946 complete_all(&chip->probe_wait);
948 if (use_vga_switcheroo(chip)) {
949 if (chip->disabled && chip->bus)
950 snd_hda_unlock_devices(chip->bus);
951 if (chip->vga_switcheroo_registered)
952 vga_switcheroo_unregister_client(chip->pci);
955 if (chip->initialized) {
956 azx_clear_irq_pending(chip);
957 for (i = 0; i < chip->num_streams; i++)
958 azx_stream_stop(chip, &chip->azx_dev[i]);
963 free_irq(chip->irq, (void*)chip);
965 pci_disable_msi(chip->pci);
966 if (chip->remap_addr)
967 iounmap(chip->remap_addr);
969 azx_free_stream_pages(chip);
970 if (chip->region_requested)
971 pci_release_regions(chip->pci);
972 pci_disable_device(chip->pci);
973 kfree(chip->azx_dev);
974 #ifdef CONFIG_SND_HDA_PATCH_LOADER
976 release_firmware(chip->fw);
978 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
979 hda_display_power(false);
987 static int azx_dev_free(struct snd_device *device)
989 return azx_free(device->device_data);
992 #ifdef SUPPORT_VGA_SWITCHEROO
994 * Check of disabled HDMI controller by vga-switcheroo
996 static struct pci_dev *get_bound_vga(struct pci_dev *pci)
1000 /* check only discrete GPU */
1001 switch (pci->vendor) {
1002 case PCI_VENDOR_ID_ATI:
1003 case PCI_VENDOR_ID_AMD:
1004 case PCI_VENDOR_ID_NVIDIA:
1005 if (pci->devfn == 1) {
1006 p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
1007 pci->bus->number, 0);
1009 if ((p->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1019 static bool check_hdmi_disabled(struct pci_dev *pci)
1021 bool vga_inactive = false;
1022 struct pci_dev *p = get_bound_vga(pci);
1025 if (vga_switcheroo_get_client_state(p) == VGA_SWITCHEROO_OFF)
1026 vga_inactive = true;
1029 return vga_inactive;
1031 #endif /* SUPPORT_VGA_SWITCHEROO */
1034 * white/black-listing for position_fix
1036 static struct snd_pci_quirk position_fix_list[] = {
1037 SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
1038 SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
1039 SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
1040 SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
1041 SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
1042 SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
1043 SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
1044 SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB),
1045 SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
1046 SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
1047 SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
1048 SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
1049 SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB),
1050 SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
1054 static int check_position_fix(struct azx *chip, int fix)
1056 const struct snd_pci_quirk *q;
1061 case POS_FIX_POSBUF:
1062 case POS_FIX_VIACOMBO:
1067 q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
1069 dev_info(chip->card->dev,
1070 "position_fix set to %d for device %04x:%04x\n",
1071 q->value, q->subvendor, q->subdevice);
1075 /* Check VIA/ATI HD Audio Controller exist */
1076 if (chip->driver_caps & AZX_DCAPS_POSFIX_VIA) {
1077 dev_dbg(chip->card->dev, "Using VIACOMBO position fix\n");
1078 return POS_FIX_VIACOMBO;
1080 if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) {
1081 dev_dbg(chip->card->dev, "Using LPIB position fix\n");
1082 return POS_FIX_LPIB;
1084 return POS_FIX_AUTO;
1088 * black-lists for probe_mask
1090 static struct snd_pci_quirk probe_mask_list[] = {
1091 /* Thinkpad often breaks the controller communication when accessing
1092 * to the non-working (or non-existing) modem codec slot.
1094 SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
1095 SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
1096 SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1098 SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
1099 /* including bogus ALC268 in slot#2 that conflicts with ALC888 */
1100 SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
1101 /* forced codec slots */
1102 SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
1103 SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
1104 /* WinFast VP200 H (Teradici) user reported broken communication */
1105 SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
1109 #define AZX_FORCE_CODEC_MASK 0x100
1111 static void check_probe_mask(struct azx *chip, int dev)
1113 const struct snd_pci_quirk *q;
1115 chip->codec_probe_mask = probe_mask[dev];
1116 if (chip->codec_probe_mask == -1) {
1117 q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
1119 dev_info(chip->card->dev,
1120 "probe_mask set to 0x%x for device %04x:%04x\n",
1121 q->value, q->subvendor, q->subdevice);
1122 chip->codec_probe_mask = q->value;
1126 /* check forced option */
1127 if (chip->codec_probe_mask != -1 &&
1128 (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
1129 chip->codec_mask = chip->codec_probe_mask & 0xff;
1130 dev_info(chip->card->dev, "codec_mask forced to 0x%x\n",
1136 * white/black-list for enable_msi
1138 static struct snd_pci_quirk msi_black_list[] = {
1139 SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
1140 SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
1141 SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
1142 SND_PCI_QUIRK(0x103c, 0x21fa, "HP", 0), /* AMD Hudson */
1143 SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
1144 SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
1145 SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
1146 SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */
1147 SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
1148 SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
1152 static void check_msi(struct azx *chip)
1154 const struct snd_pci_quirk *q;
1156 if (enable_msi >= 0) {
1157 chip->msi = !!enable_msi;
1160 chip->msi = 1; /* enable MSI as default */
1161 q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
1163 dev_info(chip->card->dev,
1164 "msi for device %04x:%04x set to %d\n",
1165 q->subvendor, q->subdevice, q->value);
1166 chip->msi = q->value;
1170 /* NVidia chipsets seem to cause troubles with MSI */
1171 if (chip->driver_caps & AZX_DCAPS_NO_MSI) {
1172 dev_info(chip->card->dev, "Disabling MSI\n");
1177 /* check the snoop mode availability */
1178 static void azx_check_snoop_available(struct azx *chip)
1180 bool snoop = chip->snoop;
1182 switch (chip->driver_type) {
1183 case AZX_DRIVER_VIA:
1184 /* force to non-snoop mode for a new VIA controller
1189 pci_read_config_byte(chip->pci, 0x42, &val);
1190 if (!(val & 0x80) && chip->pci->revision == 0x30)
1194 case AZX_DRIVER_ATIHDMI_NS:
1195 /* new ATI HDMI requires non-snoop */
1198 case AZX_DRIVER_CTHDA:
1203 if (snoop != chip->snoop) {
1204 dev_info(chip->card->dev, "Force to %s mode\n",
1205 snoop ? "snoop" : "non-snoop");
1206 chip->snoop = snoop;
1210 static void azx_probe_work(struct work_struct *work)
1212 azx_probe_continue(container_of(work, struct azx, probe_work));
1218 static int azx_create(struct snd_card *card, struct pci_dev *pci,
1219 int dev, unsigned int driver_caps,
1220 const struct hda_controller_ops *hda_ops,
1223 static struct snd_device_ops ops = {
1224 .dev_free = azx_dev_free,
1226 struct hda_intel *hda;
1232 err = pci_enable_device(pci);
1236 hda = kzalloc(sizeof(*hda), GFP_KERNEL);
1238 dev_err(card->dev, "Cannot allocate hda\n");
1239 pci_disable_device(pci);
1244 spin_lock_init(&chip->reg_lock);
1245 mutex_init(&chip->open_mutex);
1248 chip->ops = hda_ops;
1250 chip->driver_caps = driver_caps;
1251 chip->driver_type = driver_caps & 0xff;
1253 chip->dev_index = dev;
1254 chip->jackpoll_ms = jackpoll_ms;
1255 INIT_WORK(&chip->irq_pending_work, azx_irq_pending_work);
1256 INIT_LIST_HEAD(&chip->pcm_list);
1257 INIT_LIST_HEAD(&chip->list);
1258 init_vga_switcheroo(chip);
1259 init_completion(&chip->probe_wait);
1261 chip->position_fix[0] = chip->position_fix[1] =
1262 check_position_fix(chip, position_fix[dev]);
1263 /* combo mode uses LPIB for playback */
1264 if (chip->position_fix[0] == POS_FIX_COMBO) {
1265 chip->position_fix[0] = POS_FIX_LPIB;
1266 chip->position_fix[1] = POS_FIX_AUTO;
1269 check_probe_mask(chip, dev);
1271 chip->single_cmd = single_cmd;
1272 chip->snoop = hda_snoop;
1273 azx_check_snoop_available(chip);
1275 if (bdl_pos_adj[dev] < 0) {
1276 switch (chip->driver_type) {
1277 case AZX_DRIVER_ICH:
1278 case AZX_DRIVER_PCH:
1279 bdl_pos_adj[dev] = 1;
1282 bdl_pos_adj[dev] = 32;
1286 chip->bdl_pos_adj = bdl_pos_adj;
1288 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1290 dev_err(card->dev, "Error creating device [card]!\n");
1295 /* continue probing in work context as may trigger request module */
1296 INIT_WORK(&chip->probe_work, azx_probe_work);
1303 static int azx_first_init(struct azx *chip)
1305 int dev = chip->dev_index;
1306 struct pci_dev *pci = chip->pci;
1307 struct snd_card *card = chip->card;
1309 unsigned short gcap;
1311 #if BITS_PER_LONG != 64
1312 /* Fix up base address on ULI M5461 */
1313 if (chip->driver_type == AZX_DRIVER_ULI) {
1315 pci_read_config_word(pci, 0x40, &tmp3);
1316 pci_write_config_word(pci, 0x40, tmp3 | 0x10);
1317 pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
1321 err = pci_request_regions(pci, "ICH HD audio");
1324 chip->region_requested = 1;
1326 chip->addr = pci_resource_start(pci, 0);
1327 chip->remap_addr = pci_ioremap_bar(pci, 0);
1328 if (chip->remap_addr == NULL) {
1329 dev_err(card->dev, "ioremap error\n");
1334 if (pci_enable_msi(pci) < 0)
1337 if (azx_acquire_irq(chip, 0) < 0)
1340 pci_set_master(pci);
1341 synchronize_irq(chip->irq);
1343 gcap = azx_readw(chip, GCAP);
1344 dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
1346 /* disable SB600 64bit support for safety */
1347 if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
1348 struct pci_dev *p_smbus;
1349 p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
1350 PCI_DEVICE_ID_ATI_SBX00_SMBUS,
1353 if (p_smbus->revision < 0x30)
1354 gcap &= ~ICH6_GCAP_64OK;
1355 pci_dev_put(p_smbus);
1359 /* disable 64bit DMA address on some devices */
1360 if (chip->driver_caps & AZX_DCAPS_NO_64BIT) {
1361 dev_dbg(card->dev, "Disabling 64bit DMA\n");
1362 gcap &= ~ICH6_GCAP_64OK;
1365 /* disable buffer size rounding to 128-byte multiples if supported */
1366 if (align_buffer_size >= 0)
1367 chip->align_buffer_size = !!align_buffer_size;
1369 if (chip->driver_caps & AZX_DCAPS_BUFSIZE)
1370 chip->align_buffer_size = 0;
1371 else if (chip->driver_caps & AZX_DCAPS_ALIGN_BUFSIZE)
1372 chip->align_buffer_size = 1;
1374 chip->align_buffer_size = 1;
1377 /* allow 64bit DMA address if supported by H/W */
1378 if ((gcap & ICH6_GCAP_64OK) && !pci_set_dma_mask(pci, DMA_BIT_MASK(64)))
1379 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(64));
1381 pci_set_dma_mask(pci, DMA_BIT_MASK(32));
1382 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32));
1385 /* read number of streams from GCAP register instead of using
1388 chip->capture_streams = (gcap >> 8) & 0x0f;
1389 chip->playback_streams = (gcap >> 12) & 0x0f;
1390 if (!chip->playback_streams && !chip->capture_streams) {
1391 /* gcap didn't give any info, switching to old method */
1393 switch (chip->driver_type) {
1394 case AZX_DRIVER_ULI:
1395 chip->playback_streams = ULI_NUM_PLAYBACK;
1396 chip->capture_streams = ULI_NUM_CAPTURE;
1398 case AZX_DRIVER_ATIHDMI:
1399 case AZX_DRIVER_ATIHDMI_NS:
1400 chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
1401 chip->capture_streams = ATIHDMI_NUM_CAPTURE;
1403 case AZX_DRIVER_GENERIC:
1405 chip->playback_streams = ICH6_NUM_PLAYBACK;
1406 chip->capture_streams = ICH6_NUM_CAPTURE;
1410 chip->capture_index_offset = 0;
1411 chip->playback_index_offset = chip->capture_streams;
1412 chip->num_streams = chip->playback_streams + chip->capture_streams;
1413 chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev),
1415 if (!chip->azx_dev) {
1416 dev_err(card->dev, "cannot malloc azx_dev\n");
1420 err = azx_alloc_stream_pages(chip);
1424 /* initialize streams */
1425 azx_init_stream(chip);
1427 /* initialize chip */
1429 azx_init_chip(chip, (probe_only[dev] & 2) == 0);
1431 /* codec detection */
1432 if (!chip->codec_mask) {
1433 dev_err(card->dev, "no codecs found!\n");
1437 strcpy(card->driver, "HDA-Intel");
1438 strlcpy(card->shortname, driver_short_names[chip->driver_type],
1439 sizeof(card->shortname));
1440 snprintf(card->longname, sizeof(card->longname),
1441 "%s at 0x%lx irq %i",
1442 card->shortname, chip->addr, chip->irq);
1447 static void power_down_all_codecs(struct azx *chip)
1450 /* The codecs were powered up in snd_hda_codec_new().
1451 * Now all initialization done, so turn them down if possible
1453 struct hda_codec *codec;
1454 list_for_each_entry(codec, &chip->bus->codec_list, list) {
1455 snd_hda_power_down(codec);
1460 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1461 /* callback from request_firmware_nowait() */
1462 static void azx_firmware_cb(const struct firmware *fw, void *context)
1464 struct snd_card *card = context;
1465 struct azx *chip = card->private_data;
1466 struct pci_dev *pci = chip->pci;
1469 dev_err(card->dev, "Cannot load firmware, aborting\n");
1474 if (!chip->disabled) {
1475 /* continue probing */
1476 if (azx_probe_continue(chip))
1482 snd_card_free(card);
1483 pci_set_drvdata(pci, NULL);
1488 * HDA controller ops.
1491 /* PCI register access. */
1492 static void pci_azx_writel(u32 value, u32 __iomem *addr)
1494 writel(value, addr);
1497 static u32 pci_azx_readl(u32 __iomem *addr)
1502 static void pci_azx_writew(u16 value, u16 __iomem *addr)
1504 writew(value, addr);
1507 static u16 pci_azx_readw(u16 __iomem *addr)
1512 static void pci_azx_writeb(u8 value, u8 __iomem *addr)
1514 writeb(value, addr);
1517 static u8 pci_azx_readb(u8 __iomem *addr)
1522 static int disable_msi_reset_irq(struct azx *chip)
1526 free_irq(chip->irq, chip);
1528 pci_disable_msi(chip->pci);
1530 err = azx_acquire_irq(chip, 1);
1537 /* DMA page allocation helpers. */
1538 static int dma_alloc_pages(struct azx *chip,
1541 struct snd_dma_buffer *buf)
1545 err = snd_dma_alloc_pages(type,
1550 mark_pages_wc(chip, buf, true);
1554 static void dma_free_pages(struct azx *chip, struct snd_dma_buffer *buf)
1556 mark_pages_wc(chip, buf, false);
1557 snd_dma_free_pages(buf);
1560 static int substream_alloc_pages(struct azx *chip,
1561 struct snd_pcm_substream *substream,
1564 struct azx_dev *azx_dev = get_azx_dev(substream);
1567 mark_runtime_wc(chip, azx_dev, substream, false);
1568 azx_dev->bufsize = 0;
1569 azx_dev->period_bytes = 0;
1570 azx_dev->format_val = 0;
1571 ret = snd_pcm_lib_malloc_pages(substream, size);
1574 mark_runtime_wc(chip, azx_dev, substream, true);
1578 static int substream_free_pages(struct azx *chip,
1579 struct snd_pcm_substream *substream)
1581 struct azx_dev *azx_dev = get_azx_dev(substream);
1582 mark_runtime_wc(chip, azx_dev, substream, false);
1583 return snd_pcm_lib_free_pages(substream);
1586 static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
1587 struct vm_area_struct *area)
1590 struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
1591 struct azx *chip = apcm->chip;
1592 if (!azx_snoop(chip))
1593 area->vm_page_prot = pgprot_writecombine(area->vm_page_prot);
1597 static const struct hda_controller_ops pci_hda_ops = {
1598 .reg_writel = pci_azx_writel,
1599 .reg_readl = pci_azx_readl,
1600 .reg_writew = pci_azx_writew,
1601 .reg_readw = pci_azx_readw,
1602 .reg_writeb = pci_azx_writeb,
1603 .reg_readb = pci_azx_readb,
1604 .disable_msi_reset_irq = disable_msi_reset_irq,
1605 .dma_alloc_pages = dma_alloc_pages,
1606 .dma_free_pages = dma_free_pages,
1607 .substream_alloc_pages = substream_alloc_pages,
1608 .substream_free_pages = substream_free_pages,
1609 .pcm_mmap_prepare = pcm_mmap_prepare,
1610 .position_check = azx_position_check,
1613 static int azx_probe(struct pci_dev *pci,
1614 const struct pci_device_id *pci_id)
1617 struct snd_card *card;
1619 bool schedule_probe;
1622 if (dev >= SNDRV_CARDS)
1629 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1632 dev_err(&pci->dev, "Error creating card!\n");
1636 err = azx_create(card, pci, dev, pci_id->driver_data,
1637 &pci_hda_ops, &chip);
1640 card->private_data = chip;
1642 pci_set_drvdata(pci, card);
1644 err = register_vga_switcheroo(chip);
1646 dev_err(card->dev, "Error registering VGA-switcheroo client\n");
1650 if (check_hdmi_disabled(pci)) {
1651 dev_info(card->dev, "VGA controller is disabled\n");
1652 dev_info(card->dev, "Delaying initialization\n");
1653 chip->disabled = true;
1656 schedule_probe = !chip->disabled;
1658 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1659 if (patch[dev] && *patch[dev]) {
1660 dev_info(card->dev, "Applying patch firmware '%s'\n",
1662 err = request_firmware_nowait(THIS_MODULE, true, patch[dev],
1663 &pci->dev, GFP_KERNEL, card,
1667 schedule_probe = false; /* continued in azx_firmware_cb() */
1669 #endif /* CONFIG_SND_HDA_PATCH_LOADER */
1671 #ifndef CONFIG_SND_HDA_I915
1672 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1673 dev_err(card->dev, "Haswell must build in CONFIG_SND_HDA_I915\n");
1677 schedule_work(&chip->probe_work);
1681 complete_all(&chip->probe_wait);
1685 snd_card_free(card);
1689 /* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
1690 static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
1691 [AZX_DRIVER_NVIDIA] = 8,
1692 [AZX_DRIVER_TERA] = 1,
1695 static int azx_probe_continue(struct azx *chip)
1697 struct pci_dev *pci = chip->pci;
1698 int dev = chip->dev_index;
1701 /* Request power well for Haswell HDA controller and codec */
1702 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1703 #ifdef CONFIG_SND_HDA_I915
1704 err = hda_i915_init();
1706 dev_err(chip->card->dev,
1707 "Error request power-well from i915\n");
1710 err = hda_display_power(true);
1712 dev_err(chip->card->dev,
1713 "Cannot turn on display power on i915\n");
1719 err = azx_first_init(chip);
1723 #ifdef CONFIG_SND_HDA_INPUT_BEEP
1724 chip->beep_mode = beep_mode[dev];
1727 /* create codec instances */
1728 err = azx_codec_create(chip, model[dev],
1729 azx_max_codecs[chip->driver_type],
1734 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1736 err = snd_hda_load_patch(chip->bus, chip->fw->size,
1741 release_firmware(chip->fw); /* no longer needed */
1746 if ((probe_only[dev] & 1) == 0) {
1747 err = azx_codec_configure(chip);
1752 /* create PCM streams */
1753 err = snd_hda_build_pcms(chip->bus);
1757 /* create mixer controls */
1758 err = azx_mixer_create(chip);
1762 err = snd_card_register(chip->card);
1767 power_down_all_codecs(chip);
1768 azx_notifier_register(chip);
1769 azx_add_card_list(chip);
1770 if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME) || chip->use_vga_switcheroo)
1771 pm_runtime_put_noidle(&pci->dev);
1775 chip->init_failed = 1;
1776 complete_all(&chip->probe_wait);
1780 static void azx_remove(struct pci_dev *pci)
1782 struct snd_card *card = pci_get_drvdata(pci);
1785 snd_card_free(card);
1789 static const struct pci_device_id azx_ids[] = {
1791 { PCI_DEVICE(0x8086, 0x1c20),
1792 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1794 { PCI_DEVICE(0x8086, 0x1d20),
1795 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1797 { PCI_DEVICE(0x8086, 0x1e20),
1798 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1800 { PCI_DEVICE(0x8086, 0x8c20),
1801 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1803 { PCI_DEVICE(0x8086, 0x8ca0),
1804 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1806 { PCI_DEVICE(0x8086, 0x8d20),
1807 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1808 { PCI_DEVICE(0x8086, 0x8d21),
1809 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1811 { PCI_DEVICE(0x8086, 0x9c20),
1812 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1814 { PCI_DEVICE(0x8086, 0x9c21),
1815 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1816 /* Wildcat Point-LP */
1817 { PCI_DEVICE(0x8086, 0x9ca0),
1818 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1820 { PCI_DEVICE(0x8086, 0x0a0c),
1821 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1822 { PCI_DEVICE(0x8086, 0x0c0c),
1823 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1824 { PCI_DEVICE(0x8086, 0x0d0c),
1825 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1827 { PCI_DEVICE(0x8086, 0x160c),
1828 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_BROADWELL },
1830 { PCI_DEVICE(0x8086, 0x3b56),
1831 .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
1833 { PCI_DEVICE(0x8086, 0x811b),
1834 .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
1836 { PCI_DEVICE(0x8086, 0x080a),
1837 .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
1839 { PCI_DEVICE(0x8086, 0x0f04),
1840 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1842 { PCI_DEVICE(0x8086, 0x2668),
1843 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1844 AZX_DCAPS_BUFSIZE }, /* ICH6 */
1845 { PCI_DEVICE(0x8086, 0x27d8),
1846 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1847 AZX_DCAPS_BUFSIZE }, /* ICH7 */
1848 { PCI_DEVICE(0x8086, 0x269a),
1849 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1850 AZX_DCAPS_BUFSIZE }, /* ESB2 */
1851 { PCI_DEVICE(0x8086, 0x284b),
1852 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1853 AZX_DCAPS_BUFSIZE }, /* ICH8 */
1854 { PCI_DEVICE(0x8086, 0x293e),
1855 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1856 AZX_DCAPS_BUFSIZE }, /* ICH9 */
1857 { PCI_DEVICE(0x8086, 0x293f),
1858 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1859 AZX_DCAPS_BUFSIZE }, /* ICH9 */
1860 { PCI_DEVICE(0x8086, 0x3a3e),
1861 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1862 AZX_DCAPS_BUFSIZE }, /* ICH10 */
1863 { PCI_DEVICE(0x8086, 0x3a6e),
1864 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1865 AZX_DCAPS_BUFSIZE }, /* ICH10 */
1867 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
1868 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1869 .class_mask = 0xffffff,
1870 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_BUFSIZE },
1871 /* ATI SB 450/600/700/800/900 */
1872 { PCI_DEVICE(0x1002, 0x437b),
1873 .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
1874 { PCI_DEVICE(0x1002, 0x4383),
1875 .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
1877 { PCI_DEVICE(0x1022, 0x780d),
1878 .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB },
1880 { PCI_DEVICE(0x1002, 0x793b),
1881 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1882 { PCI_DEVICE(0x1002, 0x7919),
1883 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1884 { PCI_DEVICE(0x1002, 0x960f),
1885 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1886 { PCI_DEVICE(0x1002, 0x970f),
1887 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1888 { PCI_DEVICE(0x1002, 0xaa00),
1889 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1890 { PCI_DEVICE(0x1002, 0xaa08),
1891 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1892 { PCI_DEVICE(0x1002, 0xaa10),
1893 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1894 { PCI_DEVICE(0x1002, 0xaa18),
1895 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1896 { PCI_DEVICE(0x1002, 0xaa20),
1897 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1898 { PCI_DEVICE(0x1002, 0xaa28),
1899 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1900 { PCI_DEVICE(0x1002, 0xaa30),
1901 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1902 { PCI_DEVICE(0x1002, 0xaa38),
1903 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1904 { PCI_DEVICE(0x1002, 0xaa40),
1905 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1906 { PCI_DEVICE(0x1002, 0xaa48),
1907 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1908 { PCI_DEVICE(0x1002, 0xaa50),
1909 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1910 { PCI_DEVICE(0x1002, 0xaa58),
1911 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1912 { PCI_DEVICE(0x1002, 0xaa60),
1913 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1914 { PCI_DEVICE(0x1002, 0xaa68),
1915 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1916 { PCI_DEVICE(0x1002, 0xaa80),
1917 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1918 { PCI_DEVICE(0x1002, 0xaa88),
1919 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1920 { PCI_DEVICE(0x1002, 0xaa90),
1921 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1922 { PCI_DEVICE(0x1002, 0xaa98),
1923 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1924 { PCI_DEVICE(0x1002, 0x9902),
1925 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
1926 { PCI_DEVICE(0x1002, 0xaaa0),
1927 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
1928 { PCI_DEVICE(0x1002, 0xaaa8),
1929 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
1930 { PCI_DEVICE(0x1002, 0xaab0),
1931 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
1932 /* VIA VT8251/VT8237A */
1933 { PCI_DEVICE(0x1106, 0x3288),
1934 .driver_data = AZX_DRIVER_VIA | AZX_DCAPS_POSFIX_VIA },
1935 /* VIA GFX VT7122/VX900 */
1936 { PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
1937 /* VIA GFX VT6122/VX11 */
1938 { PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
1940 { PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
1942 { PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI },
1944 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1945 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1946 .class_mask = 0xffffff,
1947 .driver_data = AZX_DRIVER_NVIDIA | AZX_DCAPS_PRESET_NVIDIA },
1949 { PCI_DEVICE(0x6549, 0x1200),
1950 .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
1951 { PCI_DEVICE(0x6549, 0x2200),
1952 .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
1953 /* Creative X-Fi (CA0110-IBG) */
1955 { PCI_DEVICE(0x1102, 0x0010),
1956 .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
1957 { PCI_DEVICE(0x1102, 0x0012),
1958 .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
1959 #if !IS_ENABLED(CONFIG_SND_CTXFI)
1960 /* the following entry conflicts with snd-ctxfi driver,
1961 * as ctxfi driver mutates from HD-audio to native mode with
1962 * a special command sequence.
1964 { PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_ANY_ID),
1965 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1966 .class_mask = 0xffffff,
1967 .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
1968 AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
1970 /* this entry seems still valid -- i.e. without emu20kx chip */
1971 { PCI_DEVICE(0x1102, 0x0009),
1972 .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
1973 AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
1976 { PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
1977 /* VMware HDAudio */
1978 { PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
1979 /* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
1980 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
1981 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1982 .class_mask = 0xffffff,
1983 .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
1984 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID),
1985 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1986 .class_mask = 0xffffff,
1987 .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
1990 MODULE_DEVICE_TABLE(pci, azx_ids);
1992 /* pci_driver definition */
1993 static struct pci_driver azx_driver = {
1994 .name = KBUILD_MODNAME,
1995 .id_table = azx_ids,
1997 .remove = azx_remove,
2003 module_pci_driver(azx_driver);