3 * hda_intel.c - Implementation of primary alsa driver code base
6 * Copyright(c) 2004 Intel Corporation. All rights reserved.
8 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
9 * PeiSen Hou <pshou@realtek.com.tw>
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the Free
13 * Software Foundation; either version 2 of the License, or (at your option)
16 * This program is distributed in the hope that it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc., 59
23 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 * Matt Jared matt.jared@intel.com
28 * Andy Kopp andy.kopp@intel.com
29 * Dan Kogan dan.d.kogan@intel.com
33 * 2004.12.01 Major rewrite by tiwai, merged the work of pshou
37 #include <linux/delay.h>
38 #include <linux/interrupt.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/dma-mapping.h>
42 #include <linux/moduleparam.h>
43 #include <linux/init.h>
44 #include <linux/slab.h>
45 #include <linux/pci.h>
46 #include <linux/mutex.h>
47 #include <linux/reboot.h>
49 #include <linux/pm_runtime.h>
50 #include <linux/clocksource.h>
51 #include <linux/time.h>
52 #include <linux/completion.h>
55 /* for snoop control */
56 #include <asm/pgtable.h>
57 #include <asm/cacheflush.h>
59 #include <sound/core.h>
60 #include <sound/initval.h>
61 #include <linux/vgaarb.h>
62 #include <linux/vga_switcheroo.h>
63 #include <linux/firmware.h>
64 #include "hda_codec.h"
66 #include "hda_controller.h"
70 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
71 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
72 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
73 static char *model[SNDRV_CARDS];
74 static int position_fix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
75 static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
76 static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
77 static int probe_only[SNDRV_CARDS];
78 static int jackpoll_ms[SNDRV_CARDS];
79 static bool single_cmd;
80 static int enable_msi = -1;
81 #ifdef CONFIG_SND_HDA_PATCH_LOADER
82 static char *patch[SNDRV_CARDS];
84 #ifdef CONFIG_SND_HDA_INPUT_BEEP
85 static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
86 CONFIG_SND_HDA_INPUT_BEEP_MODE};
89 module_param_array(index, int, NULL, 0444);
90 MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
91 module_param_array(id, charp, NULL, 0444);
92 MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
93 module_param_array(enable, bool, NULL, 0444);
94 MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
95 module_param_array(model, charp, NULL, 0444);
96 MODULE_PARM_DESC(model, "Use the given board model.");
97 module_param_array(position_fix, int, NULL, 0444);
98 MODULE_PARM_DESC(position_fix, "DMA pointer read method."
99 "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO).");
100 module_param_array(bdl_pos_adj, int, NULL, 0644);
101 MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");
102 module_param_array(probe_mask, int, NULL, 0444);
103 MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
104 module_param_array(probe_only, int, NULL, 0444);
105 MODULE_PARM_DESC(probe_only, "Only probing and no codec initialization.");
106 module_param_array(jackpoll_ms, int, NULL, 0444);
107 MODULE_PARM_DESC(jackpoll_ms, "Ms between polling for jack events (default = 0, using unsol events only)");
108 module_param(single_cmd, bool, 0444);
109 MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
110 "(for debugging only).");
111 module_param(enable_msi, bint, 0444);
112 MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
113 #ifdef CONFIG_SND_HDA_PATCH_LOADER
114 module_param_array(patch, charp, NULL, 0444);
115 MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface.");
117 #ifdef CONFIG_SND_HDA_INPUT_BEEP
118 module_param_array(beep_mode, bool, NULL, 0444);
119 MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
120 "(0=off, 1=on) (default=1).");
124 static int param_set_xint(const char *val, const struct kernel_param *kp);
125 static struct kernel_param_ops param_ops_xint = {
126 .set = param_set_xint,
127 .get = param_get_int,
129 #define param_check_xint param_check_int
131 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
132 static int *power_save_addr = &power_save;
133 module_param(power_save, xint, 0644);
134 MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
135 "(in second, 0 = disable).");
137 /* reset the HD-audio controller in power save mode.
138 * this may give more power-saving, but will take longer time to
141 static bool power_save_controller = 1;
142 module_param(power_save_controller, bool, 0644);
143 MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
145 static int *power_save_addr;
146 #endif /* CONFIG_PM */
148 static int align_buffer_size = -1;
149 module_param(align_buffer_size, bint, 0644);
150 MODULE_PARM_DESC(align_buffer_size,
151 "Force buffer and period sizes to be multiple of 128 bytes.");
154 static bool hda_snoop = true;
155 module_param_named(snoop, hda_snoop, bool, 0444);
156 MODULE_PARM_DESC(snoop, "Enable/disable snooping");
158 #define hda_snoop true
162 MODULE_LICENSE("GPL");
163 MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
195 MODULE_DESCRIPTION("Intel HDA driver");
197 #if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
198 #if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
199 #define SUPPORT_VGA_SWITCHEROO
215 AZX_DRIVER_ATIHDMI_NS,
224 AZX_NUM_DRIVERS, /* keep this as last entry */
227 /* quirks for Intel PCH */
228 #define AZX_DCAPS_INTEL_PCH_NOPM \
229 (AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_BUFSIZE | \
230 AZX_DCAPS_COUNT_LPIB_DELAY)
232 #define AZX_DCAPS_INTEL_PCH \
233 (AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_PM_RUNTIME)
235 #define AZX_DCAPS_INTEL_HASWELL \
236 (AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_ALIGN_BUFSIZE | \
237 AZX_DCAPS_COUNT_LPIB_DELAY | AZX_DCAPS_PM_RUNTIME | \
238 AZX_DCAPS_I915_POWERWELL)
240 /* quirks for ATI SB / AMD Hudson */
241 #define AZX_DCAPS_PRESET_ATI_SB \
242 (AZX_DCAPS_ATI_SNOOP | AZX_DCAPS_NO_TCSEL | \
243 AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB)
245 /* quirks for ATI/AMD HDMI */
246 #define AZX_DCAPS_PRESET_ATI_HDMI \
247 (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB)
249 /* quirks for Nvidia */
250 #define AZX_DCAPS_PRESET_NVIDIA \
251 (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\
252 AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT |\
253 AZX_DCAPS_CORBRP_SELF_CLEAR)
255 #define AZX_DCAPS_PRESET_CTHDA \
256 (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_4K_BDLE_BOUNDARY)
259 * VGA-switcher support
261 #ifdef SUPPORT_VGA_SWITCHEROO
262 #define use_vga_switcheroo(chip) ((chip)->use_vga_switcheroo)
264 #define use_vga_switcheroo(chip) 0
267 static char *driver_short_names[] = {
268 [AZX_DRIVER_ICH] = "HDA Intel",
269 [AZX_DRIVER_PCH] = "HDA Intel PCH",
270 [AZX_DRIVER_SCH] = "HDA Intel MID",
271 [AZX_DRIVER_HDMI] = "HDA Intel HDMI",
272 [AZX_DRIVER_ATI] = "HDA ATI SB",
273 [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
274 [AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
275 [AZX_DRIVER_VIA] = "HDA VIA VT82xx",
276 [AZX_DRIVER_SIS] = "HDA SIS966",
277 [AZX_DRIVER_ULI] = "HDA ULI M5461",
278 [AZX_DRIVER_NVIDIA] = "HDA NVidia",
279 [AZX_DRIVER_TERA] = "HDA Teradici",
280 [AZX_DRIVER_CTX] = "HDA Creative",
281 [AZX_DRIVER_CTHDA] = "HDA Creative",
282 [AZX_DRIVER_GENERIC] = "HD-Audio Generic",
286 static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on)
292 if (!dmab || !dmab->area || !dmab->bytes)
295 #ifdef CONFIG_SND_DMA_SGBUF
296 if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
297 struct snd_sg_buf *sgbuf = dmab->private_data;
299 set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
301 set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
306 pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
308 set_memory_wc((unsigned long)dmab->area, pages);
310 set_memory_wb((unsigned long)dmab->area, pages);
313 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
316 __mark_pages_wc(chip, buf, on);
318 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
319 struct snd_pcm_substream *substream, bool on)
321 if (azx_dev->wc_marked != on) {
322 __mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
323 azx_dev->wc_marked = on;
327 /* NOP for other archs */
328 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
332 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
333 struct snd_pcm_substream *substream, bool on)
338 static int azx_acquire_irq(struct azx *chip, int do_disconnect);
341 * initialize the PCI registers
343 /* update bits in a PCI register byte */
344 static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
345 unsigned char mask, unsigned char val)
349 pci_read_config_byte(pci, reg, &data);
351 data |= (val & mask);
352 pci_write_config_byte(pci, reg, data);
355 static void azx_init_pci(struct azx *chip)
357 /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
358 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
359 * Ensuring these bits are 0 clears playback static on some HD Audio
361 * The PCI register TCSEL is defined in the Intel manuals.
363 if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) {
364 dev_dbg(chip->card->dev, "Clearing TCSEL\n");
365 update_pci_byte(chip->pci, ICH6_PCIREG_TCSEL, 0x07, 0);
368 /* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
369 * we need to enable snoop.
371 if (chip->driver_caps & AZX_DCAPS_ATI_SNOOP) {
372 dev_dbg(chip->card->dev, "Setting ATI snoop: %d\n",
374 update_pci_byte(chip->pci,
375 ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07,
376 azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0);
379 /* For NVIDIA HDA, enable snoop */
380 if (chip->driver_caps & AZX_DCAPS_NVIDIA_SNOOP) {
381 dev_dbg(chip->card->dev, "Setting Nvidia snoop: %d\n",
383 update_pci_byte(chip->pci,
384 NVIDIA_HDA_TRANSREG_ADDR,
385 0x0f, NVIDIA_HDA_ENABLE_COHBITS);
386 update_pci_byte(chip->pci,
387 NVIDIA_HDA_ISTRM_COH,
388 0x01, NVIDIA_HDA_ENABLE_COHBIT);
389 update_pci_byte(chip->pci,
390 NVIDIA_HDA_OSTRM_COH,
391 0x01, NVIDIA_HDA_ENABLE_COHBIT);
394 /* Enable SCH/PCH snoop if needed */
395 if (chip->driver_caps & AZX_DCAPS_SCH_SNOOP) {
396 unsigned short snoop;
397 pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
398 if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) ||
399 (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) {
400 snoop &= ~INTEL_SCH_HDA_DEVC_NOSNOOP;
401 if (!azx_snoop(chip))
402 snoop |= INTEL_SCH_HDA_DEVC_NOSNOOP;
403 pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop);
404 pci_read_config_word(chip->pci,
405 INTEL_SCH_HDA_DEVC, &snoop);
407 dev_dbg(chip->card->dev, "SCH snoop: %s\n",
408 (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) ?
409 "Disabled" : "Enabled");
413 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);
415 /* called from IRQ */
416 static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev)
420 ok = azx_position_ok(chip, azx_dev);
422 azx_dev->irq_pending = 0;
424 } else if (ok == 0 && chip->bus && chip->bus->workq) {
425 /* bogus IRQ, process it later */
426 azx_dev->irq_pending = 1;
427 queue_work(chip->bus->workq, &chip->irq_pending_work);
433 * Check whether the current DMA position is acceptable for updating
434 * periods. Returns non-zero if it's OK.
436 * Many HD-audio controllers appear pretty inaccurate about
437 * the update-IRQ timing. The IRQ is issued before actually the
438 * data is processed. So, we need to process it afterwords in a
441 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
446 wallclk = azx_readl(chip, WALLCLK) - azx_dev->start_wallclk;
447 if (wallclk < (azx_dev->period_wallclk * 2) / 3)
448 return -1; /* bogus (too early) interrupt */
450 pos = azx_get_position(chip, azx_dev, true);
452 if (WARN_ONCE(!azx_dev->period_bytes,
453 "hda-intel: zero azx_dev->period_bytes"))
454 return -1; /* this shouldn't happen! */
455 if (wallclk < (azx_dev->period_wallclk * 5) / 4 &&
456 pos % azx_dev->period_bytes > azx_dev->period_bytes / 2)
457 /* NG - it's below the first next period boundary */
458 return chip->bdl_pos_adj[chip->dev_index] ? 0 : -1;
459 azx_dev->start_wallclk += wallclk;
460 return 1; /* OK, it's fine */
464 * The work for pending PCM period updates.
466 static void azx_irq_pending_work(struct work_struct *work)
468 struct azx *chip = container_of(work, struct azx, irq_pending_work);
471 if (!chip->irq_pending_warned) {
472 dev_info(chip->card->dev,
473 "IRQ timing workaround is activated for card #%d. Suggest a bigger bdl_pos_adj.\n",
475 chip->irq_pending_warned = 1;
480 spin_lock_irq(&chip->reg_lock);
481 for (i = 0; i < chip->num_streams; i++) {
482 struct azx_dev *azx_dev = &chip->azx_dev[i];
483 if (!azx_dev->irq_pending ||
484 !azx_dev->substream ||
487 ok = azx_position_ok(chip, azx_dev);
489 azx_dev->irq_pending = 0;
490 spin_unlock(&chip->reg_lock);
491 snd_pcm_period_elapsed(azx_dev->substream);
492 spin_lock(&chip->reg_lock);
494 pending = 0; /* too early */
498 spin_unlock_irq(&chip->reg_lock);
505 /* clear irq_pending flags and assure no on-going workq */
506 static void azx_clear_irq_pending(struct azx *chip)
510 spin_lock_irq(&chip->reg_lock);
511 for (i = 0; i < chip->num_streams; i++)
512 chip->azx_dev[i].irq_pending = 0;
513 spin_unlock_irq(&chip->reg_lock);
516 static int azx_acquire_irq(struct azx *chip, int do_disconnect)
518 if (request_irq(chip->pci->irq, azx_interrupt,
519 chip->msi ? 0 : IRQF_SHARED,
520 KBUILD_MODNAME, chip)) {
521 dev_err(chip->card->dev,
522 "unable to grab IRQ %d, disabling device\n",
525 snd_card_disconnect(chip->card);
528 chip->irq = chip->pci->irq;
529 pci_intx(chip->pci, !chip->msi);
534 static DEFINE_MUTEX(card_list_lock);
535 static LIST_HEAD(card_list);
537 static void azx_add_card_list(struct azx *chip)
539 mutex_lock(&card_list_lock);
540 list_add(&chip->list, &card_list);
541 mutex_unlock(&card_list_lock);
544 static void azx_del_card_list(struct azx *chip)
546 mutex_lock(&card_list_lock);
547 list_del_init(&chip->list);
548 mutex_unlock(&card_list_lock);
551 /* trigger power-save check at writing parameter */
552 static int param_set_xint(const char *val, const struct kernel_param *kp)
556 int prev = power_save;
557 int ret = param_set_int(val, kp);
559 if (ret || prev == power_save)
562 mutex_lock(&card_list_lock);
563 list_for_each_entry(chip, &card_list, list) {
564 if (!chip->bus || chip->disabled)
566 list_for_each_entry(c, &chip->bus->codec_list, list)
567 snd_hda_power_sync(c);
569 mutex_unlock(&card_list_lock);
573 #define azx_add_card_list(chip) /* NOP */
574 #define azx_del_card_list(chip) /* NOP */
575 #endif /* CONFIG_PM */
577 #if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO)
581 static int azx_suspend(struct device *dev)
583 struct pci_dev *pci = to_pci_dev(dev);
584 struct snd_card *card = dev_get_drvdata(dev);
585 struct azx *chip = card->private_data;
591 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
592 azx_clear_irq_pending(chip);
593 list_for_each_entry(p, &chip->pcm_list, list)
594 snd_pcm_suspend_all(p->pcm);
595 if (chip->initialized)
596 snd_hda_suspend(chip->bus);
598 azx_enter_link_reset(chip);
599 if (chip->irq >= 0) {
600 free_irq(chip->irq, chip);
604 pci_disable_msi(chip->pci);
605 pci_disable_device(pci);
607 pci_set_power_state(pci, PCI_D3hot);
608 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
609 hda_display_power(false);
613 static int azx_resume(struct device *dev)
615 struct pci_dev *pci = to_pci_dev(dev);
616 struct snd_card *card = dev_get_drvdata(dev);
617 struct azx *chip = card->private_data;
622 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
623 hda_display_power(true);
624 pci_set_power_state(pci, PCI_D0);
625 pci_restore_state(pci);
626 if (pci_enable_device(pci) < 0) {
627 dev_err(chip->card->dev,
628 "pci_enable_device failed, disabling device\n");
629 snd_card_disconnect(card);
634 if (pci_enable_msi(pci) < 0)
636 if (azx_acquire_irq(chip, 1) < 0)
640 azx_init_chip(chip, true);
642 snd_hda_resume(chip->bus);
643 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
646 #endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */
648 #ifdef CONFIG_PM_RUNTIME
649 static int azx_runtime_suspend(struct device *dev)
651 struct snd_card *card = dev_get_drvdata(dev);
652 struct azx *chip = card->private_data;
657 if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
660 /* enable controller wake up event */
661 azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
665 azx_enter_link_reset(chip);
666 azx_clear_irq_pending(chip);
667 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
668 hda_display_power(false);
672 static int azx_runtime_resume(struct device *dev)
674 struct snd_card *card = dev_get_drvdata(dev);
675 struct azx *chip = card->private_data;
677 struct hda_codec *codec;
683 if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
686 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
687 hda_display_power(true);
689 /* Read STATESTS before controller reset */
690 status = azx_readw(chip, STATESTS);
693 azx_init_chip(chip, true);
697 list_for_each_entry(codec, &bus->codec_list, list)
698 if (status & (1 << codec->addr))
699 queue_delayed_work(codec->bus->workq,
700 &codec->jackpoll_work, codec->jackpoll_interval);
703 /* disable controller Wake Up event*/
704 azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
710 static int azx_runtime_idle(struct device *dev)
712 struct snd_card *card = dev_get_drvdata(dev);
713 struct azx *chip = card->private_data;
718 if (!power_save_controller ||
719 !(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
725 #endif /* CONFIG_PM_RUNTIME */
728 static const struct dev_pm_ops azx_pm = {
729 SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
730 SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
733 #define AZX_PM_OPS &azx_pm
735 #define AZX_PM_OPS NULL
736 #endif /* CONFIG_PM */
740 * reboot notifier for hang-up problem at power-down
742 static int azx_halt(struct notifier_block *nb, unsigned long event, void *buf)
744 struct azx *chip = container_of(nb, struct azx, reboot_notifier);
745 snd_hda_bus_reboot_notify(chip->bus);
750 static void azx_notifier_register(struct azx *chip)
752 chip->reboot_notifier.notifier_call = azx_halt;
753 register_reboot_notifier(&chip->reboot_notifier);
756 static void azx_notifier_unregister(struct azx *chip)
758 if (chip->reboot_notifier.notifier_call)
759 unregister_reboot_notifier(&chip->reboot_notifier);
762 static int azx_probe_continue(struct azx *chip);
764 #ifdef SUPPORT_VGA_SWITCHEROO
765 static struct pci_dev *get_bound_vga(struct pci_dev *pci);
767 static void azx_vs_set_state(struct pci_dev *pci,
768 enum vga_switcheroo_state state)
770 struct snd_card *card = pci_get_drvdata(pci);
771 struct azx *chip = card->private_data;
774 wait_for_completion(&chip->probe_wait);
775 if (chip->init_failed)
778 disabled = (state == VGA_SWITCHEROO_OFF);
779 if (chip->disabled == disabled)
783 chip->disabled = disabled;
785 dev_info(chip->card->dev,
786 "Start delayed initialization\n");
787 if (azx_probe_continue(chip) < 0) {
788 dev_err(chip->card->dev, "initialization error\n");
789 chip->init_failed = true;
793 dev_info(chip->card->dev, "%s via VGA-switcheroo\n",
794 disabled ? "Disabling" : "Enabling");
796 pm_runtime_put_sync_suspend(card->dev);
797 azx_suspend(card->dev);
798 /* when we get suspended by vga switcheroo we end up in D3cold,
799 * however we have no ACPI handle, so pci/acpi can't put us there,
800 * put ourselves there */
801 pci->current_state = PCI_D3cold;
802 chip->disabled = true;
803 if (snd_hda_lock_devices(chip->bus))
804 dev_warn(chip->card->dev,
805 "Cannot lock devices!\n");
807 snd_hda_unlock_devices(chip->bus);
808 pm_runtime_get_noresume(card->dev);
809 chip->disabled = false;
810 azx_resume(card->dev);
815 static bool azx_vs_can_switch(struct pci_dev *pci)
817 struct snd_card *card = pci_get_drvdata(pci);
818 struct azx *chip = card->private_data;
820 wait_for_completion(&chip->probe_wait);
821 if (chip->init_failed)
823 if (chip->disabled || !chip->bus)
825 if (snd_hda_lock_devices(chip->bus))
827 snd_hda_unlock_devices(chip->bus);
831 static void init_vga_switcheroo(struct azx *chip)
833 struct pci_dev *p = get_bound_vga(chip->pci);
835 dev_info(chip->card->dev,
836 "Handle VGA-switcheroo audio client\n");
837 chip->use_vga_switcheroo = 1;
842 static const struct vga_switcheroo_client_ops azx_vs_ops = {
843 .set_gpu_state = azx_vs_set_state,
844 .can_switch = azx_vs_can_switch,
847 static int register_vga_switcheroo(struct azx *chip)
851 if (!chip->use_vga_switcheroo)
853 /* FIXME: currently only handling DIS controller
854 * is there any machine with two switchable HDMI audio controllers?
856 err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops,
861 chip->vga_switcheroo_registered = 1;
863 /* register as an optimus hdmi audio power domain */
864 vga_switcheroo_init_domain_pm_optimus_hdmi_audio(chip->card->dev,
865 &chip->hdmi_pm_domain);
869 #define init_vga_switcheroo(chip) /* NOP */
870 #define register_vga_switcheroo(chip) 0
871 #define check_hdmi_disabled(pci) false
872 #endif /* SUPPORT_VGA_SWITCHER */
877 static int azx_free(struct azx *chip)
879 struct pci_dev *pci = chip->pci;
882 if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME)
884 pm_runtime_get_noresume(&pci->dev);
886 azx_del_card_list(chip);
888 azx_notifier_unregister(chip);
890 chip->init_failed = 1; /* to be sure */
891 complete_all(&chip->probe_wait);
893 if (use_vga_switcheroo(chip)) {
894 if (chip->disabled && chip->bus)
895 snd_hda_unlock_devices(chip->bus);
896 if (chip->vga_switcheroo_registered)
897 vga_switcheroo_unregister_client(chip->pci);
900 if (chip->initialized) {
901 azx_clear_irq_pending(chip);
902 for (i = 0; i < chip->num_streams; i++)
903 azx_stream_stop(chip, &chip->azx_dev[i]);
908 free_irq(chip->irq, (void*)chip);
910 pci_disable_msi(chip->pci);
911 if (chip->remap_addr)
912 iounmap(chip->remap_addr);
914 azx_free_stream_pages(chip);
915 if (chip->region_requested)
916 pci_release_regions(chip->pci);
917 pci_disable_device(chip->pci);
918 kfree(chip->azx_dev);
919 #ifdef CONFIG_SND_HDA_PATCH_LOADER
921 release_firmware(chip->fw);
923 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
924 hda_display_power(false);
932 static int azx_dev_free(struct snd_device *device)
934 return azx_free(device->device_data);
937 #ifdef SUPPORT_VGA_SWITCHEROO
939 * Check of disabled HDMI controller by vga-switcheroo
941 static struct pci_dev *get_bound_vga(struct pci_dev *pci)
945 /* check only discrete GPU */
946 switch (pci->vendor) {
947 case PCI_VENDOR_ID_ATI:
948 case PCI_VENDOR_ID_AMD:
949 case PCI_VENDOR_ID_NVIDIA:
950 if (pci->devfn == 1) {
951 p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
952 pci->bus->number, 0);
954 if ((p->class >> 8) == PCI_CLASS_DISPLAY_VGA)
964 static bool check_hdmi_disabled(struct pci_dev *pci)
966 bool vga_inactive = false;
967 struct pci_dev *p = get_bound_vga(pci);
970 if (vga_switcheroo_get_client_state(p) == VGA_SWITCHEROO_OFF)
976 #endif /* SUPPORT_VGA_SWITCHEROO */
979 * white/black-listing for position_fix
981 static struct snd_pci_quirk position_fix_list[] = {
982 SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
983 SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
984 SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
985 SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
986 SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
987 SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
988 SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
989 SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB),
990 SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
991 SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
992 SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
993 SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
994 SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB),
995 SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
999 static int check_position_fix(struct azx *chip, int fix)
1001 const struct snd_pci_quirk *q;
1006 case POS_FIX_POSBUF:
1007 case POS_FIX_VIACOMBO:
1012 q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
1014 dev_info(chip->card->dev,
1015 "position_fix set to %d for device %04x:%04x\n",
1016 q->value, q->subvendor, q->subdevice);
1020 /* Check VIA/ATI HD Audio Controller exist */
1021 if (chip->driver_caps & AZX_DCAPS_POSFIX_VIA) {
1022 dev_dbg(chip->card->dev, "Using VIACOMBO position fix\n");
1023 return POS_FIX_VIACOMBO;
1025 if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) {
1026 dev_dbg(chip->card->dev, "Using LPIB position fix\n");
1027 return POS_FIX_LPIB;
1029 return POS_FIX_AUTO;
1033 * black-lists for probe_mask
1035 static struct snd_pci_quirk probe_mask_list[] = {
1036 /* Thinkpad often breaks the controller communication when accessing
1037 * to the non-working (or non-existing) modem codec slot.
1039 SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
1040 SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
1041 SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1043 SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
1044 /* including bogus ALC268 in slot#2 that conflicts with ALC888 */
1045 SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
1046 /* forced codec slots */
1047 SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
1048 SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
1049 /* WinFast VP200 H (Teradici) user reported broken communication */
1050 SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
1054 #define AZX_FORCE_CODEC_MASK 0x100
1056 static void check_probe_mask(struct azx *chip, int dev)
1058 const struct snd_pci_quirk *q;
1060 chip->codec_probe_mask = probe_mask[dev];
1061 if (chip->codec_probe_mask == -1) {
1062 q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
1064 dev_info(chip->card->dev,
1065 "probe_mask set to 0x%x for device %04x:%04x\n",
1066 q->value, q->subvendor, q->subdevice);
1067 chip->codec_probe_mask = q->value;
1071 /* check forced option */
1072 if (chip->codec_probe_mask != -1 &&
1073 (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
1074 chip->codec_mask = chip->codec_probe_mask & 0xff;
1075 dev_info(chip->card->dev, "codec_mask forced to 0x%x\n",
1081 * white/black-list for enable_msi
1083 static struct snd_pci_quirk msi_black_list[] = {
1084 SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
1085 SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
1086 SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
1087 SND_PCI_QUIRK(0x103c, 0x21fa, "HP", 0), /* AMD Hudson */
1088 SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
1089 SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
1090 SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
1091 SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */
1092 SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
1093 SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
1097 static void check_msi(struct azx *chip)
1099 const struct snd_pci_quirk *q;
1101 if (enable_msi >= 0) {
1102 chip->msi = !!enable_msi;
1105 chip->msi = 1; /* enable MSI as default */
1106 q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
1108 dev_info(chip->card->dev,
1109 "msi for device %04x:%04x set to %d\n",
1110 q->subvendor, q->subdevice, q->value);
1111 chip->msi = q->value;
1115 /* NVidia chipsets seem to cause troubles with MSI */
1116 if (chip->driver_caps & AZX_DCAPS_NO_MSI) {
1117 dev_info(chip->card->dev, "Disabling MSI\n");
1122 /* check the snoop mode availability */
1123 static void azx_check_snoop_available(struct azx *chip)
1125 bool snoop = chip->snoop;
1127 switch (chip->driver_type) {
1128 case AZX_DRIVER_VIA:
1129 /* force to non-snoop mode for a new VIA controller
1134 pci_read_config_byte(chip->pci, 0x42, &val);
1135 if (!(val & 0x80) && chip->pci->revision == 0x30)
1139 case AZX_DRIVER_ATIHDMI_NS:
1140 /* new ATI HDMI requires non-snoop */
1143 case AZX_DRIVER_CTHDA:
1148 if (snoop != chip->snoop) {
1149 dev_info(chip->card->dev, "Force to %s mode\n",
1150 snoop ? "snoop" : "non-snoop");
1151 chip->snoop = snoop;
1155 static void azx_probe_work(struct work_struct *work)
1157 azx_probe_continue(container_of(work, struct azx, probe_work));
1163 static int azx_create(struct snd_card *card, struct pci_dev *pci,
1164 int dev, unsigned int driver_caps,
1165 const struct hda_controller_ops *hda_ops,
1168 static struct snd_device_ops ops = {
1169 .dev_free = azx_dev_free,
1176 err = pci_enable_device(pci);
1180 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1182 dev_err(card->dev, "Cannot allocate chip\n");
1183 pci_disable_device(pci);
1187 spin_lock_init(&chip->reg_lock);
1188 mutex_init(&chip->open_mutex);
1191 chip->ops = hda_ops;
1193 chip->driver_caps = driver_caps;
1194 chip->driver_type = driver_caps & 0xff;
1196 chip->dev_index = dev;
1197 chip->jackpoll_ms = jackpoll_ms;
1198 INIT_WORK(&chip->irq_pending_work, azx_irq_pending_work);
1199 INIT_LIST_HEAD(&chip->pcm_list);
1200 INIT_LIST_HEAD(&chip->list);
1201 init_vga_switcheroo(chip);
1202 init_completion(&chip->probe_wait);
1204 chip->position_fix[0] = chip->position_fix[1] =
1205 check_position_fix(chip, position_fix[dev]);
1206 /* combo mode uses LPIB for playback */
1207 if (chip->position_fix[0] == POS_FIX_COMBO) {
1208 chip->position_fix[0] = POS_FIX_LPIB;
1209 chip->position_fix[1] = POS_FIX_AUTO;
1212 check_probe_mask(chip, dev);
1214 chip->single_cmd = single_cmd;
1215 chip->snoop = hda_snoop;
1216 azx_check_snoop_available(chip);
1218 if (bdl_pos_adj[dev] < 0) {
1219 switch (chip->driver_type) {
1220 case AZX_DRIVER_ICH:
1221 case AZX_DRIVER_PCH:
1222 bdl_pos_adj[dev] = 1;
1225 bdl_pos_adj[dev] = 32;
1229 chip->bdl_pos_adj = bdl_pos_adj;
1231 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1233 dev_err(card->dev, "Error creating device [card]!\n");
1238 /* continue probing in work context as may trigger request module */
1239 INIT_WORK(&chip->probe_work, azx_probe_work);
1246 static int azx_first_init(struct azx *chip)
1248 int dev = chip->dev_index;
1249 struct pci_dev *pci = chip->pci;
1250 struct snd_card *card = chip->card;
1252 unsigned short gcap;
1254 #if BITS_PER_LONG != 64
1255 /* Fix up base address on ULI M5461 */
1256 if (chip->driver_type == AZX_DRIVER_ULI) {
1258 pci_read_config_word(pci, 0x40, &tmp3);
1259 pci_write_config_word(pci, 0x40, tmp3 | 0x10);
1260 pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
1264 err = pci_request_regions(pci, "ICH HD audio");
1267 chip->region_requested = 1;
1269 chip->addr = pci_resource_start(pci, 0);
1270 chip->remap_addr = pci_ioremap_bar(pci, 0);
1271 if (chip->remap_addr == NULL) {
1272 dev_err(card->dev, "ioremap error\n");
1277 if (pci_enable_msi(pci) < 0)
1280 if (azx_acquire_irq(chip, 0) < 0)
1283 pci_set_master(pci);
1284 synchronize_irq(chip->irq);
1286 gcap = azx_readw(chip, GCAP);
1287 dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
1289 /* disable SB600 64bit support for safety */
1290 if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
1291 struct pci_dev *p_smbus;
1292 p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
1293 PCI_DEVICE_ID_ATI_SBX00_SMBUS,
1296 if (p_smbus->revision < 0x30)
1297 gcap &= ~ICH6_GCAP_64OK;
1298 pci_dev_put(p_smbus);
1302 /* disable 64bit DMA address on some devices */
1303 if (chip->driver_caps & AZX_DCAPS_NO_64BIT) {
1304 dev_dbg(card->dev, "Disabling 64bit DMA\n");
1305 gcap &= ~ICH6_GCAP_64OK;
1308 /* disable buffer size rounding to 128-byte multiples if supported */
1309 if (align_buffer_size >= 0)
1310 chip->align_buffer_size = !!align_buffer_size;
1312 if (chip->driver_caps & AZX_DCAPS_BUFSIZE)
1313 chip->align_buffer_size = 0;
1314 else if (chip->driver_caps & AZX_DCAPS_ALIGN_BUFSIZE)
1315 chip->align_buffer_size = 1;
1317 chip->align_buffer_size = 1;
1320 /* allow 64bit DMA address if supported by H/W */
1321 if ((gcap & ICH6_GCAP_64OK) && !pci_set_dma_mask(pci, DMA_BIT_MASK(64)))
1322 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(64));
1324 pci_set_dma_mask(pci, DMA_BIT_MASK(32));
1325 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32));
1328 /* read number of streams from GCAP register instead of using
1331 chip->capture_streams = (gcap >> 8) & 0x0f;
1332 chip->playback_streams = (gcap >> 12) & 0x0f;
1333 if (!chip->playback_streams && !chip->capture_streams) {
1334 /* gcap didn't give any info, switching to old method */
1336 switch (chip->driver_type) {
1337 case AZX_DRIVER_ULI:
1338 chip->playback_streams = ULI_NUM_PLAYBACK;
1339 chip->capture_streams = ULI_NUM_CAPTURE;
1341 case AZX_DRIVER_ATIHDMI:
1342 case AZX_DRIVER_ATIHDMI_NS:
1343 chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
1344 chip->capture_streams = ATIHDMI_NUM_CAPTURE;
1346 case AZX_DRIVER_GENERIC:
1348 chip->playback_streams = ICH6_NUM_PLAYBACK;
1349 chip->capture_streams = ICH6_NUM_CAPTURE;
1353 chip->capture_index_offset = 0;
1354 chip->playback_index_offset = chip->capture_streams;
1355 chip->num_streams = chip->playback_streams + chip->capture_streams;
1356 chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev),
1358 if (!chip->azx_dev) {
1359 dev_err(card->dev, "cannot malloc azx_dev\n");
1363 err = azx_alloc_stream_pages(chip);
1367 /* initialize streams */
1368 azx_init_stream(chip);
1370 /* workaround for Broadwell HDMI: the first stream is broken,
1371 * so mask it by keeping it as if opened
1373 if (pci->vendor == 0x8086 && pci->device == 0x160c)
1374 chip->azx_dev[0].opened = 1;
1376 /* initialize chip */
1378 azx_init_chip(chip, (probe_only[dev] & 2) == 0);
1380 /* codec detection */
1381 if (!chip->codec_mask) {
1382 dev_err(card->dev, "no codecs found!\n");
1386 strcpy(card->driver, "HDA-Intel");
1387 strlcpy(card->shortname, driver_short_names[chip->driver_type],
1388 sizeof(card->shortname));
1389 snprintf(card->longname, sizeof(card->longname),
1390 "%s at 0x%lx irq %i",
1391 card->shortname, chip->addr, chip->irq);
1396 static void power_down_all_codecs(struct azx *chip)
1399 /* The codecs were powered up in snd_hda_codec_new().
1400 * Now all initialization done, so turn them down if possible
1402 struct hda_codec *codec;
1403 list_for_each_entry(codec, &chip->bus->codec_list, list) {
1404 snd_hda_power_down(codec);
1409 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1410 /* callback from request_firmware_nowait() */
1411 static void azx_firmware_cb(const struct firmware *fw, void *context)
1413 struct snd_card *card = context;
1414 struct azx *chip = card->private_data;
1415 struct pci_dev *pci = chip->pci;
1418 dev_err(card->dev, "Cannot load firmware, aborting\n");
1423 if (!chip->disabled) {
1424 /* continue probing */
1425 if (azx_probe_continue(chip))
1431 snd_card_free(card);
1432 pci_set_drvdata(pci, NULL);
1437 * HDA controller ops.
1440 /* PCI register access. */
1441 static void pci_azx_writel(u32 value, u32 __iomem *addr)
1443 writel(value, addr);
1446 static u32 pci_azx_readl(u32 __iomem *addr)
1451 static void pci_azx_writew(u16 value, u16 __iomem *addr)
1453 writew(value, addr);
1456 static u16 pci_azx_readw(u16 __iomem *addr)
1461 static void pci_azx_writeb(u8 value, u8 __iomem *addr)
1463 writeb(value, addr);
1466 static u8 pci_azx_readb(u8 __iomem *addr)
1471 static int disable_msi_reset_irq(struct azx *chip)
1475 free_irq(chip->irq, chip);
1477 pci_disable_msi(chip->pci);
1479 err = azx_acquire_irq(chip, 1);
1486 /* DMA page allocation helpers. */
1487 static int dma_alloc_pages(struct azx *chip,
1490 struct snd_dma_buffer *buf)
1494 err = snd_dma_alloc_pages(type,
1499 mark_pages_wc(chip, buf, true);
1503 static void dma_free_pages(struct azx *chip, struct snd_dma_buffer *buf)
1505 mark_pages_wc(chip, buf, false);
1506 snd_dma_free_pages(buf);
1509 static int substream_alloc_pages(struct azx *chip,
1510 struct snd_pcm_substream *substream,
1513 struct azx_dev *azx_dev = get_azx_dev(substream);
1516 mark_runtime_wc(chip, azx_dev, substream, false);
1517 azx_dev->bufsize = 0;
1518 azx_dev->period_bytes = 0;
1519 azx_dev->format_val = 0;
1520 ret = snd_pcm_lib_malloc_pages(substream, size);
1523 mark_runtime_wc(chip, azx_dev, substream, true);
1527 static int substream_free_pages(struct azx *chip,
1528 struct snd_pcm_substream *substream)
1530 struct azx_dev *azx_dev = get_azx_dev(substream);
1531 mark_runtime_wc(chip, azx_dev, substream, false);
1532 return snd_pcm_lib_free_pages(substream);
1535 static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
1536 struct vm_area_struct *area)
1539 struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
1540 struct azx *chip = apcm->chip;
1541 if (!azx_snoop(chip))
1542 area->vm_page_prot = pgprot_writecombine(area->vm_page_prot);
1546 static const struct hda_controller_ops pci_hda_ops = {
1547 .reg_writel = pci_azx_writel,
1548 .reg_readl = pci_azx_readl,
1549 .reg_writew = pci_azx_writew,
1550 .reg_readw = pci_azx_readw,
1551 .reg_writeb = pci_azx_writeb,
1552 .reg_readb = pci_azx_readb,
1553 .disable_msi_reset_irq = disable_msi_reset_irq,
1554 .dma_alloc_pages = dma_alloc_pages,
1555 .dma_free_pages = dma_free_pages,
1556 .substream_alloc_pages = substream_alloc_pages,
1557 .substream_free_pages = substream_free_pages,
1558 .pcm_mmap_prepare = pcm_mmap_prepare,
1559 .position_check = azx_position_check,
1562 static int azx_probe(struct pci_dev *pci,
1563 const struct pci_device_id *pci_id)
1566 struct snd_card *card;
1568 bool schedule_probe;
1571 if (dev >= SNDRV_CARDS)
1578 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1581 dev_err(&pci->dev, "Error creating card!\n");
1585 err = azx_create(card, pci, dev, pci_id->driver_data,
1586 &pci_hda_ops, &chip);
1589 card->private_data = chip;
1591 pci_set_drvdata(pci, card);
1593 err = register_vga_switcheroo(chip);
1595 dev_err(card->dev, "Error registering VGA-switcheroo client\n");
1599 if (check_hdmi_disabled(pci)) {
1600 dev_info(card->dev, "VGA controller is disabled\n");
1601 dev_info(card->dev, "Delaying initialization\n");
1602 chip->disabled = true;
1605 schedule_probe = !chip->disabled;
1607 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1608 if (patch[dev] && *patch[dev]) {
1609 dev_info(card->dev, "Applying patch firmware '%s'\n",
1611 err = request_firmware_nowait(THIS_MODULE, true, patch[dev],
1612 &pci->dev, GFP_KERNEL, card,
1616 schedule_probe = false; /* continued in azx_firmware_cb() */
1618 #endif /* CONFIG_SND_HDA_PATCH_LOADER */
1620 #ifndef CONFIG_SND_HDA_I915
1621 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1622 dev_err(card->dev, "Haswell must build in CONFIG_SND_HDA_I915\n");
1626 schedule_work(&chip->probe_work);
1630 complete_all(&chip->probe_wait);
1634 snd_card_free(card);
1638 /* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
1639 static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
1640 [AZX_DRIVER_NVIDIA] = 8,
1641 [AZX_DRIVER_TERA] = 1,
1644 static int azx_probe_continue(struct azx *chip)
1646 struct pci_dev *pci = chip->pci;
1647 int dev = chip->dev_index;
1650 /* Request power well for Haswell HDA controller and codec */
1651 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1652 #ifdef CONFIG_SND_HDA_I915
1653 err = hda_i915_init();
1655 dev_err(chip->card->dev,
1656 "Error request power-well from i915\n");
1660 hda_display_power(true);
1663 err = azx_first_init(chip);
1667 #ifdef CONFIG_SND_HDA_INPUT_BEEP
1668 chip->beep_mode = beep_mode[dev];
1671 /* create codec instances */
1672 err = azx_codec_create(chip, model[dev],
1673 azx_max_codecs[chip->driver_type],
1678 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1680 err = snd_hda_load_patch(chip->bus, chip->fw->size,
1685 release_firmware(chip->fw); /* no longer needed */
1690 if ((probe_only[dev] & 1) == 0) {
1691 err = azx_codec_configure(chip);
1696 /* create PCM streams */
1697 err = snd_hda_build_pcms(chip->bus);
1701 /* create mixer controls */
1702 err = azx_mixer_create(chip);
1706 err = snd_card_register(chip->card);
1711 power_down_all_codecs(chip);
1712 azx_notifier_register(chip);
1713 azx_add_card_list(chip);
1714 if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME) || chip->use_vga_switcheroo)
1715 pm_runtime_put_noidle(&pci->dev);
1719 chip->init_failed = 1;
1720 complete_all(&chip->probe_wait);
1724 static void azx_remove(struct pci_dev *pci)
1726 struct snd_card *card = pci_get_drvdata(pci);
1729 snd_card_free(card);
1733 static const struct pci_device_id azx_ids[] = {
1735 { PCI_DEVICE(0x8086, 0x1c20),
1736 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1738 { PCI_DEVICE(0x8086, 0x1d20),
1739 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1741 { PCI_DEVICE(0x8086, 0x1e20),
1742 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1744 { PCI_DEVICE(0x8086, 0x8c20),
1745 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1747 { PCI_DEVICE(0x8086, 0x8ca0),
1748 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1750 { PCI_DEVICE(0x8086, 0x8d20),
1751 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1752 { PCI_DEVICE(0x8086, 0x8d21),
1753 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1755 { PCI_DEVICE(0x8086, 0x9c20),
1756 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1758 { PCI_DEVICE(0x8086, 0x9c21),
1759 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1760 /* Wildcat Point-LP */
1761 { PCI_DEVICE(0x8086, 0x9ca0),
1762 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1764 { PCI_DEVICE(0x8086, 0x0a0c),
1765 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1766 { PCI_DEVICE(0x8086, 0x0c0c),
1767 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1768 { PCI_DEVICE(0x8086, 0x0d0c),
1769 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1771 { PCI_DEVICE(0x8086, 0x160c),
1772 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1774 { PCI_DEVICE(0x8086, 0x3b56),
1775 .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
1777 { PCI_DEVICE(0x8086, 0x811b),
1778 .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
1780 { PCI_DEVICE(0x8086, 0x080a),
1781 .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
1783 { PCI_DEVICE(0x8086, 0x0f04),
1784 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1786 { PCI_DEVICE(0x8086, 0x2668),
1787 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1788 AZX_DCAPS_BUFSIZE }, /* ICH6 */
1789 { PCI_DEVICE(0x8086, 0x27d8),
1790 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1791 AZX_DCAPS_BUFSIZE }, /* ICH7 */
1792 { PCI_DEVICE(0x8086, 0x269a),
1793 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1794 AZX_DCAPS_BUFSIZE }, /* ESB2 */
1795 { PCI_DEVICE(0x8086, 0x284b),
1796 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1797 AZX_DCAPS_BUFSIZE }, /* ICH8 */
1798 { PCI_DEVICE(0x8086, 0x293e),
1799 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1800 AZX_DCAPS_BUFSIZE }, /* ICH9 */
1801 { PCI_DEVICE(0x8086, 0x293f),
1802 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1803 AZX_DCAPS_BUFSIZE }, /* ICH9 */
1804 { PCI_DEVICE(0x8086, 0x3a3e),
1805 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1806 AZX_DCAPS_BUFSIZE }, /* ICH10 */
1807 { PCI_DEVICE(0x8086, 0x3a6e),
1808 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1809 AZX_DCAPS_BUFSIZE }, /* ICH10 */
1811 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
1812 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1813 .class_mask = 0xffffff,
1814 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_BUFSIZE },
1815 /* ATI SB 450/600/700/800/900 */
1816 { PCI_DEVICE(0x1002, 0x437b),
1817 .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
1818 { PCI_DEVICE(0x1002, 0x4383),
1819 .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
1821 { PCI_DEVICE(0x1022, 0x780d),
1822 .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB },
1824 { PCI_DEVICE(0x1002, 0x793b),
1825 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1826 { PCI_DEVICE(0x1002, 0x7919),
1827 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1828 { PCI_DEVICE(0x1002, 0x960f),
1829 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1830 { PCI_DEVICE(0x1002, 0x970f),
1831 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1832 { PCI_DEVICE(0x1002, 0xaa00),
1833 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1834 { PCI_DEVICE(0x1002, 0xaa08),
1835 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1836 { PCI_DEVICE(0x1002, 0xaa10),
1837 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1838 { PCI_DEVICE(0x1002, 0xaa18),
1839 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1840 { PCI_DEVICE(0x1002, 0xaa20),
1841 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1842 { PCI_DEVICE(0x1002, 0xaa28),
1843 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1844 { PCI_DEVICE(0x1002, 0xaa30),
1845 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1846 { PCI_DEVICE(0x1002, 0xaa38),
1847 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1848 { PCI_DEVICE(0x1002, 0xaa40),
1849 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1850 { PCI_DEVICE(0x1002, 0xaa48),
1851 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1852 { PCI_DEVICE(0x1002, 0xaa50),
1853 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1854 { PCI_DEVICE(0x1002, 0xaa58),
1855 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1856 { PCI_DEVICE(0x1002, 0xaa60),
1857 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1858 { PCI_DEVICE(0x1002, 0xaa68),
1859 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1860 { PCI_DEVICE(0x1002, 0xaa80),
1861 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1862 { PCI_DEVICE(0x1002, 0xaa88),
1863 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1864 { PCI_DEVICE(0x1002, 0xaa90),
1865 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1866 { PCI_DEVICE(0x1002, 0xaa98),
1867 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1868 { PCI_DEVICE(0x1002, 0x9902),
1869 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
1870 { PCI_DEVICE(0x1002, 0xaaa0),
1871 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
1872 { PCI_DEVICE(0x1002, 0xaaa8),
1873 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
1874 { PCI_DEVICE(0x1002, 0xaab0),
1875 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
1876 /* VIA VT8251/VT8237A */
1877 { PCI_DEVICE(0x1106, 0x3288),
1878 .driver_data = AZX_DRIVER_VIA | AZX_DCAPS_POSFIX_VIA },
1879 /* VIA GFX VT7122/VX900 */
1880 { PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
1881 /* VIA GFX VT6122/VX11 */
1882 { PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
1884 { PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
1886 { PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI },
1888 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1889 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1890 .class_mask = 0xffffff,
1891 .driver_data = AZX_DRIVER_NVIDIA | AZX_DCAPS_PRESET_NVIDIA },
1893 { PCI_DEVICE(0x6549, 0x1200),
1894 .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
1895 { PCI_DEVICE(0x6549, 0x2200),
1896 .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
1897 /* Creative X-Fi (CA0110-IBG) */
1899 { PCI_DEVICE(0x1102, 0x0010),
1900 .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
1901 { PCI_DEVICE(0x1102, 0x0012),
1902 .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
1903 #if !IS_ENABLED(CONFIG_SND_CTXFI)
1904 /* the following entry conflicts with snd-ctxfi driver,
1905 * as ctxfi driver mutates from HD-audio to native mode with
1906 * a special command sequence.
1908 { PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_ANY_ID),
1909 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1910 .class_mask = 0xffffff,
1911 .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
1912 AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
1914 /* this entry seems still valid -- i.e. without emu20kx chip */
1915 { PCI_DEVICE(0x1102, 0x0009),
1916 .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
1917 AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
1920 { PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
1921 /* VMware HDAudio */
1922 { PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
1923 /* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
1924 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
1925 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1926 .class_mask = 0xffffff,
1927 .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
1928 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID),
1929 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1930 .class_mask = 0xffffff,
1931 .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
1934 MODULE_DEVICE_TABLE(pci, azx_ids);
1936 /* pci_driver definition */
1937 static struct pci_driver azx_driver = {
1938 .name = KBUILD_MODNAME,
1939 .id_table = azx_ids,
1941 .remove = azx_remove,
1947 module_pci_driver(azx_driver);