sound/pci/hda/hda_tegra.c

   1 /*
   2  *
   3  * Implementation of primary ALSA driver code base for NVIDIA Tegra HDA.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  16  *
  17  */
  18
  19 #include <linux/clk.h>
  20 #include <linux/clocksource.h>
  21 #include <linux/completion.h>
  22 #include <linux/delay.h>
  23 #include <linux/dma-mapping.h>
  24 #include <linux/init.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/io.h>
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/moduleparam.h>
  30 #include <linux/mutex.h>
  31 #include <linux/of_device.h>
  32 #include <linux/slab.h>
  33 #include <linux/time.h>
  34
  35 #include <sound/core.h>
  36 #include <sound/initval.h>
  37
  38 #include "hda_codec.h"
  39 #include "hda_controller.h"
  40 #include "hda_priv.h"
  41
  42 /* Defines for Nvidia Tegra HDA support */
  43 #define HDA_BAR0           0x8000
  44
  45 #define HDA_CFG_CMD        0x1004
  46 #define HDA_CFG_BAR0       0x1010
  47
  48 #define HDA_ENABLE_IO_SPACE       (1 << 0)
  49 #define HDA_ENABLE_MEM_SPACE      (1 << 1)
  50 #define HDA_ENABLE_BUS_MASTER     (1 << 2)
  51 #define HDA_ENABLE_SERR           (1 << 8)
  52 #define HDA_DISABLE_INTR          (1 << 10)
  53 #define HDA_BAR0_INIT_PROGRAM     0xFFFFFFFF
  54 #define HDA_BAR0_FINAL_PROGRAM    (1 << 14)
  55
  56 /* IPFS */
  57 #define HDA_IPFS_CONFIG           0x180
  58 #define HDA_IPFS_EN_FPCI          0x1
  59
  60 #define HDA_IPFS_FPCI_BAR0        0x80
  61 #define HDA_FPCI_BAR0_START       0x40
  62
  63 #define HDA_IPFS_INTR_MASK        0x188
  64 #define HDA_IPFS_EN_INTR          (1 << 16)
  65
  66 /* max number of SDs */
  67 #define NUM_CAPTURE_SD 1
  68 #define NUM_PLAYBACK_SD 1
  69
  70 struct hda_tegra {
  71         struct azx chip;
  72         struct device *dev;
  73         struct clk *hda_clk;
  74         struct clk *hda2codec_2x_clk;
  75         struct clk *hda2hdmi_clk;
  76         void __iomem *regs;
  77 };
  78
  79 #ifdef CONFIG_PM
  80 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
  81 module_param(power_save, bint, 0644);
  82 MODULE_PARM_DESC(power_save,
  83                  "Automatic power-saving timeout (in seconds, 0 = disable).");
  84 #else
  85 static int power_save = 0;
  86 #endif
  87
  88 /*
  89  * DMA page allocation ops.
  90  */
  91 static int dma_alloc_pages(struct azx *chip, int type, size_t size,
  92                            struct snd_dma_buffer *buf)
  93 {
  94         return snd_dma_alloc_pages(type, chip->card->dev, size, buf);
  95 }
  96
  97 static void dma_free_pages(struct azx *chip, struct snd_dma_buffer *buf)
  98 {
  99         snd_dma_free_pages(buf);
 100 }
 101
 102 static int substream_alloc_pages(struct azx *chip,
 103                                  struct snd_pcm_substream *substream,
 104                                  size_t size)
 105 {
 106         struct azx_dev *azx_dev = get_azx_dev(substream);
 107
 108         azx_dev->bufsize = 0;
 109         azx_dev->period_bytes = 0;
 110         azx_dev->format_val = 0;
 111         return snd_pcm_lib_malloc_pages(substream, size);
 112 }
 113
 114 static int substream_free_pages(struct azx *chip,
 115                                 struct snd_pcm_substream *substream)
 116 {
 117         return snd_pcm_lib_free_pages(substream);
 118 }
 119
 120 /*
 121  * Register access ops. Tegra HDA register access is DWORD only.
 122  */
 123 static void hda_tegra_writel(u32 value, u32 *addr)
 124 {
 125         writel(value, addr);
 126 }
 127
 128 static u32 hda_tegra_readl(u32 *addr)
 129 {
 130         return readl(addr);
 131 }
 132
 133 static void hda_tegra_writew(u16 value, u16 *addr)
 134 {
 135         unsigned int shift = ((unsigned long)(addr) & 0x3) << 3;
 136         void *dword_addr = (void *)((unsigned long)(addr) & ~0x3);
 137         u32 v;
 138
 139         v = readl(dword_addr);
 140         v &= ~(0xffff << shift);
 141         v |= value << shift;
 142         writel(v, dword_addr);
 143 }
 144
 145 static u16 hda_tegra_readw(u16 *addr)
 146 {
 147         unsigned int shift = ((unsigned long)(addr) & 0x3) << 3;
 148         void *dword_addr = (void *)((unsigned long)(addr) & ~0x3);
 149         u32 v;
 150
 151         v = readl(dword_addr);
 152         return (v >> shift) & 0xffff;
 153 }
 154
 155 static void hda_tegra_writeb(u8 value, u8 *addr)
 156 {
 157         unsigned int shift = ((unsigned long)(addr) & 0x3) << 3;
 158         void *dword_addr = (void *)((unsigned long)(addr) & ~0x3);
 159         u32 v;
 160
 161         v = readl(dword_addr);
 162         v &= ~(0xff << shift);
 163         v |= value << shift;
 164         writel(v, dword_addr);
 165 }
 166
 167 static u8 hda_tegra_readb(u8 *addr)
 168 {
 169         unsigned int shift = ((unsigned long)(addr) & 0x3) << 3;
 170         void *dword_addr = (void *)((unsigned long)(addr) & ~0x3);
 171         u32 v;
 172
 173         v = readl(dword_addr);
 174         return (v >> shift) & 0xff;
 175 }
 176
 177 static const struct hda_controller_ops hda_tegra_ops = {
 178         .reg_writel = hda_tegra_writel,
 179         .reg_readl = hda_tegra_readl,
 180         .reg_writew = hda_tegra_writew,
 181         .reg_readw = hda_tegra_readw,
 182         .reg_writeb = hda_tegra_writeb,
 183         .reg_readb = hda_tegra_readb,
 184         .dma_alloc_pages = dma_alloc_pages,
 185         .dma_free_pages = dma_free_pages,
 186         .substream_alloc_pages = substream_alloc_pages,
 187         .substream_free_pages = substream_free_pages,
 188 };
 189
 190 static void hda_tegra_init(struct hda_tegra *hda)
 191 {
 192         u32 v;
 193
 194         /* Enable PCI access */
 195         v = readl(hda->regs + HDA_IPFS_CONFIG);
 196         v |= HDA_IPFS_EN_FPCI;
 197         writel(v, hda->regs + HDA_IPFS_CONFIG);
 198
 199         /* Enable MEM/IO space and bus master */
 200         v = readl(hda->regs + HDA_CFG_CMD);
 201         v &= ~HDA_DISABLE_INTR;
 202         v |= HDA_ENABLE_MEM_SPACE | HDA_ENABLE_IO_SPACE |
 203                 HDA_ENABLE_BUS_MASTER | HDA_ENABLE_SERR;
 204         writel(v, hda->regs + HDA_CFG_CMD);
 205
 206         writel(HDA_BAR0_INIT_PROGRAM, hda->regs + HDA_CFG_BAR0);
 207         writel(HDA_BAR0_FINAL_PROGRAM, hda->regs + HDA_CFG_BAR0);
 208         writel(HDA_FPCI_BAR0_START, hda->regs + HDA_IPFS_FPCI_BAR0);
 209
 210         v = readl(hda->regs + HDA_IPFS_INTR_MASK);
 211         v |= HDA_IPFS_EN_INTR;
 212         writel(v, hda->regs + HDA_IPFS_INTR_MASK);
 213 }
 214
 215 static int hda_tegra_enable_clocks(struct hda_tegra *data)
 216 {
 217         int rc;
 218
 219         rc = clk_prepare_enable(data->hda_clk);
 220         if (rc)
 221                 return rc;
 222         rc = clk_prepare_enable(data->hda2codec_2x_clk);
 223         if (rc)
 224                 goto disable_hda;
 225         rc = clk_prepare_enable(data->hda2hdmi_clk);
 226         if (rc)
 227                 goto disable_codec_2x;
 228
 229         return 0;
 230
 231 disable_codec_2x:
 232         clk_disable_unprepare(data->hda2codec_2x_clk);
 233 disable_hda:
 234         clk_disable_unprepare(data->hda_clk);
 235         return rc;
 236 }
 237
 238 static void hda_tegra_disable_clocks(struct hda_tegra *data)
 239 {
 240         clk_disable_unprepare(data->hda2hdmi_clk);
 241         clk_disable_unprepare(data->hda2codec_2x_clk);
 242         clk_disable_unprepare(data->hda_clk);
 243 }
 244
 245 #ifdef CONFIG_PM_SLEEP
 246 /*
 247  * power management
 248  */
 249 static int hda_tegra_suspend(struct device *dev)
 250 {
 251         struct snd_card *card = dev_get_drvdata(dev);
 252         struct azx *chip = card->private_data;
 253         struct azx_pcm *p;
 254         struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
 255
 256         snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
 257         list_for_each_entry(p, &chip->pcm_list, list)
 258                 snd_pcm_suspend_all(p->pcm);
 259         if (chip->initialized)
 260                 snd_hda_suspend(chip->bus);
 261
 262         azx_stop_chip(chip);
 263         azx_enter_link_reset(chip);
 264         hda_tegra_disable_clocks(hda);
 265
 266         return 0;
 267 }
 268
 269 static int hda_tegra_resume(struct device *dev)
 270 {
 271         struct snd_card *card = dev_get_drvdata(dev);
 272         struct azx *chip = card->private_data;
 273         struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
 274         int status;
 275
 276         hda_tegra_enable_clocks(hda);
 277
 278         /* Read STATESTS before controller reset */
 279         status = azx_readw(chip, STATESTS);
 280
 281         hda_tegra_init(hda);
 282
 283         azx_init_chip(chip, 1);
 284
 285         snd_hda_resume(chip->bus);
 286         snd_power_change_state(card, SNDRV_CTL_POWER_D0);
 287
 288         return 0;
 289 }
 290 #endif /* CONFIG_PM_SLEEP */
 291
 292 static const struct dev_pm_ops hda_tegra_pm = {
 293         SET_SYSTEM_SLEEP_PM_OPS(hda_tegra_suspend, hda_tegra_resume)
 294 };
 295
 296 /*
 297  * destructor
 298  */
 299 static int hda_tegra_dev_free(struct snd_device *device)
 300 {
 301         int i;
 302         struct azx *chip = device->device_data;
 303
 304         azx_notifier_unregister(chip);
 305
 306         if (chip->initialized) {
 307                 for (i = 0; i < chip->num_streams; i++)
 308                         azx_stream_stop(chip, &chip->azx_dev[i]);
 309                 azx_stop_chip(chip);
 310         }
 311
 312         azx_free_stream_pages(chip);
 313
 314         return 0;
 315 }
 316
 317 static int hda_tegra_init_chip(struct azx *chip, struct platform_device *pdev)
 318 {
 319         struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
 320         struct device *dev = hda->dev;
 321         struct resource *res;
 322         int err;
 323
 324         hda->hda_clk = devm_clk_get(dev, "hda");
 325         if (IS_ERR(hda->hda_clk))
 326                 return PTR_ERR(hda->hda_clk);
 327         hda->hda2codec_2x_clk = devm_clk_get(dev, "hda2codec_2x");
 328         if (IS_ERR(hda->hda2codec_2x_clk))
 329                 return PTR_ERR(hda->hda2codec_2x_clk);
 330         hda->hda2hdmi_clk = devm_clk_get(dev, "hda2hdmi");
 331         if (IS_ERR(hda->hda2hdmi_clk))
 332                 return PTR_ERR(hda->hda2hdmi_clk);
 333
 334         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 335         hda->regs = devm_ioremap_resource(dev, res);
 336         if (IS_ERR(chip->remap_addr))
 337                 return PTR_ERR(chip->remap_addr);
 338
 339         chip->remap_addr = hda->regs + HDA_BAR0;
 340         chip->addr = res->start + HDA_BAR0;
 341
 342         err = hda_tegra_enable_clocks(hda);
 343         if (err)
 344                 return err;
 345
 346         hda_tegra_init(hda);
 347
 348         return 0;
 349 }
 350
 351 /*
 352  * The codecs were powered up in snd_hda_codec_new().
 353  * Now all initialization done, so turn them down if possible
 354  */
 355 static void power_down_all_codecs(struct azx *chip)
 356 {
 357         struct hda_codec *codec;
 358         list_for_each_entry(codec, &chip->bus->codec_list, list)
 359                 snd_hda_power_down(codec);
 360 }
 361
 362 static int hda_tegra_first_init(struct azx *chip, struct platform_device *pdev)
 363 {
 364         struct snd_card *card = chip->card;
 365         int err;
 366         unsigned short gcap;
 367         int irq_id = platform_get_irq(pdev, 0);
 368
 369         err = hda_tegra_init_chip(chip, pdev);
 370         if (err)
 371                 return err;
 372
 373         err = devm_request_irq(chip->card->dev, irq_id, azx_interrupt,
 374                              IRQF_SHARED, KBUILD_MODNAME, chip);
 375         if (err) {
 376                 dev_err(chip->card->dev,
 377                         "unable to request IRQ %d, disabling device\n",
 378                         irq_id);
 379                 return err;
 380         }
 381         chip->irq = irq_id;
 382
 383         synchronize_irq(chip->irq);
 384
 385         gcap = azx_readw(chip, GCAP);
 386         dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
 387
 388         /* read number of streams from GCAP register instead of using
 389          * hardcoded value
 390          */
 391         chip->capture_streams = (gcap >> 8) & 0x0f;
 392         chip->playback_streams = (gcap >> 12) & 0x0f;
 393         if (!chip->playback_streams && !chip->capture_streams) {
 394                 /* gcap didn't give any info, switching to old method */
 395                 chip->playback_streams = NUM_PLAYBACK_SD;
 396                 chip->capture_streams = NUM_CAPTURE_SD;
 397         }
 398         chip->capture_index_offset = 0;
 399         chip->playback_index_offset = chip->capture_streams;
 400         chip->num_streams = chip->playback_streams + chip->capture_streams;
 401         chip->azx_dev = devm_kcalloc(card->dev, chip->num_streams,
 402                                      sizeof(*chip->azx_dev), GFP_KERNEL);
 403         if (!chip->azx_dev)
 404                 return -ENOMEM;
 405
 406         err = azx_alloc_stream_pages(chip);
 407         if (err < 0)
 408                 return err;
 409
 410         /* initialize streams */
 411         azx_init_stream(chip);
 412
 413         /* initialize chip */
 414         azx_init_chip(chip, 1);
 415
 416         /* codec detection */
 417         if (!chip->codec_mask) {
 418                 dev_err(card->dev, "no codecs found!\n");
 419                 return -ENODEV;
 420         }
 421
 422         strcpy(card->driver, "tegra-hda");
 423         strcpy(card->shortname, "tegra-hda");
 424         snprintf(card->longname, sizeof(card->longname),
 425                  "%s at 0x%lx irq %i",
 426                  card->shortname, chip->addr, chip->irq);
 427
 428         return 0;
 429 }
 430
 431 /*
 432  * constructor
 433  */
 434 static int hda_tegra_create(struct snd_card *card,
 435                             unsigned int driver_caps,
 436                             const struct hda_controller_ops *hda_ops,
 437                             struct hda_tegra *hda)
 438 {
 439         static struct snd_device_ops ops = {
 440                 .dev_free = hda_tegra_dev_free,
 441         };
 442         struct azx *chip;
 443         int err;
 444
 445         chip = &hda->chip;
 446
 447         spin_lock_init(&chip->reg_lock);
 448         mutex_init(&chip->open_mutex);
 449         chip->card = card;
 450         chip->ops = hda_ops;
 451         chip->irq = -1;
 452         chip->driver_caps = driver_caps;
 453         chip->driver_type = driver_caps & 0xff;
 454         chip->dev_index = 0;
 455         INIT_LIST_HEAD(&chip->pcm_list);
 456
 457         chip->codec_probe_mask = -1;
 458
 459         chip->single_cmd = false;
 460         chip->snoop = true;
 461
 462         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
 463         if (err < 0) {
 464                 dev_err(card->dev, "Error creating device\n");
 465                 return err;
 466         }
 467
 468         return 0;
 469 }
 470
 471 static const struct of_device_id hda_tegra_match[] = {
 472         { .compatible = "nvidia,tegra30-hda" },
 473         {},
 474 };
 475 MODULE_DEVICE_TABLE(of, hda_tegra_match);
 476
 477 static int hda_tegra_probe(struct platform_device *pdev)
 478 {
 479         struct snd_card *card;
 480         struct azx *chip;
 481         struct hda_tegra *hda;
 482         int err;
 483         const unsigned int driver_flags = AZX_DCAPS_RIRB_DELAY;
 484
 485         hda = devm_kzalloc(&pdev->dev, sizeof(*hda), GFP_KERNEL);
 486         if (!hda)
 487                 return -ENOMEM;
 488         hda->dev = &pdev->dev;
 489         chip = &hda->chip;
 490
 491         err = snd_card_new(&pdev->dev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
 492                            THIS_MODULE, 0, &card);
 493         if (err < 0) {
 494                 dev_err(&pdev->dev, "Error creating card!\n");
 495                 return err;
 496         }
 497
 498         err = hda_tegra_create(card, driver_flags, &hda_tegra_ops, hda);
 499         if (err < 0)
 500                 goto out_free;
 501         card->private_data = chip;
 502
 503         dev_set_drvdata(&pdev->dev, card);
 504
 505         err = hda_tegra_first_init(chip, pdev);
 506         if (err < 0)
 507                 goto out_free;
 508
 509         /* create codec instances */
 510         err = azx_codec_create(chip, NULL, 0, &power_save);
 511         if (err < 0)
 512                 goto out_free;
 513
 514         err = azx_codec_configure(chip);
 515         if (err < 0)
 516                 goto out_free;
 517
 518         /* create PCM streams */
 519         err = snd_hda_build_pcms(chip->bus);
 520         if (err < 0)
 521                 goto out_free;
 522
 523         /* create mixer controls */
 524         err = azx_mixer_create(chip);
 525         if (err < 0)
 526                 goto out_free;
 527
 528         err = snd_card_register(chip->card);
 529         if (err < 0)
 530                 goto out_free;
 531
 532         chip->running = 1;
 533         power_down_all_codecs(chip);
 534         azx_notifier_register(chip);
 535
 536         return 0;
 537
 538 out_free:
 539         snd_card_free(card);
 540         return err;
 541 }
 542
 543 static int hda_tegra_remove(struct platform_device *pdev)
 544 {
 545         return snd_card_free(dev_get_drvdata(&pdev->dev));
 546 }
 547
 548 static struct platform_driver tegra_platform_hda = {
 549         .driver = {
 550                 .name = "tegra-hda",
 551                 .pm = &hda_tegra_pm,
 552                 .of_match_table = hda_tegra_match,
 553         },
 554         .probe = hda_tegra_probe,
 555         .remove = hda_tegra_remove,
 556 };
 557 module_platform_driver(tegra_platform_hda);
 558
 559 MODULE_DESCRIPTION("Tegra HDA bus driver");
 560 MODULE_LICENSE("GPL v2");