sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *
  10  *  Authors:
  11  *                      Wu Fengguang <wfg@linux.intel.com>
  12  *
  13  *  Maintained by:
  14  *                      Wu Fengguang <wfg@linux.intel.com>
  15  *
  16  *  This program is free software; you can redistribute it and/or modify it
  17  *  under the terms of the GNU General Public License as published by the Free
  18  *  Software Foundation; either version 2 of the License, or (at your option)
  19  *  any later version.
  20  *
  21  *  This program is distributed in the hope that it will be useful, but
  22  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  24  *  for more details.
  25  *
  26  *  You should have received a copy of the GNU General Public License
  27  *  along with this program; if not, write to the Free Software Foundation,
  28  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  29  */
  30
  31 #include <linux/init.h>
  32 #include <linux/delay.h>
  33 #include <linux/slab.h>
  34 #include <linux/module.h>
  35 #include <sound/core.h>
  36 #include <sound/jack.h>
  37 #include <sound/asoundef.h>
  38 #include "hda_codec.h"
  39 #include "hda_local.h"
  40 #include "hda_jack.h"
  41
  42 static bool static_hdmi_pcm;
  43 module_param(static_hdmi_pcm, bool, 0644);
  44 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  45
  46 /*
  47  * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
  48  * could support N independent pipes, each of them can be connected to one or
  49  * more ports (DVI, HDMI or DisplayPort).
  50  *
  51  * The HDA correspondence of pipes/ports are converter/pin nodes.
  52  */
  53 #define MAX_HDMI_CVTS   8
  54 #define MAX_HDMI_PINS   8
  55
  56 struct hdmi_spec_per_cvt {
  57         hda_nid_t cvt_nid;
  58         int assigned;
  59         unsigned int channels_min;
  60         unsigned int channels_max;
  61         u32 rates;
  62         u64 formats;
  63         unsigned int maxbps;
  64 };
  65
  66 struct hdmi_spec_per_pin {
  67         hda_nid_t pin_nid;
  68         int num_mux_nids;
  69         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  70
  71         struct hda_codec *codec;
  72         struct hdmi_eld sink_eld;
  73         struct delayed_work work;
  74         int repoll_count;
  75         bool non_pcm;
  76 };
  77
  78 struct hdmi_spec {
  79         int num_cvts;
  80         struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
  81
  82         int num_pins;
  83         struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
  84         struct hda_pcm pcm_rec[MAX_HDMI_PINS];
  85
  86         /*
  87          * Non-generic ATI/NVIDIA specific
  88          */
  89         struct hda_multi_out multiout;
  90         struct hda_pcm_stream pcm_playback;
  91 };
  92
  93
  94 struct hdmi_audio_infoframe {
  95         u8 type; /* 0x84 */
  96         u8 ver;  /* 0x01 */
  97         u8 len;  /* 0x0a */
  98
  99         u8 checksum;
 100
 101         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 102         u8 SS01_SF24;
 103         u8 CXT04;
 104         u8 CA;
 105         u8 LFEPBL01_LSV36_DM_INH7;
 106 };
 107
 108 struct dp_audio_infoframe {
 109         u8 type; /* 0x84 */
 110         u8 len;  /* 0x1b */
 111         u8 ver;  /* 0x11 << 2 */
 112
 113         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 114         u8 SS01_SF24;
 115         u8 CXT04;
 116         u8 CA;
 117         u8 LFEPBL01_LSV36_DM_INH7;
 118 };
 119
 120 union audio_infoframe {
 121         struct hdmi_audio_infoframe hdmi;
 122         struct dp_audio_infoframe dp;
 123         u8 bytes[0];
 124 };
 125
 126 /*
 127  * CEA speaker placement:
 128  *
 129  *        FLH       FCH        FRH
 130  *  FLW    FL  FLC   FC   FRC   FR   FRW
 131  *
 132  *                                  LFE
 133  *                     TC
 134  *
 135  *          RL  RLC   RC   RRC   RR
 136  *
 137  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 138  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 139  */
 140 enum cea_speaker_placement {
 141         FL  = (1 <<  0),        /* Front Left           */
 142         FC  = (1 <<  1),        /* Front Center         */
 143         FR  = (1 <<  2),        /* Front Right          */
 144         FLC = (1 <<  3),        /* Front Left Center    */
 145         FRC = (1 <<  4),        /* Front Right Center   */
 146         RL  = (1 <<  5),        /* Rear Left            */
 147         RC  = (1 <<  6),        /* Rear Center          */
 148         RR  = (1 <<  7),        /* Rear Right           */
 149         RLC = (1 <<  8),        /* Rear Left Center     */
 150         RRC = (1 <<  9),        /* Rear Right Center    */
 151         LFE = (1 << 10),        /* Low Frequency Effect */
 152         FLW = (1 << 11),        /* Front Left Wide      */
 153         FRW = (1 << 12),        /* Front Right Wide     */
 154         FLH = (1 << 13),        /* Front Left High      */
 155         FCH = (1 << 14),        /* Front Center High    */
 156         FRH = (1 << 15),        /* Front Right High     */
 157         TC  = (1 << 16),        /* Top Center           */
 158 };
 159
 160 /*
 161  * ELD SA bits in the CEA Speaker Allocation data block
 162  */
 163 static int eld_speaker_allocation_bits[] = {
 164         [0] = FL | FR,
 165         [1] = LFE,
 166         [2] = FC,
 167         [3] = RL | RR,
 168         [4] = RC,
 169         [5] = FLC | FRC,
 170         [6] = RLC | RRC,
 171         /* the following are not defined in ELD yet */
 172         [7] = FLW | FRW,
 173         [8] = FLH | FRH,
 174         [9] = TC,
 175         [10] = FCH,
 176 };
 177
 178 struct cea_channel_speaker_allocation {
 179         int ca_index;
 180         int speakers[8];
 181
 182         /* derived values, just for convenience */
 183         int channels;
 184         int spk_mask;
 185 };
 186
 187 /*
 188  * ALSA sequence is:
 189  *
 190  *       surround40   surround41   surround50   surround51   surround71
 191  * ch0   front left   =            =            =            =
 192  * ch1   front right  =            =            =            =
 193  * ch2   rear left    =            =            =            =
 194  * ch3   rear right   =            =            =            =
 195  * ch4                LFE          center       center       center
 196  * ch5                                          LFE          LFE
 197  * ch6                                                       side left
 198  * ch7                                                       side right
 199  *
 200  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 201  */
 202 static int hdmi_channel_mapping[0x32][8] = {
 203         /* stereo */
 204         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 205         /* 2.1 */
 206         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 207         /* Dolby Surround */
 208         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 209         /* surround40 */
 210         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 211         /* 4ch */
 212         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 213         /* surround41 */
 214         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 215         /* surround50 */
 216         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 217         /* surround51 */
 218         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 219         /* 7.1 */
 220         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 221 };
 222
 223 /*
 224  * This is an ordered list!
 225  *
 226  * The preceding ones have better chances to be selected by
 227  * hdmi_channel_allocation().
 228  */
 229 static struct cea_channel_speaker_allocation channel_allocations[] = {
 230 /*                        channel:   7     6    5    4    3     2    1    0  */
 231 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 232                                  /* 2.1 */
 233 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 234                                  /* Dolby Surround */
 235 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 236                                  /* surround40 */
 237 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 238                                  /* surround41 */
 239 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 240                                  /* surround50 */
 241 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 242                                  /* surround51 */
 243 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 244                                  /* 6.1 */
 245 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 246                                  /* surround71 */
 247 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 248
 249 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 250 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 251 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 252 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 253 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 254 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 255 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 256 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 257 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 258 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 259 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 260 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 261 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 262 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 263 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 264 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 265 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 266 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 267 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 268 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 269 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 270 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 271 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 272 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 273 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 274 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 275 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 276 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 277 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 278 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 279 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 280 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 281 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 282 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 283 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 284 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 285 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 286 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 287 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 288 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 289 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 290 };
 291
 292
 293 /*
 294  * HDMI routines
 295  */
 296
 297 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
 298 {
 299         int pin_idx;
 300
 301         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 302                 if (spec->pins[pin_idx].pin_nid == pin_nid)
 303                         return pin_idx;
 304
 305         snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
 306         return -EINVAL;
 307 }
 308
 309 static int hinfo_to_pin_index(struct hdmi_spec *spec,
 310                               struct hda_pcm_stream *hinfo)
 311 {
 312         int pin_idx;
 313
 314         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 315                 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
 316                         return pin_idx;
 317
 318         snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
 319         return -EINVAL;
 320 }
 321
 322 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
 323 {
 324         int cvt_idx;
 325
 326         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 327                 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
 328                         return cvt_idx;
 329
 330         snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
 331         return -EINVAL;
 332 }
 333
 334 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 335                         struct snd_ctl_elem_info *uinfo)
 336 {
 337         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 338         struct hdmi_spec *spec;
 339         int pin_idx;
 340
 341         spec = codec->spec;
 342         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 343
 344         pin_idx = kcontrol->private_value;
 345         uinfo->count = spec->pins[pin_idx].sink_eld.eld_size;
 346
 347         return 0;
 348 }
 349
 350 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 351                         struct snd_ctl_elem_value *ucontrol)
 352 {
 353         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 354         struct hdmi_spec *spec;
 355         int pin_idx;
 356
 357         spec = codec->spec;
 358         pin_idx = kcontrol->private_value;
 359
 360         memcpy(ucontrol->value.bytes.data,
 361                 spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE);
 362
 363         return 0;
 364 }
 365
 366 static struct snd_kcontrol_new eld_bytes_ctl = {
 367         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 368         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 369         .name = "ELD",
 370         .info = hdmi_eld_ctl_info,
 371         .get = hdmi_eld_ctl_get,
 372 };
 373
 374 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
 375                         int device)
 376 {
 377         struct snd_kcontrol *kctl;
 378         struct hdmi_spec *spec = codec->spec;
 379         int err;
 380
 381         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 382         if (!kctl)
 383                 return -ENOMEM;
 384         kctl->private_value = pin_idx;
 385         kctl->id.device = device;
 386
 387         err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
 388         if (err < 0)
 389                 return err;
 390
 391         return 0;
 392 }
 393
 394 #ifdef BE_PARANOID
 395 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 396                                 int *packet_index, int *byte_index)
 397 {
 398         int val;
 399
 400         val = snd_hda_codec_read(codec, pin_nid, 0,
 401                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 402
 403         *packet_index = val >> 5;
 404         *byte_index = val & 0x1f;
 405 }
 406 #endif
 407
 408 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 409                                 int packet_index, int byte_index)
 410 {
 411         int val;
 412
 413         val = (packet_index << 5) | (byte_index & 0x1f);
 414
 415         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 416 }
 417
 418 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 419                                 unsigned char val)
 420 {
 421         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 422 }
 423
 424 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 425 {
 426         /* Unmute */
 427         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 428                 snd_hda_codec_write(codec, pin_nid, 0,
 429                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 430         /* Disable pin out until stream is active*/
 431         snd_hda_codec_write(codec, pin_nid, 0,
 432                             AC_VERB_SET_PIN_WIDGET_CONTROL, 0);
 433 }
 434
 435 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
 436 {
 437         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
 438                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 439 }
 440
 441 static void hdmi_set_channel_count(struct hda_codec *codec,
 442                                    hda_nid_t cvt_nid, int chs)
 443 {
 444         if (chs != hdmi_get_channel_count(codec, cvt_nid))
 445                 snd_hda_codec_write(codec, cvt_nid, 0,
 446                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 447 }
 448
 449
 450 /*
 451  * Channel mapping routines
 452  */
 453
 454 /*
 455  * Compute derived values in channel_allocations[].
 456  */
 457 static void init_channel_allocations(void)
 458 {
 459         int i, j;
 460         struct cea_channel_speaker_allocation *p;
 461
 462         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 463                 p = channel_allocations + i;
 464                 p->channels = 0;
 465                 p->spk_mask = 0;
 466                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 467                         if (p->speakers[j]) {
 468                                 p->channels++;
 469                                 p->spk_mask |= p->speakers[j];
 470                         }
 471         }
 472 }
 473
 474 static int get_channel_allocation_order(int ca)
 475 {
 476         int i;
 477
 478         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 479                 if (channel_allocations[i].ca_index == ca)
 480                         break;
 481         }
 482         return i;
 483 }
 484
 485 /*
 486  * The transformation takes two steps:
 487  *
 488  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 489  *            spk_mask => (channel_allocations[])         => ai->CA
 490  *
 491  * TODO: it could select the wrong CA from multiple candidates.
 492 */
 493 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
 494 {
 495         int i;
 496         int ca = 0;
 497         int spk_mask = 0;
 498         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 499
 500         /*
 501          * CA defaults to 0 for basic stereo audio
 502          */
 503         if (channels <= 2)
 504                 return 0;
 505
 506         /*
 507          * expand ELD's speaker allocation mask
 508          *
 509          * ELD tells the speaker mask in a compact(paired) form,
 510          * expand ELD's notions to match the ones used by Audio InfoFrame.
 511          */
 512         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 513                 if (eld->spk_alloc & (1 << i))
 514                         spk_mask |= eld_speaker_allocation_bits[i];
 515         }
 516
 517         /* search for the first working match in the CA table */
 518         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 519                 if (channels == channel_allocations[i].channels &&
 520                     (spk_mask & channel_allocations[i].spk_mask) ==
 521                                 channel_allocations[i].spk_mask) {
 522                         ca = channel_allocations[i].ca_index;
 523                         break;
 524                 }
 525         }
 526
 527         snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
 528         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 529                     ca, channels, buf);
 530
 531         return ca;
 532 }
 533
 534 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 535                                        hda_nid_t pin_nid)
 536 {
 537 #ifdef CONFIG_SND_DEBUG_VERBOSE
 538         int i;
 539         int slot;
 540
 541         for (i = 0; i < 8; i++) {
 542                 slot = snd_hda_codec_read(codec, pin_nid, 0,
 543                                                 AC_VERB_GET_HDMI_CHAN_SLOT, i);
 544                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
 545                                                 slot >> 4, slot & 0xf);
 546         }
 547 #endif
 548 }
 549
 550
 551 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 552                                        hda_nid_t pin_nid,
 553                                        bool non_pcm,
 554                                        int ca)
 555 {
 556         int i;
 557         int err;
 558         int order;
 559         int non_pcm_mapping[8];
 560
 561         order = get_channel_allocation_order(ca);
 562
 563         if (hdmi_channel_mapping[ca][1] == 0) {
 564                 for (i = 0; i < channel_allocations[order].channels; i++)
 565                         hdmi_channel_mapping[ca][i] = i | (i << 4);
 566                 for (; i < 8; i++)
 567                         hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
 568         }
 569
 570         if (non_pcm) {
 571                 for (i = 0; i < channel_allocations[order].channels; i++)
 572                         non_pcm_mapping[i] = i | (i << 4);
 573                 for (; i < 8; i++)
 574                         non_pcm_mapping[i] = 0xf | (i << 4);
 575         }
 576
 577         for (i = 0; i < 8; i++) {
 578                 err = snd_hda_codec_write(codec, pin_nid, 0,
 579                                           AC_VERB_SET_HDMI_CHAN_SLOT,
 580                                           non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
 581                 if (err) {
 582                         snd_printdd(KERN_NOTICE
 583                                     "HDMI: channel mapping failed\n");
 584                         break;
 585                 }
 586         }
 587
 588         hdmi_debug_channel_mapping(codec, pin_nid);
 589 }
 590
 591
 592 /*
 593  * Audio InfoFrame routines
 594  */
 595
 596 /*
 597  * Enable Audio InfoFrame Transmission
 598  */
 599 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 600                                        hda_nid_t pin_nid)
 601 {
 602         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 603         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 604                                                 AC_DIPXMIT_BEST);
 605 }
 606
 607 /*
 608  * Disable Audio InfoFrame Transmission
 609  */
 610 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 611                                       hda_nid_t pin_nid)
 612 {
 613         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 614         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 615                                                 AC_DIPXMIT_DISABLE);
 616 }
 617
 618 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 619 {
 620 #ifdef CONFIG_SND_DEBUG_VERBOSE
 621         int i;
 622         int size;
 623
 624         size = snd_hdmi_get_eld_size(codec, pin_nid);
 625         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
 626
 627         for (i = 0; i < 8; i++) {
 628                 size = snd_hda_codec_read(codec, pin_nid, 0,
 629                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 630                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 631         }
 632 #endif
 633 }
 634
 635 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 636 {
 637 #ifdef BE_PARANOID
 638         int i, j;
 639         int size;
 640         int pi, bi;
 641         for (i = 0; i < 8; i++) {
 642                 size = snd_hda_codec_read(codec, pin_nid, 0,
 643                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 644                 if (size == 0)
 645                         continue;
 646
 647                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 648                 for (j = 1; j < 1000; j++) {
 649                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 650                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 651                         if (pi != i)
 652                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
 653                                                 bi, pi, i);
 654                         if (bi == 0) /* byte index wrapped around */
 655                                 break;
 656                 }
 657                 snd_printd(KERN_INFO
 658                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 659                         i, size, j);
 660         }
 661 #endif
 662 }
 663
 664 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 665 {
 666         u8 *bytes = (u8 *)hdmi_ai;
 667         u8 sum = 0;
 668         int i;
 669
 670         hdmi_ai->checksum = 0;
 671
 672         for (i = 0; i < sizeof(*hdmi_ai); i++)
 673                 sum += bytes[i];
 674
 675         hdmi_ai->checksum = -sum;
 676 }
 677
 678 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 679                                       hda_nid_t pin_nid,
 680                                       u8 *dip, int size)
 681 {
 682         int i;
 683
 684         hdmi_debug_dip_size(codec, pin_nid);
 685         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 686
 687         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 688         for (i = 0; i < size; i++)
 689                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 690 }
 691
 692 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 693                                     u8 *dip, int size)
 694 {
 695         u8 val;
 696         int i;
 697
 698         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 699                                                             != AC_DIPXMIT_BEST)
 700                 return false;
 701
 702         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 703         for (i = 0; i < size; i++) {
 704                 val = snd_hda_codec_read(codec, pin_nid, 0,
 705                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 706                 if (val != dip[i])
 707                         return false;
 708         }
 709
 710         return true;
 711 }
 712
 713 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
 714                                        bool non_pcm,
 715                                        struct snd_pcm_substream *substream)
 716 {
 717         struct hdmi_spec *spec = codec->spec;
 718         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
 719         hda_nid_t pin_nid = per_pin->pin_nid;
 720         int channels = substream->runtime->channels;
 721         struct hdmi_eld *eld;
 722         int ca;
 723         union audio_infoframe ai;
 724
 725         eld = &spec->pins[pin_idx].sink_eld;
 726         if (!eld->monitor_present)
 727                 return;
 728
 729         ca = hdmi_channel_allocation(eld, channels);
 730
 731         memset(&ai, 0, sizeof(ai));
 732         if (eld->conn_type == 0) { /* HDMI */
 733                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 734
 735                 hdmi_ai->type           = 0x84;
 736                 hdmi_ai->ver            = 0x01;
 737                 hdmi_ai->len            = 0x0a;
 738                 hdmi_ai->CC02_CT47      = channels - 1;
 739                 hdmi_ai->CA             = ca;
 740                 hdmi_checksum_audio_infoframe(hdmi_ai);
 741         } else if (eld->conn_type == 1) { /* DisplayPort */
 742                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 743
 744                 dp_ai->type             = 0x84;
 745                 dp_ai->len              = 0x1b;
 746                 dp_ai->ver              = 0x11 << 2;
 747                 dp_ai->CC02_CT47        = channels - 1;
 748                 dp_ai->CA               = ca;
 749         } else {
 750                 snd_printd("HDMI: unknown connection type at pin %d\n",
 751                             pin_nid);
 752                 return;
 753         }
 754
 755         /*
 756          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 757          * sizeof(*dp_ai) to avoid partial match/update problems when
 758          * the user switches between HDMI/DP monitors.
 759          */
 760         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 761                                         sizeof(ai))) {
 762                 snd_printdd("hdmi_setup_audio_infoframe: "
 763                             "pin=%d channels=%d\n",
 764                             pin_nid,
 765                             channels);
 766                 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
 767                 hdmi_stop_infoframe_trans(codec, pin_nid);
 768                 hdmi_fill_audio_infoframe(codec, pin_nid,
 769                                             ai.bytes, sizeof(ai));
 770                 hdmi_start_infoframe_trans(codec, pin_nid);
 771         } else {
 772                 /* For non-pcm audio switch, setup new channel mapping
 773                  * accordingly */
 774                 if (per_pin->non_pcm != non_pcm)
 775                         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
 776         }
 777
 778         per_pin->non_pcm = non_pcm;
 779 }
 780
 781
 782 /*
 783  * Unsolicited events
 784  */
 785
 786 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 787
 788 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 789 {
 790         struct hdmi_spec *spec = codec->spec;
 791         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 792         int pin_nid;
 793         int pin_idx;
 794         struct hda_jack_tbl *jack;
 795
 796         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
 797         if (!jack)
 798                 return;
 799         pin_nid = jack->nid;
 800         jack->jack_dirty = 1;
 801
 802         _snd_printd(SND_PR_VERBOSE,
 803                 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
 804                 codec->addr, pin_nid,
 805                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 806
 807         pin_idx = pin_nid_to_pin_index(spec, pin_nid);
 808         if (pin_idx < 0)
 809                 return;
 810
 811         hdmi_present_sense(&spec->pins[pin_idx], 1);
 812         snd_hda_jack_report_sync(codec);
 813 }
 814
 815 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 816 {
 817         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 818         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 819         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 820         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 821
 822         printk(KERN_INFO
 823                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 824                 codec->addr,
 825                 tag,
 826                 subtag,
 827                 cp_state,
 828                 cp_ready);
 829
 830         /* TODO */
 831         if (cp_state)
 832                 ;
 833         if (cp_ready)
 834                 ;
 835 }
 836
 837
 838 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 839 {
 840         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 841         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 842
 843         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
 844                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
 845                 return;
 846         }
 847
 848         if (subtag == 0)
 849                 hdmi_intrinsic_event(codec, res);
 850         else
 851                 hdmi_non_intrinsic_event(codec, res);
 852 }
 853
 854 /*
 855  * Callbacks
 856  */
 857
 858 /* HBR should be Non-PCM, 8 channels */
 859 #define is_hbr_format(format) \
 860         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 861
 862 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 863                               hda_nid_t pin_nid, u32 stream_tag, int format)
 864 {
 865         int pinctl;
 866         int new_pinctl = 0;
 867
 868         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 869                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 870                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 871
 872                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 873                 if (is_hbr_format(format))
 874                         new_pinctl |= AC_PINCTL_EPT_HBR;
 875                 else
 876                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 877
 878                 snd_printdd("hdmi_setup_stream: "
 879                             "NID=0x%x, %spinctl=0x%x\n",
 880                             pin_nid,
 881                             pinctl == new_pinctl ? "" : "new-",
 882                             new_pinctl);
 883
 884                 if (pinctl != new_pinctl)
 885                         snd_hda_codec_write(codec, pin_nid, 0,
 886                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 887                                             new_pinctl);
 888
 889         }
 890         if (is_hbr_format(format) && !new_pinctl) {
 891                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
 892                 return -EINVAL;
 893         }
 894
 895         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 896         return 0;
 897 }
 898
 899 /*
 900  * HDA PCM callbacks
 901  */
 902 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
 903                          struct hda_codec *codec,
 904                          struct snd_pcm_substream *substream)
 905 {
 906         struct hdmi_spec *spec = codec->spec;
 907         struct snd_pcm_runtime *runtime = substream->runtime;
 908         int pin_idx, cvt_idx, mux_idx = 0;
 909         struct hdmi_spec_per_pin *per_pin;
 910         struct hdmi_eld *eld;
 911         struct hdmi_spec_per_cvt *per_cvt = NULL;
 912
 913         /* Validate hinfo */
 914         pin_idx = hinfo_to_pin_index(spec, hinfo);
 915         if (snd_BUG_ON(pin_idx < 0))
 916                 return -EINVAL;
 917         per_pin = &spec->pins[pin_idx];
 918         eld = &per_pin->sink_eld;
 919
 920         /* Dynamically assign converter to stream */
 921         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 922                 per_cvt = &spec->cvts[cvt_idx];
 923
 924                 /* Must not already be assigned */
 925                 if (per_cvt->assigned)
 926                         continue;
 927                 /* Must be in pin's mux's list of converters */
 928                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
 929                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
 930                                 break;
 931                 /* Not in mux list */
 932                 if (mux_idx == per_pin->num_mux_nids)
 933                         continue;
 934                 break;
 935         }
 936         /* No free converters */
 937         if (cvt_idx == spec->num_cvts)
 938                 return -ENODEV;
 939
 940         /* Claim converter */
 941         per_cvt->assigned = 1;
 942         hinfo->nid = per_cvt->cvt_nid;
 943
 944         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
 945                             AC_VERB_SET_CONNECT_SEL,
 946                             mux_idx);
 947         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
 948
 949         /* Initially set the converter's capabilities */
 950         hinfo->channels_min = per_cvt->channels_min;
 951         hinfo->channels_max = per_cvt->channels_max;
 952         hinfo->rates = per_cvt->rates;
 953         hinfo->formats = per_cvt->formats;
 954         hinfo->maxbps = per_cvt->maxbps;
 955
 956         /* Restrict capabilities by ELD if this isn't disabled */
 957         if (!static_hdmi_pcm && eld->eld_valid) {
 958                 snd_hdmi_eld_update_pcm_info(eld, hinfo);
 959                 if (hinfo->channels_min > hinfo->channels_max ||
 960                     !hinfo->rates || !hinfo->formats)
 961                         return -ENODEV;
 962         }
 963
 964         /* Store the updated parameters */
 965         runtime->hw.channels_min = hinfo->channels_min;
 966         runtime->hw.channels_max = hinfo->channels_max;
 967         runtime->hw.formats = hinfo->formats;
 968         runtime->hw.rates = hinfo->rates;
 969
 970         snd_pcm_hw_constraint_step(substream->runtime, 0,
 971                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
 972         return 0;
 973 }
 974
 975 /*
 976  * HDA/HDMI auto parsing
 977  */
 978 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
 979 {
 980         struct hdmi_spec *spec = codec->spec;
 981         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
 982         hda_nid_t pin_nid = per_pin->pin_nid;
 983
 984         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
 985                 snd_printk(KERN_WARNING
 986                            "HDMI: pin %d wcaps %#x "
 987                            "does not support connection list\n",
 988                            pin_nid, get_wcaps(codec, pin_nid));
 989                 return -EINVAL;
 990         }
 991
 992         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
 993                                                         per_pin->mux_nids,
 994                                                         HDA_MAX_CONNECTIONS);
 995
 996         return 0;
 997 }
 998
 999 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1000 {
1001         struct hda_codec *codec = per_pin->codec;
1002         struct hdmi_eld *eld = &per_pin->sink_eld;
1003         hda_nid_t pin_nid = per_pin->pin_nid;
1004         /*
1005          * Always execute a GetPinSense verb here, even when called from
1006          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1007          * response's PD bit is not the real PD value, but indicates that
1008          * the real PD value changed. An older version of the HD-audio
1009          * specification worked this way. Hence, we just ignore the data in
1010          * the unsolicited response to avoid custom WARs.
1011          */
1012         int present = snd_hda_pin_sense(codec, pin_nid);
1013         bool eld_valid = false;
1014
1015         memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
1016
1017         eld->monitor_present    = !!(present & AC_PINSENSE_PRESENCE);
1018         if (eld->monitor_present)
1019                 eld_valid       = !!(present & AC_PINSENSE_ELDV);
1020
1021         _snd_printd(SND_PR_VERBOSE,
1022                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1023                 codec->addr, pin_nid, eld->monitor_present, eld_valid);
1024
1025         if (eld_valid) {
1026                 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
1027                         snd_hdmi_show_eld(eld);
1028                 else if (repoll) {
1029                         queue_delayed_work(codec->bus->workq,
1030                                            &per_pin->work,
1031                                            msecs_to_jiffies(300));
1032                 }
1033         }
1034 }
1035
1036 static void hdmi_repoll_eld(struct work_struct *work)
1037 {
1038         struct hdmi_spec_per_pin *per_pin =
1039         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1040
1041         if (per_pin->repoll_count++ > 6)
1042                 per_pin->repoll_count = 0;
1043
1044         hdmi_present_sense(per_pin, per_pin->repoll_count);
1045 }
1046
1047 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1048 {
1049         struct hdmi_spec *spec = codec->spec;
1050         unsigned int caps, config;
1051         int pin_idx;
1052         struct hdmi_spec_per_pin *per_pin;
1053         int err;
1054
1055         caps = snd_hda_param_read(codec, pin_nid, AC_PAR_PIN_CAP);
1056         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1057                 return 0;
1058
1059         config = snd_hda_codec_read(codec, pin_nid, 0,
1060                                 AC_VERB_GET_CONFIG_DEFAULT, 0);
1061         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1062                 return 0;
1063
1064         if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
1065                 return -E2BIG;
1066
1067         pin_idx = spec->num_pins;
1068         per_pin = &spec->pins[pin_idx];
1069
1070         per_pin->pin_nid = pin_nid;
1071         per_pin->non_pcm = false;
1072
1073         err = hdmi_read_pin_conn(codec, pin_idx);
1074         if (err < 0)
1075                 return err;
1076
1077         spec->num_pins++;
1078
1079         return 0;
1080 }
1081
1082 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1083 {
1084         struct hdmi_spec *spec = codec->spec;
1085         int cvt_idx;
1086         struct hdmi_spec_per_cvt *per_cvt;
1087         unsigned int chans;
1088         int err;
1089
1090         if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
1091                 return -E2BIG;
1092
1093         chans = get_wcaps(codec, cvt_nid);
1094         chans = get_wcaps_channels(chans);
1095
1096         cvt_idx = spec->num_cvts;
1097         per_cvt = &spec->cvts[cvt_idx];
1098
1099         per_cvt->cvt_nid = cvt_nid;
1100         per_cvt->channels_min = 2;
1101         if (chans <= 16)
1102                 per_cvt->channels_max = chans;
1103
1104         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1105                                           &per_cvt->rates,
1106                                           &per_cvt->formats,
1107                                           &per_cvt->maxbps);
1108         if (err < 0)
1109                 return err;
1110
1111         spec->num_cvts++;
1112
1113         return 0;
1114 }
1115
1116 static int hdmi_parse_codec(struct hda_codec *codec)
1117 {
1118         hda_nid_t nid;
1119         int i, nodes;
1120
1121         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1122         if (!nid || nodes < 0) {
1123                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1124                 return -EINVAL;
1125         }
1126
1127         for (i = 0; i < nodes; i++, nid++) {
1128                 unsigned int caps;
1129                 unsigned int type;
1130
1131                 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
1132                 type = get_wcaps_type(caps);
1133
1134                 if (!(caps & AC_WCAP_DIGITAL))
1135                         continue;
1136
1137                 switch (type) {
1138                 case AC_WID_AUD_OUT:
1139                         hdmi_add_cvt(codec, nid);
1140                         break;
1141                 case AC_WID_PIN:
1142                         hdmi_add_pin(codec, nid);
1143                         break;
1144                 }
1145         }
1146
1147         /*
1148          * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1149          * can be lost and presence sense verb will become inaccurate if the
1150          * HDA link is powered off at hot plug or hw initialization time.
1151          */
1152 #ifdef CONFIG_PM
1153         if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1154               AC_PWRST_EPSS))
1155                 codec->bus->power_keep_link_on = 1;
1156 #endif
1157
1158         return 0;
1159 }
1160
1161 /*
1162  */
1163 static char *get_hdmi_pcm_name(int idx)
1164 {
1165         static char names[MAX_HDMI_PINS][8];
1166         sprintf(&names[idx][0], "HDMI %d", idx);
1167         return &names[idx][0];
1168 }
1169
1170 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1171 {
1172         struct hda_spdif_out *spdif;
1173         bool non_pcm;
1174
1175         mutex_lock(&codec->spdif_mutex);
1176         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1177         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1178         mutex_unlock(&codec->spdif_mutex);
1179         return non_pcm;
1180 }
1181
1182
1183 /*
1184  * HDMI callbacks
1185  */
1186
1187 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1188                                            struct hda_codec *codec,
1189                                            unsigned int stream_tag,
1190                                            unsigned int format,
1191                                            struct snd_pcm_substream *substream)
1192 {
1193         hda_nid_t cvt_nid = hinfo->nid;
1194         struct hdmi_spec *spec = codec->spec;
1195         int pin_idx = hinfo_to_pin_index(spec, hinfo);
1196         hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
1197         int pinctl;
1198         bool non_pcm;
1199
1200         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1201
1202         hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1203
1204         hdmi_setup_audio_infoframe(codec, pin_idx, non_pcm, substream);
1205
1206         pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1207                                     AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1208         snd_hda_codec_write(codec, pin_nid, 0,
1209                             AC_VERB_SET_PIN_WIDGET_CONTROL, pinctl | PIN_OUT);
1210
1211         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1212 }
1213
1214 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1215                                              struct hda_codec *codec,
1216                                              struct snd_pcm_substream *substream)
1217 {
1218         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1219         return 0;
1220 }
1221
1222 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1223                           struct hda_codec *codec,
1224                           struct snd_pcm_substream *substream)
1225 {
1226         struct hdmi_spec *spec = codec->spec;
1227         int cvt_idx, pin_idx;
1228         struct hdmi_spec_per_cvt *per_cvt;
1229         struct hdmi_spec_per_pin *per_pin;
1230         int pinctl;
1231
1232         if (hinfo->nid) {
1233                 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1234                 if (snd_BUG_ON(cvt_idx < 0))
1235                         return -EINVAL;
1236                 per_cvt = &spec->cvts[cvt_idx];
1237
1238                 snd_BUG_ON(!per_cvt->assigned);
1239                 per_cvt->assigned = 0;
1240                 hinfo->nid = 0;
1241
1242                 pin_idx = hinfo_to_pin_index(spec, hinfo);
1243                 if (snd_BUG_ON(pin_idx < 0))
1244                         return -EINVAL;
1245                 per_pin = &spec->pins[pin_idx];
1246
1247                 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1248                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1249                 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1250                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1251                                     pinctl & ~PIN_OUT);
1252                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1253         }
1254         return 0;
1255 }
1256
1257 static const struct hda_pcm_ops generic_ops = {
1258         .open = hdmi_pcm_open,
1259         .close = hdmi_pcm_close,
1260         .prepare = generic_hdmi_playback_pcm_prepare,
1261         .cleanup = generic_hdmi_playback_pcm_cleanup,
1262 };
1263
1264 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1265 {
1266         struct hdmi_spec *spec = codec->spec;
1267         int pin_idx;
1268
1269         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1270                 struct hda_pcm *info;
1271                 struct hda_pcm_stream *pstr;
1272
1273                 info = &spec->pcm_rec[pin_idx];
1274                 info->name = get_hdmi_pcm_name(pin_idx);
1275                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1276
1277                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1278                 pstr->substreams = 1;
1279                 pstr->ops = generic_ops;
1280                 /* other pstr fields are set in open */
1281         }
1282
1283         codec->num_pcms = spec->num_pins;
1284         codec->pcm_info = spec->pcm_rec;
1285
1286         return 0;
1287 }
1288
1289 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1290 {
1291         char hdmi_str[32] = "HDMI/DP";
1292         struct hdmi_spec *spec = codec->spec;
1293         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1294         int pcmdev = spec->pcm_rec[pin_idx].device;
1295
1296         if (pcmdev > 0)
1297                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1298
1299         return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1300 }
1301
1302 static int generic_hdmi_build_controls(struct hda_codec *codec)
1303 {
1304         struct hdmi_spec *spec = codec->spec;
1305         int err;
1306         int pin_idx;
1307
1308         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1309                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1310
1311                 err = generic_hdmi_build_jack(codec, pin_idx);
1312                 if (err < 0)
1313                         return err;
1314
1315                 err = snd_hda_create_spdif_out_ctls(codec,
1316                                                     per_pin->pin_nid,
1317                                                     per_pin->mux_nids[0]);
1318                 if (err < 0)
1319                         return err;
1320                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1321
1322                 /* add control for ELD Bytes */
1323                 err = hdmi_create_eld_ctl(codec,
1324                                         pin_idx,
1325                                         spec->pcm_rec[pin_idx].device);
1326
1327                 if (err < 0)
1328                         return err;
1329
1330                 hdmi_present_sense(per_pin, 0);
1331         }
1332
1333         return 0;
1334 }
1335
1336 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
1337 {
1338         struct hdmi_spec *spec = codec->spec;
1339         int pin_idx;
1340
1341         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1342                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1343                 struct hdmi_eld *eld = &per_pin->sink_eld;
1344
1345                 per_pin->codec = codec;
1346                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1347                 snd_hda_eld_proc_new(codec, eld, pin_idx);
1348         }
1349         return 0;
1350 }
1351
1352 static int generic_hdmi_init(struct hda_codec *codec)
1353 {
1354         struct hdmi_spec *spec = codec->spec;
1355         int pin_idx;
1356
1357         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1358                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1359                 hda_nid_t pin_nid = per_pin->pin_nid;
1360
1361                 hdmi_init_pin(codec, pin_nid);
1362                 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1363         }
1364         return 0;
1365 }
1366
1367 static void generic_hdmi_free(struct hda_codec *codec)
1368 {
1369         struct hdmi_spec *spec = codec->spec;
1370         int pin_idx;
1371
1372         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1373                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1374                 struct hdmi_eld *eld = &per_pin->sink_eld;
1375
1376                 cancel_delayed_work(&per_pin->work);
1377                 snd_hda_eld_proc_free(codec, eld);
1378         }
1379
1380         flush_workqueue(codec->bus->workq);
1381         kfree(spec);
1382 }
1383
1384 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1385         .init                   = generic_hdmi_init,
1386         .free                   = generic_hdmi_free,
1387         .build_pcms             = generic_hdmi_build_pcms,
1388         .build_controls         = generic_hdmi_build_controls,
1389         .unsol_event            = hdmi_unsol_event,
1390 };
1391
1392 static int patch_generic_hdmi(struct hda_codec *codec)
1393 {
1394         struct hdmi_spec *spec;
1395
1396         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1397         if (spec == NULL)
1398                 return -ENOMEM;
1399
1400         codec->spec = spec;
1401         if (hdmi_parse_codec(codec) < 0) {
1402                 codec->spec = NULL;
1403                 kfree(spec);
1404                 return -EINVAL;
1405         }
1406         codec->patch_ops = generic_hdmi_patch_ops;
1407         generic_hdmi_init_per_pins(codec);
1408
1409         init_channel_allocations();
1410
1411         return 0;
1412 }
1413
1414 /*
1415  * Shared non-generic implementations
1416  */
1417
1418 static int simple_playback_build_pcms(struct hda_codec *codec)
1419 {
1420         struct hdmi_spec *spec = codec->spec;
1421         struct hda_pcm *info = spec->pcm_rec;
1422         unsigned int chans;
1423         struct hda_pcm_stream *pstr;
1424
1425         codec->num_pcms = 1;
1426         codec->pcm_info = info;
1427
1428         chans = get_wcaps(codec, spec->cvts[0].cvt_nid);
1429         chans = get_wcaps_channels(chans);
1430
1431         info->name = get_hdmi_pcm_name(0);
1432         info->pcm_type = HDA_PCM_TYPE_HDMI;
1433         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1434         *pstr = spec->pcm_playback;
1435         pstr->nid = spec->cvts[0].cvt_nid;
1436         if (pstr->channels_max <= 2 && chans && chans <= 16)
1437                 pstr->channels_max = chans;
1438
1439         return 0;
1440 }
1441
1442 /* unsolicited event for jack sensing */
1443 static void simple_hdmi_unsol_event(struct hda_codec *codec,
1444                                     unsigned int res)
1445 {
1446         snd_hda_jack_set_dirty_all(codec);
1447         snd_hda_jack_report_sync(codec);
1448 }
1449
1450 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
1451  * as long as spec->pins[] is set correctly
1452  */
1453 #define simple_hdmi_build_jack  generic_hdmi_build_jack
1454
1455 static int simple_playback_build_controls(struct hda_codec *codec)
1456 {
1457         struct hdmi_spec *spec = codec->spec;
1458         int err;
1459
1460         err = snd_hda_create_spdif_out_ctls(codec,
1461                                             spec->cvts[0].cvt_nid,
1462                                             spec->cvts[0].cvt_nid);
1463         if (err < 0)
1464                 return err;
1465         return simple_hdmi_build_jack(codec, 0);
1466 }
1467
1468 static int simple_playback_init(struct hda_codec *codec)
1469 {
1470         struct hdmi_spec *spec = codec->spec;
1471         hda_nid_t pin = spec->pins[0].pin_nid;
1472
1473         snd_hda_codec_write(codec, pin, 0,
1474                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
1475         /* some codecs require to unmute the pin */
1476         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
1477                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
1478                                     AMP_OUT_UNMUTE);
1479         snd_hda_jack_detect_enable(codec, pin, pin);
1480         return 0;
1481 }
1482
1483 static void simple_playback_free(struct hda_codec *codec)
1484 {
1485         struct hdmi_spec *spec = codec->spec;
1486
1487         kfree(spec);
1488 }
1489
1490 /*
1491  * Nvidia specific implementations
1492  */
1493
1494 #define Nv_VERB_SET_Channel_Allocation          0xF79
1495 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
1496 #define Nv_VERB_SET_Audio_Protection_On         0xF98
1497 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
1498
1499 #define nvhdmi_master_con_nid_7x        0x04
1500 #define nvhdmi_master_pin_nid_7x        0x05
1501
1502 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
1503         /*front, rear, clfe, rear_surr */
1504         0x6, 0x8, 0xa, 0xc,
1505 };
1506
1507 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
1508         /* set audio protect on */
1509         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1510         /* enable digital output on pin widget */
1511         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1512         {} /* terminator */
1513 };
1514
1515 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
1516         /* set audio protect on */
1517         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1518         /* enable digital output on pin widget */
1519         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1520         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1521         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1522         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1523         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1524         {} /* terminator */
1525 };
1526
1527 #ifdef LIMITED_RATE_FMT_SUPPORT
1528 /* support only the safe format and rate */
1529 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
1530 #define SUPPORTED_MAXBPS        16
1531 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
1532 #else
1533 /* support all rates and formats */
1534 #define SUPPORTED_RATES \
1535         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1536         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1537          SNDRV_PCM_RATE_192000)
1538 #define SUPPORTED_MAXBPS        24
1539 #define SUPPORTED_FORMATS \
1540         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1541 #endif
1542
1543 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
1544 {
1545         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
1546         return 0;
1547 }
1548
1549 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
1550 {
1551         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
1552         return 0;
1553 }
1554
1555 static unsigned int channels_2_6_8[] = {
1556         2, 6, 8
1557 };
1558
1559 static unsigned int channels_2_8[] = {
1560         2, 8
1561 };
1562
1563 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1564         .count = ARRAY_SIZE(channels_2_6_8),
1565         .list = channels_2_6_8,
1566         .mask = 0,
1567 };
1568
1569 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1570         .count = ARRAY_SIZE(channels_2_8),
1571         .list = channels_2_8,
1572         .mask = 0,
1573 };
1574
1575 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1576                                     struct hda_codec *codec,
1577                                     struct snd_pcm_substream *substream)
1578 {
1579         struct hdmi_spec *spec = codec->spec;
1580         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1581
1582         switch (codec->preset->id) {
1583         case 0x10de0002:
1584         case 0x10de0003:
1585         case 0x10de0005:
1586         case 0x10de0006:
1587                 hw_constraints_channels = &hw_constraints_2_8_channels;
1588                 break;
1589         case 0x10de0007:
1590                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1591                 break;
1592         default:
1593                 break;
1594         }
1595
1596         if (hw_constraints_channels != NULL) {
1597                 snd_pcm_hw_constraint_list(substream->runtime, 0,
1598                                 SNDRV_PCM_HW_PARAM_CHANNELS,
1599                                 hw_constraints_channels);
1600         } else {
1601                 snd_pcm_hw_constraint_step(substream->runtime, 0,
1602                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1603         }
1604
1605         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1606 }
1607
1608 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1609                                      struct hda_codec *codec,
1610                                      struct snd_pcm_substream *substream)
1611 {
1612         struct hdmi_spec *spec = codec->spec;
1613         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1614 }
1615
1616 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1617                                        struct hda_codec *codec,
1618                                        unsigned int stream_tag,
1619                                        unsigned int format,
1620                                        struct snd_pcm_substream *substream)
1621 {
1622         struct hdmi_spec *spec = codec->spec;
1623         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1624                                              stream_tag, format, substream);
1625 }
1626
1627 static const struct hda_pcm_stream simple_pcm_playback = {
1628         .substreams = 1,
1629         .channels_min = 2,
1630         .channels_max = 2,
1631         .ops = {
1632                 .open = simple_playback_pcm_open,
1633                 .close = simple_playback_pcm_close,
1634                 .prepare = simple_playback_pcm_prepare
1635         },
1636 };
1637
1638 static const struct hda_codec_ops simple_hdmi_patch_ops = {
1639         .build_controls = simple_playback_build_controls,
1640         .build_pcms = simple_playback_build_pcms,
1641         .init = simple_playback_init,
1642         .free = simple_playback_free,
1643         .unsol_event = simple_hdmi_unsol_event,
1644 };
1645
1646 static int patch_simple_hdmi(struct hda_codec *codec,
1647                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
1648 {
1649         struct hdmi_spec *spec;
1650
1651         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1652         if (!spec)
1653                 return -ENOMEM;
1654
1655         codec->spec = spec;
1656
1657         spec->multiout.num_dacs = 0;  /* no analog */
1658         spec->multiout.max_channels = 2;
1659         spec->multiout.dig_out_nid = cvt_nid;
1660         spec->num_cvts = 1;
1661         spec->num_pins = 1;
1662         spec->cvts[0].cvt_nid = cvt_nid;
1663         spec->pins[0].pin_nid = pin_nid;
1664         spec->pcm_playback = simple_pcm_playback;
1665
1666         codec->patch_ops = simple_hdmi_patch_ops;
1667
1668         return 0;
1669 }
1670
1671 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
1672                                                     int channels)
1673 {
1674         unsigned int chanmask;
1675         int chan = channels ? (channels - 1) : 1;
1676
1677         switch (channels) {
1678         default:
1679         case 0:
1680         case 2:
1681                 chanmask = 0x00;
1682                 break;
1683         case 4:
1684                 chanmask = 0x08;
1685                 break;
1686         case 6:
1687                 chanmask = 0x0b;
1688                 break;
1689         case 8:
1690                 chanmask = 0x13;
1691                 break;
1692         }
1693
1694         /* Set the audio infoframe channel allocation and checksum fields.  The
1695          * channel count is computed implicitly by the hardware. */
1696         snd_hda_codec_write(codec, 0x1, 0,
1697                         Nv_VERB_SET_Channel_Allocation, chanmask);
1698
1699         snd_hda_codec_write(codec, 0x1, 0,
1700                         Nv_VERB_SET_Info_Frame_Checksum,
1701                         (0x71 - chan - chanmask));
1702 }
1703
1704 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
1705                                    struct hda_codec *codec,
1706                                    struct snd_pcm_substream *substream)
1707 {
1708         struct hdmi_spec *spec = codec->spec;
1709         int i;
1710
1711         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
1712                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
1713         for (i = 0; i < 4; i++) {
1714                 /* set the stream id */
1715                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1716                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
1717                 /* set the stream format */
1718                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1719                                 AC_VERB_SET_STREAM_FORMAT, 0);
1720         }
1721
1722         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
1723          * streams are disabled. */
1724         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1725
1726         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1727 }
1728
1729 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
1730                                      struct hda_codec *codec,
1731                                      unsigned int stream_tag,
1732                                      unsigned int format,
1733                                      struct snd_pcm_substream *substream)
1734 {
1735         int chs;
1736         unsigned int dataDCC2, channel_id;
1737         int i;
1738         struct hdmi_spec *spec = codec->spec;
1739         struct hda_spdif_out *spdif;
1740
1741         mutex_lock(&codec->spdif_mutex);
1742         spdif = snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
1743
1744         chs = substream->runtime->channels;
1745
1746         dataDCC2 = 0x2;
1747
1748         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
1749         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
1750                 snd_hda_codec_write(codec,
1751                                 nvhdmi_master_con_nid_7x,
1752                                 0,
1753                                 AC_VERB_SET_DIGI_CONVERT_1,
1754                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1755
1756         /* set the stream id */
1757         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1758                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
1759
1760         /* set the stream format */
1761         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1762                         AC_VERB_SET_STREAM_FORMAT, format);
1763
1764         /* turn on again (if needed) */
1765         /* enable and set the channel status audio/data flag */
1766         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
1767                 snd_hda_codec_write(codec,
1768                                 nvhdmi_master_con_nid_7x,
1769                                 0,
1770                                 AC_VERB_SET_DIGI_CONVERT_1,
1771                                 spdif->ctls & 0xff);
1772                 snd_hda_codec_write(codec,
1773                                 nvhdmi_master_con_nid_7x,
1774                                 0,
1775                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1776         }
1777
1778         for (i = 0; i < 4; i++) {
1779                 if (chs == 2)
1780                         channel_id = 0;
1781                 else
1782                         channel_id = i * 2;
1783
1784                 /* turn off SPDIF once;
1785                  *otherwise the IEC958 bits won't be updated
1786                  */
1787                 if (codec->spdif_status_reset &&
1788                 (spdif->ctls & AC_DIG1_ENABLE))
1789                         snd_hda_codec_write(codec,
1790                                 nvhdmi_con_nids_7x[i],
1791                                 0,
1792                                 AC_VERB_SET_DIGI_CONVERT_1,
1793                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1794                 /* set the stream id */
1795                 snd_hda_codec_write(codec,
1796                                 nvhdmi_con_nids_7x[i],
1797                                 0,
1798                                 AC_VERB_SET_CHANNEL_STREAMID,
1799                                 (stream_tag << 4) | channel_id);
1800                 /* set the stream format */
1801                 snd_hda_codec_write(codec,
1802                                 nvhdmi_con_nids_7x[i],
1803                                 0,
1804                                 AC_VERB_SET_STREAM_FORMAT,
1805                                 format);
1806                 /* turn on again (if needed) */
1807                 /* enable and set the channel status audio/data flag */
1808                 if (codec->spdif_status_reset &&
1809                 (spdif->ctls & AC_DIG1_ENABLE)) {
1810                         snd_hda_codec_write(codec,
1811                                         nvhdmi_con_nids_7x[i],
1812                                         0,
1813                                         AC_VERB_SET_DIGI_CONVERT_1,
1814                                         spdif->ctls & 0xff);
1815                         snd_hda_codec_write(codec,
1816                                         nvhdmi_con_nids_7x[i],
1817                                         0,
1818                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1819                 }
1820         }
1821
1822         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
1823
1824         mutex_unlock(&codec->spdif_mutex);
1825         return 0;
1826 }
1827
1828 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
1829         .substreams = 1,
1830         .channels_min = 2,
1831         .channels_max = 8,
1832         .nid = nvhdmi_master_con_nid_7x,
1833         .rates = SUPPORTED_RATES,
1834         .maxbps = SUPPORTED_MAXBPS,
1835         .formats = SUPPORTED_FORMATS,
1836         .ops = {
1837                 .open = simple_playback_pcm_open,
1838                 .close = nvhdmi_8ch_7x_pcm_close,
1839                 .prepare = nvhdmi_8ch_7x_pcm_prepare
1840         },
1841 };
1842
1843 static int patch_nvhdmi_2ch(struct hda_codec *codec)
1844 {
1845         struct hdmi_spec *spec;
1846         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
1847                                     nvhdmi_master_pin_nid_7x);
1848         if (err < 0)
1849                 return err;
1850
1851         codec->patch_ops.init = nvhdmi_7x_init_2ch;
1852         /* override the PCM rates, etc, as the codec doesn't give full list */
1853         spec = codec->spec;
1854         spec->pcm_playback.rates = SUPPORTED_RATES;
1855         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
1856         spec->pcm_playback.formats = SUPPORTED_FORMATS;
1857         return 0;
1858 }
1859
1860 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
1861 {
1862         struct hdmi_spec *spec;
1863         int err = patch_nvhdmi_2ch(codec);
1864         if (err < 0)
1865                 return err;
1866         spec = codec->spec;
1867         spec->multiout.max_channels = 8;
1868         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
1869         codec->patch_ops.init = nvhdmi_7x_init_8ch;
1870
1871         /* Initialize the audio infoframe channel mask and checksum to something
1872          * valid */
1873         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1874
1875         return 0;
1876 }
1877
1878 /*
1879  * ATI-specific implementations
1880  *
1881  * FIXME: we may omit the whole this and use the generic code once after
1882  * it's confirmed to work.
1883  */
1884
1885 #define ATIHDMI_CVT_NID         0x02    /* audio converter */
1886 #define ATIHDMI_PIN_NID         0x03    /* HDMI output pin */
1887
1888 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1889                                         struct hda_codec *codec,
1890                                         unsigned int stream_tag,
1891                                         unsigned int format,
1892                                         struct snd_pcm_substream *substream)
1893 {
1894         struct hdmi_spec *spec = codec->spec;
1895         int chans = substream->runtime->channels;
1896         int i, err;
1897
1898         err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
1899                                           substream);
1900         if (err < 0)
1901                 return err;
1902         snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1903                             AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
1904         /* FIXME: XXX */
1905         for (i = 0; i < chans; i++) {
1906                 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1907                                     AC_VERB_SET_HDMI_CHAN_SLOT,
1908                                     (i << 4) | i);
1909         }
1910         return 0;
1911 }
1912
1913 static int patch_atihdmi(struct hda_codec *codec)
1914 {
1915         struct hdmi_spec *spec;
1916         int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
1917         if (err < 0)
1918                 return err;
1919         spec = codec->spec;
1920         spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
1921         return 0;
1922 }
1923
1924 /* VIA HDMI Implementation */
1925 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
1926 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
1927
1928 static int patch_via_hdmi(struct hda_codec *codec)
1929 {
1930         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
1931 }
1932
1933 /*
1934  * patch entries
1935  */
1936 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
1937 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1938 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1939 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
1940 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_generic_hdmi },
1941 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
1942 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
1943 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
1944 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1945 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1946 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1947 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1948 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
1949 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_generic_hdmi },
1950 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_generic_hdmi },
1951 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_generic_hdmi },
1952 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_generic_hdmi },
1953 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_generic_hdmi },
1954 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_generic_hdmi },
1955 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_generic_hdmi },
1956 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_generic_hdmi },
1957 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_generic_hdmi },
1958 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_generic_hdmi },
1959 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_generic_hdmi },
1960 /* 17 is known to be absent */
1961 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_generic_hdmi },
1962 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_generic_hdmi },
1963 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_generic_hdmi },
1964 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_generic_hdmi },
1965 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_generic_hdmi },
1966 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_generic_hdmi },
1967 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_generic_hdmi },
1968 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_generic_hdmi },
1969 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_generic_hdmi },
1970 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_generic_hdmi },
1971 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP",   .patch = patch_generic_hdmi },
1972 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
1973 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
1974 { .id = 0x11069f80, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
1975 { .id = 0x11069f81, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
1976 { .id = 0x11069f84, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
1977 { .id = 0x11069f85, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
1978 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1979 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
1980 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
1981 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
1982 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1983 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
1984 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
1985 { .id = 0x80862807, .name = "Haswell HDMI",     .patch = patch_generic_hdmi },
1986 { .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
1987 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
1988 {} /* terminator */
1989 };
1990
1991 MODULE_ALIAS("snd-hda-codec-id:1002793c");
1992 MODULE_ALIAS("snd-hda-codec-id:10027919");
1993 MODULE_ALIAS("snd-hda-codec-id:1002791a");
1994 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
1995 MODULE_ALIAS("snd-hda-codec-id:10951390");
1996 MODULE_ALIAS("snd-hda-codec-id:10951392");
1997 MODULE_ALIAS("snd-hda-codec-id:10de0002");
1998 MODULE_ALIAS("snd-hda-codec-id:10de0003");
1999 MODULE_ALIAS("snd-hda-codec-id:10de0005");
2000 MODULE_ALIAS("snd-hda-codec-id:10de0006");
2001 MODULE_ALIAS("snd-hda-codec-id:10de0007");
2002 MODULE_ALIAS("snd-hda-codec-id:10de000a");
2003 MODULE_ALIAS("snd-hda-codec-id:10de000b");
2004 MODULE_ALIAS("snd-hda-codec-id:10de000c");
2005 MODULE_ALIAS("snd-hda-codec-id:10de000d");
2006 MODULE_ALIAS("snd-hda-codec-id:10de0010");
2007 MODULE_ALIAS("snd-hda-codec-id:10de0011");
2008 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2009 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2010 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2011 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2012 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2013 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2014 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2015 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2016 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2017 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2018 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2019 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2020 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2021 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2022 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2023 MODULE_ALIAS("snd-hda-codec-id:10de0051");
2024 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2025 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2026 MODULE_ALIAS("snd-hda-codec-id:11069f80");
2027 MODULE_ALIAS("snd-hda-codec-id:11069f81");
2028 MODULE_ALIAS("snd-hda-codec-id:11069f84");
2029 MODULE_ALIAS("snd-hda-codec-id:11069f85");
2030 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2031 MODULE_ALIAS("snd-hda-codec-id:80860054");
2032 MODULE_ALIAS("snd-hda-codec-id:80862801");
2033 MODULE_ALIAS("snd-hda-codec-id:80862802");
2034 MODULE_ALIAS("snd-hda-codec-id:80862803");
2035 MODULE_ALIAS("snd-hda-codec-id:80862804");
2036 MODULE_ALIAS("snd-hda-codec-id:80862805");
2037 MODULE_ALIAS("snd-hda-codec-id:80862806");
2038 MODULE_ALIAS("snd-hda-codec-id:80862807");
2039 MODULE_ALIAS("snd-hda-codec-id:80862880");
2040 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2041
2042 MODULE_LICENSE("GPL");
2043 MODULE_DESCRIPTION("HDMI HD-audio codec");
2044 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2045 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2046 MODULE_ALIAS("snd-hda-codec-atihdmi");
2047
2048 static struct hda_codec_preset_list intel_list = {
2049         .preset = snd_hda_preset_hdmi,
2050         .owner = THIS_MODULE,
2051 };
2052
2053 static int __init patch_hdmi_init(void)
2054 {
2055         return snd_hda_add_codec_preset(&intel_list);
2056 }
2057
2058 static void __exit patch_hdmi_exit(void)
2059 {
2060         snd_hda_delete_codec_preset(&intel_list);
2061 }
2062
2063 module_init(patch_hdmi_init)
2064 module_exit(patch_hdmi_exit)