3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
11 * Wu Fengguang <wfg@linux.intel.com>
14 * Wu Fengguang <wfg@linux.intel.com>
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the Free
18 * Software Foundation; either version 2 of the License, or (at your option)
21 * This program is distributed in the hope that it will be useful, but
22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software Foundation,
28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include <sound/asoundef.h>
38 #include "hda_codec.h"
39 #include "hda_local.h"
42 static bool static_hdmi_pcm;
43 module_param(static_hdmi_pcm, bool, 0644);
44 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
47 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
48 * could support N independent pipes, each of them can be connected to one or
49 * more ports (DVI, HDMI or DisplayPort).
51 * The HDA correspondence of pipes/ports are converter/pin nodes.
53 #define MAX_HDMI_CVTS 8
54 #define MAX_HDMI_PINS 8
56 struct hdmi_spec_per_cvt {
59 unsigned int channels_min;
60 unsigned int channels_max;
67 struct hdmi_spec_per_pin {
70 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
72 struct hda_codec *codec;
73 struct hdmi_eld sink_eld;
74 struct delayed_work work;
80 struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
83 struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
84 struct hda_pcm pcm_rec[MAX_HDMI_PINS];
87 * Non-generic ATI/NVIDIA specific
89 struct hda_multi_out multiout;
90 struct hda_pcm_stream pcm_playback;
94 struct hdmi_audio_infoframe {
101 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
105 u8 LFEPBL01_LSV36_DM_INH7;
108 struct dp_audio_infoframe {
111 u8 ver; /* 0x11 << 2 */
113 u8 CC02_CT47; /* match with HDMI infoframe from this on */
117 u8 LFEPBL01_LSV36_DM_INH7;
120 union audio_infoframe {
121 struct hdmi_audio_infoframe hdmi;
122 struct dp_audio_infoframe dp;
127 * CEA speaker placement:
130 * FLW FL FLC FC FRC FR FRW
137 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
138 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
140 enum cea_speaker_placement {
141 FL = (1 << 0), /* Front Left */
142 FC = (1 << 1), /* Front Center */
143 FR = (1 << 2), /* Front Right */
144 FLC = (1 << 3), /* Front Left Center */
145 FRC = (1 << 4), /* Front Right Center */
146 RL = (1 << 5), /* Rear Left */
147 RC = (1 << 6), /* Rear Center */
148 RR = (1 << 7), /* Rear Right */
149 RLC = (1 << 8), /* Rear Left Center */
150 RRC = (1 << 9), /* Rear Right Center */
151 LFE = (1 << 10), /* Low Frequency Effect */
152 FLW = (1 << 11), /* Front Left Wide */
153 FRW = (1 << 12), /* Front Right Wide */
154 FLH = (1 << 13), /* Front Left High */
155 FCH = (1 << 14), /* Front Center High */
156 FRH = (1 << 15), /* Front Right High */
157 TC = (1 << 16), /* Top Center */
161 * ELD SA bits in the CEA Speaker Allocation data block
163 static int eld_speaker_allocation_bits[] = {
171 /* the following are not defined in ELD yet */
178 struct cea_channel_speaker_allocation {
182 /* derived values, just for convenience */
190 * surround40 surround41 surround50 surround51 surround71
191 * ch0 front left = = = =
192 * ch1 front right = = = =
193 * ch2 rear left = = = =
194 * ch3 rear right = = = =
195 * ch4 LFE center center center
200 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
202 static int hdmi_channel_mapping[0x32][8] = {
204 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
206 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
208 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
210 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
212 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
214 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
216 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
218 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
220 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
224 * This is an ordered list!
226 * The preceding ones have better chances to be selected by
227 * hdmi_channel_allocation().
229 static struct cea_channel_speaker_allocation channel_allocations[] = {
230 /* channel: 7 6 5 4 3 2 1 0 */
231 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
233 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
235 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
237 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
239 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
241 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
243 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
245 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
247 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
249 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
250 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
251 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
252 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
253 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
254 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
255 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
256 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
257 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
258 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
259 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
260 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
261 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
262 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
263 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
264 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
265 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
266 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
267 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
268 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
269 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
270 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
271 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
272 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
273 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
274 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
275 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
276 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
277 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
278 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
279 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
280 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
281 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
282 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
283 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
284 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
285 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
286 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
287 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
288 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
289 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
297 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
301 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
302 if (spec->pins[pin_idx].pin_nid == pin_nid)
305 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
309 static int hinfo_to_pin_index(struct hdmi_spec *spec,
310 struct hda_pcm_stream *hinfo)
314 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
315 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
318 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
322 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
326 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
327 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
330 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
334 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
335 struct snd_ctl_elem_info *uinfo)
337 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
338 struct hdmi_spec *spec;
342 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
344 pin_idx = kcontrol->private_value;
345 uinfo->count = spec->pins[pin_idx].sink_eld.eld_size;
350 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
351 struct snd_ctl_elem_value *ucontrol)
353 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
354 struct hdmi_spec *spec;
358 pin_idx = kcontrol->private_value;
360 memcpy(ucontrol->value.bytes.data,
361 spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE);
366 static struct snd_kcontrol_new eld_bytes_ctl = {
367 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
368 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
370 .info = hdmi_eld_ctl_info,
371 .get = hdmi_eld_ctl_get,
374 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
377 struct snd_kcontrol *kctl;
378 struct hdmi_spec *spec = codec->spec;
381 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
384 kctl->private_value = pin_idx;
385 kctl->id.device = device;
387 err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
395 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
396 int *packet_index, int *byte_index)
400 val = snd_hda_codec_read(codec, pin_nid, 0,
401 AC_VERB_GET_HDMI_DIP_INDEX, 0);
403 *packet_index = val >> 5;
404 *byte_index = val & 0x1f;
408 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
409 int packet_index, int byte_index)
413 val = (packet_index << 5) | (byte_index & 0x1f);
415 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
418 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
421 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
424 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
427 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
428 snd_hda_codec_write(codec, pin_nid, 0,
429 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
430 /* Disable pin out until stream is active*/
431 snd_hda_codec_write(codec, pin_nid, 0,
432 AC_VERB_SET_PIN_WIDGET_CONTROL, 0);
435 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
437 return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
438 AC_VERB_GET_CVT_CHAN_COUNT, 0);
441 static void hdmi_set_channel_count(struct hda_codec *codec,
442 hda_nid_t cvt_nid, int chs)
444 if (chs != hdmi_get_channel_count(codec, cvt_nid))
445 snd_hda_codec_write(codec, cvt_nid, 0,
446 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
451 * Channel mapping routines
455 * Compute derived values in channel_allocations[].
457 static void init_channel_allocations(void)
460 struct cea_channel_speaker_allocation *p;
462 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
463 p = channel_allocations + i;
466 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
467 if (p->speakers[j]) {
469 p->spk_mask |= p->speakers[j];
474 static int get_channel_allocation_order(int ca)
478 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
479 if (channel_allocations[i].ca_index == ca)
486 * The transformation takes two steps:
488 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
489 * spk_mask => (channel_allocations[]) => ai->CA
491 * TODO: it could select the wrong CA from multiple candidates.
493 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
498 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
501 * CA defaults to 0 for basic stereo audio
507 * expand ELD's speaker allocation mask
509 * ELD tells the speaker mask in a compact(paired) form,
510 * expand ELD's notions to match the ones used by Audio InfoFrame.
512 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
513 if (eld->spk_alloc & (1 << i))
514 spk_mask |= eld_speaker_allocation_bits[i];
517 /* search for the first working match in the CA table */
518 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
519 if (channels == channel_allocations[i].channels &&
520 (spk_mask & channel_allocations[i].spk_mask) ==
521 channel_allocations[i].spk_mask) {
522 ca = channel_allocations[i].ca_index;
527 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
528 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
534 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
537 #ifdef CONFIG_SND_DEBUG_VERBOSE
541 for (i = 0; i < 8; i++) {
542 slot = snd_hda_codec_read(codec, pin_nid, 0,
543 AC_VERB_GET_HDMI_CHAN_SLOT, i);
544 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
545 slot >> 4, slot & 0xf);
551 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
560 int non_pcm_mapping[8];
562 order = get_channel_allocation_order(ca);
564 if (hdmi_channel_mapping[ca][1] == 0) {
565 for (i = 0; i < channel_allocations[order].channels; i++)
566 hdmi_channel_mapping[ca][i] = i | (i << 4);
568 hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
572 for (i = 0; i < channel_allocations[order].channels; i++)
573 non_pcm_mapping[i] = i | (i << 4);
575 non_pcm_mapping[i] = 0xf | (i << 4);
578 for (i = 0; i < 8; i++) {
579 err = snd_hda_codec_write(codec, pin_nid, 0,
580 AC_VERB_SET_HDMI_CHAN_SLOT,
581 non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
583 snd_printdd(KERN_NOTICE
584 "HDMI: channel mapping failed\n");
589 hdmi_debug_channel_mapping(codec, pin_nid);
594 * Audio InfoFrame routines
598 * Enable Audio InfoFrame Transmission
600 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
603 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
604 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
609 * Disable Audio InfoFrame Transmission
611 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
614 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
615 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
619 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
621 #ifdef CONFIG_SND_DEBUG_VERBOSE
625 size = snd_hdmi_get_eld_size(codec, pin_nid);
626 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
628 for (i = 0; i < 8; i++) {
629 size = snd_hda_codec_read(codec, pin_nid, 0,
630 AC_VERB_GET_HDMI_DIP_SIZE, i);
631 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
636 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
642 for (i = 0; i < 8; i++) {
643 size = snd_hda_codec_read(codec, pin_nid, 0,
644 AC_VERB_GET_HDMI_DIP_SIZE, i);
648 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
649 for (j = 1; j < 1000; j++) {
650 hdmi_write_dip_byte(codec, pin_nid, 0x0);
651 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
653 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
655 if (bi == 0) /* byte index wrapped around */
659 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
665 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
667 u8 *bytes = (u8 *)hdmi_ai;
671 hdmi_ai->checksum = 0;
673 for (i = 0; i < sizeof(*hdmi_ai); i++)
676 hdmi_ai->checksum = -sum;
679 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
685 hdmi_debug_dip_size(codec, pin_nid);
686 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
688 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
689 for (i = 0; i < size; i++)
690 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
693 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
699 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
703 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
704 for (i = 0; i < size; i++) {
705 val = snd_hda_codec_read(codec, pin_nid, 0,
706 AC_VERB_GET_HDMI_DIP_DATA, 0);
714 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
715 hda_nid_t cvt_nid, struct snd_pcm_substream *substream)
717 struct hdmi_spec *spec = codec->spec;
718 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
719 struct hdmi_spec_per_cvt *per_cvt;
720 struct hda_spdif_out *spdif;
721 hda_nid_t pin_nid = per_pin->pin_nid;
722 int channels = substream->runtime->channels;
723 struct hdmi_eld *eld;
726 union audio_infoframe ai;
727 bool non_pcm = false;
729 cvt_idx = cvt_nid_to_cvt_index(spec, cvt_nid);
730 per_cvt = &spec->cvts[cvt_idx];
732 mutex_lock(&codec->spdif_mutex);
733 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
734 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
735 mutex_unlock(&codec->spdif_mutex);
737 eld = &spec->pins[pin_idx].sink_eld;
738 if (!eld->monitor_present)
741 ca = hdmi_channel_allocation(eld, channels);
743 memset(&ai, 0, sizeof(ai));
744 if (eld->conn_type == 0) { /* HDMI */
745 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
747 hdmi_ai->type = 0x84;
750 hdmi_ai->CC02_CT47 = channels - 1;
752 hdmi_checksum_audio_infoframe(hdmi_ai);
753 } else if (eld->conn_type == 1) { /* DisplayPort */
754 struct dp_audio_infoframe *dp_ai = &ai.dp;
758 dp_ai->ver = 0x11 << 2;
759 dp_ai->CC02_CT47 = channels - 1;
762 snd_printd("HDMI: unknown connection type at pin %d\n",
768 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
769 * sizeof(*dp_ai) to avoid partial match/update problems when
770 * the user switches between HDMI/DP monitors.
772 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
774 snd_printdd("hdmi_setup_audio_infoframe: "
775 "pin=%d channels=%d\n",
778 hdmi_setup_channel_mapping(codec, pin_nid, cvt_nid, non_pcm, ca);
779 hdmi_stop_infoframe_trans(codec, pin_nid);
780 hdmi_fill_audio_infoframe(codec, pin_nid,
781 ai.bytes, sizeof(ai));
782 hdmi_start_infoframe_trans(codec, pin_nid);
785 per_cvt->non_pcm = non_pcm;
793 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
795 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
797 struct hdmi_spec *spec = codec->spec;
798 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
801 struct hda_jack_tbl *jack;
803 jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
807 jack->jack_dirty = 1;
809 _snd_printd(SND_PR_VERBOSE,
810 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
811 codec->addr, pin_nid,
812 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
814 pin_idx = pin_nid_to_pin_index(spec, pin_nid);
818 hdmi_present_sense(&spec->pins[pin_idx], 1);
819 snd_hda_jack_report_sync(codec);
822 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
824 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
825 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
826 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
827 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
830 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
845 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
847 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
848 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
850 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
851 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
856 hdmi_intrinsic_event(codec, res);
858 hdmi_non_intrinsic_event(codec, res);
865 /* HBR should be Non-PCM, 8 channels */
866 #define is_hbr_format(format) \
867 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
869 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
870 hda_nid_t pin_nid, u32 stream_tag, int format)
875 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
876 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
877 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
879 new_pinctl = pinctl & ~AC_PINCTL_EPT;
880 if (is_hbr_format(format))
881 new_pinctl |= AC_PINCTL_EPT_HBR;
883 new_pinctl |= AC_PINCTL_EPT_NATIVE;
885 snd_printdd("hdmi_setup_stream: "
886 "NID=0x%x, %spinctl=0x%x\n",
888 pinctl == new_pinctl ? "" : "new-",
891 if (pinctl != new_pinctl)
892 snd_hda_codec_write(codec, pin_nid, 0,
893 AC_VERB_SET_PIN_WIDGET_CONTROL,
897 if (is_hbr_format(format) && !new_pinctl) {
898 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
902 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
909 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
910 struct hda_codec *codec,
911 struct snd_pcm_substream *substream)
913 struct hdmi_spec *spec = codec->spec;
914 struct snd_pcm_runtime *runtime = substream->runtime;
915 int pin_idx, cvt_idx, mux_idx = 0;
916 struct hdmi_spec_per_pin *per_pin;
917 struct hdmi_eld *eld;
918 struct hdmi_spec_per_cvt *per_cvt = NULL;
921 pin_idx = hinfo_to_pin_index(spec, hinfo);
922 if (snd_BUG_ON(pin_idx < 0))
924 per_pin = &spec->pins[pin_idx];
925 eld = &per_pin->sink_eld;
927 /* Dynamically assign converter to stream */
928 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
929 per_cvt = &spec->cvts[cvt_idx];
931 /* Must not already be assigned */
932 if (per_cvt->assigned)
934 /* Must be in pin's mux's list of converters */
935 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
936 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
938 /* Not in mux list */
939 if (mux_idx == per_pin->num_mux_nids)
943 /* No free converters */
944 if (cvt_idx == spec->num_cvts)
947 /* Claim converter */
948 per_cvt->assigned = 1;
949 hinfo->nid = per_cvt->cvt_nid;
951 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
952 AC_VERB_SET_CONNECT_SEL,
954 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
956 /* Initially set the converter's capabilities */
957 hinfo->channels_min = per_cvt->channels_min;
958 hinfo->channels_max = per_cvt->channels_max;
959 hinfo->rates = per_cvt->rates;
960 hinfo->formats = per_cvt->formats;
961 hinfo->maxbps = per_cvt->maxbps;
963 /* Restrict capabilities by ELD if this isn't disabled */
964 if (!static_hdmi_pcm && eld->eld_valid) {
965 snd_hdmi_eld_update_pcm_info(eld, hinfo);
966 if (hinfo->channels_min > hinfo->channels_max ||
967 !hinfo->rates || !hinfo->formats)
971 /* Store the updated parameters */
972 runtime->hw.channels_min = hinfo->channels_min;
973 runtime->hw.channels_max = hinfo->channels_max;
974 runtime->hw.formats = hinfo->formats;
975 runtime->hw.rates = hinfo->rates;
977 snd_pcm_hw_constraint_step(substream->runtime, 0,
978 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
983 * HDA/HDMI auto parsing
985 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
987 struct hdmi_spec *spec = codec->spec;
988 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
989 hda_nid_t pin_nid = per_pin->pin_nid;
991 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
992 snd_printk(KERN_WARNING
993 "HDMI: pin %d wcaps %#x "
994 "does not support connection list\n",
995 pin_nid, get_wcaps(codec, pin_nid));
999 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1001 HDA_MAX_CONNECTIONS);
1006 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1008 struct hda_codec *codec = per_pin->codec;
1009 struct hdmi_eld *eld = &per_pin->sink_eld;
1010 hda_nid_t pin_nid = per_pin->pin_nid;
1012 * Always execute a GetPinSense verb here, even when called from
1013 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1014 * response's PD bit is not the real PD value, but indicates that
1015 * the real PD value changed. An older version of the HD-audio
1016 * specification worked this way. Hence, we just ignore the data in
1017 * the unsolicited response to avoid custom WARs.
1019 int present = snd_hda_pin_sense(codec, pin_nid);
1020 bool eld_valid = false;
1022 memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
1024 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1025 if (eld->monitor_present)
1026 eld_valid = !!(present & AC_PINSENSE_ELDV);
1028 _snd_printd(SND_PR_VERBOSE,
1029 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1030 codec->addr, pin_nid, eld->monitor_present, eld_valid);
1033 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
1034 snd_hdmi_show_eld(eld);
1036 queue_delayed_work(codec->bus->workq,
1038 msecs_to_jiffies(300));
1043 static void hdmi_repoll_eld(struct work_struct *work)
1045 struct hdmi_spec_per_pin *per_pin =
1046 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1048 if (per_pin->repoll_count++ > 6)
1049 per_pin->repoll_count = 0;
1051 hdmi_present_sense(per_pin, per_pin->repoll_count);
1054 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1056 struct hdmi_spec *spec = codec->spec;
1057 unsigned int caps, config;
1059 struct hdmi_spec_per_pin *per_pin;
1062 caps = snd_hda_param_read(codec, pin_nid, AC_PAR_PIN_CAP);
1063 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1066 config = snd_hda_codec_read(codec, pin_nid, 0,
1067 AC_VERB_GET_CONFIG_DEFAULT, 0);
1068 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1071 if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
1074 pin_idx = spec->num_pins;
1075 per_pin = &spec->pins[pin_idx];
1077 per_pin->pin_nid = pin_nid;
1079 err = hdmi_read_pin_conn(codec, pin_idx);
1088 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1090 struct hdmi_spec *spec = codec->spec;
1092 struct hdmi_spec_per_cvt *per_cvt;
1096 if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
1099 chans = get_wcaps(codec, cvt_nid);
1100 chans = get_wcaps_channels(chans);
1102 cvt_idx = spec->num_cvts;
1103 per_cvt = &spec->cvts[cvt_idx];
1105 per_cvt->cvt_nid = cvt_nid;
1106 per_cvt->channels_min = 2;
1107 per_cvt->non_pcm = false;
1109 per_cvt->channels_max = chans;
1111 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1123 static int hdmi_parse_codec(struct hda_codec *codec)
1128 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1129 if (!nid || nodes < 0) {
1130 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1134 for (i = 0; i < nodes; i++, nid++) {
1138 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
1139 type = get_wcaps_type(caps);
1141 if (!(caps & AC_WCAP_DIGITAL))
1145 case AC_WID_AUD_OUT:
1146 hdmi_add_cvt(codec, nid);
1149 hdmi_add_pin(codec, nid);
1155 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1156 * can be lost and presence sense verb will become inaccurate if the
1157 * HDA link is powered off at hot plug or hw initialization time.
1160 if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1162 codec->bus->power_keep_link_on = 1;
1170 static char *get_hdmi_pcm_name(int idx)
1172 static char names[MAX_HDMI_PINS][8];
1173 sprintf(&names[idx][0], "HDMI %d", idx);
1174 return &names[idx][0];
1181 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1182 struct hda_codec *codec,
1183 unsigned int stream_tag,
1184 unsigned int format,
1185 struct snd_pcm_substream *substream)
1187 hda_nid_t cvt_nid = hinfo->nid;
1188 struct hdmi_spec *spec = codec->spec;
1189 int pin_idx = hinfo_to_pin_index(spec, hinfo);
1190 hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
1193 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1195 hdmi_setup_audio_infoframe(codec, pin_idx, cvt_nid, substream);
1197 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1198 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1199 snd_hda_codec_write(codec, pin_nid, 0,
1200 AC_VERB_SET_PIN_WIDGET_CONTROL, pinctl | PIN_OUT);
1202 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1205 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1206 struct hda_codec *codec,
1207 struct snd_pcm_substream *substream)
1209 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1213 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1214 struct hda_codec *codec,
1215 struct snd_pcm_substream *substream)
1217 struct hdmi_spec *spec = codec->spec;
1218 int cvt_idx, pin_idx;
1219 struct hdmi_spec_per_cvt *per_cvt;
1220 struct hdmi_spec_per_pin *per_pin;
1224 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1225 if (snd_BUG_ON(cvt_idx < 0))
1227 per_cvt = &spec->cvts[cvt_idx];
1229 snd_BUG_ON(!per_cvt->assigned);
1230 per_cvt->assigned = 0;
1233 pin_idx = hinfo_to_pin_index(spec, hinfo);
1234 if (snd_BUG_ON(pin_idx < 0))
1236 per_pin = &spec->pins[pin_idx];
1238 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1239 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1240 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1241 AC_VERB_SET_PIN_WIDGET_CONTROL,
1243 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1248 static const struct hda_pcm_ops generic_ops = {
1249 .open = hdmi_pcm_open,
1250 .close = hdmi_pcm_close,
1251 .prepare = generic_hdmi_playback_pcm_prepare,
1252 .cleanup = generic_hdmi_playback_pcm_cleanup,
1255 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1257 struct hdmi_spec *spec = codec->spec;
1260 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1261 struct hda_pcm *info;
1262 struct hda_pcm_stream *pstr;
1264 info = &spec->pcm_rec[pin_idx];
1265 info->name = get_hdmi_pcm_name(pin_idx);
1266 info->pcm_type = HDA_PCM_TYPE_HDMI;
1268 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1269 pstr->substreams = 1;
1270 pstr->ops = generic_ops;
1271 /* other pstr fields are set in open */
1274 codec->num_pcms = spec->num_pins;
1275 codec->pcm_info = spec->pcm_rec;
1280 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1282 char hdmi_str[32] = "HDMI/DP";
1283 struct hdmi_spec *spec = codec->spec;
1284 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1285 int pcmdev = spec->pcm_rec[pin_idx].device;
1288 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1290 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1293 static int generic_hdmi_build_controls(struct hda_codec *codec)
1295 struct hdmi_spec *spec = codec->spec;
1299 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1300 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1302 err = generic_hdmi_build_jack(codec, pin_idx);
1306 err = snd_hda_create_spdif_out_ctls(codec,
1308 per_pin->mux_nids[0]);
1311 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1313 /* add control for ELD Bytes */
1314 err = hdmi_create_eld_ctl(codec,
1316 spec->pcm_rec[pin_idx].device);
1321 hdmi_present_sense(per_pin, 0);
1327 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
1329 struct hdmi_spec *spec = codec->spec;
1332 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1333 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1334 struct hdmi_eld *eld = &per_pin->sink_eld;
1336 per_pin->codec = codec;
1337 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1338 snd_hda_eld_proc_new(codec, eld, pin_idx);
1343 static int generic_hdmi_init(struct hda_codec *codec)
1345 struct hdmi_spec *spec = codec->spec;
1348 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1349 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1350 hda_nid_t pin_nid = per_pin->pin_nid;
1352 hdmi_init_pin(codec, pin_nid);
1353 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1358 static void generic_hdmi_free(struct hda_codec *codec)
1360 struct hdmi_spec *spec = codec->spec;
1363 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1364 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1365 struct hdmi_eld *eld = &per_pin->sink_eld;
1367 cancel_delayed_work(&per_pin->work);
1368 snd_hda_eld_proc_free(codec, eld);
1371 flush_workqueue(codec->bus->workq);
1375 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1376 .init = generic_hdmi_init,
1377 .free = generic_hdmi_free,
1378 .build_pcms = generic_hdmi_build_pcms,
1379 .build_controls = generic_hdmi_build_controls,
1380 .unsol_event = hdmi_unsol_event,
1383 static int patch_generic_hdmi(struct hda_codec *codec)
1385 struct hdmi_spec *spec;
1387 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1392 if (hdmi_parse_codec(codec) < 0) {
1397 codec->patch_ops = generic_hdmi_patch_ops;
1398 generic_hdmi_init_per_pins(codec);
1400 init_channel_allocations();
1406 * Shared non-generic implementations
1409 static int simple_playback_build_pcms(struct hda_codec *codec)
1411 struct hdmi_spec *spec = codec->spec;
1412 struct hda_pcm *info = spec->pcm_rec;
1414 struct hda_pcm_stream *pstr;
1416 codec->num_pcms = 1;
1417 codec->pcm_info = info;
1419 chans = get_wcaps(codec, spec->cvts[0].cvt_nid);
1420 chans = get_wcaps_channels(chans);
1422 info->name = get_hdmi_pcm_name(0);
1423 info->pcm_type = HDA_PCM_TYPE_HDMI;
1424 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1425 *pstr = spec->pcm_playback;
1426 pstr->nid = spec->cvts[0].cvt_nid;
1427 if (pstr->channels_max <= 2 && chans && chans <= 16)
1428 pstr->channels_max = chans;
1433 /* unsolicited event for jack sensing */
1434 static void simple_hdmi_unsol_event(struct hda_codec *codec,
1437 snd_hda_jack_set_dirty_all(codec);
1438 snd_hda_jack_report_sync(codec);
1441 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
1442 * as long as spec->pins[] is set correctly
1444 #define simple_hdmi_build_jack generic_hdmi_build_jack
1446 static int simple_playback_build_controls(struct hda_codec *codec)
1448 struct hdmi_spec *spec = codec->spec;
1451 err = snd_hda_create_spdif_out_ctls(codec,
1452 spec->cvts[0].cvt_nid,
1453 spec->cvts[0].cvt_nid);
1456 return simple_hdmi_build_jack(codec, 0);
1459 static int simple_playback_init(struct hda_codec *codec)
1461 struct hdmi_spec *spec = codec->spec;
1462 hda_nid_t pin = spec->pins[0].pin_nid;
1464 snd_hda_codec_write(codec, pin, 0,
1465 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
1466 /* some codecs require to unmute the pin */
1467 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
1468 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
1470 snd_hda_jack_detect_enable(codec, pin, pin);
1474 static void simple_playback_free(struct hda_codec *codec)
1476 struct hdmi_spec *spec = codec->spec;
1482 * Nvidia specific implementations
1485 #define Nv_VERB_SET_Channel_Allocation 0xF79
1486 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
1487 #define Nv_VERB_SET_Audio_Protection_On 0xF98
1488 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
1490 #define nvhdmi_master_con_nid_7x 0x04
1491 #define nvhdmi_master_pin_nid_7x 0x05
1493 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
1494 /*front, rear, clfe, rear_surr */
1498 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
1499 /* set audio protect on */
1500 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1501 /* enable digital output on pin widget */
1502 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1506 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
1507 /* set audio protect on */
1508 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1509 /* enable digital output on pin widget */
1510 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1511 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1512 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1513 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1514 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1518 #ifdef LIMITED_RATE_FMT_SUPPORT
1519 /* support only the safe format and rate */
1520 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
1521 #define SUPPORTED_MAXBPS 16
1522 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
1524 /* support all rates and formats */
1525 #define SUPPORTED_RATES \
1526 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1527 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1528 SNDRV_PCM_RATE_192000)
1529 #define SUPPORTED_MAXBPS 24
1530 #define SUPPORTED_FORMATS \
1531 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1534 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
1536 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
1540 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
1542 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
1546 static unsigned int channels_2_6_8[] = {
1550 static unsigned int channels_2_8[] = {
1554 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1555 .count = ARRAY_SIZE(channels_2_6_8),
1556 .list = channels_2_6_8,
1560 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1561 .count = ARRAY_SIZE(channels_2_8),
1562 .list = channels_2_8,
1566 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1567 struct hda_codec *codec,
1568 struct snd_pcm_substream *substream)
1570 struct hdmi_spec *spec = codec->spec;
1571 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1573 switch (codec->preset->id) {
1578 hw_constraints_channels = &hw_constraints_2_8_channels;
1581 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1587 if (hw_constraints_channels != NULL) {
1588 snd_pcm_hw_constraint_list(substream->runtime, 0,
1589 SNDRV_PCM_HW_PARAM_CHANNELS,
1590 hw_constraints_channels);
1592 snd_pcm_hw_constraint_step(substream->runtime, 0,
1593 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1596 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1599 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1600 struct hda_codec *codec,
1601 struct snd_pcm_substream *substream)
1603 struct hdmi_spec *spec = codec->spec;
1604 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1607 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1608 struct hda_codec *codec,
1609 unsigned int stream_tag,
1610 unsigned int format,
1611 struct snd_pcm_substream *substream)
1613 struct hdmi_spec *spec = codec->spec;
1614 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1615 stream_tag, format, substream);
1618 static const struct hda_pcm_stream simple_pcm_playback = {
1623 .open = simple_playback_pcm_open,
1624 .close = simple_playback_pcm_close,
1625 .prepare = simple_playback_pcm_prepare
1629 static const struct hda_codec_ops simple_hdmi_patch_ops = {
1630 .build_controls = simple_playback_build_controls,
1631 .build_pcms = simple_playback_build_pcms,
1632 .init = simple_playback_init,
1633 .free = simple_playback_free,
1634 .unsol_event = simple_hdmi_unsol_event,
1637 static int patch_simple_hdmi(struct hda_codec *codec,
1638 hda_nid_t cvt_nid, hda_nid_t pin_nid)
1640 struct hdmi_spec *spec;
1642 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1648 spec->multiout.num_dacs = 0; /* no analog */
1649 spec->multiout.max_channels = 2;
1650 spec->multiout.dig_out_nid = cvt_nid;
1653 spec->cvts[0].cvt_nid = cvt_nid;
1654 spec->pins[0].pin_nid = pin_nid;
1655 spec->pcm_playback = simple_pcm_playback;
1657 codec->patch_ops = simple_hdmi_patch_ops;
1662 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
1665 unsigned int chanmask;
1666 int chan = channels ? (channels - 1) : 1;
1685 /* Set the audio infoframe channel allocation and checksum fields. The
1686 * channel count is computed implicitly by the hardware. */
1687 snd_hda_codec_write(codec, 0x1, 0,
1688 Nv_VERB_SET_Channel_Allocation, chanmask);
1690 snd_hda_codec_write(codec, 0x1, 0,
1691 Nv_VERB_SET_Info_Frame_Checksum,
1692 (0x71 - chan - chanmask));
1695 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
1696 struct hda_codec *codec,
1697 struct snd_pcm_substream *substream)
1699 struct hdmi_spec *spec = codec->spec;
1702 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
1703 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
1704 for (i = 0; i < 4; i++) {
1705 /* set the stream id */
1706 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1707 AC_VERB_SET_CHANNEL_STREAMID, 0);
1708 /* set the stream format */
1709 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1710 AC_VERB_SET_STREAM_FORMAT, 0);
1713 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
1714 * streams are disabled. */
1715 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1717 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1720 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
1721 struct hda_codec *codec,
1722 unsigned int stream_tag,
1723 unsigned int format,
1724 struct snd_pcm_substream *substream)
1727 unsigned int dataDCC2, channel_id;
1729 struct hdmi_spec *spec = codec->spec;
1730 struct hda_spdif_out *spdif;
1732 mutex_lock(&codec->spdif_mutex);
1733 spdif = snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
1735 chs = substream->runtime->channels;
1739 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
1740 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
1741 snd_hda_codec_write(codec,
1742 nvhdmi_master_con_nid_7x,
1744 AC_VERB_SET_DIGI_CONVERT_1,
1745 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1747 /* set the stream id */
1748 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1749 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
1751 /* set the stream format */
1752 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1753 AC_VERB_SET_STREAM_FORMAT, format);
1755 /* turn on again (if needed) */
1756 /* enable and set the channel status audio/data flag */
1757 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
1758 snd_hda_codec_write(codec,
1759 nvhdmi_master_con_nid_7x,
1761 AC_VERB_SET_DIGI_CONVERT_1,
1762 spdif->ctls & 0xff);
1763 snd_hda_codec_write(codec,
1764 nvhdmi_master_con_nid_7x,
1766 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1769 for (i = 0; i < 4; i++) {
1775 /* turn off SPDIF once;
1776 *otherwise the IEC958 bits won't be updated
1778 if (codec->spdif_status_reset &&
1779 (spdif->ctls & AC_DIG1_ENABLE))
1780 snd_hda_codec_write(codec,
1781 nvhdmi_con_nids_7x[i],
1783 AC_VERB_SET_DIGI_CONVERT_1,
1784 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1785 /* set the stream id */
1786 snd_hda_codec_write(codec,
1787 nvhdmi_con_nids_7x[i],
1789 AC_VERB_SET_CHANNEL_STREAMID,
1790 (stream_tag << 4) | channel_id);
1791 /* set the stream format */
1792 snd_hda_codec_write(codec,
1793 nvhdmi_con_nids_7x[i],
1795 AC_VERB_SET_STREAM_FORMAT,
1797 /* turn on again (if needed) */
1798 /* enable and set the channel status audio/data flag */
1799 if (codec->spdif_status_reset &&
1800 (spdif->ctls & AC_DIG1_ENABLE)) {
1801 snd_hda_codec_write(codec,
1802 nvhdmi_con_nids_7x[i],
1804 AC_VERB_SET_DIGI_CONVERT_1,
1805 spdif->ctls & 0xff);
1806 snd_hda_codec_write(codec,
1807 nvhdmi_con_nids_7x[i],
1809 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1813 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
1815 mutex_unlock(&codec->spdif_mutex);
1819 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
1823 .nid = nvhdmi_master_con_nid_7x,
1824 .rates = SUPPORTED_RATES,
1825 .maxbps = SUPPORTED_MAXBPS,
1826 .formats = SUPPORTED_FORMATS,
1828 .open = simple_playback_pcm_open,
1829 .close = nvhdmi_8ch_7x_pcm_close,
1830 .prepare = nvhdmi_8ch_7x_pcm_prepare
1834 static int patch_nvhdmi_2ch(struct hda_codec *codec)
1836 struct hdmi_spec *spec;
1837 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
1838 nvhdmi_master_pin_nid_7x);
1842 codec->patch_ops.init = nvhdmi_7x_init_2ch;
1843 /* override the PCM rates, etc, as the codec doesn't give full list */
1845 spec->pcm_playback.rates = SUPPORTED_RATES;
1846 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
1847 spec->pcm_playback.formats = SUPPORTED_FORMATS;
1851 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
1853 struct hdmi_spec *spec;
1854 int err = patch_nvhdmi_2ch(codec);
1858 spec->multiout.max_channels = 8;
1859 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
1860 codec->patch_ops.init = nvhdmi_7x_init_8ch;
1862 /* Initialize the audio infoframe channel mask and checksum to something
1864 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1870 * ATI-specific implementations
1872 * FIXME: we may omit the whole this and use the generic code once after
1873 * it's confirmed to work.
1876 #define ATIHDMI_CVT_NID 0x02 /* audio converter */
1877 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
1879 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1880 struct hda_codec *codec,
1881 unsigned int stream_tag,
1882 unsigned int format,
1883 struct snd_pcm_substream *substream)
1885 struct hdmi_spec *spec = codec->spec;
1886 int chans = substream->runtime->channels;
1889 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
1893 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1894 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
1896 for (i = 0; i < chans; i++) {
1897 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1898 AC_VERB_SET_HDMI_CHAN_SLOT,
1904 static int patch_atihdmi(struct hda_codec *codec)
1906 struct hdmi_spec *spec;
1907 int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
1911 spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
1915 /* VIA HDMI Implementation */
1916 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
1917 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
1919 static int patch_via_hdmi(struct hda_codec *codec)
1921 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
1927 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
1928 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
1929 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
1930 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
1931 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
1932 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
1933 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
1934 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
1935 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1936 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1937 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1938 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1939 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
1940 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
1941 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
1942 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
1943 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
1944 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
1945 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
1946 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
1947 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
1948 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
1949 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
1950 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
1951 /* 17 is known to be absent */
1952 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
1953 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
1954 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
1955 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
1956 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
1957 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
1958 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
1959 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
1960 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
1961 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
1962 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
1963 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
1964 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
1965 { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
1966 { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
1967 { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
1968 { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
1969 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
1970 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
1971 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
1972 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
1973 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
1974 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
1975 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
1976 { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
1977 { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
1978 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
1982 MODULE_ALIAS("snd-hda-codec-id:1002793c");
1983 MODULE_ALIAS("snd-hda-codec-id:10027919");
1984 MODULE_ALIAS("snd-hda-codec-id:1002791a");
1985 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
1986 MODULE_ALIAS("snd-hda-codec-id:10951390");
1987 MODULE_ALIAS("snd-hda-codec-id:10951392");
1988 MODULE_ALIAS("snd-hda-codec-id:10de0002");
1989 MODULE_ALIAS("snd-hda-codec-id:10de0003");
1990 MODULE_ALIAS("snd-hda-codec-id:10de0005");
1991 MODULE_ALIAS("snd-hda-codec-id:10de0006");
1992 MODULE_ALIAS("snd-hda-codec-id:10de0007");
1993 MODULE_ALIAS("snd-hda-codec-id:10de000a");
1994 MODULE_ALIAS("snd-hda-codec-id:10de000b");
1995 MODULE_ALIAS("snd-hda-codec-id:10de000c");
1996 MODULE_ALIAS("snd-hda-codec-id:10de000d");
1997 MODULE_ALIAS("snd-hda-codec-id:10de0010");
1998 MODULE_ALIAS("snd-hda-codec-id:10de0011");
1999 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2000 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2001 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2002 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2003 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2004 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2005 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2006 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2007 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2008 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2009 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2010 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2011 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2012 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2013 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2014 MODULE_ALIAS("snd-hda-codec-id:10de0051");
2015 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2016 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2017 MODULE_ALIAS("snd-hda-codec-id:11069f80");
2018 MODULE_ALIAS("snd-hda-codec-id:11069f81");
2019 MODULE_ALIAS("snd-hda-codec-id:11069f84");
2020 MODULE_ALIAS("snd-hda-codec-id:11069f85");
2021 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2022 MODULE_ALIAS("snd-hda-codec-id:80860054");
2023 MODULE_ALIAS("snd-hda-codec-id:80862801");
2024 MODULE_ALIAS("snd-hda-codec-id:80862802");
2025 MODULE_ALIAS("snd-hda-codec-id:80862803");
2026 MODULE_ALIAS("snd-hda-codec-id:80862804");
2027 MODULE_ALIAS("snd-hda-codec-id:80862805");
2028 MODULE_ALIAS("snd-hda-codec-id:80862806");
2029 MODULE_ALIAS("snd-hda-codec-id:80862807");
2030 MODULE_ALIAS("snd-hda-codec-id:80862880");
2031 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2033 MODULE_LICENSE("GPL");
2034 MODULE_DESCRIPTION("HDMI HD-audio codec");
2035 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2036 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2037 MODULE_ALIAS("snd-hda-codec-atihdmi");
2039 static struct hda_codec_preset_list intel_list = {
2040 .preset = snd_hda_preset_hdmi,
2041 .owner = THIS_MODULE,
2044 static int __init patch_hdmi_init(void)
2046 return snd_hda_add_codec_preset(&intel_list);
2049 static void __exit patch_hdmi_exit(void)
2051 snd_hda_delete_codec_preset(&intel_list);
2054 module_init(patch_hdmi_init)
2055 module_exit(patch_hdmi_exit)