ALSA: HDMI - Fix channel_allocation array wrong order
[firefly-linux-kernel-4.4.55.git] / sound / pci / hda / patch_hdmi.c
1 /*
2  *
3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
4  *
5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6  *  Copyright (c) 2006 ATI Technologies Inc.
7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9  *
10  *  Authors:
11  *                      Wu Fengguang <wfg@linux.intel.com>
12  *
13  *  Maintained by:
14  *                      Wu Fengguang <wfg@linux.intel.com>
15  *
16  *  This program is free software; you can redistribute it and/or modify it
17  *  under the terms of the GNU General Public License as published by the Free
18  *  Software Foundation; either version 2 of the License, or (at your option)
19  *  any later version.
20  *
21  *  This program is distributed in the hope that it will be useful, but
22  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
24  *  for more details.
25  *
26  *  You should have received a copy of the GNU General Public License
27  *  along with this program; if not, write to the Free Software Foundation,
28  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
29  */
30
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include "hda_codec.h"
38 #include "hda_local.h"
39 #include "hda_jack.h"
40
41 static bool static_hdmi_pcm;
42 module_param(static_hdmi_pcm, bool, 0644);
43 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
44
45 /*
46  * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
47  * could support N independent pipes, each of them can be connected to one or
48  * more ports (DVI, HDMI or DisplayPort).
49  *
50  * The HDA correspondence of pipes/ports are converter/pin nodes.
51  */
52 #define MAX_HDMI_CVTS   8
53 #define MAX_HDMI_PINS   8
54
55 struct hdmi_spec_per_cvt {
56         hda_nid_t cvt_nid;
57         int assigned;
58         unsigned int channels_min;
59         unsigned int channels_max;
60         u32 rates;
61         u64 formats;
62         unsigned int maxbps;
63 };
64
65 struct hdmi_spec_per_pin {
66         hda_nid_t pin_nid;
67         int num_mux_nids;
68         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
69
70         struct hda_codec *codec;
71         struct hdmi_eld sink_eld;
72         struct delayed_work work;
73         int repoll_count;
74 };
75
76 struct hdmi_spec {
77         int num_cvts;
78         struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
79
80         int num_pins;
81         struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
82         struct hda_pcm pcm_rec[MAX_HDMI_PINS];
83
84         /*
85          * Non-generic ATI/NVIDIA specific
86          */
87         struct hda_multi_out multiout;
88         struct hda_pcm_stream pcm_playback;
89 };
90
91
92 struct hdmi_audio_infoframe {
93         u8 type; /* 0x84 */
94         u8 ver;  /* 0x01 */
95         u8 len;  /* 0x0a */
96
97         u8 checksum;
98
99         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
100         u8 SS01_SF24;
101         u8 CXT04;
102         u8 CA;
103         u8 LFEPBL01_LSV36_DM_INH7;
104 };
105
106 struct dp_audio_infoframe {
107         u8 type; /* 0x84 */
108         u8 len;  /* 0x1b */
109         u8 ver;  /* 0x11 << 2 */
110
111         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
112         u8 SS01_SF24;
113         u8 CXT04;
114         u8 CA;
115         u8 LFEPBL01_LSV36_DM_INH7;
116 };
117
118 union audio_infoframe {
119         struct hdmi_audio_infoframe hdmi;
120         struct dp_audio_infoframe dp;
121         u8 bytes[0];
122 };
123
124 /*
125  * CEA speaker placement:
126  *
127  *        FLH       FCH        FRH
128  *  FLW    FL  FLC   FC   FRC   FR   FRW
129  *
130  *                                  LFE
131  *                     TC
132  *
133  *          RL  RLC   RC   RRC   RR
134  *
135  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
136  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
137  */
138 enum cea_speaker_placement {
139         FL  = (1 <<  0),        /* Front Left           */
140         FC  = (1 <<  1),        /* Front Center         */
141         FR  = (1 <<  2),        /* Front Right          */
142         FLC = (1 <<  3),        /* Front Left Center    */
143         FRC = (1 <<  4),        /* Front Right Center   */
144         RL  = (1 <<  5),        /* Rear Left            */
145         RC  = (1 <<  6),        /* Rear Center          */
146         RR  = (1 <<  7),        /* Rear Right           */
147         RLC = (1 <<  8),        /* Rear Left Center     */
148         RRC = (1 <<  9),        /* Rear Right Center    */
149         LFE = (1 << 10),        /* Low Frequency Effect */
150         FLW = (1 << 11),        /* Front Left Wide      */
151         FRW = (1 << 12),        /* Front Right Wide     */
152         FLH = (1 << 13),        /* Front Left High      */
153         FCH = (1 << 14),        /* Front Center High    */
154         FRH = (1 << 15),        /* Front Right High     */
155         TC  = (1 << 16),        /* Top Center           */
156 };
157
158 /*
159  * ELD SA bits in the CEA Speaker Allocation data block
160  */
161 static int eld_speaker_allocation_bits[] = {
162         [0] = FL | FR,
163         [1] = LFE,
164         [2] = FC,
165         [3] = RL | RR,
166         [4] = RC,
167         [5] = FLC | FRC,
168         [6] = RLC | RRC,
169         /* the following are not defined in ELD yet */
170         [7] = FLW | FRW,
171         [8] = FLH | FRH,
172         [9] = TC,
173         [10] = FCH,
174 };
175
176 struct cea_channel_speaker_allocation {
177         int ca_index;
178         int speakers[8];
179
180         /* derived values, just for convenience */
181         int channels;
182         int spk_mask;
183 };
184
185 /*
186  * ALSA sequence is:
187  *
188  *       surround40   surround41   surround50   surround51   surround71
189  * ch0   front left   =            =            =            =
190  * ch1   front right  =            =            =            =
191  * ch2   rear left    =            =            =            =
192  * ch3   rear right   =            =            =            =
193  * ch4                LFE          center       center       center
194  * ch5                                          LFE          LFE
195  * ch6                                                       side left
196  * ch7                                                       side right
197  *
198  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
199  */
200 static int hdmi_channel_mapping[0x32][8] = {
201         /* stereo */
202         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
203         /* 2.1 */
204         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
205         /* Dolby Surround */
206         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
207         /* surround40 */
208         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
209         /* 4ch */
210         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
211         /* surround41 */
212         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
213         /* surround50 */
214         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
215         /* surround51 */
216         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
217         /* 7.1 */
218         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
219 };
220
221 /*
222  * This is an ordered list!
223  *
224  * The preceding ones have better chances to be selected by
225  * hdmi_channel_allocation().
226  */
227 static struct cea_channel_speaker_allocation channel_allocations[] = {
228 /*                        channel:   7     6    5    4    3     2    1    0  */
229 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
230                                  /* 2.1 */
231 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
232                                  /* Dolby Surround */
233 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
234                                  /* surround40 */
235 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
236                                  /* surround41 */
237 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
238                                  /* surround50 */
239 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
240                                  /* surround51 */
241 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
242                                  /* 6.1 */
243 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
244                                  /* surround71 */
245 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
246
247 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
248 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
249 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
250 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
251 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
252 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
253 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
254 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
255 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
256 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
257 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
258 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
259 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
260 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
261 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
262 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
263 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
264 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
265 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
266 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
267 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
268 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
269 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
270 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
271 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
272 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
273 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
274 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
275 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
276 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
277 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
278 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
279 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
280 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
281 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
282 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
283 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
284 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
285 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
286 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
287 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
288 };
289
290
291 /*
292  * HDMI routines
293  */
294
295 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
296 {
297         int pin_idx;
298
299         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
300                 if (spec->pins[pin_idx].pin_nid == pin_nid)
301                         return pin_idx;
302
303         snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
304         return -EINVAL;
305 }
306
307 static int hinfo_to_pin_index(struct hdmi_spec *spec,
308                               struct hda_pcm_stream *hinfo)
309 {
310         int pin_idx;
311
312         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
313                 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
314                         return pin_idx;
315
316         snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
317         return -EINVAL;
318 }
319
320 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
321 {
322         int cvt_idx;
323
324         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
325                 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
326                         return cvt_idx;
327
328         snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
329         return -EINVAL;
330 }
331
332 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
333                         struct snd_ctl_elem_info *uinfo)
334 {
335         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
336         struct hdmi_spec *spec;
337         int pin_idx;
338
339         spec = codec->spec;
340         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
341
342         pin_idx = kcontrol->private_value;
343         uinfo->count = spec->pins[pin_idx].sink_eld.eld_size;
344
345         return 0;
346 }
347
348 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
349                         struct snd_ctl_elem_value *ucontrol)
350 {
351         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
352         struct hdmi_spec *spec;
353         int pin_idx;
354
355         spec = codec->spec;
356         pin_idx = kcontrol->private_value;
357
358         memcpy(ucontrol->value.bytes.data,
359                 spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE);
360
361         return 0;
362 }
363
364 static struct snd_kcontrol_new eld_bytes_ctl = {
365         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
366         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
367         .name = "ELD",
368         .info = hdmi_eld_ctl_info,
369         .get = hdmi_eld_ctl_get,
370 };
371
372 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
373                         int device)
374 {
375         struct snd_kcontrol *kctl;
376         struct hdmi_spec *spec = codec->spec;
377         int err;
378
379         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
380         if (!kctl)
381                 return -ENOMEM;
382         kctl->private_value = pin_idx;
383         kctl->id.device = device;
384
385         err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
386         if (err < 0)
387                 return err;
388
389         return 0;
390 }
391
392 #ifdef BE_PARANOID
393 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
394                                 int *packet_index, int *byte_index)
395 {
396         int val;
397
398         val = snd_hda_codec_read(codec, pin_nid, 0,
399                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
400
401         *packet_index = val >> 5;
402         *byte_index = val & 0x1f;
403 }
404 #endif
405
406 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
407                                 int packet_index, int byte_index)
408 {
409         int val;
410
411         val = (packet_index << 5) | (byte_index & 0x1f);
412
413         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
414 }
415
416 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
417                                 unsigned char val)
418 {
419         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
420 }
421
422 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
423 {
424         /* Unmute */
425         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
426                 snd_hda_codec_write(codec, pin_nid, 0,
427                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
428         /* Disable pin out until stream is active*/
429         snd_hda_codec_write(codec, pin_nid, 0,
430                             AC_VERB_SET_PIN_WIDGET_CONTROL, 0);
431 }
432
433 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
434 {
435         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
436                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
437 }
438
439 static void hdmi_set_channel_count(struct hda_codec *codec,
440                                    hda_nid_t cvt_nid, int chs)
441 {
442         if (chs != hdmi_get_channel_count(codec, cvt_nid))
443                 snd_hda_codec_write(codec, cvt_nid, 0,
444                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
445 }
446
447
448 /*
449  * Channel mapping routines
450  */
451
452 /*
453  * Compute derived values in channel_allocations[].
454  */
455 static void init_channel_allocations(void)
456 {
457         int i, j;
458         struct cea_channel_speaker_allocation *p;
459
460         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
461                 p = channel_allocations + i;
462                 p->channels = 0;
463                 p->spk_mask = 0;
464                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
465                         if (p->speakers[j]) {
466                                 p->channels++;
467                                 p->spk_mask |= p->speakers[j];
468                         }
469         }
470 }
471
472 static int get_channel_allocation_order(int ca)
473 {
474         int i;
475
476         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
477                 if (channel_allocations[i].ca_index == ca)
478                         break;
479         }
480         return i;
481 }
482
483 /*
484  * The transformation takes two steps:
485  *
486  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
487  *            spk_mask => (channel_allocations[])         => ai->CA
488  *
489  * TODO: it could select the wrong CA from multiple candidates.
490 */
491 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
492 {
493         int i;
494         int ca = 0;
495         int spk_mask = 0;
496         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
497
498         /*
499          * CA defaults to 0 for basic stereo audio
500          */
501         if (channels <= 2)
502                 return 0;
503
504         /*
505          * expand ELD's speaker allocation mask
506          *
507          * ELD tells the speaker mask in a compact(paired) form,
508          * expand ELD's notions to match the ones used by Audio InfoFrame.
509          */
510         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
511                 if (eld->spk_alloc & (1 << i))
512                         spk_mask |= eld_speaker_allocation_bits[i];
513         }
514
515         /* search for the first working match in the CA table */
516         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
517                 if (channels == channel_allocations[i].channels &&
518                     (spk_mask & channel_allocations[i].spk_mask) ==
519                                 channel_allocations[i].spk_mask) {
520                         ca = channel_allocations[i].ca_index;
521                         break;
522                 }
523         }
524
525         snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
526         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
527                     ca, channels, buf);
528
529         return ca;
530 }
531
532 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
533                                        hda_nid_t pin_nid)
534 {
535 #ifdef CONFIG_SND_DEBUG_VERBOSE
536         int i;
537         int slot;
538
539         for (i = 0; i < 8; i++) {
540                 slot = snd_hda_codec_read(codec, pin_nid, 0,
541                                                 AC_VERB_GET_HDMI_CHAN_SLOT, i);
542                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
543                                                 slot >> 4, slot & 0xf);
544         }
545 #endif
546 }
547
548
549 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
550                                        hda_nid_t pin_nid,
551                                        int ca)
552 {
553         int i;
554         int err;
555         int order;
556
557         order = get_channel_allocation_order(ca);
558         if (hdmi_channel_mapping[ca][1] == 0) {
559                 for (i = 0; i < channel_allocations[order].channels; i++)
560                         hdmi_channel_mapping[ca][i] = i | (i << 4);
561                 for (; i < 8; i++)
562                         hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
563         }
564
565         for (i = 0; i < 8; i++) {
566                 err = snd_hda_codec_write(codec, pin_nid, 0,
567                                           AC_VERB_SET_HDMI_CHAN_SLOT,
568                                           hdmi_channel_mapping[ca][i]);
569                 if (err) {
570                         snd_printdd(KERN_NOTICE
571                                     "HDMI: channel mapping failed\n");
572                         break;
573                 }
574         }
575
576         hdmi_debug_channel_mapping(codec, pin_nid);
577 }
578
579
580 /*
581  * Audio InfoFrame routines
582  */
583
584 /*
585  * Enable Audio InfoFrame Transmission
586  */
587 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
588                                        hda_nid_t pin_nid)
589 {
590         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
591         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
592                                                 AC_DIPXMIT_BEST);
593 }
594
595 /*
596  * Disable Audio InfoFrame Transmission
597  */
598 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
599                                       hda_nid_t pin_nid)
600 {
601         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
602         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
603                                                 AC_DIPXMIT_DISABLE);
604 }
605
606 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
607 {
608 #ifdef CONFIG_SND_DEBUG_VERBOSE
609         int i;
610         int size;
611
612         size = snd_hdmi_get_eld_size(codec, pin_nid);
613         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
614
615         for (i = 0; i < 8; i++) {
616                 size = snd_hda_codec_read(codec, pin_nid, 0,
617                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
618                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
619         }
620 #endif
621 }
622
623 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
624 {
625 #ifdef BE_PARANOID
626         int i, j;
627         int size;
628         int pi, bi;
629         for (i = 0; i < 8; i++) {
630                 size = snd_hda_codec_read(codec, pin_nid, 0,
631                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
632                 if (size == 0)
633                         continue;
634
635                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
636                 for (j = 1; j < 1000; j++) {
637                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
638                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
639                         if (pi != i)
640                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
641                                                 bi, pi, i);
642                         if (bi == 0) /* byte index wrapped around */
643                                 break;
644                 }
645                 snd_printd(KERN_INFO
646                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
647                         i, size, j);
648         }
649 #endif
650 }
651
652 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
653 {
654         u8 *bytes = (u8 *)hdmi_ai;
655         u8 sum = 0;
656         int i;
657
658         hdmi_ai->checksum = 0;
659
660         for (i = 0; i < sizeof(*hdmi_ai); i++)
661                 sum += bytes[i];
662
663         hdmi_ai->checksum = -sum;
664 }
665
666 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
667                                       hda_nid_t pin_nid,
668                                       u8 *dip, int size)
669 {
670         int i;
671
672         hdmi_debug_dip_size(codec, pin_nid);
673         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
674
675         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
676         for (i = 0; i < size; i++)
677                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
678 }
679
680 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
681                                     u8 *dip, int size)
682 {
683         u8 val;
684         int i;
685
686         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
687                                                             != AC_DIPXMIT_BEST)
688                 return false;
689
690         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
691         for (i = 0; i < size; i++) {
692                 val = snd_hda_codec_read(codec, pin_nid, 0,
693                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
694                 if (val != dip[i])
695                         return false;
696         }
697
698         return true;
699 }
700
701 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
702                                         struct snd_pcm_substream *substream)
703 {
704         struct hdmi_spec *spec = codec->spec;
705         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
706         hda_nid_t pin_nid = per_pin->pin_nid;
707         int channels = substream->runtime->channels;
708         struct hdmi_eld *eld;
709         int ca;
710         union audio_infoframe ai;
711
712         eld = &spec->pins[pin_idx].sink_eld;
713         if (!eld->monitor_present)
714                 return;
715
716         ca = hdmi_channel_allocation(eld, channels);
717
718         memset(&ai, 0, sizeof(ai));
719         if (eld->conn_type == 0) { /* HDMI */
720                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
721
722                 hdmi_ai->type           = 0x84;
723                 hdmi_ai->ver            = 0x01;
724                 hdmi_ai->len            = 0x0a;
725                 hdmi_ai->CC02_CT47      = channels - 1;
726                 hdmi_ai->CA             = ca;
727                 hdmi_checksum_audio_infoframe(hdmi_ai);
728         } else if (eld->conn_type == 1) { /* DisplayPort */
729                 struct dp_audio_infoframe *dp_ai = &ai.dp;
730
731                 dp_ai->type             = 0x84;
732                 dp_ai->len              = 0x1b;
733                 dp_ai->ver              = 0x11 << 2;
734                 dp_ai->CC02_CT47        = channels - 1;
735                 dp_ai->CA               = ca;
736         } else {
737                 snd_printd("HDMI: unknown connection type at pin %d\n",
738                             pin_nid);
739                 return;
740         }
741
742         /*
743          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
744          * sizeof(*dp_ai) to avoid partial match/update problems when
745          * the user switches between HDMI/DP monitors.
746          */
747         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
748                                         sizeof(ai))) {
749                 snd_printdd("hdmi_setup_audio_infoframe: "
750                             "pin=%d channels=%d\n",
751                             pin_nid,
752                             channels);
753                 hdmi_setup_channel_mapping(codec, pin_nid, ca);
754                 hdmi_stop_infoframe_trans(codec, pin_nid);
755                 hdmi_fill_audio_infoframe(codec, pin_nid,
756                                             ai.bytes, sizeof(ai));
757                 hdmi_start_infoframe_trans(codec, pin_nid);
758         }
759 }
760
761
762 /*
763  * Unsolicited events
764  */
765
766 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
767
768 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
769 {
770         struct hdmi_spec *spec = codec->spec;
771         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
772         int pin_nid;
773         int pin_idx;
774         struct hda_jack_tbl *jack;
775
776         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
777         if (!jack)
778                 return;
779         pin_nid = jack->nid;
780         jack->jack_dirty = 1;
781
782         _snd_printd(SND_PR_VERBOSE,
783                 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
784                 codec->addr, pin_nid,
785                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
786
787         pin_idx = pin_nid_to_pin_index(spec, pin_nid);
788         if (pin_idx < 0)
789                 return;
790
791         hdmi_present_sense(&spec->pins[pin_idx], 1);
792         snd_hda_jack_report_sync(codec);
793 }
794
795 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
796 {
797         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
798         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
799         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
800         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
801
802         printk(KERN_INFO
803                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
804                 codec->addr,
805                 tag,
806                 subtag,
807                 cp_state,
808                 cp_ready);
809
810         /* TODO */
811         if (cp_state)
812                 ;
813         if (cp_ready)
814                 ;
815 }
816
817
818 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
819 {
820         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
821         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
822
823         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
824                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
825                 return;
826         }
827
828         if (subtag == 0)
829                 hdmi_intrinsic_event(codec, res);
830         else
831                 hdmi_non_intrinsic_event(codec, res);
832 }
833
834 /*
835  * Callbacks
836  */
837
838 /* HBR should be Non-PCM, 8 channels */
839 #define is_hbr_format(format) \
840         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
841
842 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
843                               hda_nid_t pin_nid, u32 stream_tag, int format)
844 {
845         int pinctl;
846         int new_pinctl = 0;
847
848         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
849                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
850                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
851
852                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
853                 if (is_hbr_format(format))
854                         new_pinctl |= AC_PINCTL_EPT_HBR;
855                 else
856                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
857
858                 snd_printdd("hdmi_setup_stream: "
859                             "NID=0x%x, %spinctl=0x%x\n",
860                             pin_nid,
861                             pinctl == new_pinctl ? "" : "new-",
862                             new_pinctl);
863
864                 if (pinctl != new_pinctl)
865                         snd_hda_codec_write(codec, pin_nid, 0,
866                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
867                                             new_pinctl);
868
869         }
870         if (is_hbr_format(format) && !new_pinctl) {
871                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
872                 return -EINVAL;
873         }
874
875         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
876         return 0;
877 }
878
879 /*
880  * HDA PCM callbacks
881  */
882 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
883                          struct hda_codec *codec,
884                          struct snd_pcm_substream *substream)
885 {
886         struct hdmi_spec *spec = codec->spec;
887         struct snd_pcm_runtime *runtime = substream->runtime;
888         int pin_idx, cvt_idx, mux_idx = 0;
889         struct hdmi_spec_per_pin *per_pin;
890         struct hdmi_eld *eld;
891         struct hdmi_spec_per_cvt *per_cvt = NULL;
892
893         /* Validate hinfo */
894         pin_idx = hinfo_to_pin_index(spec, hinfo);
895         if (snd_BUG_ON(pin_idx < 0))
896                 return -EINVAL;
897         per_pin = &spec->pins[pin_idx];
898         eld = &per_pin->sink_eld;
899
900         /* Dynamically assign converter to stream */
901         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
902                 per_cvt = &spec->cvts[cvt_idx];
903
904                 /* Must not already be assigned */
905                 if (per_cvt->assigned)
906                         continue;
907                 /* Must be in pin's mux's list of converters */
908                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
909                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
910                                 break;
911                 /* Not in mux list */
912                 if (mux_idx == per_pin->num_mux_nids)
913                         continue;
914                 break;
915         }
916         /* No free converters */
917         if (cvt_idx == spec->num_cvts)
918                 return -ENODEV;
919
920         /* Claim converter */
921         per_cvt->assigned = 1;
922         hinfo->nid = per_cvt->cvt_nid;
923
924         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
925                             AC_VERB_SET_CONNECT_SEL,
926                             mux_idx);
927         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
928
929         /* Initially set the converter's capabilities */
930         hinfo->channels_min = per_cvt->channels_min;
931         hinfo->channels_max = per_cvt->channels_max;
932         hinfo->rates = per_cvt->rates;
933         hinfo->formats = per_cvt->formats;
934         hinfo->maxbps = per_cvt->maxbps;
935
936         /* Restrict capabilities by ELD if this isn't disabled */
937         if (!static_hdmi_pcm && eld->eld_valid) {
938                 snd_hdmi_eld_update_pcm_info(eld, hinfo);
939                 if (hinfo->channels_min > hinfo->channels_max ||
940                     !hinfo->rates || !hinfo->formats)
941                         return -ENODEV;
942         }
943
944         /* Store the updated parameters */
945         runtime->hw.channels_min = hinfo->channels_min;
946         runtime->hw.channels_max = hinfo->channels_max;
947         runtime->hw.formats = hinfo->formats;
948         runtime->hw.rates = hinfo->rates;
949
950         snd_pcm_hw_constraint_step(substream->runtime, 0,
951                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
952         return 0;
953 }
954
955 /*
956  * HDA/HDMI auto parsing
957  */
958 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
959 {
960         struct hdmi_spec *spec = codec->spec;
961         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
962         hda_nid_t pin_nid = per_pin->pin_nid;
963
964         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
965                 snd_printk(KERN_WARNING
966                            "HDMI: pin %d wcaps %#x "
967                            "does not support connection list\n",
968                            pin_nid, get_wcaps(codec, pin_nid));
969                 return -EINVAL;
970         }
971
972         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
973                                                         per_pin->mux_nids,
974                                                         HDA_MAX_CONNECTIONS);
975
976         return 0;
977 }
978
979 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
980 {
981         struct hda_codec *codec = per_pin->codec;
982         struct hdmi_eld *eld = &per_pin->sink_eld;
983         hda_nid_t pin_nid = per_pin->pin_nid;
984         /*
985          * Always execute a GetPinSense verb here, even when called from
986          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
987          * response's PD bit is not the real PD value, but indicates that
988          * the real PD value changed. An older version of the HD-audio
989          * specification worked this way. Hence, we just ignore the data in
990          * the unsolicited response to avoid custom WARs.
991          */
992         int present = snd_hda_pin_sense(codec, pin_nid);
993         bool eld_valid = false;
994
995         memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
996
997         eld->monitor_present    = !!(present & AC_PINSENSE_PRESENCE);
998         if (eld->monitor_present)
999                 eld_valid       = !!(present & AC_PINSENSE_ELDV);
1000
1001         _snd_printd(SND_PR_VERBOSE,
1002                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1003                 codec->addr, pin_nid, eld->monitor_present, eld_valid);
1004
1005         if (eld_valid) {
1006                 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
1007                         snd_hdmi_show_eld(eld);
1008                 else if (repoll) {
1009                         queue_delayed_work(codec->bus->workq,
1010                                            &per_pin->work,
1011                                            msecs_to_jiffies(300));
1012                 }
1013         }
1014 }
1015
1016 static void hdmi_repoll_eld(struct work_struct *work)
1017 {
1018         struct hdmi_spec_per_pin *per_pin =
1019         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1020
1021         if (per_pin->repoll_count++ > 6)
1022                 per_pin->repoll_count = 0;
1023
1024         hdmi_present_sense(per_pin, per_pin->repoll_count);
1025 }
1026
1027 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1028 {
1029         struct hdmi_spec *spec = codec->spec;
1030         unsigned int caps, config;
1031         int pin_idx;
1032         struct hdmi_spec_per_pin *per_pin;
1033         int err;
1034
1035         caps = snd_hda_param_read(codec, pin_nid, AC_PAR_PIN_CAP);
1036         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1037                 return 0;
1038
1039         config = snd_hda_codec_read(codec, pin_nid, 0,
1040                                 AC_VERB_GET_CONFIG_DEFAULT, 0);
1041         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1042                 return 0;
1043
1044         if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
1045                 return -E2BIG;
1046
1047         pin_idx = spec->num_pins;
1048         per_pin = &spec->pins[pin_idx];
1049
1050         per_pin->pin_nid = pin_nid;
1051
1052         err = hdmi_read_pin_conn(codec, pin_idx);
1053         if (err < 0)
1054                 return err;
1055
1056         spec->num_pins++;
1057
1058         return 0;
1059 }
1060
1061 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1062 {
1063         struct hdmi_spec *spec = codec->spec;
1064         int cvt_idx;
1065         struct hdmi_spec_per_cvt *per_cvt;
1066         unsigned int chans;
1067         int err;
1068
1069         if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
1070                 return -E2BIG;
1071
1072         chans = get_wcaps(codec, cvt_nid);
1073         chans = get_wcaps_channels(chans);
1074
1075         cvt_idx = spec->num_cvts;
1076         per_cvt = &spec->cvts[cvt_idx];
1077
1078         per_cvt->cvt_nid = cvt_nid;
1079         per_cvt->channels_min = 2;
1080         if (chans <= 16)
1081                 per_cvt->channels_max = chans;
1082
1083         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1084                                           &per_cvt->rates,
1085                                           &per_cvt->formats,
1086                                           &per_cvt->maxbps);
1087         if (err < 0)
1088                 return err;
1089
1090         spec->num_cvts++;
1091
1092         return 0;
1093 }
1094
1095 static int hdmi_parse_codec(struct hda_codec *codec)
1096 {
1097         hda_nid_t nid;
1098         int i, nodes;
1099
1100         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1101         if (!nid || nodes < 0) {
1102                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1103                 return -EINVAL;
1104         }
1105
1106         for (i = 0; i < nodes; i++, nid++) {
1107                 unsigned int caps;
1108                 unsigned int type;
1109
1110                 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
1111                 type = get_wcaps_type(caps);
1112
1113                 if (!(caps & AC_WCAP_DIGITAL))
1114                         continue;
1115
1116                 switch (type) {
1117                 case AC_WID_AUD_OUT:
1118                         hdmi_add_cvt(codec, nid);
1119                         break;
1120                 case AC_WID_PIN:
1121                         hdmi_add_pin(codec, nid);
1122                         break;
1123                 }
1124         }
1125
1126         /*
1127          * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1128          * can be lost and presence sense verb will become inaccurate if the
1129          * HDA link is powered off at hot plug or hw initialization time.
1130          */
1131 #ifdef CONFIG_PM
1132         if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1133               AC_PWRST_EPSS))
1134                 codec->bus->power_keep_link_on = 1;
1135 #endif
1136
1137         return 0;
1138 }
1139
1140 /*
1141  */
1142 static char *get_hdmi_pcm_name(int idx)
1143 {
1144         static char names[MAX_HDMI_PINS][8];
1145         sprintf(&names[idx][0], "HDMI %d", idx);
1146         return &names[idx][0];
1147 }
1148
1149 /*
1150  * HDMI callbacks
1151  */
1152
1153 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1154                                            struct hda_codec *codec,
1155                                            unsigned int stream_tag,
1156                                            unsigned int format,
1157                                            struct snd_pcm_substream *substream)
1158 {
1159         hda_nid_t cvt_nid = hinfo->nid;
1160         struct hdmi_spec *spec = codec->spec;
1161         int pin_idx = hinfo_to_pin_index(spec, hinfo);
1162         hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
1163         int pinctl;
1164
1165         hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1166
1167         hdmi_setup_audio_infoframe(codec, pin_idx, substream);
1168
1169         pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1170                                     AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1171         snd_hda_codec_write(codec, pin_nid, 0,
1172                             AC_VERB_SET_PIN_WIDGET_CONTROL, pinctl | PIN_OUT);
1173
1174         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1175 }
1176
1177 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1178                                              struct hda_codec *codec,
1179                                              struct snd_pcm_substream *substream)
1180 {
1181         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1182         return 0;
1183 }
1184
1185 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1186                           struct hda_codec *codec,
1187                           struct snd_pcm_substream *substream)
1188 {
1189         struct hdmi_spec *spec = codec->spec;
1190         int cvt_idx, pin_idx;
1191         struct hdmi_spec_per_cvt *per_cvt;
1192         struct hdmi_spec_per_pin *per_pin;
1193         int pinctl;
1194
1195         if (hinfo->nid) {
1196                 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1197                 if (snd_BUG_ON(cvt_idx < 0))
1198                         return -EINVAL;
1199                 per_cvt = &spec->cvts[cvt_idx];
1200
1201                 snd_BUG_ON(!per_cvt->assigned);
1202                 per_cvt->assigned = 0;
1203                 hinfo->nid = 0;
1204
1205                 pin_idx = hinfo_to_pin_index(spec, hinfo);
1206                 if (snd_BUG_ON(pin_idx < 0))
1207                         return -EINVAL;
1208                 per_pin = &spec->pins[pin_idx];
1209
1210                 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1211                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1212                 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1213                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1214                                     pinctl & ~PIN_OUT);
1215                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1216         }
1217         return 0;
1218 }
1219
1220 static const struct hda_pcm_ops generic_ops = {
1221         .open = hdmi_pcm_open,
1222         .close = hdmi_pcm_close,
1223         .prepare = generic_hdmi_playback_pcm_prepare,
1224         .cleanup = generic_hdmi_playback_pcm_cleanup,
1225 };
1226
1227 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1228 {
1229         struct hdmi_spec *spec = codec->spec;
1230         int pin_idx;
1231
1232         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1233                 struct hda_pcm *info;
1234                 struct hda_pcm_stream *pstr;
1235
1236                 info = &spec->pcm_rec[pin_idx];
1237                 info->name = get_hdmi_pcm_name(pin_idx);
1238                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1239
1240                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1241                 pstr->substreams = 1;
1242                 pstr->ops = generic_ops;
1243                 /* other pstr fields are set in open */
1244         }
1245
1246         codec->num_pcms = spec->num_pins;
1247         codec->pcm_info = spec->pcm_rec;
1248
1249         return 0;
1250 }
1251
1252 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1253 {
1254         char hdmi_str[32] = "HDMI/DP";
1255         struct hdmi_spec *spec = codec->spec;
1256         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1257         int pcmdev = spec->pcm_rec[pin_idx].device;
1258
1259         if (pcmdev > 0)
1260                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1261
1262         return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1263 }
1264
1265 static int generic_hdmi_build_controls(struct hda_codec *codec)
1266 {
1267         struct hdmi_spec *spec = codec->spec;
1268         int err;
1269         int pin_idx;
1270
1271         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1272                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1273
1274                 err = generic_hdmi_build_jack(codec, pin_idx);
1275                 if (err < 0)
1276                         return err;
1277
1278                 err = snd_hda_create_spdif_out_ctls(codec,
1279                                                     per_pin->pin_nid,
1280                                                     per_pin->mux_nids[0]);
1281                 if (err < 0)
1282                         return err;
1283                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1284
1285                 /* add control for ELD Bytes */
1286                 err = hdmi_create_eld_ctl(codec,
1287                                         pin_idx,
1288                                         spec->pcm_rec[pin_idx].device);
1289
1290                 if (err < 0)
1291                         return err;
1292
1293                 hdmi_present_sense(per_pin, 0);
1294         }
1295
1296         return 0;
1297 }
1298
1299 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
1300 {
1301         struct hdmi_spec *spec = codec->spec;
1302         int pin_idx;
1303
1304         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1305                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1306                 struct hdmi_eld *eld = &per_pin->sink_eld;
1307
1308                 per_pin->codec = codec;
1309                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1310                 snd_hda_eld_proc_new(codec, eld, pin_idx);
1311         }
1312         return 0;
1313 }
1314
1315 static int generic_hdmi_init(struct hda_codec *codec)
1316 {
1317         struct hdmi_spec *spec = codec->spec;
1318         int pin_idx;
1319
1320         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1321                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1322                 hda_nid_t pin_nid = per_pin->pin_nid;
1323
1324                 hdmi_init_pin(codec, pin_nid);
1325                 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1326         }
1327         return 0;
1328 }
1329
1330 static void generic_hdmi_free(struct hda_codec *codec)
1331 {
1332         struct hdmi_spec *spec = codec->spec;
1333         int pin_idx;
1334
1335         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1336                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1337                 struct hdmi_eld *eld = &per_pin->sink_eld;
1338
1339                 cancel_delayed_work(&per_pin->work);
1340                 snd_hda_eld_proc_free(codec, eld);
1341         }
1342
1343         flush_workqueue(codec->bus->workq);
1344         kfree(spec);
1345 }
1346
1347 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1348         .init                   = generic_hdmi_init,
1349         .free                   = generic_hdmi_free,
1350         .build_pcms             = generic_hdmi_build_pcms,
1351         .build_controls         = generic_hdmi_build_controls,
1352         .unsol_event            = hdmi_unsol_event,
1353 };
1354
1355 static int patch_generic_hdmi(struct hda_codec *codec)
1356 {
1357         struct hdmi_spec *spec;
1358
1359         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1360         if (spec == NULL)
1361                 return -ENOMEM;
1362
1363         codec->spec = spec;
1364         if (hdmi_parse_codec(codec) < 0) {
1365                 codec->spec = NULL;
1366                 kfree(spec);
1367                 return -EINVAL;
1368         }
1369         codec->patch_ops = generic_hdmi_patch_ops;
1370         generic_hdmi_init_per_pins(codec);
1371
1372         init_channel_allocations();
1373
1374         return 0;
1375 }
1376
1377 /*
1378  * Shared non-generic implementations
1379  */
1380
1381 static int simple_playback_build_pcms(struct hda_codec *codec)
1382 {
1383         struct hdmi_spec *spec = codec->spec;
1384         struct hda_pcm *info = spec->pcm_rec;
1385         unsigned int chans;
1386         struct hda_pcm_stream *pstr;
1387
1388         codec->num_pcms = 1;
1389         codec->pcm_info = info;
1390
1391         chans = get_wcaps(codec, spec->cvts[0].cvt_nid);
1392         chans = get_wcaps_channels(chans);
1393
1394         info->name = get_hdmi_pcm_name(0);
1395         info->pcm_type = HDA_PCM_TYPE_HDMI;
1396         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1397         *pstr = spec->pcm_playback;
1398         pstr->nid = spec->cvts[0].cvt_nid;
1399         if (pstr->channels_max <= 2 && chans && chans <= 16)
1400                 pstr->channels_max = chans;
1401
1402         return 0;
1403 }
1404
1405 /* unsolicited event for jack sensing */
1406 static void simple_hdmi_unsol_event(struct hda_codec *codec,
1407                                     unsigned int res)
1408 {
1409         snd_hda_jack_set_dirty_all(codec);
1410         snd_hda_jack_report_sync(codec);
1411 }
1412
1413 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
1414  * as long as spec->pins[] is set correctly
1415  */
1416 #define simple_hdmi_build_jack  generic_hdmi_build_jack
1417
1418 static int simple_playback_build_controls(struct hda_codec *codec)
1419 {
1420         struct hdmi_spec *spec = codec->spec;
1421         int err;
1422
1423         err = snd_hda_create_spdif_out_ctls(codec,
1424                                             spec->cvts[0].cvt_nid,
1425                                             spec->cvts[0].cvt_nid);
1426         if (err < 0)
1427                 return err;
1428         return simple_hdmi_build_jack(codec, 0);
1429 }
1430
1431 static int simple_playback_init(struct hda_codec *codec)
1432 {
1433         struct hdmi_spec *spec = codec->spec;
1434         hda_nid_t pin = spec->pins[0].pin_nid;
1435
1436         snd_hda_codec_write(codec, pin, 0,
1437                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
1438         /* some codecs require to unmute the pin */
1439         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
1440                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
1441                                     AMP_OUT_UNMUTE);
1442         snd_hda_jack_detect_enable(codec, pin, pin);
1443         return 0;
1444 }
1445
1446 static void simple_playback_free(struct hda_codec *codec)
1447 {
1448         struct hdmi_spec *spec = codec->spec;
1449
1450         kfree(spec);
1451 }
1452
1453 /*
1454  * Nvidia specific implementations
1455  */
1456
1457 #define Nv_VERB_SET_Channel_Allocation          0xF79
1458 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
1459 #define Nv_VERB_SET_Audio_Protection_On         0xF98
1460 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
1461
1462 #define nvhdmi_master_con_nid_7x        0x04
1463 #define nvhdmi_master_pin_nid_7x        0x05
1464
1465 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
1466         /*front, rear, clfe, rear_surr */
1467         0x6, 0x8, 0xa, 0xc,
1468 };
1469
1470 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
1471         /* set audio protect on */
1472         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1473         /* enable digital output on pin widget */
1474         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1475         {} /* terminator */
1476 };
1477
1478 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
1479         /* set audio protect on */
1480         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1481         /* enable digital output on pin widget */
1482         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1483         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1484         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1485         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1486         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1487         {} /* terminator */
1488 };
1489
1490 #ifdef LIMITED_RATE_FMT_SUPPORT
1491 /* support only the safe format and rate */
1492 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
1493 #define SUPPORTED_MAXBPS        16
1494 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
1495 #else
1496 /* support all rates and formats */
1497 #define SUPPORTED_RATES \
1498         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1499         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1500          SNDRV_PCM_RATE_192000)
1501 #define SUPPORTED_MAXBPS        24
1502 #define SUPPORTED_FORMATS \
1503         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1504 #endif
1505
1506 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
1507 {
1508         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
1509         return 0;
1510 }
1511
1512 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
1513 {
1514         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
1515         return 0;
1516 }
1517
1518 static unsigned int channels_2_6_8[] = {
1519         2, 6, 8
1520 };
1521
1522 static unsigned int channels_2_8[] = {
1523         2, 8
1524 };
1525
1526 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1527         .count = ARRAY_SIZE(channels_2_6_8),
1528         .list = channels_2_6_8,
1529         .mask = 0,
1530 };
1531
1532 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1533         .count = ARRAY_SIZE(channels_2_8),
1534         .list = channels_2_8,
1535         .mask = 0,
1536 };
1537
1538 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1539                                     struct hda_codec *codec,
1540                                     struct snd_pcm_substream *substream)
1541 {
1542         struct hdmi_spec *spec = codec->spec;
1543         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1544
1545         switch (codec->preset->id) {
1546         case 0x10de0002:
1547         case 0x10de0003:
1548         case 0x10de0005:
1549         case 0x10de0006:
1550                 hw_constraints_channels = &hw_constraints_2_8_channels;
1551                 break;
1552         case 0x10de0007:
1553                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1554                 break;
1555         default:
1556                 break;
1557         }
1558
1559         if (hw_constraints_channels != NULL) {
1560                 snd_pcm_hw_constraint_list(substream->runtime, 0,
1561                                 SNDRV_PCM_HW_PARAM_CHANNELS,
1562                                 hw_constraints_channels);
1563         } else {
1564                 snd_pcm_hw_constraint_step(substream->runtime, 0,
1565                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1566         }
1567
1568         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1569 }
1570
1571 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1572                                      struct hda_codec *codec,
1573                                      struct snd_pcm_substream *substream)
1574 {
1575         struct hdmi_spec *spec = codec->spec;
1576         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1577 }
1578
1579 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1580                                        struct hda_codec *codec,
1581                                        unsigned int stream_tag,
1582                                        unsigned int format,
1583                                        struct snd_pcm_substream *substream)
1584 {
1585         struct hdmi_spec *spec = codec->spec;
1586         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1587                                              stream_tag, format, substream);
1588 }
1589
1590 static const struct hda_pcm_stream simple_pcm_playback = {
1591         .substreams = 1,
1592         .channels_min = 2,
1593         .channels_max = 2,
1594         .ops = {
1595                 .open = simple_playback_pcm_open,
1596                 .close = simple_playback_pcm_close,
1597                 .prepare = simple_playback_pcm_prepare
1598         },
1599 };
1600
1601 static const struct hda_codec_ops simple_hdmi_patch_ops = {
1602         .build_controls = simple_playback_build_controls,
1603         .build_pcms = simple_playback_build_pcms,
1604         .init = simple_playback_init,
1605         .free = simple_playback_free,
1606         .unsol_event = simple_hdmi_unsol_event,
1607 };
1608
1609 static int patch_simple_hdmi(struct hda_codec *codec,
1610                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
1611 {
1612         struct hdmi_spec *spec;
1613
1614         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1615         if (!spec)
1616                 return -ENOMEM;
1617
1618         codec->spec = spec;
1619
1620         spec->multiout.num_dacs = 0;  /* no analog */
1621         spec->multiout.max_channels = 2;
1622         spec->multiout.dig_out_nid = cvt_nid;
1623         spec->num_cvts = 1;
1624         spec->num_pins = 1;
1625         spec->cvts[0].cvt_nid = cvt_nid;
1626         spec->pins[0].pin_nid = pin_nid;
1627         spec->pcm_playback = simple_pcm_playback;
1628
1629         codec->patch_ops = simple_hdmi_patch_ops;
1630
1631         return 0;
1632 }
1633
1634 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
1635                                                     int channels)
1636 {
1637         unsigned int chanmask;
1638         int chan = channels ? (channels - 1) : 1;
1639
1640         switch (channels) {
1641         default:
1642         case 0:
1643         case 2:
1644                 chanmask = 0x00;
1645                 break;
1646         case 4:
1647                 chanmask = 0x08;
1648                 break;
1649         case 6:
1650                 chanmask = 0x0b;
1651                 break;
1652         case 8:
1653                 chanmask = 0x13;
1654                 break;
1655         }
1656
1657         /* Set the audio infoframe channel allocation and checksum fields.  The
1658          * channel count is computed implicitly by the hardware. */
1659         snd_hda_codec_write(codec, 0x1, 0,
1660                         Nv_VERB_SET_Channel_Allocation, chanmask);
1661
1662         snd_hda_codec_write(codec, 0x1, 0,
1663                         Nv_VERB_SET_Info_Frame_Checksum,
1664                         (0x71 - chan - chanmask));
1665 }
1666
1667 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
1668                                    struct hda_codec *codec,
1669                                    struct snd_pcm_substream *substream)
1670 {
1671         struct hdmi_spec *spec = codec->spec;
1672         int i;
1673
1674         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
1675                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
1676         for (i = 0; i < 4; i++) {
1677                 /* set the stream id */
1678                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1679                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
1680                 /* set the stream format */
1681                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1682                                 AC_VERB_SET_STREAM_FORMAT, 0);
1683         }
1684
1685         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
1686          * streams are disabled. */
1687         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1688
1689         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1690 }
1691
1692 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
1693                                      struct hda_codec *codec,
1694                                      unsigned int stream_tag,
1695                                      unsigned int format,
1696                                      struct snd_pcm_substream *substream)
1697 {
1698         int chs;
1699         unsigned int dataDCC2, channel_id;
1700         int i;
1701         struct hdmi_spec *spec = codec->spec;
1702         struct hda_spdif_out *spdif;
1703
1704         mutex_lock(&codec->spdif_mutex);
1705         spdif = snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
1706
1707         chs = substream->runtime->channels;
1708
1709         dataDCC2 = 0x2;
1710
1711         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
1712         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
1713                 snd_hda_codec_write(codec,
1714                                 nvhdmi_master_con_nid_7x,
1715                                 0,
1716                                 AC_VERB_SET_DIGI_CONVERT_1,
1717                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1718
1719         /* set the stream id */
1720         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1721                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
1722
1723         /* set the stream format */
1724         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1725                         AC_VERB_SET_STREAM_FORMAT, format);
1726
1727         /* turn on again (if needed) */
1728         /* enable and set the channel status audio/data flag */
1729         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
1730                 snd_hda_codec_write(codec,
1731                                 nvhdmi_master_con_nid_7x,
1732                                 0,
1733                                 AC_VERB_SET_DIGI_CONVERT_1,
1734                                 spdif->ctls & 0xff);
1735                 snd_hda_codec_write(codec,
1736                                 nvhdmi_master_con_nid_7x,
1737                                 0,
1738                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1739         }
1740
1741         for (i = 0; i < 4; i++) {
1742                 if (chs == 2)
1743                         channel_id = 0;
1744                 else
1745                         channel_id = i * 2;
1746
1747                 /* turn off SPDIF once;
1748                  *otherwise the IEC958 bits won't be updated
1749                  */
1750                 if (codec->spdif_status_reset &&
1751                 (spdif->ctls & AC_DIG1_ENABLE))
1752                         snd_hda_codec_write(codec,
1753                                 nvhdmi_con_nids_7x[i],
1754                                 0,
1755                                 AC_VERB_SET_DIGI_CONVERT_1,
1756                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1757                 /* set the stream id */
1758                 snd_hda_codec_write(codec,
1759                                 nvhdmi_con_nids_7x[i],
1760                                 0,
1761                                 AC_VERB_SET_CHANNEL_STREAMID,
1762                                 (stream_tag << 4) | channel_id);
1763                 /* set the stream format */
1764                 snd_hda_codec_write(codec,
1765                                 nvhdmi_con_nids_7x[i],
1766                                 0,
1767                                 AC_VERB_SET_STREAM_FORMAT,
1768                                 format);
1769                 /* turn on again (if needed) */
1770                 /* enable and set the channel status audio/data flag */
1771                 if (codec->spdif_status_reset &&
1772                 (spdif->ctls & AC_DIG1_ENABLE)) {
1773                         snd_hda_codec_write(codec,
1774                                         nvhdmi_con_nids_7x[i],
1775                                         0,
1776                                         AC_VERB_SET_DIGI_CONVERT_1,
1777                                         spdif->ctls & 0xff);
1778                         snd_hda_codec_write(codec,
1779                                         nvhdmi_con_nids_7x[i],
1780                                         0,
1781                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1782                 }
1783         }
1784
1785         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
1786
1787         mutex_unlock(&codec->spdif_mutex);
1788         return 0;
1789 }
1790
1791 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
1792         .substreams = 1,
1793         .channels_min = 2,
1794         .channels_max = 8,
1795         .nid = nvhdmi_master_con_nid_7x,
1796         .rates = SUPPORTED_RATES,
1797         .maxbps = SUPPORTED_MAXBPS,
1798         .formats = SUPPORTED_FORMATS,
1799         .ops = {
1800                 .open = simple_playback_pcm_open,
1801                 .close = nvhdmi_8ch_7x_pcm_close,
1802                 .prepare = nvhdmi_8ch_7x_pcm_prepare
1803         },
1804 };
1805
1806 static int patch_nvhdmi_2ch(struct hda_codec *codec)
1807 {
1808         struct hdmi_spec *spec;
1809         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
1810                                     nvhdmi_master_pin_nid_7x);
1811         if (err < 0)
1812                 return err;
1813
1814         codec->patch_ops.init = nvhdmi_7x_init_2ch;
1815         /* override the PCM rates, etc, as the codec doesn't give full list */
1816         spec = codec->spec;
1817         spec->pcm_playback.rates = SUPPORTED_RATES;
1818         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
1819         spec->pcm_playback.formats = SUPPORTED_FORMATS;
1820         return 0;
1821 }
1822
1823 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
1824 {
1825         struct hdmi_spec *spec;
1826         int err = patch_nvhdmi_2ch(codec);
1827         if (err < 0)
1828                 return err;
1829         spec = codec->spec;
1830         spec->multiout.max_channels = 8;
1831         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
1832         codec->patch_ops.init = nvhdmi_7x_init_8ch;
1833
1834         /* Initialize the audio infoframe channel mask and checksum to something
1835          * valid */
1836         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1837
1838         return 0;
1839 }
1840
1841 /*
1842  * ATI-specific implementations
1843  *
1844  * FIXME: we may omit the whole this and use the generic code once after
1845  * it's confirmed to work.
1846  */
1847
1848 #define ATIHDMI_CVT_NID         0x02    /* audio converter */
1849 #define ATIHDMI_PIN_NID         0x03    /* HDMI output pin */
1850
1851 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1852                                         struct hda_codec *codec,
1853                                         unsigned int stream_tag,
1854                                         unsigned int format,
1855                                         struct snd_pcm_substream *substream)
1856 {
1857         struct hdmi_spec *spec = codec->spec;
1858         int chans = substream->runtime->channels;
1859         int i, err;
1860
1861         err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
1862                                           substream);
1863         if (err < 0)
1864                 return err;
1865         snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1866                             AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
1867         /* FIXME: XXX */
1868         for (i = 0; i < chans; i++) {
1869                 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1870                                     AC_VERB_SET_HDMI_CHAN_SLOT,
1871                                     (i << 4) | i);
1872         }
1873         return 0;
1874 }
1875
1876 static int patch_atihdmi(struct hda_codec *codec)
1877 {
1878         struct hdmi_spec *spec;
1879         int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
1880         if (err < 0)
1881                 return err;
1882         spec = codec->spec;
1883         spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
1884         return 0;
1885 }
1886
1887 /* VIA HDMI Implementation */
1888 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
1889 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
1890
1891 static int patch_via_hdmi(struct hda_codec *codec)
1892 {
1893         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
1894 }
1895
1896 /*
1897  * patch entries
1898  */
1899 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
1900 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1901 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1902 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
1903 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_generic_hdmi },
1904 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
1905 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
1906 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
1907 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1908 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1909 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1910 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1911 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
1912 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_generic_hdmi },
1913 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_generic_hdmi },
1914 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_generic_hdmi },
1915 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_generic_hdmi },
1916 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_generic_hdmi },
1917 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_generic_hdmi },
1918 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_generic_hdmi },
1919 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_generic_hdmi },
1920 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_generic_hdmi },
1921 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_generic_hdmi },
1922 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_generic_hdmi },
1923 /* 17 is known to be absent */
1924 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_generic_hdmi },
1925 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_generic_hdmi },
1926 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_generic_hdmi },
1927 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_generic_hdmi },
1928 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_generic_hdmi },
1929 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_generic_hdmi },
1930 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_generic_hdmi },
1931 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_generic_hdmi },
1932 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_generic_hdmi },
1933 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_generic_hdmi },
1934 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP",   .patch = patch_generic_hdmi },
1935 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
1936 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
1937 { .id = 0x11069f80, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
1938 { .id = 0x11069f81, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
1939 { .id = 0x11069f84, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
1940 { .id = 0x11069f85, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
1941 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1942 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
1943 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
1944 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
1945 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1946 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
1947 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
1948 { .id = 0x80862807, .name = "Haswell HDMI",     .patch = patch_generic_hdmi },
1949 { .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
1950 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
1951 {} /* terminator */
1952 };
1953
1954 MODULE_ALIAS("snd-hda-codec-id:1002793c");
1955 MODULE_ALIAS("snd-hda-codec-id:10027919");
1956 MODULE_ALIAS("snd-hda-codec-id:1002791a");
1957 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
1958 MODULE_ALIAS("snd-hda-codec-id:10951390");
1959 MODULE_ALIAS("snd-hda-codec-id:10951392");
1960 MODULE_ALIAS("snd-hda-codec-id:10de0002");
1961 MODULE_ALIAS("snd-hda-codec-id:10de0003");
1962 MODULE_ALIAS("snd-hda-codec-id:10de0005");
1963 MODULE_ALIAS("snd-hda-codec-id:10de0006");
1964 MODULE_ALIAS("snd-hda-codec-id:10de0007");
1965 MODULE_ALIAS("snd-hda-codec-id:10de000a");
1966 MODULE_ALIAS("snd-hda-codec-id:10de000b");
1967 MODULE_ALIAS("snd-hda-codec-id:10de000c");
1968 MODULE_ALIAS("snd-hda-codec-id:10de000d");
1969 MODULE_ALIAS("snd-hda-codec-id:10de0010");
1970 MODULE_ALIAS("snd-hda-codec-id:10de0011");
1971 MODULE_ALIAS("snd-hda-codec-id:10de0012");
1972 MODULE_ALIAS("snd-hda-codec-id:10de0013");
1973 MODULE_ALIAS("snd-hda-codec-id:10de0014");
1974 MODULE_ALIAS("snd-hda-codec-id:10de0015");
1975 MODULE_ALIAS("snd-hda-codec-id:10de0016");
1976 MODULE_ALIAS("snd-hda-codec-id:10de0018");
1977 MODULE_ALIAS("snd-hda-codec-id:10de0019");
1978 MODULE_ALIAS("snd-hda-codec-id:10de001a");
1979 MODULE_ALIAS("snd-hda-codec-id:10de001b");
1980 MODULE_ALIAS("snd-hda-codec-id:10de001c");
1981 MODULE_ALIAS("snd-hda-codec-id:10de0040");
1982 MODULE_ALIAS("snd-hda-codec-id:10de0041");
1983 MODULE_ALIAS("snd-hda-codec-id:10de0042");
1984 MODULE_ALIAS("snd-hda-codec-id:10de0043");
1985 MODULE_ALIAS("snd-hda-codec-id:10de0044");
1986 MODULE_ALIAS("snd-hda-codec-id:10de0051");
1987 MODULE_ALIAS("snd-hda-codec-id:10de0067");
1988 MODULE_ALIAS("snd-hda-codec-id:10de8001");
1989 MODULE_ALIAS("snd-hda-codec-id:11069f80");
1990 MODULE_ALIAS("snd-hda-codec-id:11069f81");
1991 MODULE_ALIAS("snd-hda-codec-id:11069f84");
1992 MODULE_ALIAS("snd-hda-codec-id:11069f85");
1993 MODULE_ALIAS("snd-hda-codec-id:17e80047");
1994 MODULE_ALIAS("snd-hda-codec-id:80860054");
1995 MODULE_ALIAS("snd-hda-codec-id:80862801");
1996 MODULE_ALIAS("snd-hda-codec-id:80862802");
1997 MODULE_ALIAS("snd-hda-codec-id:80862803");
1998 MODULE_ALIAS("snd-hda-codec-id:80862804");
1999 MODULE_ALIAS("snd-hda-codec-id:80862805");
2000 MODULE_ALIAS("snd-hda-codec-id:80862806");
2001 MODULE_ALIAS("snd-hda-codec-id:80862807");
2002 MODULE_ALIAS("snd-hda-codec-id:80862880");
2003 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2004
2005 MODULE_LICENSE("GPL");
2006 MODULE_DESCRIPTION("HDMI HD-audio codec");
2007 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2008 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2009 MODULE_ALIAS("snd-hda-codec-atihdmi");
2010
2011 static struct hda_codec_preset_list intel_list = {
2012         .preset = snd_hda_preset_hdmi,
2013         .owner = THIS_MODULE,
2014 };
2015
2016 static int __init patch_hdmi_init(void)
2017 {
2018         return snd_hda_add_codec_preset(&intel_list);
2019 }
2020
2021 static void __exit patch_hdmi_exit(void)
2022 {
2023         snd_hda_delete_codec_preset(&intel_list);
2024 }
2025
2026 module_init(patch_hdmi_init)
2027 module_exit(patch_hdmi_exit)