3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
11 * Wu Fengguang <wfg@linux.intel.com>
14 * Wu Fengguang <wfg@linux.intel.com>
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the Free
18 * Software Foundation; either version 2 of the License, or (at your option)
21 * This program is distributed in the hope that it will be useful, but
22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software Foundation,
28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include <sound/asoundef.h>
38 #include <sound/tlv.h>
39 #include "hda_codec.h"
40 #include "hda_local.h"
43 static bool static_hdmi_pcm;
44 module_param(static_hdmi_pcm, bool, 0644);
45 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
47 struct hdmi_spec_per_cvt {
50 unsigned int channels_min;
51 unsigned int channels_max;
57 /* max. connections to a widget */
58 #define HDA_MAX_CONNECTIONS 32
60 struct hdmi_spec_per_pin {
63 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
65 struct hda_codec *codec;
66 struct hdmi_eld sink_eld;
67 struct delayed_work work;
68 struct snd_kcontrol *eld_ctl;
70 bool setup; /* the stream has been set up by prepare callback */
71 int channels; /* current number of channels */
73 bool chmap_set; /* channel-map override by ALSA API? */
74 unsigned char chmap[8]; /* ALSA API channel-map */
75 char pcm_name[8]; /* filled in build_pcm callbacks */
80 struct snd_array cvts; /* struct hdmi_spec_per_cvt */
81 hda_nid_t cvt_nids[4]; /* only for haswell fix */
84 struct snd_array pins; /* struct hdmi_spec_per_pin */
85 struct snd_array pcm_rec; /* struct hda_pcm */
86 unsigned int channels_max; /* max over all cvts */
88 struct hdmi_eld temp_eld;
90 * Non-generic ATI/NVIDIA specific
92 struct hda_multi_out multiout;
93 struct hda_pcm_stream pcm_playback;
97 struct hdmi_audio_infoframe {
104 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
108 u8 LFEPBL01_LSV36_DM_INH7;
111 struct dp_audio_infoframe {
114 u8 ver; /* 0x11 << 2 */
116 u8 CC02_CT47; /* match with HDMI infoframe from this on */
120 u8 LFEPBL01_LSV36_DM_INH7;
123 union audio_infoframe {
124 struct hdmi_audio_infoframe hdmi;
125 struct dp_audio_infoframe dp;
130 * CEA speaker placement:
133 * FLW FL FLC FC FRC FR FRW
140 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
141 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
143 enum cea_speaker_placement {
144 FL = (1 << 0), /* Front Left */
145 FC = (1 << 1), /* Front Center */
146 FR = (1 << 2), /* Front Right */
147 FLC = (1 << 3), /* Front Left Center */
148 FRC = (1 << 4), /* Front Right Center */
149 RL = (1 << 5), /* Rear Left */
150 RC = (1 << 6), /* Rear Center */
151 RR = (1 << 7), /* Rear Right */
152 RLC = (1 << 8), /* Rear Left Center */
153 RRC = (1 << 9), /* Rear Right Center */
154 LFE = (1 << 10), /* Low Frequency Effect */
155 FLW = (1 << 11), /* Front Left Wide */
156 FRW = (1 << 12), /* Front Right Wide */
157 FLH = (1 << 13), /* Front Left High */
158 FCH = (1 << 14), /* Front Center High */
159 FRH = (1 << 15), /* Front Right High */
160 TC = (1 << 16), /* Top Center */
164 * ELD SA bits in the CEA Speaker Allocation data block
166 static int eld_speaker_allocation_bits[] = {
174 /* the following are not defined in ELD yet */
181 struct cea_channel_speaker_allocation {
185 /* derived values, just for convenience */
193 * surround40 surround41 surround50 surround51 surround71
194 * ch0 front left = = = =
195 * ch1 front right = = = =
196 * ch2 rear left = = = =
197 * ch3 rear right = = = =
198 * ch4 LFE center center center
203 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
205 static int hdmi_channel_mapping[0x32][8] = {
207 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
209 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
211 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
213 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
215 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
217 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
219 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
221 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
223 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
227 * This is an ordered list!
229 * The preceding ones have better chances to be selected by
230 * hdmi_channel_allocation().
232 static struct cea_channel_speaker_allocation channel_allocations[] = {
233 /* channel: 7 6 5 4 3 2 1 0 */
234 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
236 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
238 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
240 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
242 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
244 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
246 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
248 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
250 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
252 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
253 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
254 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
255 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
256 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
257 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
258 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
259 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
260 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
261 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
262 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
263 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
264 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
265 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
266 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
267 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
268 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
269 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
270 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
271 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
272 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
273 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
274 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
275 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
276 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
277 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
278 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
279 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
280 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
281 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
282 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
283 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
284 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
285 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
286 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
287 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
288 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
289 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
290 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
291 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
292 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
300 #define get_pin(spec, idx) \
301 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
302 #define get_cvt(spec, idx) \
303 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
304 #define get_pcm_rec(spec, idx) \
305 ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
307 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
311 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
312 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
315 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
319 static int hinfo_to_pin_index(struct hdmi_spec *spec,
320 struct hda_pcm_stream *hinfo)
324 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
325 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
328 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
332 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
336 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
337 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
340 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
344 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
345 struct snd_ctl_elem_info *uinfo)
347 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
348 struct hdmi_spec *spec = codec->spec;
349 struct hdmi_eld *eld;
352 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
354 pin_idx = kcontrol->private_value;
355 eld = &get_pin(spec, pin_idx)->sink_eld;
357 mutex_lock(&eld->lock);
358 uinfo->count = eld->eld_valid ? eld->eld_size : 0;
359 mutex_unlock(&eld->lock);
364 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
365 struct snd_ctl_elem_value *ucontrol)
367 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
368 struct hdmi_spec *spec = codec->spec;
369 struct hdmi_eld *eld;
372 pin_idx = kcontrol->private_value;
373 eld = &get_pin(spec, pin_idx)->sink_eld;
375 mutex_lock(&eld->lock);
376 if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
377 mutex_unlock(&eld->lock);
382 memset(ucontrol->value.bytes.data, 0,
383 ARRAY_SIZE(ucontrol->value.bytes.data));
385 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
387 mutex_unlock(&eld->lock);
392 static struct snd_kcontrol_new eld_bytes_ctl = {
393 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
394 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
396 .info = hdmi_eld_ctl_info,
397 .get = hdmi_eld_ctl_get,
400 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
403 struct snd_kcontrol *kctl;
404 struct hdmi_spec *spec = codec->spec;
407 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
410 kctl->private_value = pin_idx;
411 kctl->id.device = device;
413 err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
417 get_pin(spec, pin_idx)->eld_ctl = kctl;
422 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
423 int *packet_index, int *byte_index)
427 val = snd_hda_codec_read(codec, pin_nid, 0,
428 AC_VERB_GET_HDMI_DIP_INDEX, 0);
430 *packet_index = val >> 5;
431 *byte_index = val & 0x1f;
435 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
436 int packet_index, int byte_index)
440 val = (packet_index << 5) | (byte_index & 0x1f);
442 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
445 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
448 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
451 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
454 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
455 snd_hda_codec_write(codec, pin_nid, 0,
456 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
457 /* Enable pin out: some machines with GM965 gets broken output when
458 * the pin is disabled or changed while using with HDMI
460 snd_hda_codec_write(codec, pin_nid, 0,
461 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
464 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
466 return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
467 AC_VERB_GET_CVT_CHAN_COUNT, 0);
470 static void hdmi_set_channel_count(struct hda_codec *codec,
471 hda_nid_t cvt_nid, int chs)
473 if (chs != hdmi_get_channel_count(codec, cvt_nid))
474 snd_hda_codec_write(codec, cvt_nid, 0,
475 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
480 * Channel mapping routines
484 * Compute derived values in channel_allocations[].
486 static void init_channel_allocations(void)
489 struct cea_channel_speaker_allocation *p;
491 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
492 p = channel_allocations + i;
495 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
496 if (p->speakers[j]) {
498 p->spk_mask |= p->speakers[j];
503 static int get_channel_allocation_order(int ca)
507 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
508 if (channel_allocations[i].ca_index == ca)
515 * The transformation takes two steps:
517 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
518 * spk_mask => (channel_allocations[]) => ai->CA
520 * TODO: it could select the wrong CA from multiple candidates.
522 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
527 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
530 * CA defaults to 0 for basic stereo audio
536 * expand ELD's speaker allocation mask
538 * ELD tells the speaker mask in a compact(paired) form,
539 * expand ELD's notions to match the ones used by Audio InfoFrame.
541 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
542 if (eld->info.spk_alloc & (1 << i))
543 spk_mask |= eld_speaker_allocation_bits[i];
546 /* search for the first working match in the CA table */
547 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
548 if (channels == channel_allocations[i].channels &&
549 (spk_mask & channel_allocations[i].spk_mask) ==
550 channel_allocations[i].spk_mask) {
551 ca = channel_allocations[i].ca_index;
556 snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
557 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
563 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
566 #ifdef CONFIG_SND_DEBUG_VERBOSE
570 for (i = 0; i < 8; i++) {
571 slot = snd_hda_codec_read(codec, pin_nid, 0,
572 AC_VERB_GET_HDMI_CHAN_SLOT, i);
573 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
574 slot >> 4, slot & 0xf);
580 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
588 int non_pcm_mapping[8];
590 order = get_channel_allocation_order(ca);
592 if (hdmi_channel_mapping[ca][1] == 0) {
593 for (i = 0; i < channel_allocations[order].channels; i++)
594 hdmi_channel_mapping[ca][i] = i | (i << 4);
596 hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
600 for (i = 0; i < channel_allocations[order].channels; i++)
601 non_pcm_mapping[i] = i | (i << 4);
603 non_pcm_mapping[i] = 0xf | (i << 4);
606 for (i = 0; i < 8; i++) {
607 err = snd_hda_codec_write(codec, pin_nid, 0,
608 AC_VERB_SET_HDMI_CHAN_SLOT,
609 non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
611 snd_printdd(KERN_NOTICE
612 "HDMI: channel mapping failed\n");
617 hdmi_debug_channel_mapping(codec, pin_nid);
620 struct channel_map_table {
621 unsigned char map; /* ALSA API channel map position */
622 unsigned char cea_slot; /* CEA slot value */
623 int spk_mask; /* speaker position bit mask */
626 static struct channel_map_table map_tables[] = {
627 { SNDRV_CHMAP_FL, 0x00, FL },
628 { SNDRV_CHMAP_FR, 0x01, FR },
629 { SNDRV_CHMAP_RL, 0x04, RL },
630 { SNDRV_CHMAP_RR, 0x05, RR },
631 { SNDRV_CHMAP_LFE, 0x02, LFE },
632 { SNDRV_CHMAP_FC, 0x03, FC },
633 { SNDRV_CHMAP_RLC, 0x06, RLC },
634 { SNDRV_CHMAP_RRC, 0x07, RRC },
638 /* from ALSA API channel position to speaker bit mask */
639 static int to_spk_mask(unsigned char c)
641 struct channel_map_table *t = map_tables;
642 for (; t->map; t++) {
649 /* from ALSA API channel position to CEA slot */
650 static int to_cea_slot(unsigned char c)
652 struct channel_map_table *t = map_tables;
653 for (; t->map; t++) {
660 /* from CEA slot to ALSA API channel position */
661 static int from_cea_slot(unsigned char c)
663 struct channel_map_table *t = map_tables;
664 for (; t->map; t++) {
665 if (t->cea_slot == c)
671 /* from speaker bit mask to ALSA API channel position */
672 static int spk_to_chmap(int spk)
674 struct channel_map_table *t = map_tables;
675 for (; t->map; t++) {
676 if (t->spk_mask == spk)
682 /* get the CA index corresponding to the given ALSA API channel map */
683 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
685 int i, spks = 0, spk_mask = 0;
687 for (i = 0; i < chs; i++) {
688 int mask = to_spk_mask(map[i]);
695 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
696 if ((chs == channel_allocations[i].channels ||
697 spks == channel_allocations[i].channels) &&
698 (spk_mask & channel_allocations[i].spk_mask) ==
699 channel_allocations[i].spk_mask)
700 return channel_allocations[i].ca_index;
705 /* set up the channel slots for the given ALSA API channel map */
706 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
708 int chs, unsigned char *map)
711 for (i = 0; i < 8; i++) {
714 val = to_cea_slot(map[i]);
718 err = snd_hda_codec_write(codec, pin_nid, 0,
719 AC_VERB_SET_HDMI_CHAN_SLOT, val);
726 /* store ALSA API channel map from the current default map */
727 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
730 for (i = 0; i < 8; i++) {
731 if (i < channel_allocations[ca].channels)
732 map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
738 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
739 hda_nid_t pin_nid, bool non_pcm, int ca,
740 int channels, unsigned char *map,
743 if (!non_pcm && chmap_set) {
744 hdmi_manual_setup_channel_mapping(codec, pin_nid,
747 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
748 hdmi_setup_fake_chmap(map, ca);
753 * Audio InfoFrame routines
757 * Enable Audio InfoFrame Transmission
759 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
762 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
763 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
768 * Disable Audio InfoFrame Transmission
770 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
773 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
774 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
778 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
780 #ifdef CONFIG_SND_DEBUG_VERBOSE
784 size = snd_hdmi_get_eld_size(codec, pin_nid);
785 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
787 for (i = 0; i < 8; i++) {
788 size = snd_hda_codec_read(codec, pin_nid, 0,
789 AC_VERB_GET_HDMI_DIP_SIZE, i);
790 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
795 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
801 for (i = 0; i < 8; i++) {
802 size = snd_hda_codec_read(codec, pin_nid, 0,
803 AC_VERB_GET_HDMI_DIP_SIZE, i);
807 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
808 for (j = 1; j < 1000; j++) {
809 hdmi_write_dip_byte(codec, pin_nid, 0x0);
810 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
812 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
814 if (bi == 0) /* byte index wrapped around */
818 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
824 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
826 u8 *bytes = (u8 *)hdmi_ai;
830 hdmi_ai->checksum = 0;
832 for (i = 0; i < sizeof(*hdmi_ai); i++)
835 hdmi_ai->checksum = -sum;
838 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
844 hdmi_debug_dip_size(codec, pin_nid);
845 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
847 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
848 for (i = 0; i < size; i++)
849 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
852 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
858 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
862 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
863 for (i = 0; i < size; i++) {
864 val = snd_hda_codec_read(codec, pin_nid, 0,
865 AC_VERB_GET_HDMI_DIP_DATA, 0);
873 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
874 struct hdmi_spec_per_pin *per_pin,
877 hda_nid_t pin_nid = per_pin->pin_nid;
878 int channels = per_pin->channels;
879 struct hdmi_eld *eld;
881 union audio_infoframe ai;
886 eld = &per_pin->sink_eld;
887 if (!eld->monitor_present)
890 if (!non_pcm && per_pin->chmap_set)
891 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
893 ca = hdmi_channel_allocation(eld, channels);
897 memset(&ai, 0, sizeof(ai));
898 if (eld->info.conn_type == 0) { /* HDMI */
899 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
901 hdmi_ai->type = 0x84;
904 hdmi_ai->CC02_CT47 = channels - 1;
906 hdmi_checksum_audio_infoframe(hdmi_ai);
907 } else if (eld->info.conn_type == 1) { /* DisplayPort */
908 struct dp_audio_infoframe *dp_ai = &ai.dp;
912 dp_ai->ver = 0x11 << 2;
913 dp_ai->CC02_CT47 = channels - 1;
916 snd_printd("HDMI: unknown connection type at pin %d\n",
922 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
923 * sizeof(*dp_ai) to avoid partial match/update problems when
924 * the user switches between HDMI/DP monitors.
926 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
928 snd_printdd("hdmi_setup_audio_infoframe: "
929 "pin=%d channels=%d\n",
932 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
933 channels, per_pin->chmap,
935 hdmi_stop_infoframe_trans(codec, pin_nid);
936 hdmi_fill_audio_infoframe(codec, pin_nid,
937 ai.bytes, sizeof(ai));
938 hdmi_start_infoframe_trans(codec, pin_nid);
940 /* For non-pcm audio switch, setup new channel mapping
942 if (per_pin->non_pcm != non_pcm)
943 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
944 channels, per_pin->chmap,
948 per_pin->non_pcm = non_pcm;
956 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
958 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
960 struct hdmi_spec *spec = codec->spec;
961 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
964 struct hda_jack_tbl *jack;
966 jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
970 jack->jack_dirty = 1;
972 _snd_printd(SND_PR_VERBOSE,
973 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
974 codec->addr, pin_nid,
975 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
977 pin_idx = pin_nid_to_pin_index(spec, pin_nid);
981 hdmi_present_sense(get_pin(spec, pin_idx), 1);
982 snd_hda_jack_report_sync(codec);
985 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
987 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
988 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
989 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
990 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
993 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1008 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1010 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1011 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1013 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1014 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
1019 hdmi_intrinsic_event(codec, res);
1021 hdmi_non_intrinsic_event(codec, res);
1024 static void haswell_verify_pin_D0(struct hda_codec *codec, hda_nid_t nid)
1026 int pwr, lamp, ramp;
1028 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1029 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1030 if (pwr != AC_PWRST_D0) {
1031 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1034 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1035 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1036 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1039 lamp = snd_hda_codec_read(codec, nid, 0,
1040 AC_VERB_GET_AMP_GAIN_MUTE,
1041 AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
1042 ramp = snd_hda_codec_read(codec, nid, 0,
1043 AC_VERB_GET_AMP_GAIN_MUTE,
1044 AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
1046 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_AMP_GAIN_MUTE,
1047 AC_AMP_SET_RIGHT | AC_AMP_SET_OUTPUT | lamp);
1049 lamp = snd_hda_codec_read(codec, nid, 0,
1050 AC_VERB_GET_AMP_GAIN_MUTE,
1051 AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
1052 ramp = snd_hda_codec_read(codec, nid, 0,
1053 AC_VERB_GET_AMP_GAIN_MUTE,
1054 AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
1055 snd_printd("Haswell HDMI audio: Mute after set on pin 0x%x: [0x%x 0x%x]\n", nid, lamp, ramp);
1063 /* HBR should be Non-PCM, 8 channels */
1064 #define is_hbr_format(format) \
1065 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1067 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1068 hda_nid_t pin_nid, u32 stream_tag, int format)
1073 if (codec->vendor_id == 0x80862807)
1074 haswell_verify_pin_D0(codec, pin_nid);
1076 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1077 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1078 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1080 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1081 if (is_hbr_format(format))
1082 new_pinctl |= AC_PINCTL_EPT_HBR;
1084 new_pinctl |= AC_PINCTL_EPT_NATIVE;
1086 snd_printdd("hdmi_setup_stream: "
1087 "NID=0x%x, %spinctl=0x%x\n",
1089 pinctl == new_pinctl ? "" : "new-",
1092 if (pinctl != new_pinctl)
1093 snd_hda_codec_write(codec, pin_nid, 0,
1094 AC_VERB_SET_PIN_WIDGET_CONTROL,
1098 if (is_hbr_format(format) && !new_pinctl) {
1099 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1103 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1110 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1111 struct hda_codec *codec,
1112 struct snd_pcm_substream *substream)
1114 struct hdmi_spec *spec = codec->spec;
1115 struct snd_pcm_runtime *runtime = substream->runtime;
1116 int pin_idx, cvt_idx, mux_idx = 0;
1117 struct hdmi_spec_per_pin *per_pin;
1118 struct hdmi_eld *eld;
1119 struct hdmi_spec_per_cvt *per_cvt = NULL;
1121 /* Validate hinfo */
1122 pin_idx = hinfo_to_pin_index(spec, hinfo);
1123 if (snd_BUG_ON(pin_idx < 0))
1125 per_pin = get_pin(spec, pin_idx);
1126 eld = &per_pin->sink_eld;
1128 /* Dynamically assign converter to stream */
1129 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1130 per_cvt = get_cvt(spec, cvt_idx);
1132 /* Must not already be assigned */
1133 if (per_cvt->assigned)
1135 /* Must be in pin's mux's list of converters */
1136 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1137 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1139 /* Not in mux list */
1140 if (mux_idx == per_pin->num_mux_nids)
1144 /* No free converters */
1145 if (cvt_idx == spec->num_cvts)
1148 /* Claim converter */
1149 per_cvt->assigned = 1;
1150 hinfo->nid = per_cvt->cvt_nid;
1152 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1153 AC_VERB_SET_CONNECT_SEL,
1155 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1157 /* Initially set the converter's capabilities */
1158 hinfo->channels_min = per_cvt->channels_min;
1159 hinfo->channels_max = per_cvt->channels_max;
1160 hinfo->rates = per_cvt->rates;
1161 hinfo->formats = per_cvt->formats;
1162 hinfo->maxbps = per_cvt->maxbps;
1164 /* Restrict capabilities by ELD if this isn't disabled */
1165 if (!static_hdmi_pcm && eld->eld_valid) {
1166 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1167 if (hinfo->channels_min > hinfo->channels_max ||
1168 !hinfo->rates || !hinfo->formats) {
1169 per_cvt->assigned = 0;
1171 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1176 /* Store the updated parameters */
1177 runtime->hw.channels_min = hinfo->channels_min;
1178 runtime->hw.channels_max = hinfo->channels_max;
1179 runtime->hw.formats = hinfo->formats;
1180 runtime->hw.rates = hinfo->rates;
1182 snd_pcm_hw_constraint_step(substream->runtime, 0,
1183 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1188 * HDA/HDMI auto parsing
1190 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1192 struct hdmi_spec *spec = codec->spec;
1193 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1194 hda_nid_t pin_nid = per_pin->pin_nid;
1196 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1197 snd_printk(KERN_WARNING
1198 "HDMI: pin %d wcaps %#x "
1199 "does not support connection list\n",
1200 pin_nid, get_wcaps(codec, pin_nid));
1204 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1206 HDA_MAX_CONNECTIONS);
1211 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1213 struct hda_codec *codec = per_pin->codec;
1214 struct hdmi_spec *spec = codec->spec;
1215 struct hdmi_eld *eld = &spec->temp_eld;
1216 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1217 hda_nid_t pin_nid = per_pin->pin_nid;
1219 * Always execute a GetPinSense verb here, even when called from
1220 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1221 * response's PD bit is not the real PD value, but indicates that
1222 * the real PD value changed. An older version of the HD-audio
1223 * specification worked this way. Hence, we just ignore the data in
1224 * the unsolicited response to avoid custom WARs.
1226 int present = snd_hda_pin_sense(codec, pin_nid);
1227 bool update_eld = false;
1228 bool eld_changed = false;
1230 pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1231 if (pin_eld->monitor_present)
1232 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
1234 eld->eld_valid = false;
1236 _snd_printd(SND_PR_VERBOSE,
1237 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1238 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1240 if (eld->eld_valid) {
1241 if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer,
1242 &eld->eld_size) < 0)
1243 eld->eld_valid = false;
1245 memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1246 if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1248 eld->eld_valid = false;
1251 if (eld->eld_valid) {
1252 snd_hdmi_show_eld(&eld->info);
1256 queue_delayed_work(codec->bus->workq,
1258 msecs_to_jiffies(300));
1263 mutex_lock(&pin_eld->lock);
1264 if (pin_eld->eld_valid && !eld->eld_valid) {
1269 bool old_eld_valid = pin_eld->eld_valid;
1270 pin_eld->eld_valid = eld->eld_valid;
1271 eld_changed = pin_eld->eld_size != eld->eld_size ||
1272 memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1273 eld->eld_size) != 0;
1275 memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1277 pin_eld->eld_size = eld->eld_size;
1278 pin_eld->info = eld->info;
1280 /* Haswell-specific workaround: re-setup when the transcoder is
1281 * changed during the stream playback
1283 if (codec->vendor_id == 0x80862807 &&
1284 eld->eld_valid && !old_eld_valid && per_pin->setup) {
1285 snd_hda_codec_write(codec, pin_nid, 0,
1286 AC_VERB_SET_AMP_GAIN_MUTE,
1288 hdmi_setup_audio_infoframe(codec, per_pin,
1292 mutex_unlock(&pin_eld->lock);
1295 snd_ctl_notify(codec->bus->card,
1296 SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1297 &per_pin->eld_ctl->id);
1300 static void hdmi_repoll_eld(struct work_struct *work)
1302 struct hdmi_spec_per_pin *per_pin =
1303 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1305 if (per_pin->repoll_count++ > 6)
1306 per_pin->repoll_count = 0;
1308 hdmi_present_sense(per_pin, per_pin->repoll_count);
1311 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1314 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1316 struct hdmi_spec *spec = codec->spec;
1317 unsigned int caps, config;
1319 struct hdmi_spec_per_pin *per_pin;
1322 caps = snd_hda_query_pin_caps(codec, pin_nid);
1323 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1326 config = snd_hda_codec_get_pincfg(codec, pin_nid);
1327 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1330 if (codec->vendor_id == 0x80862807)
1331 intel_haswell_fixup_connect_list(codec, pin_nid);
1333 pin_idx = spec->num_pins;
1334 per_pin = snd_array_new(&spec->pins);
1338 per_pin->pin_nid = pin_nid;
1339 per_pin->non_pcm = false;
1341 err = hdmi_read_pin_conn(codec, pin_idx);
1350 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1352 struct hdmi_spec *spec = codec->spec;
1353 struct hdmi_spec_per_cvt *per_cvt;
1357 chans = get_wcaps(codec, cvt_nid);
1358 chans = get_wcaps_channels(chans);
1360 per_cvt = snd_array_new(&spec->cvts);
1364 per_cvt->cvt_nid = cvt_nid;
1365 per_cvt->channels_min = 2;
1367 per_cvt->channels_max = chans;
1368 if (chans > spec->channels_max)
1369 spec->channels_max = chans;
1372 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1379 if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1380 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1386 static int hdmi_parse_codec(struct hda_codec *codec)
1391 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1392 if (!nid || nodes < 0) {
1393 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1397 for (i = 0; i < nodes; i++, nid++) {
1401 caps = get_wcaps(codec, nid);
1402 type = get_wcaps_type(caps);
1404 if (!(caps & AC_WCAP_DIGITAL))
1408 case AC_WID_AUD_OUT:
1409 hdmi_add_cvt(codec, nid);
1412 hdmi_add_pin(codec, nid);
1418 /* We're seeing some problems with unsolicited hot plug events on
1419 * PantherPoint after S3, if this is not enabled */
1420 if (codec->vendor_id == 0x80862806)
1421 codec->bus->power_keep_link_on = 1;
1423 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1424 * can be lost and presence sense verb will become inaccurate if the
1425 * HDA link is powered off at hot plug or hw initialization time.
1427 else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1429 codec->bus->power_keep_link_on = 1;
1437 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1439 struct hda_spdif_out *spdif;
1442 mutex_lock(&codec->spdif_mutex);
1443 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1444 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1445 mutex_unlock(&codec->spdif_mutex);
1454 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1455 struct hda_codec *codec,
1456 unsigned int stream_tag,
1457 unsigned int format,
1458 struct snd_pcm_substream *substream)
1460 hda_nid_t cvt_nid = hinfo->nid;
1461 struct hdmi_spec *spec = codec->spec;
1462 int pin_idx = hinfo_to_pin_index(spec, hinfo);
1463 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1464 hda_nid_t pin_nid = per_pin->pin_nid;
1467 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1468 per_pin->channels = substream->runtime->channels;
1469 per_pin->setup = true;
1471 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1473 hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1475 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1478 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1479 struct hda_codec *codec,
1480 struct snd_pcm_substream *substream)
1482 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1486 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1487 struct hda_codec *codec,
1488 struct snd_pcm_substream *substream)
1490 struct hdmi_spec *spec = codec->spec;
1491 int cvt_idx, pin_idx;
1492 struct hdmi_spec_per_cvt *per_cvt;
1493 struct hdmi_spec_per_pin *per_pin;
1496 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1497 if (snd_BUG_ON(cvt_idx < 0))
1499 per_cvt = get_cvt(spec, cvt_idx);
1501 snd_BUG_ON(!per_cvt->assigned);
1502 per_cvt->assigned = 0;
1505 pin_idx = hinfo_to_pin_index(spec, hinfo);
1506 if (snd_BUG_ON(pin_idx < 0))
1508 per_pin = get_pin(spec, pin_idx);
1510 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1511 per_pin->chmap_set = false;
1512 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1514 per_pin->setup = false;
1515 per_pin->channels = 0;
1521 static const struct hda_pcm_ops generic_ops = {
1522 .open = hdmi_pcm_open,
1523 .close = hdmi_pcm_close,
1524 .prepare = generic_hdmi_playback_pcm_prepare,
1525 .cleanup = generic_hdmi_playback_pcm_cleanup,
1529 * ALSA API channel-map control callbacks
1531 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1532 struct snd_ctl_elem_info *uinfo)
1534 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1535 struct hda_codec *codec = info->private_data;
1536 struct hdmi_spec *spec = codec->spec;
1537 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1538 uinfo->count = spec->channels_max;
1539 uinfo->value.integer.min = 0;
1540 uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1544 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1545 unsigned int size, unsigned int __user *tlv)
1547 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1548 struct hda_codec *codec = info->private_data;
1549 struct hdmi_spec *spec = codec->spec;
1550 const unsigned int valid_mask =
1551 FL | FR | RL | RR | LFE | FC | RLC | RRC;
1552 unsigned int __user *dst;
1557 if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1561 for (chs = 2; chs <= spec->channels_max; chs++) {
1563 struct cea_channel_speaker_allocation *cap;
1564 cap = channel_allocations;
1565 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1566 int chs_bytes = chs * 4;
1567 if (cap->channels != chs)
1569 if (cap->spk_mask & ~valid_mask)
1573 if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
1574 put_user(chs_bytes, dst + 1))
1579 if (size < chs_bytes)
1583 for (c = 7; c >= 0; c--) {
1584 int spk = cap->speakers[c];
1587 if (put_user(spk_to_chmap(spk), dst))
1593 if (put_user(count, tlv + 1))
1598 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1599 struct snd_ctl_elem_value *ucontrol)
1601 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1602 struct hda_codec *codec = info->private_data;
1603 struct hdmi_spec *spec = codec->spec;
1604 int pin_idx = kcontrol->private_value;
1605 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1608 for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1609 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1613 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1614 struct snd_ctl_elem_value *ucontrol)
1616 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1617 struct hda_codec *codec = info->private_data;
1618 struct hdmi_spec *spec = codec->spec;
1619 int pin_idx = kcontrol->private_value;
1620 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1621 unsigned int ctl_idx;
1622 struct snd_pcm_substream *substream;
1623 unsigned char chmap[8];
1624 int i, ca, prepared = 0;
1626 ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1627 substream = snd_pcm_chmap_substream(info, ctl_idx);
1628 if (!substream || !substream->runtime)
1629 return 0; /* just for avoiding error from alsactl restore */
1630 switch (substream->runtime->status->state) {
1631 case SNDRV_PCM_STATE_OPEN:
1632 case SNDRV_PCM_STATE_SETUP:
1634 case SNDRV_PCM_STATE_PREPARED:
1640 memset(chmap, 0, sizeof(chmap));
1641 for (i = 0; i < ARRAY_SIZE(chmap); i++)
1642 chmap[i] = ucontrol->value.integer.value[i];
1643 if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1645 ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1648 per_pin->chmap_set = true;
1649 memcpy(per_pin->chmap, chmap, sizeof(chmap));
1651 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1656 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1658 struct hdmi_spec *spec = codec->spec;
1661 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1662 struct hda_pcm *info;
1663 struct hda_pcm_stream *pstr;
1664 struct hdmi_spec_per_pin *per_pin;
1666 per_pin = get_pin(spec, pin_idx);
1667 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
1668 info = snd_array_new(&spec->pcm_rec);
1671 info->name = per_pin->pcm_name;
1672 info->pcm_type = HDA_PCM_TYPE_HDMI;
1673 info->own_chmap = true;
1675 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1676 pstr->substreams = 1;
1677 pstr->ops = generic_ops;
1678 /* other pstr fields are set in open */
1681 codec->num_pcms = spec->num_pins;
1682 codec->pcm_info = spec->pcm_rec.list;
1687 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1689 char hdmi_str[32] = "HDMI/DP";
1690 struct hdmi_spec *spec = codec->spec;
1691 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1692 int pcmdev = get_pcm_rec(spec, pin_idx)->device;
1695 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1696 if (!is_jack_detectable(codec, per_pin->pin_nid))
1697 strncat(hdmi_str, " Phantom",
1698 sizeof(hdmi_str) - strlen(hdmi_str) - 1);
1700 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1703 static int generic_hdmi_build_controls(struct hda_codec *codec)
1705 struct hdmi_spec *spec = codec->spec;
1709 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1710 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1712 err = generic_hdmi_build_jack(codec, pin_idx);
1716 err = snd_hda_create_dig_out_ctls(codec,
1718 per_pin->mux_nids[0],
1722 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1724 /* add control for ELD Bytes */
1725 err = hdmi_create_eld_ctl(codec, pin_idx,
1726 get_pcm_rec(spec, pin_idx)->device);
1731 hdmi_present_sense(per_pin, 0);
1734 /* add channel maps */
1735 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1736 struct snd_pcm_chmap *chmap;
1737 struct snd_kcontrol *kctl;
1740 if (!codec->pcm_info[pin_idx].pcm)
1742 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
1743 SNDRV_PCM_STREAM_PLAYBACK,
1744 NULL, 0, pin_idx, &chmap);
1747 /* override handlers */
1748 chmap->private_data = codec;
1750 for (i = 0; i < kctl->count; i++)
1751 kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
1752 kctl->info = hdmi_chmap_ctl_info;
1753 kctl->get = hdmi_chmap_ctl_get;
1754 kctl->put = hdmi_chmap_ctl_put;
1755 kctl->tlv.c = hdmi_chmap_ctl_tlv;
1761 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
1763 struct hdmi_spec *spec = codec->spec;
1766 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1767 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1768 struct hdmi_eld *eld = &per_pin->sink_eld;
1770 per_pin->codec = codec;
1771 mutex_init(&eld->lock);
1772 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1773 snd_hda_eld_proc_new(codec, eld, pin_idx);
1778 static int generic_hdmi_init(struct hda_codec *codec)
1780 struct hdmi_spec *spec = codec->spec;
1783 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1784 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1785 hda_nid_t pin_nid = per_pin->pin_nid;
1787 hdmi_init_pin(codec, pin_nid);
1788 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1793 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
1795 snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
1796 snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
1797 snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
1800 static void hdmi_array_free(struct hdmi_spec *spec)
1802 snd_array_free(&spec->pins);
1803 snd_array_free(&spec->cvts);
1804 snd_array_free(&spec->pcm_rec);
1807 static void generic_hdmi_free(struct hda_codec *codec)
1809 struct hdmi_spec *spec = codec->spec;
1812 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1813 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1814 struct hdmi_eld *eld = &per_pin->sink_eld;
1816 cancel_delayed_work(&per_pin->work);
1817 snd_hda_eld_proc_free(codec, eld);
1820 flush_workqueue(codec->bus->workq);
1821 hdmi_array_free(spec);
1825 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1826 .init = generic_hdmi_init,
1827 .free = generic_hdmi_free,
1828 .build_pcms = generic_hdmi_build_pcms,
1829 .build_controls = generic_hdmi_build_controls,
1830 .unsol_event = hdmi_unsol_event,
1834 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1837 struct hdmi_spec *spec = codec->spec;
1841 nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
1842 if (nconns == spec->num_cvts &&
1843 !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
1846 /* override pins connection list */
1847 snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
1848 nconns = max(spec->num_cvts, 4);
1849 snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
1852 #define INTEL_VENDOR_NID 0x08
1853 #define INTEL_GET_VENDOR_VERB 0xf81
1854 #define INTEL_SET_VENDOR_VERB 0x781
1855 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
1856 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
1858 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
1861 unsigned int vendor_param;
1863 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1864 INTEL_GET_VENDOR_VERB, 0);
1865 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
1868 vendor_param |= INTEL_EN_ALL_PIN_CVTS;
1869 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1870 INTEL_SET_VENDOR_VERB, vendor_param);
1871 if (vendor_param == -1)
1875 snd_hda_codec_update_widgets(codec);
1878 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
1880 unsigned int vendor_param;
1882 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1883 INTEL_GET_VENDOR_VERB, 0);
1884 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
1887 /* enable DP1.2 mode */
1888 vendor_param |= INTEL_EN_DP12;
1889 snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
1890 INTEL_SET_VENDOR_VERB, vendor_param);
1893 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
1894 * Otherwise you may get severe h/w communication errors.
1896 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
1897 unsigned int power_state)
1899 if (power_state == AC_PWRST_D0) {
1900 intel_haswell_enable_all_pins(codec, false);
1901 intel_haswell_fixup_enable_dp12(codec);
1904 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
1905 snd_hda_codec_set_power_to_all(codec, fg, power_state);
1908 static int patch_generic_hdmi(struct hda_codec *codec)
1910 struct hdmi_spec *spec;
1912 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1917 hdmi_array_init(spec, 4);
1919 if (codec->vendor_id == 0x80862807) {
1920 intel_haswell_enable_all_pins(codec, true);
1921 intel_haswell_fixup_enable_dp12(codec);
1924 if (hdmi_parse_codec(codec) < 0) {
1929 codec->patch_ops = generic_hdmi_patch_ops;
1930 if (codec->vendor_id == 0x80862807)
1931 codec->patch_ops.set_power_state = haswell_set_power_state;
1933 generic_hdmi_init_per_pins(codec);
1935 init_channel_allocations();
1941 * Shared non-generic implementations
1944 static int simple_playback_build_pcms(struct hda_codec *codec)
1946 struct hdmi_spec *spec = codec->spec;
1947 struct hda_pcm *info;
1949 struct hda_pcm_stream *pstr;
1950 struct hdmi_spec_per_cvt *per_cvt;
1952 per_cvt = get_cvt(spec, 0);
1953 chans = get_wcaps(codec, per_cvt->cvt_nid);
1954 chans = get_wcaps_channels(chans);
1956 info = snd_array_new(&spec->pcm_rec);
1959 info->name = get_pin(spec, 0)->pcm_name;
1960 sprintf(info->name, "HDMI 0");
1961 info->pcm_type = HDA_PCM_TYPE_HDMI;
1962 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1963 *pstr = spec->pcm_playback;
1964 pstr->nid = per_cvt->cvt_nid;
1965 if (pstr->channels_max <= 2 && chans && chans <= 16)
1966 pstr->channels_max = chans;
1968 codec->num_pcms = 1;
1969 codec->pcm_info = info;
1974 /* unsolicited event for jack sensing */
1975 static void simple_hdmi_unsol_event(struct hda_codec *codec,
1978 snd_hda_jack_set_dirty_all(codec);
1979 snd_hda_jack_report_sync(codec);
1982 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
1983 * as long as spec->pins[] is set correctly
1985 #define simple_hdmi_build_jack generic_hdmi_build_jack
1987 static int simple_playback_build_controls(struct hda_codec *codec)
1989 struct hdmi_spec *spec = codec->spec;
1990 struct hdmi_spec_per_cvt *per_cvt;
1993 per_cvt = get_cvt(spec, 0);
1994 err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
1998 return simple_hdmi_build_jack(codec, 0);
2001 static int simple_playback_init(struct hda_codec *codec)
2003 struct hdmi_spec *spec = codec->spec;
2004 struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2005 hda_nid_t pin = per_pin->pin_nid;
2007 snd_hda_codec_write(codec, pin, 0,
2008 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2009 /* some codecs require to unmute the pin */
2010 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2011 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2013 snd_hda_jack_detect_enable(codec, pin, pin);
2017 static void simple_playback_free(struct hda_codec *codec)
2019 struct hdmi_spec *spec = codec->spec;
2021 hdmi_array_free(spec);
2026 * Nvidia specific implementations
2029 #define Nv_VERB_SET_Channel_Allocation 0xF79
2030 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
2031 #define Nv_VERB_SET_Audio_Protection_On 0xF98
2032 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
2034 #define nvhdmi_master_con_nid_7x 0x04
2035 #define nvhdmi_master_pin_nid_7x 0x05
2037 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2038 /*front, rear, clfe, rear_surr */
2042 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2043 /* set audio protect on */
2044 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2045 /* enable digital output on pin widget */
2046 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2050 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2051 /* set audio protect on */
2052 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2053 /* enable digital output on pin widget */
2054 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2055 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2056 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2057 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2058 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2062 #ifdef LIMITED_RATE_FMT_SUPPORT
2063 /* support only the safe format and rate */
2064 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
2065 #define SUPPORTED_MAXBPS 16
2066 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
2068 /* support all rates and formats */
2069 #define SUPPORTED_RATES \
2070 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2071 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2072 SNDRV_PCM_RATE_192000)
2073 #define SUPPORTED_MAXBPS 24
2074 #define SUPPORTED_FORMATS \
2075 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2078 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2080 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2084 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2086 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2090 static unsigned int channels_2_6_8[] = {
2094 static unsigned int channels_2_8[] = {
2098 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2099 .count = ARRAY_SIZE(channels_2_6_8),
2100 .list = channels_2_6_8,
2104 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2105 .count = ARRAY_SIZE(channels_2_8),
2106 .list = channels_2_8,
2110 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2111 struct hda_codec *codec,
2112 struct snd_pcm_substream *substream)
2114 struct hdmi_spec *spec = codec->spec;
2115 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2117 switch (codec->preset->id) {
2122 hw_constraints_channels = &hw_constraints_2_8_channels;
2125 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2131 if (hw_constraints_channels != NULL) {
2132 snd_pcm_hw_constraint_list(substream->runtime, 0,
2133 SNDRV_PCM_HW_PARAM_CHANNELS,
2134 hw_constraints_channels);
2136 snd_pcm_hw_constraint_step(substream->runtime, 0,
2137 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2140 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2143 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2144 struct hda_codec *codec,
2145 struct snd_pcm_substream *substream)
2147 struct hdmi_spec *spec = codec->spec;
2148 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2151 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2152 struct hda_codec *codec,
2153 unsigned int stream_tag,
2154 unsigned int format,
2155 struct snd_pcm_substream *substream)
2157 struct hdmi_spec *spec = codec->spec;
2158 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2159 stream_tag, format, substream);
2162 static const struct hda_pcm_stream simple_pcm_playback = {
2167 .open = simple_playback_pcm_open,
2168 .close = simple_playback_pcm_close,
2169 .prepare = simple_playback_pcm_prepare
2173 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2174 .build_controls = simple_playback_build_controls,
2175 .build_pcms = simple_playback_build_pcms,
2176 .init = simple_playback_init,
2177 .free = simple_playback_free,
2178 .unsol_event = simple_hdmi_unsol_event,
2181 static int patch_simple_hdmi(struct hda_codec *codec,
2182 hda_nid_t cvt_nid, hda_nid_t pin_nid)
2184 struct hdmi_spec *spec;
2185 struct hdmi_spec_per_cvt *per_cvt;
2186 struct hdmi_spec_per_pin *per_pin;
2188 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2193 hdmi_array_init(spec, 1);
2195 spec->multiout.num_dacs = 0; /* no analog */
2196 spec->multiout.max_channels = 2;
2197 spec->multiout.dig_out_nid = cvt_nid;
2200 per_pin = snd_array_new(&spec->pins);
2201 per_cvt = snd_array_new(&spec->cvts);
2202 if (!per_pin || !per_cvt) {
2203 simple_playback_free(codec);
2206 per_cvt->cvt_nid = cvt_nid;
2207 per_pin->pin_nid = pin_nid;
2208 spec->pcm_playback = simple_pcm_playback;
2210 codec->patch_ops = simple_hdmi_patch_ops;
2215 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2218 unsigned int chanmask;
2219 int chan = channels ? (channels - 1) : 1;
2238 /* Set the audio infoframe channel allocation and checksum fields. The
2239 * channel count is computed implicitly by the hardware. */
2240 snd_hda_codec_write(codec, 0x1, 0,
2241 Nv_VERB_SET_Channel_Allocation, chanmask);
2243 snd_hda_codec_write(codec, 0x1, 0,
2244 Nv_VERB_SET_Info_Frame_Checksum,
2245 (0x71 - chan - chanmask));
2248 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2249 struct hda_codec *codec,
2250 struct snd_pcm_substream *substream)
2252 struct hdmi_spec *spec = codec->spec;
2255 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2256 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2257 for (i = 0; i < 4; i++) {
2258 /* set the stream id */
2259 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2260 AC_VERB_SET_CHANNEL_STREAMID, 0);
2261 /* set the stream format */
2262 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2263 AC_VERB_SET_STREAM_FORMAT, 0);
2266 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2267 * streams are disabled. */
2268 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2270 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2273 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2274 struct hda_codec *codec,
2275 unsigned int stream_tag,
2276 unsigned int format,
2277 struct snd_pcm_substream *substream)
2280 unsigned int dataDCC2, channel_id;
2282 struct hdmi_spec *spec = codec->spec;
2283 struct hda_spdif_out *spdif;
2284 struct hdmi_spec_per_cvt *per_cvt;
2286 mutex_lock(&codec->spdif_mutex);
2287 per_cvt = get_cvt(spec, 0);
2288 spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2290 chs = substream->runtime->channels;
2294 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2295 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2296 snd_hda_codec_write(codec,
2297 nvhdmi_master_con_nid_7x,
2299 AC_VERB_SET_DIGI_CONVERT_1,
2300 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2302 /* set the stream id */
2303 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2304 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2306 /* set the stream format */
2307 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2308 AC_VERB_SET_STREAM_FORMAT, format);
2310 /* turn on again (if needed) */
2311 /* enable and set the channel status audio/data flag */
2312 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2313 snd_hda_codec_write(codec,
2314 nvhdmi_master_con_nid_7x,
2316 AC_VERB_SET_DIGI_CONVERT_1,
2317 spdif->ctls & 0xff);
2318 snd_hda_codec_write(codec,
2319 nvhdmi_master_con_nid_7x,
2321 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2324 for (i = 0; i < 4; i++) {
2330 /* turn off SPDIF once;
2331 *otherwise the IEC958 bits won't be updated
2333 if (codec->spdif_status_reset &&
2334 (spdif->ctls & AC_DIG1_ENABLE))
2335 snd_hda_codec_write(codec,
2336 nvhdmi_con_nids_7x[i],
2338 AC_VERB_SET_DIGI_CONVERT_1,
2339 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2340 /* set the stream id */
2341 snd_hda_codec_write(codec,
2342 nvhdmi_con_nids_7x[i],
2344 AC_VERB_SET_CHANNEL_STREAMID,
2345 (stream_tag << 4) | channel_id);
2346 /* set the stream format */
2347 snd_hda_codec_write(codec,
2348 nvhdmi_con_nids_7x[i],
2350 AC_VERB_SET_STREAM_FORMAT,
2352 /* turn on again (if needed) */
2353 /* enable and set the channel status audio/data flag */
2354 if (codec->spdif_status_reset &&
2355 (spdif->ctls & AC_DIG1_ENABLE)) {
2356 snd_hda_codec_write(codec,
2357 nvhdmi_con_nids_7x[i],
2359 AC_VERB_SET_DIGI_CONVERT_1,
2360 spdif->ctls & 0xff);
2361 snd_hda_codec_write(codec,
2362 nvhdmi_con_nids_7x[i],
2364 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2368 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2370 mutex_unlock(&codec->spdif_mutex);
2374 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2378 .nid = nvhdmi_master_con_nid_7x,
2379 .rates = SUPPORTED_RATES,
2380 .maxbps = SUPPORTED_MAXBPS,
2381 .formats = SUPPORTED_FORMATS,
2383 .open = simple_playback_pcm_open,
2384 .close = nvhdmi_8ch_7x_pcm_close,
2385 .prepare = nvhdmi_8ch_7x_pcm_prepare
2389 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2391 struct hdmi_spec *spec;
2392 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2393 nvhdmi_master_pin_nid_7x);
2397 codec->patch_ops.init = nvhdmi_7x_init_2ch;
2398 /* override the PCM rates, etc, as the codec doesn't give full list */
2400 spec->pcm_playback.rates = SUPPORTED_RATES;
2401 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2402 spec->pcm_playback.formats = SUPPORTED_FORMATS;
2406 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2408 struct hdmi_spec *spec = codec->spec;
2409 int err = simple_playback_build_pcms(codec);
2411 struct hda_pcm *info = get_pcm_rec(spec, 0);
2412 info->own_chmap = true;
2417 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2419 struct hdmi_spec *spec = codec->spec;
2420 struct hda_pcm *info;
2421 struct snd_pcm_chmap *chmap;
2424 err = simple_playback_build_controls(codec);
2428 /* add channel maps */
2429 info = get_pcm_rec(spec, 0);
2430 err = snd_pcm_add_chmap_ctls(info->pcm,
2431 SNDRV_PCM_STREAM_PLAYBACK,
2432 snd_pcm_alt_chmaps, 8, 0, &chmap);
2435 switch (codec->preset->id) {
2440 chmap->channel_mask = (1U << 2) | (1U << 8);
2443 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2448 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2450 struct hdmi_spec *spec;
2451 int err = patch_nvhdmi_2ch(codec);
2455 spec->multiout.max_channels = 8;
2456 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2457 codec->patch_ops.init = nvhdmi_7x_init_8ch;
2458 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2459 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2461 /* Initialize the audio infoframe channel mask and checksum to something
2463 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2469 * ATI-specific implementations
2471 * FIXME: we may omit the whole this and use the generic code once after
2472 * it's confirmed to work.
2475 #define ATIHDMI_CVT_NID 0x02 /* audio converter */
2476 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
2478 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2479 struct hda_codec *codec,
2480 unsigned int stream_tag,
2481 unsigned int format,
2482 struct snd_pcm_substream *substream)
2484 struct hdmi_spec *spec = codec->spec;
2485 struct hdmi_spec_per_cvt *per_cvt = get_cvt(spec, 0);
2486 int chans = substream->runtime->channels;
2489 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
2493 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2494 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
2496 for (i = 0; i < chans; i++) {
2497 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2498 AC_VERB_SET_HDMI_CHAN_SLOT,
2504 static int patch_atihdmi(struct hda_codec *codec)
2506 struct hdmi_spec *spec;
2507 int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
2511 spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
2515 /* VIA HDMI Implementation */
2516 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
2517 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
2519 static int patch_via_hdmi(struct hda_codec *codec)
2521 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
2527 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
2528 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
2529 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
2530 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
2531 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
2532 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
2533 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
2534 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
2535 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2536 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2537 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2538 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2539 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
2540 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
2541 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
2542 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
2543 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
2544 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
2545 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
2546 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
2547 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
2548 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
2549 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
2550 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
2551 /* 17 is known to be absent */
2552 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
2553 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
2554 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
2555 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
2556 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
2557 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
2558 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
2559 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
2560 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
2561 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
2562 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
2563 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP", .patch = patch_generic_hdmi },
2564 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
2565 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
2566 { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2567 { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2568 { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2569 { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2570 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2571 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
2572 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
2573 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
2574 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2575 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
2576 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
2577 { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
2578 { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
2579 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
2583 MODULE_ALIAS("snd-hda-codec-id:1002793c");
2584 MODULE_ALIAS("snd-hda-codec-id:10027919");
2585 MODULE_ALIAS("snd-hda-codec-id:1002791a");
2586 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
2587 MODULE_ALIAS("snd-hda-codec-id:10951390");
2588 MODULE_ALIAS("snd-hda-codec-id:10951392");
2589 MODULE_ALIAS("snd-hda-codec-id:10de0002");
2590 MODULE_ALIAS("snd-hda-codec-id:10de0003");
2591 MODULE_ALIAS("snd-hda-codec-id:10de0005");
2592 MODULE_ALIAS("snd-hda-codec-id:10de0006");
2593 MODULE_ALIAS("snd-hda-codec-id:10de0007");
2594 MODULE_ALIAS("snd-hda-codec-id:10de000a");
2595 MODULE_ALIAS("snd-hda-codec-id:10de000b");
2596 MODULE_ALIAS("snd-hda-codec-id:10de000c");
2597 MODULE_ALIAS("snd-hda-codec-id:10de000d");
2598 MODULE_ALIAS("snd-hda-codec-id:10de0010");
2599 MODULE_ALIAS("snd-hda-codec-id:10de0011");
2600 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2601 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2602 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2603 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2604 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2605 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2606 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2607 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2608 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2609 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2610 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2611 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2612 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2613 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2614 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2615 MODULE_ALIAS("snd-hda-codec-id:10de0051");
2616 MODULE_ALIAS("snd-hda-codec-id:10de0060");
2617 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2618 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2619 MODULE_ALIAS("snd-hda-codec-id:11069f80");
2620 MODULE_ALIAS("snd-hda-codec-id:11069f81");
2621 MODULE_ALIAS("snd-hda-codec-id:11069f84");
2622 MODULE_ALIAS("snd-hda-codec-id:11069f85");
2623 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2624 MODULE_ALIAS("snd-hda-codec-id:80860054");
2625 MODULE_ALIAS("snd-hda-codec-id:80862801");
2626 MODULE_ALIAS("snd-hda-codec-id:80862802");
2627 MODULE_ALIAS("snd-hda-codec-id:80862803");
2628 MODULE_ALIAS("snd-hda-codec-id:80862804");
2629 MODULE_ALIAS("snd-hda-codec-id:80862805");
2630 MODULE_ALIAS("snd-hda-codec-id:80862806");
2631 MODULE_ALIAS("snd-hda-codec-id:80862807");
2632 MODULE_ALIAS("snd-hda-codec-id:80862880");
2633 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2635 MODULE_LICENSE("GPL");
2636 MODULE_DESCRIPTION("HDMI HD-audio codec");
2637 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2638 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2639 MODULE_ALIAS("snd-hda-codec-atihdmi");
2641 static struct hda_codec_preset_list intel_list = {
2642 .preset = snd_hda_preset_hdmi,
2643 .owner = THIS_MODULE,
2646 static int __init patch_hdmi_init(void)
2648 return snd_hda_add_codec_preset(&intel_list);
2651 static void __exit patch_hdmi_exit(void)
2653 snd_hda_delete_codec_preset(&intel_list);
2656 module_init(patch_hdmi_init)
2657 module_exit(patch_hdmi_exit)