2 * eti_b1_wm8731 -- SoC audio for AT91RM9200-based Endrelia ETI_B1 board.
4 * Author: Frank Mandarino <fmandarino@endrelia.com>
5 * Endrelia Technologies Inc.
6 * Created: Mar 29, 2006
10 * Copyright 2005 Wolfson Microelectronics PLC.
11 * Copyright 2005 Openedhand Ltd.
13 * Authors: Liam Girdwood <liam.girdwood@wolfsonmicro.com>
14 * Richard Purdie <richard@openedhand.com>
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the
18 * Free Software Foundation; either version 2 of the License, or (at your
19 * option) any later version.
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/kernel.h>
26 #include <linux/clk.h>
27 #include <linux/timer.h>
28 #include <linux/interrupt.h>
29 #include <linux/platform_device.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/soc.h>
33 #include <sound/soc-dapm.h>
35 #include <mach/hardware.h>
36 #include <mach/gpio.h>
38 #include "../codecs/wm8731.h"
43 #define DBG(x...) printk(KERN_INFO "eti_b1_wm8731: " x)
48 static struct clk *pck1_clk;
49 static struct clk *pllb_clk;
52 static int eti_b1_startup(struct snd_pcm_substream *substream)
54 struct snd_soc_pcm_runtime *rtd = substream->private_data;
55 struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
56 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
59 /* cpu clock is the AT91 master clock sent to the SSC */
60 ret = snd_soc_dai_set_sysclk(cpu_dai, AT91_SYSCLK_MCK,
61 60000000, SND_SOC_CLOCK_IN);
65 /* codec system clock is supplied by PCK1, set to 12MHz */
66 ret = snd_soc_dai_set_sysclk(codec_dai, WM8731_SYSCLK,
67 12000000, SND_SOC_CLOCK_IN);
71 /* Start PCK1 clock. */
73 DBG("pck1 started\n");
78 static void eti_b1_shutdown(struct snd_pcm_substream *substream)
80 /* Stop PCK1 clock. */
81 clk_disable(pck1_clk);
82 DBG("pck1 stopped\n");
85 static int eti_b1_hw_params(struct snd_pcm_substream *substream,
86 struct snd_pcm_hw_params *params)
88 struct snd_soc_pcm_runtime *rtd = substream->private_data;
89 struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
90 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
93 #ifdef CONFIG_SND_AT91_SOC_ETI_SLAVE
97 /* set codec DAI configuration */
98 ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
99 SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
103 /* set cpu DAI configuration */
104 ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
105 SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
110 * The SSC clock dividers depend on the sample rate. The CMR.DIV
111 * field divides the system master clock MCK to drive the SSC TK
112 * signal which provides the codec BCLK. The TCMR.PERIOD and
113 * RCMR.PERIOD fields further divide the BCLK signal to drive
114 * the SSC TF and RF signals which provide the codec DACLRC and
117 * The dividers were determined through trial and error, where a
118 * CMR.DIV value is chosen such that the resulting BCLK value is
119 * divisible, or almost divisible, by (2 * sample rate), and then
120 * the TCMR.PERIOD or RCMR.PERIOD is BCLK / (2 * sample rate) - 1.
122 rate = params_rate(params);
126 cmr_div = 25; /* BCLK = 60MHz/(2*25) = 1.2MHz */
127 period = 74; /* LRC = BCLK/(2*(74+1)) = 8000Hz */
130 cmr_div = 7; /* BCLK = 60MHz/(2*7) ~= 4.28571428MHz */
131 period = 66; /* LRC = BCLK/(2*(66+1)) = 31982.942Hz */
134 cmr_div = 13; /* BCLK = 60MHz/(2*13) ~= 2.3076923MHz */
135 period = 23; /* LRC = BCLK/(2*(23+1)) = 48076.923Hz */
138 printk(KERN_WARNING "unsupported rate %d on ETI-B1 board\n", rate);
142 /* set the MCK divider for BCLK */
143 ret = snd_soc_dai_set_clkdiv(cpu_dai, AT91SSC_CMR_DIV, cmr_div);
147 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
148 /* set the BCLK divider for DACLRC */
149 ret = snd_soc_dai_set_clkdiv(cpu_dai,
150 AT91SSC_TCMR_PERIOD, period);
152 /* set the BCLK divider for ADCLRC */
153 ret = snd_soc_dai_set_clkdiv(cpu_dai,
154 AT91SSC_RCMR_PERIOD, period);
159 #else /* CONFIG_SND_AT91_SOC_ETI_SLAVE */
161 * Codec in Master Mode.
164 /* set codec DAI configuration */
165 ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
166 SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
170 /* set cpu DAI configuration */
171 ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
172 SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
176 #endif /* CONFIG_SND_AT91_SOC_ETI_SLAVE */
181 static struct snd_soc_ops eti_b1_ops = {
182 .startup = eti_b1_startup,
183 .hw_params = eti_b1_hw_params,
184 .shutdown = eti_b1_shutdown,
188 static const struct snd_soc_dapm_widget eti_b1_dapm_widgets[] = {
189 SND_SOC_DAPM_MIC("Int Mic", NULL),
190 SND_SOC_DAPM_SPK("Ext Spk", NULL),
193 static const struct snd_soc_dapm_route intercon[] = {
195 /* speaker connected to LHPOUT */
196 {"Ext Spk", NULL, "LHPOUT"},
198 /* mic is connected to Mic Jack, with WM8731 Mic Bias */
199 {"MICIN", NULL, "Mic Bias"},
200 {"Mic Bias", NULL, "Int Mic"},
204 * Logic for a wm8731 as connected on a Endrelia ETI-B1 board.
206 static int eti_b1_wm8731_init(struct snd_soc_codec *codec)
208 DBG("eti_b1_wm8731_init() called\n");
210 /* Add specific widgets */
211 snd_soc_dapm_new_controls(codec, eti_b1_dapm_widgets,
212 ARRAY_SIZE(eti_b1_dapm_widgets));
214 /* Set up specific audio path interconnects */
215 snd_soc_dapm_add_route(codec, intercon, ARRAY_SIZE(intercon));
218 snd_soc_dapm_disable_pin(codec, "RLINEIN");
219 snd_soc_dapm_disable_pin(codec, "LLINEIN");
221 /* always connected */
222 snd_soc_dapm_enable_pin(codec, "Int Mic");
223 snd_soc_dapm_enable_pin(codec, "Ext Spk");
225 snd_soc_dapm_sync(codec);
230 static struct snd_soc_dai_link eti_b1_dai = {
232 .stream_name = "WM8731 PCM",
233 .cpu_dai = &at91_ssc_dai[1],
234 .codec_dai = &wm8731_dai,
235 .init = eti_b1_wm8731_init,
239 static struct snd_soc_machine snd_soc_machine_eti_b1 = {
240 .name = "ETI_B1_WM8731",
241 .dai_link = &eti_b1_dai,
245 static struct wm8731_setup_data eti_b1_wm8731_setup = {
249 static struct snd_soc_device eti_b1_snd_devdata = {
250 .machine = &snd_soc_machine_eti_b1,
251 .platform = &at91_soc_platform,
252 .codec_dev = &soc_codec_dev_wm8731,
253 .codec_data = &eti_b1_wm8731_setup,
256 static struct platform_device *eti_b1_snd_device;
258 static int __init eti_b1_init(void)
261 struct at91_ssc_periph *ssc = eti_b1_dai.cpu_dai->private_data;
263 if (!request_mem_region(AT91RM9200_BASE_SSC1, SZ_16K, "soc-audio")) {
264 DBG("SSC1 memory region is busy\n");
268 ssc->base = ioremap(AT91RM9200_BASE_SSC1, SZ_16K);
270 DBG("SSC1 memory ioremap failed\n");
272 goto fail_release_mem;
275 ssc->pid = AT91RM9200_ID_SSC1;
277 eti_b1_snd_device = platform_device_alloc("soc-audio", -1);
278 if (!eti_b1_snd_device) {
279 DBG("platform device allocation failed\n");
284 platform_set_drvdata(eti_b1_snd_device, &eti_b1_snd_devdata);
285 eti_b1_snd_devdata.dev = &eti_b1_snd_device->dev;
287 ret = platform_device_add(eti_b1_snd_device);
289 DBG("platform device add failed\n");
290 platform_device_put(eti_b1_snd_device);
294 at91_set_A_periph(AT91_PIN_PB6, 0); /* TF1 */
295 at91_set_A_periph(AT91_PIN_PB7, 0); /* TK1 */
296 at91_set_A_periph(AT91_PIN_PB8, 0); /* TD1 */
297 at91_set_A_periph(AT91_PIN_PB9, 0); /* RD1 */
298 /* at91_set_A_periph(AT91_PIN_PB10, 0);*/ /* RK1 */
299 at91_set_A_periph(AT91_PIN_PB11, 0); /* RF1 */
302 * Set PCK1 parent to PLLB and its rate to 12 Mhz.
304 pllb_clk = clk_get(NULL, "pllb");
305 pck1_clk = clk_get(NULL, "pck1");
307 clk_set_parent(pck1_clk, pllb_clk);
308 clk_set_rate(pck1_clk, 12000000);
310 DBG("MCLK rate %luHz\n", clk_get_rate(pck1_clk));
312 /* assign the GPIO pin to PCK1 */
313 at91_set_B_periph(AT91_PIN_PA24, 0);
315 #ifdef CONFIG_SND_AT91_SOC_ETI_SLAVE
316 printk(KERN_INFO "eti_b1_wm8731: Codec in Slave Mode\n");
318 printk(KERN_INFO "eti_b1_wm8731: Codec in Master Mode\n");
325 release_mem_region(AT91RM9200_BASE_SSC1, SZ_16K);
329 static void __exit eti_b1_exit(void)
331 struct at91_ssc_periph *ssc = eti_b1_dai.cpu_dai->private_data;
336 platform_device_unregister(eti_b1_snd_device);
339 release_mem_region(AT91RM9200_BASE_SSC1, SZ_16K);
342 module_init(eti_b1_init);
343 module_exit(eti_b1_exit);
345 /* Module information */
346 MODULE_AUTHOR("Frank Mandarino <fmandarino@endrelia.com>");
347 MODULE_DESCRIPTION("ALSA SoC ETI-B1-WM8731");
348 MODULE_LICENSE("GPL");