2 * Au12x0/Au1550 PSC ALSA ASoC audio support.
4 * (c) 2007-2009 MSC Vertriebsges.m.b.H.,
5 * Manuel Lauss <manuel.lauss@gmail.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * Au1xxx-PSC AC97 glue.
13 * NOTE: all of these drivers can only work with a SINGLE instance
14 * of a PSC. Multiple independent audio devices are impossible
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/device.h>
21 #include <linux/delay.h>
22 #include <linux/mutex.h>
23 #include <linux/suspend.h>
24 #include <sound/core.h>
25 #include <sound/pcm.h>
26 #include <sound/initval.h>
27 #include <sound/soc.h>
28 #include <asm/mach-au1x00/au1000.h>
29 #include <asm/mach-au1x00/au1xxx_psc.h>
33 /* how often to retry failed codec register reads/writes */
34 #define AC97_RW_RETRIES 5
37 (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
40 SNDRV_PCM_RATE_8000_48000
43 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3BE)
45 #define AC97PCR_START(stype) \
46 ((stype) == PCM_TX ? PSC_AC97PCR_TS : PSC_AC97PCR_RS)
47 #define AC97PCR_STOP(stype) \
48 ((stype) == PCM_TX ? PSC_AC97PCR_TP : PSC_AC97PCR_RP)
49 #define AC97PCR_CLRFIFO(stype) \
50 ((stype) == PCM_TX ? PSC_AC97PCR_TC : PSC_AC97PCR_RC)
52 #define AC97STAT_BUSY(stype) \
53 ((stype) == PCM_TX ? PSC_AC97STAT_TB : PSC_AC97STAT_RB)
55 /* instance data. There can be only one, MacLeod!!!! */
56 static struct au1xpsc_audio_data *au1xpsc_ac97_workdata;
58 /* AC97 controller reads codec register */
59 static unsigned short au1xpsc_ac97_read(struct snd_ac97 *ac97,
63 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
64 unsigned short retry, tmo;
67 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
70 retry = AC97_RW_RETRIES;
72 mutex_lock(&pscdata->lock);
74 au_writel(PSC_AC97CDC_RD | PSC_AC97CDC_INDX(reg),
81 if (au_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD)
85 data = au_readl(AC97_CDC(pscdata));
87 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
90 mutex_unlock(&pscdata->lock);
92 if (reg != ((data >> 16) & 0x7f))
93 tmo = 1; /* wrong register, try again */
95 } while (--retry && !tmo);
97 return retry ? data & 0xffff : 0xffff;
100 /* AC97 controller writes to codec register */
101 static void au1xpsc_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
105 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
106 unsigned int tmo, retry;
108 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
111 retry = AC97_RW_RETRIES;
113 mutex_lock(&pscdata->lock);
115 au_writel(PSC_AC97CDC_INDX(reg) | (val & 0xffff),
122 if (au_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD)
126 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
129 mutex_unlock(&pscdata->lock);
130 } while (--retry && !tmo);
133 /* AC97 controller asserts a warm reset */
134 static void au1xpsc_ac97_warm_reset(struct snd_ac97 *ac97)
137 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
139 au_writel(PSC_AC97RST_SNC, AC97_RST(pscdata));
142 au_writel(0, AC97_RST(pscdata));
146 static void au1xpsc_ac97_cold_reset(struct snd_ac97 *ac97)
149 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
152 /* disable PSC during cold reset */
153 au_writel(0, AC97_CFG(au1xpsc_ac97_workdata));
155 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(pscdata));
158 /* issue cold reset */
159 au_writel(PSC_AC97RST_RST, AC97_RST(pscdata));
162 au_writel(0, AC97_RST(pscdata));
166 au_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata));
169 /* wait for PSC to indicate it's ready */
171 while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_SR)) && (--i))
175 printk(KERN_ERR "au1xpsc-ac97: PSC not ready!\n");
179 /* enable the ac97 function */
180 au_writel(pscdata->cfg | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
183 /* wait for AC97 core to become ready */
185 while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && (--i))
188 printk(KERN_ERR "au1xpsc-ac97: AC97 ctrl not ready\n");
191 /* AC97 controller operations */
192 struct snd_ac97_bus_ops soc_ac97_ops = {
193 .read = au1xpsc_ac97_read,
194 .write = au1xpsc_ac97_write,
195 .reset = au1xpsc_ac97_cold_reset,
196 .warm_reset = au1xpsc_ac97_warm_reset,
198 EXPORT_SYMBOL_GPL(soc_ac97_ops);
200 static int au1xpsc_ac97_hw_params(struct snd_pcm_substream *substream,
201 struct snd_pcm_hw_params *params,
202 struct snd_soc_dai *dai)
205 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
206 unsigned long r, ro, stat;
207 int chans, t, stype = SUBSTREAM_TYPE(substream);
209 chans = params_channels(params);
211 r = ro = au_readl(AC97_CFG(pscdata));
212 stat = au_readl(AC97_STAT(pscdata));
214 /* already active? */
215 if (stat & (PSC_AC97STAT_TB | PSC_AC97STAT_RB)) {
216 /* reject parameters not currently set up */
217 if ((PSC_AC97CFG_GET_LEN(r) != params->msbits) ||
218 (pscdata->rate != params_rate(params)))
222 /* set sample bitdepth: REG[24:21]=(BITS-2)/2 */
223 r &= ~PSC_AC97CFG_LEN_MASK;
224 r |= PSC_AC97CFG_SET_LEN(params->msbits);
226 /* channels: enable slots for front L/R channel */
227 if (stype == PCM_TX) {
228 r &= ~PSC_AC97CFG_TXSLOT_MASK;
229 r |= PSC_AC97CFG_TXSLOT_ENA(3);
230 r |= PSC_AC97CFG_TXSLOT_ENA(4);
232 r &= ~PSC_AC97CFG_RXSLOT_MASK;
233 r |= PSC_AC97CFG_RXSLOT_ENA(3);
234 r |= PSC_AC97CFG_RXSLOT_ENA(4);
237 /* do we need to poke the hardware? */
241 /* ac97 engine is about to be disabled */
242 mutex_lock(&pscdata->lock);
244 /* disable AC97 device controller first... */
245 au_writel(r & ~PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
248 /* ...wait for it... */
250 while ((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR) && --t)
254 printk(KERN_ERR "PSC-AC97: can't disable!\n");
256 /* ...write config... */
257 au_writel(r, AC97_CFG(pscdata));
260 /* ...enable the AC97 controller again... */
261 au_writel(r | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
264 /* ...and wait for ready bit */
266 while ((!(au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && --t)
270 printk(KERN_ERR "PSC-AC97: can't enable!\n");
272 mutex_unlock(&pscdata->lock);
275 pscdata->rate = params_rate(params);
282 static int au1xpsc_ac97_trigger(struct snd_pcm_substream *substream,
283 int cmd, struct snd_soc_dai *dai)
286 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
287 int ret, stype = SUBSTREAM_TYPE(substream);
292 case SNDRV_PCM_TRIGGER_START:
293 case SNDRV_PCM_TRIGGER_RESUME:
294 au_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata));
296 au_writel(AC97PCR_START(stype), AC97_PCR(pscdata));
299 case SNDRV_PCM_TRIGGER_STOP:
300 case SNDRV_PCM_TRIGGER_SUSPEND:
301 au_writel(AC97PCR_STOP(stype), AC97_PCR(pscdata));
304 while (au_readl(AC97_STAT(pscdata)) & AC97STAT_BUSY(stype))
305 asm volatile ("nop");
307 au_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata));
317 static int au1xpsc_ac97_probe(struct platform_device *pdev,
318 struct snd_soc_dai *dai)
324 if (au1xpsc_ac97_workdata)
327 au1xpsc_ac97_workdata =
328 kzalloc(sizeof(struct au1xpsc_audio_data), GFP_KERNEL);
329 if (!au1xpsc_ac97_workdata)
332 mutex_init(&au1xpsc_ac97_workdata->lock);
334 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
341 au1xpsc_ac97_workdata->ioarea =
342 request_mem_region(r->start, r->end - r->start + 1,
344 if (!au1xpsc_ac97_workdata->ioarea)
347 au1xpsc_ac97_workdata->mmio = ioremap(r->start, 0xffff);
348 if (!au1xpsc_ac97_workdata->mmio)
351 /* configuration: max dma trigger threshold, enable ac97 */
352 au1xpsc_ac97_workdata->cfg = PSC_AC97CFG_RT_FIFO8 |
353 PSC_AC97CFG_TT_FIFO8 |
354 PSC_AC97CFG_DE_ENABLE;
356 /* preserve PSC clock source set up by platform (dev.platform_data
357 * is already occupied by soc layer)
359 sel = au_readl(PSC_SEL(au1xpsc_ac97_workdata)) & PSC_SEL_CLK_MASK;
360 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_ac97_workdata));
362 au_writel(0, PSC_SEL(au1xpsc_ac97_workdata));
364 au_writel(PSC_SEL_PS_AC97MODE | sel, PSC_SEL(au1xpsc_ac97_workdata));
366 /* next up: cold reset. Dont check for PSC-ready now since
367 * there may not be any codec clock yet.
373 release_resource(au1xpsc_ac97_workdata->ioarea);
374 kfree(au1xpsc_ac97_workdata->ioarea);
376 kfree(au1xpsc_ac97_workdata);
377 au1xpsc_ac97_workdata = NULL;
381 static void au1xpsc_ac97_remove(struct platform_device *pdev,
382 struct snd_soc_dai *dai)
384 /* disable PSC completely */
385 au_writel(0, AC97_CFG(au1xpsc_ac97_workdata));
387 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_ac97_workdata));
390 iounmap(au1xpsc_ac97_workdata->mmio);
391 release_resource(au1xpsc_ac97_workdata->ioarea);
392 kfree(au1xpsc_ac97_workdata->ioarea);
393 kfree(au1xpsc_ac97_workdata);
394 au1xpsc_ac97_workdata = NULL;
397 static int au1xpsc_ac97_suspend(struct snd_soc_dai *dai)
399 /* save interesting registers and disable PSC */
400 au1xpsc_ac97_workdata->pm[0] =
401 au_readl(PSC_SEL(au1xpsc_ac97_workdata));
403 au_writel(0, AC97_CFG(au1xpsc_ac97_workdata));
405 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_ac97_workdata));
411 static int au1xpsc_ac97_resume(struct snd_soc_dai *dai)
413 /* restore PSC clock config */
414 au_writel(au1xpsc_ac97_workdata->pm[0] | PSC_SEL_PS_AC97MODE,
415 PSC_SEL(au1xpsc_ac97_workdata));
418 /* after this point the ac97 core will cold-reset the codec.
419 * During cold-reset the PSC is reinitialized and the last
420 * configuration set up in hw_params() is restored.
425 static struct snd_soc_dai_ops au1xpsc_ac97_dai_ops = {
426 .trigger = au1xpsc_ac97_trigger,
427 .hw_params = au1xpsc_ac97_hw_params,
430 struct snd_soc_dai au1xpsc_ac97_dai = {
431 .name = "au1xpsc_ac97",
433 .probe = au1xpsc_ac97_probe,
434 .remove = au1xpsc_ac97_remove,
435 .suspend = au1xpsc_ac97_suspend,
436 .resume = au1xpsc_ac97_resume,
439 .formats = AC97_FMTS,
445 .formats = AC97_FMTS,
449 .ops = &au1xpsc_ac97_dai_ops,
451 EXPORT_SYMBOL_GPL(au1xpsc_ac97_dai);
453 static int __init au1xpsc_ac97_init(void)
455 au1xpsc_ac97_workdata = NULL;
456 return snd_soc_register_dai(&au1xpsc_ac97_dai);
459 static void __exit au1xpsc_ac97_exit(void)
461 snd_soc_unregister_dai(&au1xpsc_ac97_dai);
464 module_init(au1xpsc_ac97_init);
465 module_exit(au1xpsc_ac97_exit);
467 MODULE_LICENSE("GPL");
468 MODULE_DESCRIPTION("Au12x0/Au1550 PSC AC97 ALSA ASoC audio driver");
469 MODULE_AUTHOR("Manuel Lauss <manuel.lauss@gmail.com>");