2 * arizona.c - Wolfson Arizona class device shared support
4 * Copyright 2012 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/gcd.h>
14 #include <linux/module.h>
15 #include <linux/pm_runtime.h>
16 #include <sound/pcm.h>
17 #include <sound/pcm_params.h>
18 #include <sound/tlv.h>
20 #include <linux/mfd/arizona/core.h>
21 #include <linux/mfd/arizona/registers.h>
25 #define ARIZONA_AIF_BCLK_CTRL 0x00
26 #define ARIZONA_AIF_TX_PIN_CTRL 0x01
27 #define ARIZONA_AIF_RX_PIN_CTRL 0x02
28 #define ARIZONA_AIF_RATE_CTRL 0x03
29 #define ARIZONA_AIF_FORMAT 0x04
30 #define ARIZONA_AIF_TX_BCLK_RATE 0x05
31 #define ARIZONA_AIF_RX_BCLK_RATE 0x06
32 #define ARIZONA_AIF_FRAME_CTRL_1 0x07
33 #define ARIZONA_AIF_FRAME_CTRL_2 0x08
34 #define ARIZONA_AIF_FRAME_CTRL_3 0x09
35 #define ARIZONA_AIF_FRAME_CTRL_4 0x0A
36 #define ARIZONA_AIF_FRAME_CTRL_5 0x0B
37 #define ARIZONA_AIF_FRAME_CTRL_6 0x0C
38 #define ARIZONA_AIF_FRAME_CTRL_7 0x0D
39 #define ARIZONA_AIF_FRAME_CTRL_8 0x0E
40 #define ARIZONA_AIF_FRAME_CTRL_9 0x0F
41 #define ARIZONA_AIF_FRAME_CTRL_10 0x10
42 #define ARIZONA_AIF_FRAME_CTRL_11 0x11
43 #define ARIZONA_AIF_FRAME_CTRL_12 0x12
44 #define ARIZONA_AIF_FRAME_CTRL_13 0x13
45 #define ARIZONA_AIF_FRAME_CTRL_14 0x14
46 #define ARIZONA_AIF_FRAME_CTRL_15 0x15
47 #define ARIZONA_AIF_FRAME_CTRL_16 0x16
48 #define ARIZONA_AIF_FRAME_CTRL_17 0x17
49 #define ARIZONA_AIF_FRAME_CTRL_18 0x18
50 #define ARIZONA_AIF_TX_ENABLES 0x19
51 #define ARIZONA_AIF_RX_ENABLES 0x1A
52 #define ARIZONA_AIF_FORCE_WRITE 0x1B
54 #define arizona_fll_err(_fll, fmt, ...) \
55 dev_err(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
56 #define arizona_fll_warn(_fll, fmt, ...) \
57 dev_warn(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
58 #define arizona_fll_dbg(_fll, fmt, ...) \
59 dev_err(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
61 #define arizona_aif_err(_dai, fmt, ...) \
62 dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
63 #define arizona_aif_warn(_dai, fmt, ...) \
64 dev_warn(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
65 #define arizona_aif_dbg(_dai, fmt, ...) \
66 dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
68 const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = {
145 EXPORT_SYMBOL_GPL(arizona_mixer_texts);
147 int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = {
153 0x0c, /* Noise mixer */
154 0x0d, /* Comfort noise */
224 EXPORT_SYMBOL_GPL(arizona_mixer_values);
226 const DECLARE_TLV_DB_SCALE(arizona_mixer_tlv, -3200, 100, 0);
227 EXPORT_SYMBOL_GPL(arizona_mixer_tlv);
229 static const char *arizona_lhpf_mode_text[] = {
230 "Low-pass", "High-pass"
233 const struct soc_enum arizona_lhpf1_mode =
234 SOC_ENUM_SINGLE(ARIZONA_HPLPF1_1, ARIZONA_LHPF1_MODE_SHIFT, 2,
235 arizona_lhpf_mode_text);
236 EXPORT_SYMBOL_GPL(arizona_lhpf1_mode);
238 const struct soc_enum arizona_lhpf2_mode =
239 SOC_ENUM_SINGLE(ARIZONA_HPLPF2_1, ARIZONA_LHPF2_MODE_SHIFT, 2,
240 arizona_lhpf_mode_text);
241 EXPORT_SYMBOL_GPL(arizona_lhpf2_mode);
243 const struct soc_enum arizona_lhpf3_mode =
244 SOC_ENUM_SINGLE(ARIZONA_HPLPF3_1, ARIZONA_LHPF3_MODE_SHIFT, 2,
245 arizona_lhpf_mode_text);
246 EXPORT_SYMBOL_GPL(arizona_lhpf3_mode);
248 const struct soc_enum arizona_lhpf4_mode =
249 SOC_ENUM_SINGLE(ARIZONA_HPLPF4_1, ARIZONA_LHPF4_MODE_SHIFT, 2,
250 arizona_lhpf_mode_text);
251 EXPORT_SYMBOL_GPL(arizona_lhpf4_mode);
253 int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol,
258 EXPORT_SYMBOL_GPL(arizona_in_ev);
260 int arizona_out_ev(struct snd_soc_dapm_widget *w,
261 struct snd_kcontrol *kcontrol,
266 EXPORT_SYMBOL_GPL(arizona_out_ev);
268 static unsigned int arizona_sysclk_48k_rates[] = {
278 static unsigned int arizona_sysclk_44k1_rates[] = {
288 static int arizona_set_opclk(struct snd_soc_codec *codec, unsigned int clk,
291 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
294 int ref, div, refclk;
297 case ARIZONA_CLK_OPCLK:
298 reg = ARIZONA_OUTPUT_SYSTEM_CLOCK;
299 refclk = priv->sysclk;
301 case ARIZONA_CLK_ASYNC_OPCLK:
302 reg = ARIZONA_OUTPUT_ASYNC_CLOCK;
303 refclk = priv->asyncclk;
310 rates = arizona_sysclk_44k1_rates;
312 rates = arizona_sysclk_48k_rates;
314 for (ref = 0; ref < ARRAY_SIZE(arizona_sysclk_48k_rates) &&
315 rates[ref] <= refclk; ref++) {
317 while (rates[ref] / div >= freq && div < 32) {
318 if (rates[ref] / div == freq) {
319 dev_dbg(codec->dev, "Configured %dHz OPCLK\n",
321 snd_soc_update_bits(codec, reg,
322 ARIZONA_OPCLK_DIV_MASK |
323 ARIZONA_OPCLK_SEL_MASK,
325 ARIZONA_OPCLK_DIV_SHIFT) |
333 dev_err(codec->dev, "Unable to generate %dHz OPCLK\n", freq);
337 int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id,
338 int source, unsigned int freq, int dir)
340 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
341 struct arizona *arizona = priv->arizona;
344 unsigned int mask = ARIZONA_SYSCLK_FREQ_MASK | ARIZONA_SYSCLK_SRC_MASK;
345 unsigned int val = source << ARIZONA_SYSCLK_SRC_SHIFT;
349 case ARIZONA_CLK_SYSCLK:
351 reg = ARIZONA_SYSTEM_CLOCK_1;
353 mask |= ARIZONA_SYSCLK_FRAC;
355 case ARIZONA_CLK_ASYNCCLK:
357 reg = ARIZONA_ASYNC_CLOCK_1;
358 clk = &priv->asyncclk;
360 case ARIZONA_CLK_OPCLK:
361 case ARIZONA_CLK_ASYNC_OPCLK:
362 return arizona_set_opclk(codec, clk_id, freq);
373 val |= 1 << ARIZONA_SYSCLK_FREQ_SHIFT;
377 val |= 2 << ARIZONA_SYSCLK_FREQ_SHIFT;
381 val |= 3 << ARIZONA_SYSCLK_FREQ_SHIFT;
390 val |= ARIZONA_SYSCLK_FRAC;
392 dev_dbg(arizona->dev, "%s set to %uHz", name, freq);
394 return regmap_update_bits(arizona->regmap, reg, mask, val);
396 EXPORT_SYMBOL_GPL(arizona_set_sysclk);
398 static int arizona_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
400 struct snd_soc_codec *codec = dai->codec;
401 int lrclk, bclk, mode, base;
403 base = dai->driver->base;
408 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
409 case SND_SOC_DAIFMT_DSP_A:
412 case SND_SOC_DAIFMT_DSP_B:
415 case SND_SOC_DAIFMT_I2S:
418 case SND_SOC_DAIFMT_LEFT_J:
422 arizona_aif_err(dai, "Unsupported DAI format %d\n",
423 fmt & SND_SOC_DAIFMT_FORMAT_MASK);
427 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
428 case SND_SOC_DAIFMT_CBS_CFS:
430 case SND_SOC_DAIFMT_CBS_CFM:
431 lrclk |= ARIZONA_AIF1TX_LRCLK_MSTR;
433 case SND_SOC_DAIFMT_CBM_CFS:
434 bclk |= ARIZONA_AIF1_BCLK_MSTR;
436 case SND_SOC_DAIFMT_CBM_CFM:
437 bclk |= ARIZONA_AIF1_BCLK_MSTR;
438 lrclk |= ARIZONA_AIF1TX_LRCLK_MSTR;
441 arizona_aif_err(dai, "Unsupported master mode %d\n",
442 fmt & SND_SOC_DAIFMT_MASTER_MASK);
446 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
447 case SND_SOC_DAIFMT_NB_NF:
449 case SND_SOC_DAIFMT_IB_IF:
450 bclk |= ARIZONA_AIF1_BCLK_INV;
451 lrclk |= ARIZONA_AIF1TX_LRCLK_INV;
453 case SND_SOC_DAIFMT_IB_NF:
454 bclk |= ARIZONA_AIF1_BCLK_INV;
456 case SND_SOC_DAIFMT_NB_IF:
457 lrclk |= ARIZONA_AIF1TX_LRCLK_INV;
463 snd_soc_update_bits(codec, base + ARIZONA_AIF_BCLK_CTRL,
464 ARIZONA_AIF1_BCLK_INV | ARIZONA_AIF1_BCLK_MSTR,
466 snd_soc_update_bits(codec, base + ARIZONA_AIF_TX_PIN_CTRL,
467 ARIZONA_AIF1TX_LRCLK_INV |
468 ARIZONA_AIF1TX_LRCLK_MSTR, lrclk);
469 snd_soc_update_bits(codec, base + ARIZONA_AIF_RX_PIN_CTRL,
470 ARIZONA_AIF1RX_LRCLK_INV |
471 ARIZONA_AIF1RX_LRCLK_MSTR, lrclk);
472 snd_soc_update_bits(codec, base + ARIZONA_AIF_FORMAT,
473 ARIZONA_AIF1_FMT_MASK, mode);
478 static const int arizona_48k_bclk_rates[] = {
500 static const unsigned int arizona_48k_rates[] = {
518 static const struct snd_pcm_hw_constraint_list arizona_48k_constraint = {
519 .count = ARRAY_SIZE(arizona_48k_rates),
520 .list = arizona_48k_rates,
523 static const int arizona_44k1_bclk_rates[] = {
545 static const unsigned int arizona_44k1_rates[] = {
555 static const struct snd_pcm_hw_constraint_list arizona_44k1_constraint = {
556 .count = ARRAY_SIZE(arizona_44k1_rates),
557 .list = arizona_44k1_rates,
560 static int arizona_sr_vals[] = {
587 static int arizona_startup(struct snd_pcm_substream *substream,
588 struct snd_soc_dai *dai)
590 struct snd_soc_codec *codec = dai->codec;
591 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
592 struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
593 const struct snd_pcm_hw_constraint_list *constraint;
594 unsigned int base_rate;
596 switch (dai_priv->clk) {
597 case ARIZONA_CLK_SYSCLK:
598 base_rate = priv->sysclk;
600 case ARIZONA_CLK_ASYNCCLK:
601 base_rate = priv->asyncclk;
607 if (base_rate % 8000)
608 constraint = &arizona_44k1_constraint;
610 constraint = &arizona_48k_constraint;
612 return snd_pcm_hw_constraint_list(substream->runtime, 0,
613 SNDRV_PCM_HW_PARAM_RATE,
617 static int arizona_hw_params(struct snd_pcm_substream *substream,
618 struct snd_pcm_hw_params *params,
619 struct snd_soc_dai *dai)
621 struct snd_soc_codec *codec = dai->codec;
622 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
623 struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
624 int base = dai->driver->base;
627 int bclk, lrclk, wl, frame, sr_val;
629 if (params_rate(params) % 8000)
630 rates = &arizona_44k1_bclk_rates[0];
632 rates = &arizona_48k_bclk_rates[0];
634 for (i = 0; i < ARRAY_SIZE(arizona_44k1_bclk_rates); i++) {
635 if (rates[i] >= snd_soc_params_to_bclk(params) &&
636 rates[i] % params_rate(params) == 0) {
641 if (i == ARRAY_SIZE(arizona_44k1_bclk_rates)) {
642 arizona_aif_err(dai, "Unsupported sample rate %dHz\n",
643 params_rate(params));
647 for (i = 0; i < ARRAY_SIZE(arizona_sr_vals); i++)
648 if (arizona_sr_vals[i] == params_rate(params))
650 if (i == ARRAY_SIZE(arizona_sr_vals)) {
651 arizona_aif_err(dai, "Unsupported sample rate %dHz\n",
652 params_rate(params));
657 lrclk = snd_soc_params_to_bclk(params) / params_rate(params);
659 arizona_aif_dbg(dai, "BCLK %dHz LRCLK %dHz\n",
660 rates[bclk], rates[bclk] / lrclk);
662 wl = snd_pcm_format_width(params_format(params));
663 frame = wl << ARIZONA_AIF1TX_WL_SHIFT | wl;
666 * We will need to be more flexible than this in future,
667 * currently we use a single sample rate for SYSCLK.
669 switch (dai_priv->clk) {
670 case ARIZONA_CLK_SYSCLK:
671 snd_soc_update_bits(codec, ARIZONA_SAMPLE_RATE_1,
672 ARIZONA_SAMPLE_RATE_1_MASK, sr_val);
673 snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
674 ARIZONA_AIF1_RATE_MASK, 0);
676 case ARIZONA_CLK_ASYNCCLK:
677 snd_soc_update_bits(codec, ARIZONA_ASYNC_SAMPLE_RATE_1,
678 ARIZONA_ASYNC_SAMPLE_RATE_MASK, sr_val);
679 snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
680 ARIZONA_AIF1_RATE_MASK, 8);
683 arizona_aif_err(dai, "Invalid clock %d\n", dai_priv->clk);
687 snd_soc_update_bits(codec, base + ARIZONA_AIF_BCLK_CTRL,
688 ARIZONA_AIF1_BCLK_FREQ_MASK, bclk);
689 snd_soc_update_bits(codec, base + ARIZONA_AIF_TX_BCLK_RATE,
690 ARIZONA_AIF1TX_BCPF_MASK, lrclk);
691 snd_soc_update_bits(codec, base + ARIZONA_AIF_RX_BCLK_RATE,
692 ARIZONA_AIF1RX_BCPF_MASK, lrclk);
693 snd_soc_update_bits(codec, base + ARIZONA_AIF_FRAME_CTRL_1,
694 ARIZONA_AIF1TX_WL_MASK |
695 ARIZONA_AIF1TX_SLOT_LEN_MASK, frame);
696 snd_soc_update_bits(codec, base + ARIZONA_AIF_FRAME_CTRL_2,
697 ARIZONA_AIF1RX_WL_MASK |
698 ARIZONA_AIF1RX_SLOT_LEN_MASK, frame);
703 static const char *arizona_dai_clk_str(int clk_id)
706 case ARIZONA_CLK_SYSCLK:
708 case ARIZONA_CLK_ASYNCCLK:
711 return "Unknown clock";
715 static int arizona_dai_set_sysclk(struct snd_soc_dai *dai,
716 int clk_id, unsigned int freq, int dir)
718 struct snd_soc_codec *codec = dai->codec;
719 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
720 struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
721 struct snd_soc_dapm_route routes[2];
724 case ARIZONA_CLK_SYSCLK:
725 case ARIZONA_CLK_ASYNCCLK:
731 if (clk_id == dai_priv->clk)
735 dev_err(codec->dev, "Can't change clock on active DAI %d\n",
740 memset(&routes, 0, sizeof(routes));
741 routes[0].sink = dai->driver->capture.stream_name;
742 routes[1].sink = dai->driver->playback.stream_name;
744 routes[0].source = arizona_dai_clk_str(dai_priv->clk);
745 routes[1].source = arizona_dai_clk_str(dai_priv->clk);
746 snd_soc_dapm_del_routes(&codec->dapm, routes, ARRAY_SIZE(routes));
748 routes[0].source = arizona_dai_clk_str(clk_id);
749 routes[1].source = arizona_dai_clk_str(clk_id);
750 snd_soc_dapm_add_routes(&codec->dapm, routes, ARRAY_SIZE(routes));
752 return snd_soc_dapm_sync(&codec->dapm);
755 const struct snd_soc_dai_ops arizona_dai_ops = {
756 .startup = arizona_startup,
757 .set_fmt = arizona_set_fmt,
758 .hw_params = arizona_hw_params,
759 .set_sysclk = arizona_dai_set_sysclk,
761 EXPORT_SYMBOL_GPL(arizona_dai_ops);
763 int arizona_init_dai(struct arizona_priv *priv, int id)
765 struct arizona_dai_priv *dai_priv = &priv->dai[id];
767 dai_priv->clk = ARIZONA_CLK_SYSCLK;
771 EXPORT_SYMBOL_GPL(arizona_init_dai);
773 static irqreturn_t arizona_fll_lock(int irq, void *data)
775 struct arizona_fll *fll = data;
777 arizona_fll_dbg(fll, "Lock status changed\n");
779 complete(&fll->lock);
784 static irqreturn_t arizona_fll_clock_ok(int irq, void *data)
786 struct arizona_fll *fll = data;
788 arizona_fll_dbg(fll, "clock OK\n");
802 { 64000, 128000, 3, 8 },
803 { 128000, 256000, 2, 4 },
804 { 256000, 1000000, 1, 2 },
805 { 1000000, 13500000, 0, 1 },
808 struct arizona_fll_cfg {
817 static int arizona_calc_fll(struct arizona_fll *fll,
818 struct arizona_fll_cfg *cfg,
822 unsigned int target, div, gcd_fll;
825 arizona_fll_dbg(fll, "Fref=%u Fout=%u\n", Fref, Fout);
827 /* Fref must be <=13.5MHz */
830 while ((Fref / div) > 13500000) {
836 "Can't scale %dMHz in to <=13.5MHz\n",
842 /* Apply the division for our remaining calculations */
845 /* Fvco should be over the targt; don't check the upper bound */
847 while (Fout * div < 90000000 * fll->vco_mult) {
850 arizona_fll_err(fll, "No FLL_OUTDIV for Fout=%uHz\n",
855 target = Fout * div / fll->vco_mult;
858 arizona_fll_dbg(fll, "Fvco=%dHz\n", target);
860 /* Find an appropraite FLL_FRATIO and factor it out of the target */
861 for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) {
862 if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) {
863 cfg->fratio = fll_fratios[i].fratio;
864 ratio = fll_fratios[i].ratio;
868 if (i == ARRAY_SIZE(fll_fratios)) {
869 arizona_fll_err(fll, "Unable to find FRATIO for Fref=%uHz\n",
874 cfg->n = target / (ratio * Fref);
877 gcd_fll = gcd(target, ratio * Fref);
878 arizona_fll_dbg(fll, "GCD=%u\n", gcd_fll);
880 cfg->theta = (target - (cfg->n * ratio * Fref))
882 cfg->lambda = (ratio * Fref) / gcd_fll;
888 arizona_fll_dbg(fll, "N=%x THETA=%x LAMBDA=%x\n",
889 cfg->n, cfg->theta, cfg->lambda);
890 arizona_fll_dbg(fll, "FRATIO=%x(%d) OUTDIV=%x REFCLK_DIV=%x\n",
891 cfg->fratio, cfg->fratio, cfg->outdiv, cfg->refdiv);
897 static void arizona_apply_fll(struct arizona *arizona, unsigned int base,
898 struct arizona_fll_cfg *cfg, int source)
900 regmap_update_bits(arizona->regmap, base + 3,
901 ARIZONA_FLL1_THETA_MASK, cfg->theta);
902 regmap_update_bits(arizona->regmap, base + 4,
903 ARIZONA_FLL1_LAMBDA_MASK, cfg->lambda);
904 regmap_update_bits(arizona->regmap, base + 5,
905 ARIZONA_FLL1_FRATIO_MASK,
906 cfg->fratio << ARIZONA_FLL1_FRATIO_SHIFT);
907 regmap_update_bits(arizona->regmap, base + 6,
908 ARIZONA_FLL1_CLK_REF_DIV_MASK |
909 ARIZONA_FLL1_CLK_REF_SRC_MASK,
910 cfg->refdiv << ARIZONA_FLL1_CLK_REF_DIV_SHIFT |
911 source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT);
913 regmap_update_bits(arizona->regmap, base + 2,
914 ARIZONA_FLL1_CTRL_UPD | ARIZONA_FLL1_N_MASK,
915 ARIZONA_FLL1_CTRL_UPD | cfg->n);
918 int arizona_set_fll(struct arizona_fll *fll, int source,
919 unsigned int Fref, unsigned int Fout)
921 struct arizona *arizona = fll->arizona;
922 struct arizona_fll_cfg cfg, sync;
923 unsigned int reg, val;
928 ret = regmap_read(arizona->regmap, fll->base + 1, ®);
930 arizona_fll_err(fll, "Failed to read current state: %d\n",
934 ena = reg & ARIZONA_FLL1_ENA;
937 /* Do we have a 32kHz reference? */
938 regmap_read(arizona->regmap, ARIZONA_CLOCK_32K_1, &val);
939 switch (val & ARIZONA_CLK_32K_SRC_MASK) {
940 case ARIZONA_CLK_SRC_MCLK1:
941 case ARIZONA_CLK_SRC_MCLK2:
942 syncsrc = val & ARIZONA_CLK_32K_SRC_MASK;
948 if (source == syncsrc)
952 ret = arizona_calc_fll(fll, &sync, Fref, Fout);
956 ret = arizona_calc_fll(fll, &cfg, 32768, Fout);
960 ret = arizona_calc_fll(fll, &cfg, Fref, Fout);
965 regmap_update_bits(arizona->regmap, fll->base + 1,
966 ARIZONA_FLL1_ENA, 0);
967 regmap_update_bits(arizona->regmap, fll->base + 0x11,
968 ARIZONA_FLL1_SYNC_ENA, 0);
971 pm_runtime_put_autosuspend(arizona->dev);
976 regmap_update_bits(arizona->regmap, fll->base + 5,
977 ARIZONA_FLL1_OUTDIV_MASK,
978 cfg.outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);
981 arizona_apply_fll(arizona, fll->base, &cfg, syncsrc);
982 arizona_apply_fll(arizona, fll->base + 0x10, &sync, source);
984 arizona_apply_fll(arizona, fll->base, &cfg, source);
988 pm_runtime_get(arizona->dev);
990 /* Clear any pending completions */
991 try_wait_for_completion(&fll->ok);
993 regmap_update_bits(arizona->regmap, fll->base + 1,
994 ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA);
996 regmap_update_bits(arizona->regmap, fll->base + 0x11,
997 ARIZONA_FLL1_SYNC_ENA,
998 ARIZONA_FLL1_SYNC_ENA);
1000 ret = wait_for_completion_timeout(&fll->ok,
1001 msecs_to_jiffies(25));
1003 arizona_fll_warn(fll, "Timed out waiting for lock\n");
1007 EXPORT_SYMBOL_GPL(arizona_set_fll);
1009 int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq,
1010 int ok_irq, struct arizona_fll *fll)
1014 init_completion(&fll->lock);
1015 init_completion(&fll->ok);
1019 fll->arizona = arizona;
1021 snprintf(fll->lock_name, sizeof(fll->lock_name), "FLL%d lock", id);
1022 snprintf(fll->clock_ok_name, sizeof(fll->clock_ok_name),
1023 "FLL%d clock OK", id);
1025 ret = arizona_request_irq(arizona, lock_irq, fll->lock_name,
1026 arizona_fll_lock, fll);
1028 dev_err(arizona->dev, "Failed to get FLL%d lock IRQ: %d\n",
1032 ret = arizona_request_irq(arizona, ok_irq, fll->clock_ok_name,
1033 arizona_fll_clock_ok, fll);
1035 dev_err(arizona->dev, "Failed to get FLL%d clock OK IRQ: %d\n",
1041 EXPORT_SYMBOL_GPL(arizona_init_fll);
1043 MODULE_DESCRIPTION("ASoC Wolfson Arizona class device support");
1044 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1045 MODULE_LICENSE("GPL");