2 * es8316.c -- es8316 ALSA SoC audio driver
3 * Copyright Everest Semiconductor Co.,Ltd
5 * Author: David Yang <yangxiaohua@everest-semi.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/clk.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/init.h>
17 #include <linux/delay.h>
19 #include <linux/i2c.h>
20 #include <linux/spi/spi.h>
21 #include <linux/platform_device.h>
22 #include <linux/slab.h>
23 #include <linux/of_gpio.h>
24 #include <sound/core.h>
25 #include <sound/pcm.h>
26 #include <sound/pcm_params.h>
27 #include <sound/tlv.h>
28 #include <sound/soc.h>
29 #include <sound/soc-dapm.h>
30 #include <sound/initval.h>
31 #include <linux/proc_fs.h>
32 #include <linux/gpio.h>
33 #include <linux/interrupt.h>
34 #include <linux/irq.h>
35 #include <linux/regmap.h>
38 #define INVALID_GPIO -1
41 #define es8316_DEF_VOL 0x1e
43 static struct snd_soc_codec *es8316_codec;
45 static const struct reg_default es8316_reg_defaults[] = {
46 {0x00, 0x03}, {0x01, 0x03}, {0x02, 0x00}, {0x03, 0x20},
47 {0x04, 0x11}, {0x05, 0x00}, {0x06, 0x11}, {0x07, 0x00},
48 {0x08, 0x00}, {0x09, 0x01}, {0x0a, 0x00}, {0x0b, 0x00},
49 {0x0c, 0xf8}, {0x0d, 0x3f}, {0x0e, 0x00}, {0x0f, 0x00},
50 {0x10, 0x01}, {0x11, 0xfc}, {0x12, 0x28}, {0x13, 0x00},
51 {0x14, 0x00}, {0x15, 0x33}, {0x16, 0x00}, {0x17, 0x00},
52 {0x18, 0x88}, {0x19, 0x06}, {0x1a, 0x22}, {0x1b, 0x03},
53 {0x1c, 0x0f}, {0x1d, 0x00}, {0x1e, 0x80}, {0x1f, 0x80},
54 {0x20, 0x00}, {0x21, 0x00}, {0x22, 0xc0}, {0x23, 0x00},
55 {0x24, 0x01}, {0x25, 0x08}, {0x26, 0x10}, {0x27, 0xc0},
56 {0x28, 0x00}, {0x29, 0x1c}, {0x2a, 0x00}, {0x2b, 0xb0},
57 {0x2c, 0x32}, {0x2d, 0x03}, {0x2e, 0x00}, {0x2f, 0x11},
58 {0x30, 0x10}, {0x31, 0x00}, {0x32, 0x00}, {0x33, 0xc0},
59 {0x34, 0xc0}, {0x35, 0x1f}, {0x36, 0xf7}, {0x37, 0xfd},
60 {0x38, 0xff}, {0x39, 0x1f}, {0x3a, 0xf7}, {0x3b, 0xfd},
61 {0x3c, 0xff}, {0x3d, 0x1f}, {0x3e, 0xf7}, {0x3f, 0xfd},
62 {0x40, 0xff}, {0x41, 0x1f}, {0x42, 0xf7}, {0x43, 0xfd},
63 {0x44, 0xff}, {0x45, 0x1f}, {0x46, 0xf7}, {0x47, 0xfd},
64 {0x48, 0xff}, {0x49, 0x1f}, {0x4a, 0xf7}, {0x4b, 0xfd},
65 {0x4c, 0xff}, {0x4d, 0x00}, {0x4e, 0x00}, {0x4f, 0xff},
66 {0x50, 0x00}, {0x51, 0x00}, {0x52, 0x00}, {0x53, 0x00},
69 /* codec private data */
71 struct regmap *regmap;
72 unsigned int dmic_amic;
74 struct snd_pcm_hw_constraint_list *sysclk_constraints;
78 struct delayed_work work;
84 bool spk_active_level;
91 * write value 0xff to reg0x00, the chip will be in reset mode
92 * then, writer 0x00 to reg0x00, unreset the chip
94 static int es8316_reset(struct snd_soc_codec *codec)
96 snd_soc_write(codec, ES8316_RESET_REG00, 0x3F);
97 usleep_range(5000, 5500);
98 return snd_soc_write(codec, ES8316_RESET_REG00, 0x03);
101 static void es8316_enable_spk(struct es8316_priv *es8316, bool enable)
105 level = enable ? es8316->spk_active_level : !es8316->spk_active_level;
106 gpio_set_value(es8316->spk_ctl_gpio, level);
109 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -9600, 50, 1);
110 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -9600, 50, 1);
111 static const DECLARE_TLV_DB_SCALE(hpmixer_gain_tlv, -1200, 150, 0);
112 static const DECLARE_TLV_DB_SCALE(mic_bst_tlv, 0, 1200, 0);
114 static unsigned int linin_pga_tlv[] = {
115 TLV_DB_RANGE_HEAD(12),
116 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
117 1, 1, TLV_DB_SCALE_ITEM(300, 0, 0),
118 2, 2, TLV_DB_SCALE_ITEM(600, 0, 0),
119 3, 3, TLV_DB_SCALE_ITEM(900, 0, 0),
120 4, 4, TLV_DB_SCALE_ITEM(1200, 0, 0),
121 5, 5, TLV_DB_SCALE_ITEM(1500, 0, 0),
122 6, 6, TLV_DB_SCALE_ITEM(1800, 0, 0),
123 7, 7, TLV_DB_SCALE_ITEM(2100, 0, 0),
124 8, 8, TLV_DB_SCALE_ITEM(2400, 0, 0),
127 static unsigned int hpout_vol_tlv[] = {
128 TLV_DB_RANGE_HEAD(1),
129 0, 3, TLV_DB_SCALE_ITEM(-4800, 1200, 0),
132 static const char *const alc_func_txt[] = { "Off", "On" };
134 static const struct soc_enum alc_func =
135 SOC_ENUM_SINGLE(ES8316_ADC_ALC1_REG29, 6, 2, alc_func_txt);
137 static const char *const ng_type_txt[] = {
138 "Constant PGA Gain", "Mute ADC Output" };
140 static const struct soc_enum ng_type =
141 SOC_ENUM_SINGLE(ES8316_ADC_ALC6_REG2E, 6, 2, ng_type_txt);
143 static const char *const adcpol_txt[] = { "Normal", "Invert" };
145 static const struct soc_enum adcpol =
146 SOC_ENUM_SINGLE(ES8316_ADC_MUTE_REG26, 1, 2, adcpol_txt);
148 static const char *const dacpol_txt[] = {
149 "Normal", "R Invert", "L Invert", "L + R Invert" };
151 static const struct soc_enum dacpol =
152 SOC_ENUM_SINGLE(ES8316_DAC_SET1_REG30, 0, 4, dacpol_txt);
154 static const struct snd_kcontrol_new es8316_snd_controls[] = {
156 SOC_DOUBLE_TLV("HP Playback Volume", ES8316_CPHP_ICAL_VOL_REG18,
157 4, 0, 0, 1, hpout_vol_tlv),
158 /* HPMIXER VOLUME Control */
159 SOC_DOUBLE_TLV("HPMixer Gain", ES8316_HPMIX_VOL_REG16,
160 0, 4, 7, 0, hpmixer_gain_tlv),
162 /* DAC Digital controls */
163 SOC_DOUBLE_R_TLV("DAC Playback Volume", ES8316_DAC_VOLL_REG33,
164 ES8316_DAC_VOLR_REG34, 0, 0xC0, 1, dac_vol_tlv),
166 SOC_SINGLE("Enable DAC Soft Ramp", ES8316_DAC_SET1_REG30, 4, 1, 1),
167 SOC_SINGLE("DAC Soft Ramp Rate", ES8316_DAC_SET1_REG30, 2, 4, 0),
169 SOC_ENUM("Playback Polarity", dacpol),
170 SOC_SINGLE("DAC Notch Filter", ES8316_DAC_SET2_REG31, 6, 1, 0),
171 SOC_SINGLE("DAC Double Fs Mode", ES8316_DAC_SET2_REG31, 7, 1, 0),
172 SOC_SINGLE("DAC Volume Control-LeR", ES8316_DAC_SET2_REG31, 2, 1, 0),
173 SOC_SINGLE("DAC Stereo Enhancement", ES8316_DAC_SET3_REG32, 0, 7, 0),
175 /* +20dB D2SE PGA Control */
176 SOC_SINGLE_TLV("MIC Boost", ES8316_ADC_D2SEPGA_REG24,
177 0, 1, 0, mic_bst_tlv),
178 /* 0-+24dB Lineinput PGA Control */
179 SOC_SINGLE_TLV("Input PGA", ES8316_ADC_PGAGAIN_REG23,
180 4, 8, 0, linin_pga_tlv),
182 /* ADC Digital Control */
183 SOC_SINGLE_TLV("ADC Capture Volume", ES8316_ADC_VOLUME_REG27,
184 0, 0xC0, 1, adc_vol_tlv),
185 SOC_SINGLE("ADC Soft Ramp", ES8316_ADC_MUTE_REG26, 4, 1, 0),
186 SOC_ENUM("Capture Polarity", adcpol),
187 SOC_SINGLE("ADC Double FS Mode", ES8316_ADC_DMIC_REG25, 4, 1, 0),
188 /* ADC ALC Control */
189 SOC_SINGLE("ALC Capture Target Volume",
190 ES8316_ADC_ALC3_REG2B, 4, 10, 0),
191 SOC_SINGLE("ALC Capture Max PGA", ES8316_ADC_ALC1_REG29, 0, 28, 0),
192 SOC_SINGLE("ALC Capture Min PGA", ES8316_ADC_ALC2_REG2A, 0, 28, 0),
193 SOC_ENUM("ALC Capture Function", alc_func),
194 SOC_SINGLE("ALC Capture Hold Time", ES8316_ADC_ALC3_REG2B, 0, 10, 0),
195 SOC_SINGLE("ALC Capture Decay Time", ES8316_ADC_ALC4_REG2C, 4, 10, 0),
196 SOC_SINGLE("ALC Capture Attack Time", ES8316_ADC_ALC4_REG2C, 0, 10, 0),
197 SOC_SINGLE("ALC Capture NG Threshold", ES8316_ADC_ALC6_REG2E, 0, 31, 0),
198 SOC_ENUM("ALC Capture NG Type", ng_type),
199 SOC_SINGLE("ALC Capture NG Switch", ES8316_ADC_ALC6_REG2E, 5, 1, 0),
202 /* Analog Input MUX */
203 static const char * const es8316_analog_in_txt[] = {
206 "lin1-rin1 with 20db Boost",
207 "lin2-rin2 with 20db Boost"
210 static const unsigned int es8316_analog_in_values[] = { 0, 1, 2, 3 };
212 static const struct soc_enum es8316_analog_input_enum =
213 SOC_VALUE_ENUM_SINGLE(ES8316_ADC_PDN_LINSEL_REG22, 4, 3,
214 ARRAY_SIZE(es8316_analog_in_txt),
215 es8316_analog_in_txt,
216 es8316_analog_in_values);
218 static const struct snd_kcontrol_new es8316_analog_in_mux_controls =
219 SOC_DAPM_ENUM("Route", es8316_analog_input_enum);
222 static const char * const es8316_dmic_txt[] = {
224 "dmic data at high level",
225 "dmic data at low level",
228 static const unsigned int es8316_dmic_values[] = { 0, 1, 2 };
230 static const struct soc_enum es8316_dmic_src_enum =
231 SOC_VALUE_ENUM_SINGLE(ES8316_ADC_DMIC_REG25, 0, 3,
232 ARRAY_SIZE(es8316_dmic_txt),
236 static const struct snd_kcontrol_new es8316_dmic_src_controls =
237 SOC_DAPM_ENUM("Route", es8316_dmic_src_enum);
240 static const char *const es8316_hpmux_texts[] = {
243 "lin-rin with Boost",
244 "lin-rin with Boost and PGA"
247 static const unsigned int es8316_hpmux_values[] = { 0, 1, 2, 3 };
249 static const struct soc_enum es8316_left_hpmux_enum =
250 SOC_VALUE_ENUM_SINGLE(ES8316_HPMIX_SEL_REG13, 4, 7,
251 ARRAY_SIZE(es8316_hpmux_texts),
253 es8316_hpmux_values);
255 static const struct snd_kcontrol_new es8316_left_hpmux_controls =
256 SOC_DAPM_ENUM("Route", es8316_left_hpmux_enum);
258 static const struct soc_enum es8316_right_hpmux_enum =
259 SOC_VALUE_ENUM_SINGLE(ES8316_HPMIX_SEL_REG13, 0, 7,
260 ARRAY_SIZE(es8316_hpmux_texts),
262 es8316_hpmux_values);
264 static const struct snd_kcontrol_new es8316_right_hpmux_controls =
265 SOC_DAPM_ENUM("Route", es8316_right_hpmux_enum);
267 /* headphone Output Mixer */
268 static const struct snd_kcontrol_new es8316_out_left_mix[] = {
269 SOC_DAPM_SINGLE("LLIN Switch", ES8316_HPMIX_SWITCH_REG14,
271 SOC_DAPM_SINGLE("Left DAC Switch", ES8316_HPMIX_SWITCH_REG14,
275 static const struct snd_kcontrol_new es8316_out_right_mix[] = {
276 SOC_DAPM_SINGLE("RLIN Switch", ES8316_HPMIX_SWITCH_REG14,
278 SOC_DAPM_SINGLE("Right DAC Switch", ES8316_HPMIX_SWITCH_REG14,
282 /* DAC data source mux */
283 static const char * const es8316_dacsrc_texts[] = {
284 "LDATA TO LDAC, RDATA TO RDAC",
285 "LDATA TO LDAC, LDATA TO RDAC",
286 "RDATA TO LDAC, RDATA TO RDAC",
287 "RDATA TO LDAC, LDATA TO RDAC",
290 static const unsigned int es8316_dacsrc_values[] = { 0, 1, 2, 3 };
292 static const struct soc_enum es8316_dacsrc_mux_enum =
293 SOC_VALUE_ENUM_SINGLE(ES8316_DAC_SET1_REG30, 6, 4,
294 ARRAY_SIZE(es8316_dacsrc_texts),
296 es8316_dacsrc_values);
297 static const struct snd_kcontrol_new es8316_dacsrc_mux_controls =
298 SOC_DAPM_ENUM("Route", es8316_dacsrc_mux_enum);
300 static const struct snd_soc_dapm_widget es8316_dapm_widgets[] = {
302 SND_SOC_DAPM_INPUT("DMIC"),
303 SND_SOC_DAPM_INPUT("MIC1"),
304 SND_SOC_DAPM_INPUT("MIC2"),
306 SND_SOC_DAPM_MICBIAS("micbias", SND_SOC_NOPM,
309 SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
310 &es8316_analog_in_mux_controls),
312 SND_SOC_DAPM_PGA("Line input PGA", ES8316_ADC_PDN_LINSEL_REG22,
316 SND_SOC_DAPM_ADC("Mono ADC", NULL, ES8316_ADC_PDN_LINSEL_REG22, 6, 1),
319 SND_SOC_DAPM_MUX("Digital Mic Mux", SND_SOC_NOPM, 0, 0,
320 &es8316_dmic_src_controls),
322 /* Digital Interface */
323 SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S1 Capture", 1,
324 ES8316_SDP_ADCFMT_REG0A, 6, 0),
326 SND_SOC_DAPM_AIF_IN("I2S IN", "I2S1 Playback", 0,
329 /* DACs DATA SRC MUX */
330 SND_SOC_DAPM_MUX("DAC SRC Mux", SND_SOC_NOPM, 0, 0,
331 &es8316_dacsrc_mux_controls),
333 SND_SOC_DAPM_DAC("Right DAC", NULL, ES8316_DAC_PDN_REG2F, 0, 1),
334 SND_SOC_DAPM_DAC("Left DAC", NULL, ES8316_DAC_PDN_REG2F, 4, 1),
336 /* Headphone Output Side */
337 /* hpmux for hp mixer */
338 SND_SOC_DAPM_MUX("Left Hp mux", SND_SOC_NOPM, 0, 0,
339 &es8316_left_hpmux_controls),
340 SND_SOC_DAPM_MUX("Right Hp mux", SND_SOC_NOPM, 0, 0,
341 &es8316_right_hpmux_controls),
343 SND_SOC_DAPM_MIXER("Left Hp mixer", ES8316_HPMIX_PDN_REG15,
344 4, 1, &es8316_out_left_mix[0],
345 ARRAY_SIZE(es8316_out_left_mix)),
346 SND_SOC_DAPM_MIXER("Right Hp mixer", ES8316_HPMIX_PDN_REG15,
347 0, 1, &es8316_out_right_mix[0],
348 ARRAY_SIZE(es8316_out_right_mix)),
349 SND_SOC_DAPM_MIXER("Left Hp mixer", SND_SOC_NOPM,
350 4, 1, &es8316_out_left_mix[0],
351 ARRAY_SIZE(es8316_out_left_mix)),
352 SND_SOC_DAPM_MIXER("Right Hp mixer", SND_SOC_NOPM,
353 0, 1, &es8316_out_right_mix[0],
354 ARRAY_SIZE(es8316_out_right_mix)),
356 /* Output charge pump */
358 SND_SOC_DAPM_PGA("HPCP L", SND_SOC_NOPM,
360 SND_SOC_DAPM_PGA("HPCP R", SND_SOC_NOPM,
363 SND_SOC_DAPM_PGA("HPCP L", ES8316_CPHP_OUTEN_REG17,
365 SND_SOC_DAPM_PGA("HPCP R", ES8316_CPHP_OUTEN_REG17,
369 SND_SOC_DAPM_PGA("HPVOL L", SND_SOC_NOPM,
371 SND_SOC_DAPM_PGA("HPVOL R", SND_SOC_NOPM,
375 SND_SOC_DAPM_PGA("HPVOL L", ES8316_CPHP_OUTEN_REG17,
377 SND_SOC_DAPM_PGA("HPVOL R", ES8316_CPHP_OUTEN_REG17,
380 SND_SOC_DAPM_OUTPUT("HPOL"),
381 SND_SOC_DAPM_OUTPUT("HPOR"),
384 static const struct snd_soc_dapm_route es8316_dapm_routes[] = {
388 {"MIC1", NULL, "micbias"},
389 {"MIC2", NULL, "micbias"},
390 {"DMIC", NULL, "micbias"},
392 {"Differential Mux", "lin1-rin1", "MIC1"},
393 {"Differential Mux", "lin2-rin2", "MIC2"},
394 {"Line input PGA", NULL, "Differential Mux"},
396 {"Mono ADC", NULL, "Line input PGA"},
398 {"Digital Mic Mux", "dmic disable", "Mono ADC"},
399 {"Digital Mic Mux", "dmic data at high level", "DMIC"},
400 {"Digital Mic Mux", "dmic data at low level", "DMIC"},
402 {"I2S OUT", NULL, "Digital Mic Mux"},
406 {"DAC SRC Mux", "LDATA TO LDAC, RDATA TO RDAC", "I2S IN"},
407 {"DAC SRC Mux", "LDATA TO LDAC, LDATA TO RDAC", "I2S IN"},
408 {"DAC SRC Mux", "RDATA TO LDAC, RDATA TO RDAC", "I2S IN"},
409 {"DAC SRC Mux", "RDATA TO LDAC, LDATA TO RDAC", "I2S IN"},
411 {"Left DAC", NULL, "DAC SRC Mux"},
412 {"Right DAC", NULL, "DAC SRC Mux"},
414 {"Left Hp mux", "lin1-rin1", "MIC1"},
415 {"Left Hp mux", "lin2-rin2", "MIC2"},
416 {"Left Hp mux", "lin-rin with Boost", "Differential Mux"},
417 {"Left Hp mux", "lin-rin with Boost and PGA", "Line input PGA"},
419 {"Right Hp mux", "lin1-rin1", "MIC1"},
420 {"Right Hp mux", "lin2-rin2", "MIC2"},
421 {"Right Hp mux", "lin-rin with Boost", "Differential Mux"},
422 {"Right Hp mux", "lin-rin with Boost and PGA", "Line input PGA"},
424 {"Left Hp mixer", "LLIN Switch", "Left Hp mux"},
425 {"Left Hp mixer", "Left DAC Switch", "Left DAC"},
427 {"Right Hp mixer", "RLIN Switch", "Right Hp mux"},
428 {"Right Hp mixer", "Right DAC Switch", "Right DAC"},
430 {"HPCP L", NULL, "Left Hp mixer"},
431 {"HPCP R", NULL, "Right Hp mixer"},
433 {"HPVOL L", NULL, "HPCP L"},
434 {"HPVOL R", NULL, "HPCP R"},
436 {"HPOL", NULL, "HPVOL L"},
437 {"HPOR", NULL, "HPVOL R"},
441 u32 mclk; /*mclk frequency*/
442 u32 rate; /*sample rate*/
443 u8 div; /*adcclk and dacclk divider*/
444 u8 lrck_h; /*adclrck divider and daclrck divider*/
446 u8 sr; /*sclk divider*/
450 /* codec hifi mclk clock divider coefficients */
451 static const struct _coeff_div coeff_div[] = {
453 { 12288000, 8000, 6, 0x06, 0x00, 21, 32 },
454 { 11289600, 8000, 6, 0x05, 0x83, 20, 29 },
455 { 18432000, 8000, 9, 0x09, 0x00, 27, 32 },
456 { 16934400, 8000, 8, 0x08, 0x44, 25, 33 },
457 { 12000000, 8000, 7, 0x05, 0xdc, 21, 25 },
458 { 19200000, 8000, 12, 0x09, 0x60, 27, 25 },
461 { 11289600, 11025, 4, 0x04, 0x00, 16, 32 },
462 { 16934400, 11025, 6, 0x06, 0x00, 21, 32 },
463 { 12000000, 11025, 4, 0x04, 0x40, 17, 34 },
466 { 12288000, 16000, 3, 0x03, 0x00, 12, 32 },
467 { 18432000, 16000, 5, 0x04, 0x80, 18, 25 },
468 { 12000000, 16000, 3, 0x02, 0xee, 12, 31 },
469 { 19200000, 16000, 6, 0x04, 0xb0, 18, 25 },
472 { 11289600, 22050, 2, 0x02, 0x00, 8, 32 },
473 { 16934400, 22050, 3, 0x03, 0x00, 12, 32 },
474 { 12000000, 22050, 2, 0x02, 0x20, 8, 34 },
477 { 12288000, 32000, 1, 0x01, 0x80, 6, 48 },
478 { 18432000, 32000, 2, 0x02, 0x40, 9, 32 },
479 { 12000000, 32000, 1, 0x01, 0x77, 6, 31 },
480 { 19200000, 32000, 3, 0x02, 0x58, 10, 25 },
483 { 11289600, 44100, 1, 0x01, 0x00, 4, 32 },
484 { 16934400, 44100, 1, 0x01, 0x80, 6, 32 },
485 { 12000000, 44100, 1, 0x01, 0x10, 4, 34 },
488 { 12288000, 48000, 1, 0x01, 0x00, 4, 32 },
489 { 18432000, 48000, 1, 0x01, 0x80, 6, 32 },
490 { 12000000, 48000, 1, 0x00, 0xfa, 4, 31 },
491 { 19200000, 48000, 2, 0x01, 0x90, 6, 25 },
494 { 11289600, 88200, 1, 0x00, 0x80, 2, 32 },
495 { 16934400, 88200, 1, 0x00, 0xc0, 3, 48 },
496 { 12000000, 88200, 1, 0x00, 0x88, 2, 34 },
499 { 12288000, 96000, 1, 0x00, 0x80, 2, 32 },
500 { 18432000, 96000, 1, 0x00, 0xc0, 3, 48 },
501 { 12000000, 96000, 1, 0x00, 0x7d, 1, 31 },
502 { 19200000, 96000, 1, 0x00, 0xc8, 3, 25 },
505 static inline int get_coeff(int mclk, int rate)
509 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
510 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
517 /* The set of rates we can generate from the above for each SYSCLK */
519 static unsigned int rates_12288[] = {
520 8000, 12000, 16000, 24000, 24000, 32000, 48000, 96000,
523 static struct snd_pcm_hw_constraint_list constraints_12288 = {
524 .count = ARRAY_SIZE(rates_12288),
528 static unsigned int rates_112896[] = {
529 8000, 11025, 22050, 44100,
532 static struct snd_pcm_hw_constraint_list constraints_112896 = {
533 .count = ARRAY_SIZE(rates_112896),
534 .list = rates_112896,
537 static unsigned int rates_12[] = {
538 8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000,
542 static struct snd_pcm_hw_constraint_list constraints_12 = {
543 .count = ARRAY_SIZE(rates_12),
548 * Note that this should be called from init rather than from hw_params.
550 static int es8316_set_dai_sysclk(struct snd_soc_dai *codec_dai,
551 int clk_id, unsigned int freq, int dir)
553 struct snd_soc_codec *codec = codec_dai->codec;
554 struct es8316_priv *es8316 = snd_soc_codec_get_drvdata(codec);
561 es8316->sysclk_constraints = &constraints_112896;
562 es8316->sysclk = freq;
569 es8316->sysclk_constraints = &constraints_12288;
570 es8316->sysclk = freq;
574 es8316->sysclk_constraints = &constraints_12;
575 es8316->sysclk = freq;
581 static int es8316_set_dai_fmt(struct snd_soc_dai *codec_dai,
584 struct snd_soc_codec *codec = codec_dai->codec;
589 iface = snd_soc_read(codec, ES8316_IFACE);
590 adciface = snd_soc_read(codec, ES8316_ADC_IFACE);
591 daciface = snd_soc_read(codec, ES8316_DAC_IFACE);
593 /* set master/slave audio interface */
594 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
595 case SND_SOC_DAIFMT_CBM_CFM:
598 case SND_SOC_DAIFMT_CBS_CFS:
605 /* interface format */
607 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
608 case SND_SOC_DAIFMT_I2S:
612 case SND_SOC_DAIFMT_RIGHT_J:
614 case SND_SOC_DAIFMT_LEFT_J:
620 case SND_SOC_DAIFMT_DSP_A:
626 case SND_SOC_DAIFMT_DSP_B:
636 /* clock inversion */
637 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
638 case SND_SOC_DAIFMT_NB_NF:
643 case SND_SOC_DAIFMT_IB_IF:
648 case SND_SOC_DAIFMT_IB_NF:
653 case SND_SOC_DAIFMT_NB_IF:
661 snd_soc_write(codec, ES8316_IFACE, iface);
662 snd_soc_write(codec, ES8316_ADC_IFACE, adciface);
663 snd_soc_write(codec, ES8316_DAC_IFACE, daciface);
667 static int es8316_pcm_startup(struct snd_pcm_substream *substream,
668 struct snd_soc_dai *dai)
670 struct snd_soc_codec *codec = dai->codec;
671 struct es8316_priv *es8316 = snd_soc_codec_get_drvdata(codec);
672 bool playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
674 snd_soc_write(codec, ES8316_RESET_REG00, 0xC0);
675 snd_soc_write(codec, ES8316_SYS_PDN_REG0D, 0x00);
676 /* es8316: both playback and capture need dac mclk */
677 snd_soc_update_bits(codec, ES8316_CLKMGR_CLKSW_REG01,
678 ES8316_CLKMGR_MCLK_DIV_MASK |
679 ES8316_CLKMGR_DAC_MCLK_MASK,
680 ES8316_CLKMGR_MCLK_DIV_NML |
681 ES8316_CLKMGR_DAC_MCLK_EN);
685 snd_soc_write(codec, ES8316_SYS_LP1_REG0E, 0x3F);
686 snd_soc_write(codec, ES8316_SYS_LP2_REG0F, 0x1F);
687 snd_soc_write(codec, ES8316_HPMIX_SWITCH_REG14, 0x88);
688 snd_soc_write(codec, ES8316_HPMIX_PDN_REG15, 0x00);
689 snd_soc_write(codec, ES8316_HPMIX_VOL_REG16, 0xBB);
690 snd_soc_write(codec, ES8316_CPHP_PDN2_REG1A, 0x10);
691 snd_soc_write(codec, ES8316_CPHP_LDOCTL_REG1B, 0x30);
692 snd_soc_write(codec, ES8316_CPHP_PDN1_REG19, 0x02);
693 snd_soc_write(codec, ES8316_DAC_PDN_REG2F, 0x00);
694 snd_soc_write(codec, ES8316_CPHP_OUTEN_REG17, 0x66);
695 snd_soc_update_bits(codec, ES8316_CLKMGR_CLKSW_REG01,
696 ES8316_CLKMGR_DAC_MCLK_MASK |
697 ES8316_CLKMGR_DAC_ANALOG_MASK,
698 ES8316_CLKMGR_DAC_MCLK_EN |
699 ES8316_CLKMGR_DAC_ANALOG_EN);
702 snd_soc_update_bits(codec,
703 ES8316_ADC_PDN_LINSEL_REG22, 0xC0, 0x20);
704 snd_soc_update_bits(codec, ES8316_CLKMGR_CLKSW_REG01,
705 ES8316_CLKMGR_ADC_MCLK_MASK |
706 ES8316_CLKMGR_ADC_ANALOG_MASK,
707 ES8316_CLKMGR_ADC_MCLK_EN |
708 ES8316_CLKMGR_ADC_ANALOG_EN);
714 static void es8316_pcm_shutdown(struct snd_pcm_substream *substream,
715 struct snd_soc_dai *dai)
717 struct snd_soc_pcm_runtime *rtd = substream->private_data;
718 struct snd_soc_codec *codec = rtd->codec;
719 struct es8316_priv *es8316 = snd_soc_codec_get_drvdata(codec);
720 bool playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
723 snd_soc_write(codec, ES8316_CPHP_OUTEN_REG17, 0x00);
724 snd_soc_write(codec, ES8316_DAC_PDN_REG2F, 0x11);
725 snd_soc_write(codec, ES8316_CPHP_LDOCTL_REG1B, 0x03);
726 snd_soc_write(codec, ES8316_CPHP_PDN2_REG1A, 0x22);
727 snd_soc_write(codec, ES8316_CPHP_PDN1_REG19, 0x06);
728 snd_soc_write(codec, ES8316_HPMIX_SWITCH_REG14, 0x00);
729 snd_soc_write(codec, ES8316_HPMIX_PDN_REG15, 0x33);
730 snd_soc_write(codec, ES8316_HPMIX_VOL_REG16, 0x00);
731 snd_soc_write(codec, ES8316_SYS_PDN_REG0D, 0x00);
732 snd_soc_write(codec, ES8316_SYS_LP1_REG0E, 0xFF);
733 snd_soc_write(codec, ES8316_SYS_LP2_REG0F, 0xFF);
734 snd_soc_update_bits(codec, ES8316_CLKMGR_CLKSW_REG01,
735 ES8316_CLKMGR_DAC_ANALOG_MASK,
736 ES8316_CLKMGR_DAC_ANALOG_DIS);
738 snd_soc_write(codec, ES8316_ADC_PDN_LINSEL_REG22, 0xc0);
739 snd_soc_update_bits(codec, ES8316_CLKMGR_CLKSW_REG01,
740 ES8316_CLKMGR_ADC_MCLK_MASK |
741 ES8316_CLKMGR_ADC_ANALOG_MASK,
742 ES8316_CLKMGR_ADC_MCLK_DIS |
743 ES8316_CLKMGR_ADC_ANALOG_DIS);
746 if (--es8316->pwr_count == 0) {
747 if (!es8316->hp_inserted)
748 snd_soc_write(codec, ES8316_SYS_PDN_REG0D, 0x3F);
749 snd_soc_write(codec, ES8316_CLKMGR_CLKSW_REG01, 0xF3);
753 static int es8316_pcm_hw_params(struct snd_pcm_substream *substream,
754 struct snd_pcm_hw_params *params,
755 struct snd_soc_dai *dai)
757 struct snd_soc_codec *codec = dai->codec;
760 switch (params_format(params)) {
761 case SNDRV_PCM_FORMAT_S16_LE:
762 val = ES8316_DACWL_16;
764 case SNDRV_PCM_FORMAT_S20_3LE:
765 val = ES8316_DACWL_20;
767 case SNDRV_PCM_FORMAT_S24_LE:
768 val = ES8316_DACWL_24;
770 case SNDRV_PCM_FORMAT_S32_LE:
771 val = ES8316_DACWL_32;
774 val = ES8316_DACWL_16;
778 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
779 snd_soc_update_bits(codec, ES8316_SDP_DACFMT_REG0B,
780 ES8316_DACWL_MASK, val);
782 snd_soc_update_bits(codec, ES8316_SDP_ADCFMT_REG0A,
783 ES8316_ADCWL_MASK, val);
788 static int es8316_mute(struct snd_soc_dai *dai, int mute)
790 struct snd_soc_codec *codec = dai->codec;
791 struct es8316_priv *es8316 = snd_soc_codec_get_drvdata(codec);
793 es8316->muted = mute;
795 es8316_enable_spk(es8316, false);
797 snd_soc_write(codec, ES8316_DAC_SET1_REG30, 0x20);
798 } else if (dai->playback_active) {
799 snd_soc_write(codec, ES8316_DAC_SET1_REG30, 0x00);
801 if (!es8316->hp_inserted)
802 es8316_enable_spk(es8316, true);
807 static int es8316_set_bias_level(struct snd_soc_codec *codec,
808 enum snd_soc_bias_level level)
810 struct es8316_priv *es8316 = snd_soc_codec_get_drvdata(codec);
814 case SND_SOC_BIAS_ON:
817 case SND_SOC_BIAS_PREPARE:
818 if (IS_ERR(es8316->mclk))
821 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_ON) {
822 clk_disable_unprepare(es8316->mclk);
824 ret = clk_prepare_enable(es8316->mclk);
830 case SND_SOC_BIAS_STANDBY:
833 case SND_SOC_BIAS_OFF:
834 snd_soc_write(codec, ES8316_CPHP_OUTEN_REG17, 0x00);
835 snd_soc_write(codec, ES8316_DAC_PDN_REG2F, 0x11);
836 snd_soc_write(codec, ES8316_CPHP_LDOCTL_REG1B, 0x03);
837 snd_soc_write(codec, ES8316_CPHP_PDN2_REG1A, 0x22);
838 snd_soc_write(codec, ES8316_CPHP_PDN1_REG19, 0x06);
839 snd_soc_write(codec, ES8316_HPMIX_SWITCH_REG14, 0x00);
840 snd_soc_write(codec, ES8316_HPMIX_PDN_REG15, 0x33);
841 snd_soc_write(codec, ES8316_HPMIX_VOL_REG16, 0x00);
842 snd_soc_write(codec, ES8316_ADC_PDN_LINSEL_REG22, 0xC0);
843 if (!es8316->hp_inserted)
844 snd_soc_write(codec, ES8316_SYS_PDN_REG0D, 0x3F);
845 snd_soc_write(codec, ES8316_SYS_LP1_REG0E, 0x3F);
846 snd_soc_write(codec, ES8316_SYS_LP2_REG0F, 0x1F);
847 snd_soc_write(codec, ES8316_RESET_REG00, 0x00);
854 #define es8316_RATES SNDRV_PCM_RATE_8000_96000
856 #define es8316_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
857 SNDRV_PCM_FMTBIT_S24_LE)
859 static struct snd_soc_dai_ops es8316_ops = {
860 .startup = es8316_pcm_startup,
861 .hw_params = es8316_pcm_hw_params,
862 .set_fmt = es8316_set_dai_fmt,
863 .set_sysclk = es8316_set_dai_sysclk,
864 .digital_mute = es8316_mute,
865 .shutdown = es8316_pcm_shutdown,
868 static struct snd_soc_dai_driver es8316_dai = {
869 .name = "ES8316 HiFi",
871 .stream_name = "Playback",
874 .rates = es8316_RATES,
875 .formats = es8316_FORMATS,
878 .stream_name = "Capture",
881 .rates = es8316_RATES,
882 .formats = es8316_FORMATS,
885 .symmetric_rates = 1,
888 static int es8316_init_regs(struct snd_soc_codec *codec)
890 snd_soc_write(codec, ES8316_RESET_REG00, 0x3f);
891 usleep_range(5000, 5500);
892 snd_soc_write(codec, ES8316_RESET_REG00, 0x00);
893 snd_soc_write(codec, ES8316_SYS_VMIDSEL_REG0C, 0xFF);
895 snd_soc_write(codec, ES8316_CLKMGR_CLKSEL_REG02, 0x08);
896 snd_soc_write(codec, ES8316_CLKMGR_ADCOSR_REG03, 0x20);
897 snd_soc_write(codec, ES8316_CLKMGR_ADCDIV1_REG04, 0x11);
898 snd_soc_write(codec, ES8316_CLKMGR_ADCDIV2_REG05, 0x00);
899 snd_soc_write(codec, ES8316_CLKMGR_DACDIV1_REG06, 0x11);
900 snd_soc_write(codec, ES8316_CLKMGR_DACDIV2_REG07, 0x00);
901 snd_soc_write(codec, ES8316_CLKMGR_CPDIV_REG08, 0x00);
902 snd_soc_write(codec, ES8316_SDP_MS_BCKDIV_REG09, 0x04);
903 snd_soc_write(codec, ES8316_CLKMGR_CLKSW_REG01, 0x7F);
904 snd_soc_write(codec, ES8316_CAL_TYPE_REG1C, 0x0F);
905 snd_soc_write(codec, ES8316_CAL_HPLIV_REG1E, 0x90);
906 snd_soc_write(codec, ES8316_CAL_HPRIV_REG1F, 0x90);
907 snd_soc_write(codec, ES8316_ADC_VOLUME_REG27, 0x00);
908 snd_soc_write(codec, ES8316_ADC_PDN_LINSEL_REG22, 0xc0);
909 snd_soc_write(codec, ES8316_ADC_D2SEPGA_REG24, 0x00);
910 snd_soc_write(codec, ES8316_ADC_DMIC_REG25, 0x08);
911 snd_soc_write(codec, ES8316_DAC_SET2_REG31, 0x20);
912 snd_soc_write(codec, ES8316_DAC_SET3_REG32, 0x00);
913 snd_soc_write(codec, ES8316_DAC_VOLL_REG33, 0x00);
914 snd_soc_write(codec, ES8316_DAC_VOLR_REG34, 0x00);
915 snd_soc_write(codec, ES8316_SDP_ADCFMT_REG0A, 0x00);
916 snd_soc_write(codec, ES8316_SDP_DACFMT_REG0B, 0x00);
917 snd_soc_write(codec, ES8316_SYS_VMIDLOW_REG10, 0x11);
918 snd_soc_write(codec, ES8316_SYS_VSEL_REG11, 0xFC);
919 snd_soc_write(codec, ES8316_SYS_REF_REG12, 0x28);
920 snd_soc_write(codec, ES8316_SYS_LP1_REG0E, 0x04);
921 snd_soc_write(codec, ES8316_SYS_LP2_REG0F, 0x0C);
922 snd_soc_write(codec, ES8316_DAC_PDN_REG2F, 0x11);
923 snd_soc_write(codec, ES8316_HPMIX_SEL_REG13, 0x00);
924 snd_soc_write(codec, ES8316_HPMIX_SWITCH_REG14, 0x88);
925 snd_soc_write(codec, ES8316_HPMIX_PDN_REG15, 0x00);
926 snd_soc_write(codec, ES8316_HPMIX_VOL_REG16, 0xBB);
927 snd_soc_write(codec, ES8316_CPHP_PDN2_REG1A, 0x10);
928 snd_soc_write(codec, ES8316_CPHP_LDOCTL_REG1B, 0x30);
929 snd_soc_write(codec, ES8316_CPHP_PDN1_REG19, 0x02);
930 snd_soc_write(codec, ES8316_CPHP_ICAL_VOL_REG18, 0x00);
931 snd_soc_write(codec, ES8316_GPIO_SEL_REG4D, 0x00);
932 snd_soc_write(codec, ES8316_GPIO_DEBUNCE_INT_REG4E, 0x02);
933 snd_soc_write(codec, ES8316_TESTMODE_REG50, 0xA0);
934 snd_soc_write(codec, ES8316_TEST1_REG51, 0x00);
935 snd_soc_write(codec, ES8316_TEST2_REG52, 0x00);
936 snd_soc_write(codec, ES8316_SYS_PDN_REG0D, 0x00);
937 snd_soc_write(codec, ES8316_RESET_REG00, 0xC0);
939 snd_soc_write(codec, ES8316_ADC_PGAGAIN_REG23, 0x60);
940 snd_soc_write(codec, ES8316_ADC_D2SEPGA_REG24, 0x01);
941 /* adc ds mode, HPF enable */
942 snd_soc_write(codec, ES8316_ADC_DMIC_REG25, 0x08);
943 snd_soc_write(codec, ES8316_ADC_ALC1_REG29, 0xcd);
944 snd_soc_write(codec, ES8316_ADC_ALC2_REG2A, 0x08);
945 snd_soc_write(codec, ES8316_ADC_ALC3_REG2B, 0xa0);
946 snd_soc_write(codec, ES8316_ADC_ALC4_REG2C, 0x05);
947 snd_soc_write(codec, ES8316_ADC_ALC5_REG2D, 0x06);
948 snd_soc_write(codec, ES8316_ADC_ALC6_REG2E, 0x61);
952 static int es8316_suspend(struct snd_soc_codec *codec)
957 static int es8316_resume(struct snd_soc_codec *codec)
959 struct es8316_priv *es8316 = snd_soc_codec_get_drvdata(codec);
962 es8316_reset(codec); /* UPDATED BY DAVID,15-3-5 */
963 ret = snd_soc_read(codec, ES8316_CLKMGR_ADCDIV2_REG05);
965 es8316_init_regs(codec);
966 snd_soc_write(codec, ES8316_GPIO_SEL_REG4D, 0x00);
967 /* max debance time, enable interrupt, low active */
968 snd_soc_write(codec, ES8316_GPIO_DEBUNCE_INT_REG4E, 0xf3);
969 /* es8316_set_bias_level(codec, SND_SOC_BIAS_OFF); */
970 snd_soc_write(codec, ES8316_CPHP_OUTEN_REG17, 0x00);
971 snd_soc_write(codec, ES8316_DAC_PDN_REG2F, 0x11);
972 snd_soc_write(codec, ES8316_CPHP_LDOCTL_REG1B, 0x03);
973 snd_soc_write(codec, ES8316_CPHP_PDN2_REG1A, 0x22);
974 snd_soc_write(codec, ES8316_CPHP_PDN1_REG19, 0x06);
975 snd_soc_write(codec, ES8316_HPMIX_SWITCH_REG14, 0x00);
976 snd_soc_write(codec, ES8316_HPMIX_PDN_REG15, 0x33);
977 snd_soc_write(codec, ES8316_HPMIX_VOL_REG16, 0x00);
978 if (!es8316->hp_inserted)
979 snd_soc_write(codec, ES8316_SYS_PDN_REG0D, 0x3F);
980 snd_soc_write(codec, ES8316_SYS_LP1_REG0E, 0xFF);
981 snd_soc_write(codec, ES8316_SYS_LP2_REG0F, 0xFF);
982 snd_soc_write(codec, ES8316_CLKMGR_CLKSW_REG01, 0xF3);
983 snd_soc_write(codec, ES8316_ADC_PDN_LINSEL_REG22, 0xc0);
988 static irqreturn_t es8316_irq_handler(int irq, void *data)
990 struct es8316_priv *es8316 = data;
992 queue_delayed_work(system_power_efficient_wq, &es8316->work,
993 msecs_to_jiffies(es8316->debounce_time));
999 * Call from rk_headset_irq_hook_adc.c
1001 * Enable micbias for HOOK detection and disable external Amplifier
1002 * when jack insertion.
1004 int es8316_headset_detect(int jack_insert)
1006 struct es8316_priv *es8316 = snd_soc_codec_get_drvdata(es8316_codec);
1008 es8316->hp_inserted = jack_insert;
1010 /*enable micbias and disable PA*/
1012 snd_soc_update_bits(es8316_codec,
1013 ES8316_SYS_PDN_REG0D, 0x3f, 0);
1014 es8316_enable_spk(es8316, false);
1019 EXPORT_SYMBOL(es8316_headset_detect);
1021 static void hp_work(struct work_struct *work)
1023 struct es8316_priv *es8316;
1026 es8316 = container_of(work, struct es8316_priv, work.work);
1027 enable = gpio_get_value(es8316->hp_det_gpio);
1028 if (es8316->hp_det_invert)
1031 es8316->hp_inserted = enable ? true : false;
1032 if (!es8316->muted) {
1033 if (es8316->hp_inserted)
1034 es8316_enable_spk(es8316, false);
1036 es8316_enable_spk(es8316, true);
1040 static int es8316_probe(struct snd_soc_codec *codec)
1042 struct es8316_priv *es8316 = snd_soc_codec_get_drvdata(codec);
1044 es8316_codec = codec;
1046 es8316->mclk = devm_clk_get(codec->dev, "mclk");
1047 if (PTR_ERR(es8316->mclk) == -EPROBE_DEFER)
1048 return -EPROBE_DEFER;
1050 ret = clk_prepare_enable(es8316->mclk);
1053 ret = snd_soc_read(codec, ES8316_CLKMGR_ADCDIV2_REG05);
1055 es8316_reset(codec); /* UPDATED BY DAVID,15-3-5 */
1056 ret = snd_soc_read(codec, ES8316_CLKMGR_ADCDIV2_REG05);
1058 es8316_init_regs(codec);
1059 snd_soc_write(codec, ES8316_GPIO_SEL_REG4D, 0x00);
1060 /* max debance time, enable interrupt, low active */
1061 snd_soc_write(codec,
1062 ES8316_GPIO_DEBUNCE_INT_REG4E, 0xf3);
1064 /* es8316_set_bias_level(codec, SND_SOC_BIAS_OFF); */
1065 snd_soc_write(codec, ES8316_CPHP_OUTEN_REG17, 0x00);
1066 snd_soc_write(codec, ES8316_DAC_PDN_REG2F, 0x11);
1067 snd_soc_write(codec, ES8316_CPHP_LDOCTL_REG1B, 0x03);
1068 snd_soc_write(codec, ES8316_CPHP_PDN2_REG1A, 0x22);
1069 snd_soc_write(codec, ES8316_CPHP_PDN1_REG19, 0x06);
1070 snd_soc_write(codec, ES8316_HPMIX_SWITCH_REG14, 0x00);
1071 snd_soc_write(codec, ES8316_HPMIX_PDN_REG15, 0x33);
1072 snd_soc_write(codec, ES8316_HPMIX_VOL_REG16, 0x00);
1073 if (!es8316->hp_inserted)
1074 snd_soc_write(codec, ES8316_SYS_PDN_REG0D,
1076 snd_soc_write(codec, ES8316_SYS_LP1_REG0E, 0xFF);
1077 snd_soc_write(codec, ES8316_SYS_LP2_REG0F, 0xFF);
1078 snd_soc_write(codec, ES8316_CLKMGR_CLKSW_REG01, 0xF3);
1079 snd_soc_write(codec,
1080 ES8316_ADC_PDN_LINSEL_REG22, 0xc0);
1087 static int es8316_remove(struct snd_soc_codec *codec)
1089 es8316_set_bias_level(codec, SND_SOC_BIAS_OFF);
1093 const struct regmap_config es8316_regmap_config = {
1096 .max_register = ES8316_TEST3_REG53,
1097 .cache_type = REGCACHE_RBTREE,
1098 .reg_defaults = es8316_reg_defaults,
1099 .num_reg_defaults = ARRAY_SIZE(es8316_reg_defaults),
1102 static struct snd_soc_codec_driver soc_codec_dev_es8316 = {
1103 .probe = es8316_probe,
1104 .remove = es8316_remove,
1105 .suspend = es8316_suspend,
1106 .resume = es8316_resume,
1107 .set_bias_level = es8316_set_bias_level,
1109 .controls = es8316_snd_controls,
1110 .num_controls = ARRAY_SIZE(es8316_snd_controls),
1111 .dapm_widgets = es8316_dapm_widgets,
1112 .num_dapm_widgets = ARRAY_SIZE(es8316_dapm_widgets),
1113 .dapm_routes = es8316_dapm_routes,
1114 .num_dapm_routes = ARRAY_SIZE(es8316_dapm_routes),
1117 static int es8316_i2c_probe(struct i2c_client *i2c,
1118 const struct i2c_device_id *id)
1120 struct es8316_priv *es8316;
1123 enum of_gpio_flags flags;
1124 struct device_node *np = i2c->dev.of_node;
1126 es8316 = devm_kzalloc(&i2c->dev, sizeof(*es8316), GFP_KERNEL);
1130 es8316->debounce_time = 200;
1131 es8316->hp_det_invert = 0;
1132 es8316->pwr_count = 0;
1133 es8316->hp_inserted = false;
1134 es8316->muted = true;
1136 es8316->regmap = devm_regmap_init_i2c(i2c, &es8316_regmap_config);
1137 if (IS_ERR(es8316->regmap)) {
1138 ret = PTR_ERR(es8316->regmap);
1139 dev_err(&i2c->dev, "Failed to init regmap: %d\n", ret);
1143 i2c_set_clientdata(i2c, es8316);
1145 es8316->spk_ctl_gpio = of_get_named_gpio_flags(np,
1149 if (es8316->spk_ctl_gpio < 0) {
1150 dev_info(&i2c->dev, "Can not read property spk_ctl_gpio\n");
1151 es8316->spk_ctl_gpio = INVALID_GPIO;
1153 es8316->spk_active_level = !(flags & OF_GPIO_ACTIVE_LOW);
1154 ret = devm_gpio_request_one(&i2c->dev, es8316->spk_ctl_gpio,
1155 GPIOF_DIR_OUT, NULL);
1157 dev_err(&i2c->dev, "Failed to request spk_ctl_gpio\n");
1160 es8316_enable_spk(es8316, false);
1163 es8316->hp_det_gpio = of_get_named_gpio_flags(np,
1167 if (es8316->hp_det_gpio < 0) {
1168 dev_info(&i2c->dev, "Can not read property hp_det_gpio\n");
1169 es8316->hp_det_gpio = INVALID_GPIO;
1171 INIT_DELAYED_WORK(&es8316->work, hp_work);
1172 es8316->hp_det_invert = !!(flags & OF_GPIO_ACTIVE_LOW);
1173 ret = devm_gpio_request_one(&i2c->dev, es8316->hp_det_gpio,
1174 GPIOF_IN, "hp det");
1177 hp_irq = gpio_to_irq(es8316->hp_det_gpio);
1178 ret = devm_request_threaded_irq(&i2c->dev, hp_irq, NULL,
1180 IRQF_TRIGGER_FALLING |
1181 IRQF_TRIGGER_RISING |
1183 "es8316_interrupt", es8316);
1185 dev_err(&i2c->dev, "request_irq failed: %d\n", ret);
1189 schedule_delayed_work(&es8316->work,
1190 msecs_to_jiffies(es8316->debounce_time));
1193 ret = snd_soc_register_codec(&i2c->dev,
1194 &soc_codec_dev_es8316,
1200 static int es8316_i2c_remove(struct i2c_client *client)
1202 snd_soc_unregister_codec(&client->dev);
1206 static void es8316_i2c_shutdown(struct i2c_client *client)
1208 struct es8316_priv *es8316 = i2c_get_clientdata(client);
1210 if (es8316_codec != NULL) {
1211 es8316_enable_spk(es8316, false);
1213 es8316_set_bias_level(es8316_codec, SND_SOC_BIAS_OFF);
1217 static const struct i2c_device_id es8316_i2c_id[] = {
1223 MODULE_DEVICE_TABLE(i2c, es8316_i2c_id);
1225 static const struct of_device_id es8316_of_match[] = {
1226 { .compatible = "everest,es8316", },
1229 MODULE_DEVICE_TABLE(of, es8316_of_match);
1231 static struct i2c_driver es8316_i2c_driver = {
1234 .of_match_table = es8316_of_match,
1236 .probe = es8316_i2c_probe,
1237 .remove = es8316_i2c_remove,
1238 .shutdown = es8316_i2c_shutdown,
1239 .id_table = es8316_i2c_id,
1242 module_i2c_driver(es8316_i2c_driver);
1244 MODULE_DESCRIPTION("ASoC es8316 driver");
1245 MODULE_AUTHOR("Will <will@everset-semi.com>");
1246 MODULE_LICENSE("GPL");