2 * es8316.c -- es8316 ALSA SoC audio driver
3 * Copyright Everest Semiconductor Co.,Ltd
5 * Author: David Yang <yangxiaohua@everest-semi.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
18 #include <linux/i2c.h>
19 #include <linux/spi/spi.h>
20 #include <linux/platform_device.h>
21 #include <linux/slab.h>
22 #include <linux/of_gpio.h>
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/tlv.h>
27 #include <sound/soc.h>
28 #include <sound/soc-dapm.h>
29 #include <sound/initval.h>
30 #include <linux/proc_fs.h>
31 #include <linux/gpio.h>
32 #include <linux/interrupt.h>
33 #include <linux/irq.h>
34 #include <linux/regmap.h>
38 #define DBG(x...) printk(x)
40 #define DBG(x...) do { } while (0)
47 #define INVALID_GPIO -1
49 #define ES8316_CODEC_SET_SPK 1
50 #define ES8316_CODEC_SET_HP 2
55 int es8316_init_reg = 0;
59 #ifndef es8316_DEF_VOL
60 #define es8316_DEF_VOL 0x1e
63 struct snd_soc_codec *es8316_codec;
64 static int es8316_init_regs(struct snd_soc_codec *codec);
65 static int es8316_set_bias_level(struct snd_soc_codec *codec,
66 enum snd_soc_bias_level level);
68 static const struct reg_default es8316_reg_defaults[] = {
69 {0x00, 0x03}, {0x01, 0x03}, {0x02, 0x00}, {0x03, 0x20},
70 {0x04, 0x11}, {0x05, 0x00}, {0x06, 0x11}, {0x07, 0x00},
71 {0x08, 0x00}, {0x09, 0x01}, {0x0a, 0x00}, {0x0b, 0x00},
72 {0x0c, 0xf8}, {0x0d, 0x3f}, {0x0e, 0x00}, {0x0f, 0x00},
73 {0x10, 0x01}, {0x11, 0xfc}, {0x12, 0x28}, {0x13, 0x00},
74 {0x14, 0x00}, {0x15, 0x33}, {0x16, 0x00}, {0x17, 0x00},
75 {0x18, 0x88}, {0x19, 0x06}, {0x1a, 0x22}, {0x1b, 0x03},
76 {0x1c, 0x0f}, {0x1d, 0x00}, {0x1e, 0x80}, {0x1f, 0x80},
77 {0x20, 0x00}, {0x21, 0x00}, {0x22, 0xc0}, {0x23, 0x00},
78 {0x24, 0x01}, {0x25, 0x08}, {0x26, 0x10}, {0x27, 0xc0},
79 {0x28, 0x00}, {0x29, 0x1c}, {0x2a, 0x00}, {0x2b, 0xb0},
80 {0x2c, 0x32}, {0x2d, 0x03}, {0x2e, 0x00}, {0x2f, 0x11},
81 {0x30, 0x10}, {0x31, 0x00}, {0x32, 0x00}, {0x33, 0xc0},
82 {0x34, 0xc0}, {0x35, 0x1f}, {0x36, 0xf7}, {0x37, 0xfd},
83 {0x38, 0xff}, {0x39, 0x1f}, {0x3a, 0xf7}, {0x3b, 0xfd},
84 {0x3c, 0xff}, {0x3d, 0x1f}, {0x3e, 0xf7}, {0x3f, 0xfd},
85 {0x40, 0xff}, {0x41, 0x1f}, {0x42, 0xf7}, {0x43, 0xfd},
86 {0x44, 0xff}, {0x45, 0x1f}, {0x46, 0xf7}, {0x47, 0xfd},
87 {0x48, 0xff}, {0x49, 0x1f}, {0x4a, 0xf7}, {0x4b, 0xfd},
88 {0x4c, 0xff}, {0x4d, 0x00}, {0x4e, 0x00}, {0x4f, 0xff},
89 {0x50, 0x00}, {0x51, 0x00}, {0x52, 0x00}, {0x53, 0x00},
92 static inline unsigned int es8316_readable(struct device *dev, unsigned int reg)
99 static inline unsigned int es8316_volatile(struct device *dev, unsigned int reg)
106 /* codec private data */
108 struct regmap *regmap;
109 unsigned int dmic_amic;
111 struct snd_pcm_hw_constraint_list *sysclk_constraints;
122 struct es8316_priv *es8316_private;
123 static int es8316_set_gpio(int gpio, bool level)
125 struct es8316_priv *es8316 = es8316_private;
128 DBG("%s : es8316_priv is NULL\n", __func__);
131 DBG("%s : set %s %s ctl gpio %s\n", __func__,
132 gpio & ES8316_CODEC_SET_SPK ? "spk" : "",
133 gpio & ES8316_CODEC_SET_HP ? "hp" : "",
134 level ? "HIGH" : "LOW");
135 if ((gpio & ES8316_CODEC_SET_SPK)
136 && es8316 && es8316->spk_ctl_gpio != INVALID_GPIO) {
137 DBG("%d,set_value%s\n", es8316->spk_ctl_gpio, level ?
139 gpio_set_value(es8316->spk_ctl_gpio, level);
144 static char mute_flag = 1;
145 static irqreturn_t hp_det_irq_handler(int irq, void *dev_id)
149 struct es8316_priv *es8316 = es8316_private;
151 disable_irq_nosync(irq);
153 type = gpio_get_value(es8316->hp_det_gpio) ?
154 IRQ_TYPE_EDGE_FALLING : IRQ_TYPE_EDGE_RISING;
155 ret = irq_set_irq_type(irq, type);
157 DBG("%s: irq_set_irq_type(%d, %d) failed\n",
158 __func__, irq, type);
162 if (type == IRQ_TYPE_EDGE_FALLING)
166 if (mute_flag == 0) {
167 if (es8316->hp_det_level == gpio_get_value(es8316->hp_det_gpio))
168 es8316_set_gpio(ES8316_CODEC_SET_SPK,
169 !es8316->spk_gpio_level);
171 es8316_set_gpio(ES8316_CODEC_SET_SPK,
172 es8316->spk_gpio_level);
182 /*#define DECLARE_TLV_DB_SCALE(name, min, step, mute) */
183 /*static const DECLARE_TLV_DB_SCALE(hpout_vol_tlv, -4800, 1200, 0);*/
184 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -9600, 50, 1);
185 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -9600, 50, 1);
186 static const DECLARE_TLV_DB_SCALE(hpmixer_gain_tlv, -1200, 150, 0);
187 static const DECLARE_TLV_DB_SCALE(mic_bst_tlv, 0, 1200, 0);
188 /*static const DECLARE_TLV_DB_SCALE(linin_pga_tlv, 0, 300, 0);*/
189 /* {0, +3, +6, +9, +12, +15, +18, +21, +24,+27,+30,+33} dB */
190 static unsigned int linin_pga_tlv[] = {
191 TLV_DB_RANGE_HEAD(12),
192 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
193 1, 1, TLV_DB_SCALE_ITEM(300, 0, 0),
194 2, 2, TLV_DB_SCALE_ITEM(600, 0, 0),
195 3, 3, TLV_DB_SCALE_ITEM(900, 0, 0),
196 4, 4, TLV_DB_SCALE_ITEM(1200, 0, 0),
197 5, 5, TLV_DB_SCALE_ITEM(1500, 0, 0),
198 6, 6, TLV_DB_SCALE_ITEM(1800, 0, 0),
199 7, 7, TLV_DB_SCALE_ITEM(2100, 0, 0),
200 8, 8, TLV_DB_SCALE_ITEM(2400, 0, 0),
202 static unsigned int hpout_vol_tlv[] = {
203 TLV_DB_RANGE_HEAD(1),
204 0, 3, TLV_DB_SCALE_ITEM(-4800, 1200, 0),
206 static const char *const alc_func_txt[] = {"Off", "On"};
207 static const struct soc_enum alc_func =
208 SOC_ENUM_SINGLE(ES8316_ADC_ALC1_REG29, 6, 2, alc_func_txt);
210 static const char *const ng_type_txt[] = {"Constant PGA Gain",
212 static const struct soc_enum ng_type =
213 SOC_ENUM_SINGLE(ES8316_ADC_ALC6_REG2E, 6, 2, ng_type_txt);
215 static const char *const adcpol_txt[] = {"Normal", "Invert"};
216 static const struct soc_enum adcpol =
217 SOC_ENUM_SINGLE(ES8316_ADC_MUTE_REG26, 1, 2, adcpol_txt);
218 static const char *const dacpol_txt[] = {"Normal", "R Invert", "L Invert",
220 static const struct soc_enum dacpol =
221 SOC_ENUM_SINGLE(ES8316_DAC_SET1_REG30, 0, 4, dacpol_txt);
223 static const struct snd_kcontrol_new es8316_snd_controls[] = {
225 SOC_DOUBLE_TLV("HP Playback Volume", ES8316_CPHP_ICAL_VOL_REG18,
226 4, 0, 0, 1, hpout_vol_tlv),
227 /* HPMIXER VOLUME Control */
228 SOC_DOUBLE_TLV("HPMixer Gain", ES8316_HPMIX_VOL_REG16,
229 0, 4, 7, 0, hpmixer_gain_tlv),
231 /* DAC Digital controls */
232 SOC_DOUBLE_R_TLV("DAC Playback Volume", ES8316_DAC_VOLL_REG33,
233 ES8316_DAC_VOLR_REG34, 0, 0xC0, 1, dac_vol_tlv),
235 SOC_SINGLE("Enable DAC Soft Ramp", ES8316_DAC_SET1_REG30, 4, 1, 1),
236 SOC_SINGLE("DAC Soft Ramp Rate", ES8316_DAC_SET1_REG30, 2, 4, 0),
238 SOC_ENUM("Playback Polarity", dacpol),
239 SOC_SINGLE("DAC Notch Filter", ES8316_DAC_SET2_REG31, 6, 1, 0),
240 SOC_SINGLE("DAC Double Fs Mode", ES8316_DAC_SET2_REG31, 7, 1, 0),
241 SOC_SINGLE("DAC Volume Control-LeR", ES8316_DAC_SET2_REG31, 2, 1, 0),
242 SOC_SINGLE("DAC Stereo Enhancement", ES8316_DAC_SET3_REG32, 0, 7, 0),
244 /* +20dB D2SE PGA Control */
245 SOC_SINGLE_TLV("MIC Boost", ES8316_ADC_D2SEPGA_REG24,
246 0, 1, 0, mic_bst_tlv),
247 /* 0-+24dB Lineinput PGA Control */
248 SOC_SINGLE_TLV("Input PGA", ES8316_ADC_PGAGAIN_REG23,
249 4, 8, 0, linin_pga_tlv),
251 /* ADC Digital Control */
252 SOC_SINGLE_TLV("ADC Capture Volume", ES8316_ADC_VOLUME_REG27,
253 0, 0xC0, 1, adc_vol_tlv),
254 SOC_SINGLE("ADC Soft Ramp", ES8316_ADC_MUTE_REG26, 4, 1, 0),
255 SOC_ENUM("Capture Polarity", adcpol),
256 SOC_SINGLE("ADC Double FS Mode", ES8316_ADC_DMIC_REG25, 4, 1, 0),
257 /* ADC ALC Control */
258 SOC_SINGLE("ALC Capture Target Volume",
259 ES8316_ADC_ALC3_REG2B, 4, 10, 0),
260 SOC_SINGLE("ALC Capture Max PGA", ES8316_ADC_ALC1_REG29, 0, 28, 0),
261 SOC_SINGLE("ALC Capture Min PGA", ES8316_ADC_ALC2_REG2A, 0, 28, 0),
262 SOC_ENUM("ALC Capture Function", alc_func),
263 SOC_SINGLE("ALC Capture Hold Time", ES8316_ADC_ALC3_REG2B, 0, 10, 0),
264 SOC_SINGLE("ALC Capture Decay Time", ES8316_ADC_ALC4_REG2C, 4, 10, 0),
265 SOC_SINGLE("ALC Capture Attack Time", ES8316_ADC_ALC4_REG2C, 0, 10, 0),
266 SOC_SINGLE("ALC Capture NG Threshold", ES8316_ADC_ALC6_REG2E, 0, 31, 0),
267 SOC_ENUM("ALC Capture NG Type", ng_type),
268 SOC_SINGLE("ALC Capture NG Switch", ES8316_ADC_ALC6_REG2E, 5, 1, 0),
271 /* Analog Input MUX */
272 static const char * const es8316_analog_in_txt[] = {
275 "lin1-rin1 with 20db Boost",
276 "lin2-rin2 with 20db Boost"
278 static const unsigned int es8316_analog_in_values[] = {
284 static const struct soc_enum es8316_analog_input_enum =
285 SOC_VALUE_ENUM_SINGLE(ES8316_ADC_PDN_LINSEL_REG22, 4, 3,
286 ARRAY_SIZE(es8316_analog_in_txt),
287 es8316_analog_in_txt,
288 es8316_analog_in_values);
289 static const struct snd_kcontrol_new es8316_analog_in_mux_controls =
290 SOC_DAPM_ENUM("Route", es8316_analog_input_enum);
293 static const char * const es8316_dmic_txt[] = {
295 "dmic data at high level",
296 "dmic data at low level",
298 static const unsigned int es8316_dmic_values[] = {
303 static const struct soc_enum es8316_dmic_src_enum =
304 SOC_VALUE_ENUM_SINGLE(ES8316_ADC_DMIC_REG25, 0, 3,
305 ARRAY_SIZE(es8316_dmic_txt),
308 static const struct snd_kcontrol_new es8316_dmic_src_controls =
309 SOC_DAPM_ENUM("Route", es8316_dmic_src_enum);
312 static const char *const es8316_hpmux_texts[] = {
315 "lin-rin with Boost",
316 "lin-rin with Boost and PGA"
319 static const unsigned int es8316_hpmux_values[] = {0, 1, 2, 3};
321 static const struct soc_enum es8316_left_hpmux_enum =
322 SOC_VALUE_ENUM_SINGLE(ES8316_HPMIX_SEL_REG13, 4, 7,
323 ARRAY_SIZE(es8316_hpmux_texts),
325 es8316_hpmux_values);
326 static const struct snd_kcontrol_new es8316_left_hpmux_controls =
327 SOC_DAPM_VALUE_ENUM("Route", es8316_left_hpmux_enum);
329 static const struct soc_enum es8316_right_hpmux_enum =
330 SOC_VALUE_ENUM_SINGLE(ES8316_HPMIX_SEL_REG13, 0, 7,
331 ARRAY_SIZE(es8316_hpmux_texts),
333 es8316_hpmux_values);
334 static const struct snd_kcontrol_new es8316_right_hpmux_controls =
335 SOC_DAPM_VALUE_ENUM("Route", es8316_right_hpmux_enum);
337 /* headphone Output Mixer */
338 static const struct snd_kcontrol_new es8316_out_left_mix[] = {
339 SOC_DAPM_SINGLE("LLIN Switch", ES8316_HPMIX_SWITCH_REG14,
341 SOC_DAPM_SINGLE("Left DAC Switch", ES8316_HPMIX_SWITCH_REG14,
344 static const struct snd_kcontrol_new es8316_out_right_mix[] = {
345 SOC_DAPM_SINGLE("RLIN Switch", ES8316_HPMIX_SWITCH_REG14,
347 SOC_DAPM_SINGLE("Right DAC Switch", ES8316_HPMIX_SWITCH_REG14,
351 /* DAC data source mux */
352 static const char * const es8316_dacsrc_texts[] = {
353 "LDATA TO LDAC, RDATA TO RDAC",
354 "LDATA TO LDAC, LDATA TO RDAC",
355 "RDATA TO LDAC, RDATA TO RDAC",
356 "RDATA TO LDAC, LDATA TO RDAC",
359 static const unsigned int es8316_dacsrc_values[] = {
362 static const struct soc_enum es8316_dacsrc_mux_enum =
363 SOC_VALUE_ENUM_SINGLE(ES8316_DAC_SET1_REG30, 6, 4,
364 ARRAY_SIZE(es8316_dacsrc_texts),
366 es8316_dacsrc_values);
367 static const struct snd_kcontrol_new es8316_dacsrc_mux_controls =
368 SOC_DAPM_VALUE_ENUM("Route", es8316_dacsrc_mux_enum);
371 static const struct snd_soc_dapm_widget es8316_dapm_widgets[] = {
373 SND_SOC_DAPM_INPUT("DMIC"),
374 SND_SOC_DAPM_INPUT("MIC1"),
375 SND_SOC_DAPM_INPUT("MIC2"),
377 SND_SOC_DAPM_MICBIAS("micbias", SND_SOC_NOPM,
380 SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
381 &es8316_analog_in_mux_controls),
382 SND_SOC_DAPM_PGA("Line input PGA", SND_SOC_NOPM,
386 SND_SOC_DAPM_ADC("Mono ADC", NULL, SND_SOC_NOPM, 0, 0),
389 SND_SOC_DAPM_MUX("Digital Mic Mux", SND_SOC_NOPM, 0, 0,
390 &es8316_dmic_src_controls),
392 /* Digital Interface */
393 SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S1 Capture", 1,
395 SND_SOC_DAPM_AIF_IN("I2S IN", "I2S1 Playback", 0,
398 /* DACs DATA SRC MUX */
399 SND_SOC_DAPM_MUX("DAC SRC Mux", SND_SOC_NOPM, 0, 0,
400 &es8316_dacsrc_mux_controls),
402 SND_SOC_DAPM_DAC("Right DAC", NULL, SND_SOC_NOPM, 0, 0),
404 /*SND_SOC_DAPM_DAC("Left DAC", NULL, ES8316_DAC_PDN_REG2F, 4, 0),*/
405 SND_SOC_DAPM_DAC("Left DAC", NULL, SND_SOC_NOPM, 0, 0),
407 /* Headphone Output Side */
408 /* hpmux for hp mixer */
409 SND_SOC_DAPM_MUX("Left Hp mux", SND_SOC_NOPM, 0, 0,
410 &es8316_left_hpmux_controls),
411 SND_SOC_DAPM_MUX("Right Hp mux", SND_SOC_NOPM, 0, 0,
412 &es8316_right_hpmux_controls),
414 SND_SOC_DAPM_MIXER("Left Hp mixer", ES8316_HPMIX_PDN_REG15,
415 4, 0, &es8316_out_left_mix[0],
416 ARRAY_SIZE(es8316_out_left_mix)),
417 SND_SOC_DAPM_MIXER("Right Hp mixer", ES8316_HPMIX_PDN_REG15,
418 0, 0, &es8316_out_right_mix[0],
419 ARRAY_SIZE(es8316_out_right_mix)),
422 /* Ouput charge pump */
424 SND_SOC_DAPM_PGA("HPCP L", SND_SOC_NOPM,
426 SND_SOC_DAPM_PGA("HPCP R", SND_SOC_NOPM,
430 SND_SOC_DAPM_PGA("HPVOL L", SND_SOC_NOPM,
432 SND_SOC_DAPM_PGA("HPVOL R", SND_SOC_NOPM,
436 SND_SOC_DAPM_OUTPUT("HPOL"),
437 SND_SOC_DAPM_OUTPUT("HPOR"),
440 static const struct snd_soc_dapm_route es8316_dapm_routes[] = {
444 {"MIC1", NULL, "micbias"},
445 {"MIC2", NULL, "micbias"},
446 {"DMIC", NULL, "micbias"},
448 {"Differential Mux", "lin1-rin1", "MIC1"},
449 {"Differential Mux", "lin2-rin2", "MIC2"},
450 {"Line input PGA", NULL, "Differential Mux"},
452 {"Mono ADC", NULL, "Line input PGA"},
454 {"Digital Mic Mux", "dmic disable", "Mono ADC"},
455 {"Digital Mic Mux", "dmic data at high level", "DMIC"},
456 {"Digital Mic Mux", "dmic data at low level", "DMIC"},
458 {"I2S OUT", NULL, "Digital Mic Mux"},
462 {"DAC SRC Mux", "LDATA TO LDAC, RDATA TO RDAC", "I2S IN"},
463 {"DAC SRC Mux", "LDATA TO LDAC, LDATA TO RDAC", "I2S IN"},
464 {"DAC SRC Mux", "RDATA TO LDAC, RDATA TO RDAC", "I2S IN"},
465 {"DAC SRC Mux", "RDATA TO LDAC, LDATA TO RDAC", "I2S IN"},
467 {"Left DAC", NULL, "DAC SRC Mux"},
468 {"Right DAC", NULL, "DAC SRC Mux"},
470 {"Left Hp mux", "lin1-rin1", "MIC1"},
471 {"Left Hp mux", "lin2-rin2", "MIC2"},
472 {"Left Hp mux", "lin-rin with Boost", "Differential Mux"},
473 {"Left Hp mux", "lin-rin with Boost and PGA", "Line input PGA"},
475 {"Right Hp mux", "lin1-rin1", "MIC1"},
476 {"Right Hp mux", "lin2-rin2", "MIC2"},
477 {"Right Hp mux", "lin-rin with Boost", "Differential Mux"},
478 {"Right Hp mux", "lin-rin with Boost and PGA", "Line input PGA"},
480 {"Left Hp mixer", "LLIN Switch", "Left Hp mux"},
481 {"Left Hp mixer", "Left DAC Switch", "Left DAC"},
483 {"Right Hp mixer", "RLIN Switch", "Right Hp mux"},
484 {"Right Hp mixer", "Right DAC Switch", "Right DAC"},
486 {"HPCP L", NULL, "Left Hp mixer"},
487 {"HPCP R", NULL, "Right Hp mixer"},
489 {"HPVOL L", NULL, "HPCP L"},
490 {"HPVOL R", NULL, "HPCP R"},
492 {"HPOL", NULL, "HPVOL L"},
493 {"HPOR", NULL, "HPVOL R"},
497 u32 mclk; /*mclk frequency*/
498 u32 rate; /*sample rate*/
499 u8 div; /*adcclk and dacclk divider*/
500 u8 lrck_h; /*adclrck divider and daclrck divider*/
502 u8 sr; /*sclk divider*/
507 /* codec hifi mclk clock divider coefficients */
508 static const struct _coeff_div coeff_div[] = {
510 {12288000, 8000 , 6 , 0x06, 0x00, 21, 32},
511 {11289600, 8000 , 6 , 0x05, 0x83, 20, 29},
512 {18432000, 8000 , 9 , 0x09, 0x00, 27, 32},
513 {16934400, 8000 , 8 , 0x08, 0x44, 25, 33},
514 {12000000, 8000 , 7 , 0x05, 0xdc, 21, 25},
515 {19200000, 8000 , 12, 0x09, 0x60, 27, 25},
518 {11289600, 11025, 4 , 0x04, 0x00, 16, 32},
519 {16934400, 11025, 6 , 0x06, 0x00, 21, 32},
520 {12000000, 11025, 4 , 0x04, 0x40, 17, 34},
523 {12288000, 16000, 3 , 0x03, 0x00, 12, 32},
524 {18432000, 16000, 5 , 0x04, 0x80, 18, 25},
525 {12000000, 16000, 3 , 0x02, 0xee, 12, 31},
526 {19200000, 16000, 6 , 0x04, 0xb0, 18, 25},
529 {11289600, 22050, 2 , 0x02, 0x00, 8 , 32},
530 {16934400, 22050, 3 , 0x03, 0x00, 12, 32},
531 {12000000, 22050, 2 , 0x02, 0x20, 8 , 34},
534 {12288000, 32000, 1 , 0x01, 0x80, 6 , 48},
535 {18432000, 32000, 2 , 0x02, 0x40, 9 , 32},
536 {12000000, 32000, 1 , 0x01, 0x77, 6 , 31},
537 {19200000, 32000, 3 , 0x02, 0x58, 10, 25},
540 {11289600, 44100, 1 , 0x01, 0x00, 4 , 32},
541 {16934400, 44100, 1 , 0x01, 0x80, 6 , 32},
542 {12000000, 44100, 1 , 0x01, 0x10, 4 , 34},
545 {12288000, 48000, 1 , 0x01, 0x00, 4 , 32},
546 {18432000, 48000, 1 , 0x01, 0x80, 6 , 32},
547 {12000000, 48000, 1 , 0x00, 0xfa, 4 , 31},
548 {19200000, 48000, 2 , 0x01, 0x90, 6, 25},
551 {11289600, 88200, 1 , 0x00, 0x80, 2 , 32},
552 {16934400, 88200, 1 , 0x00, 0xc0, 3 , 48},
553 {12000000, 88200, 1 , 0x00, 0x88, 2 , 34},
556 {12288000, 96000, 1 , 0x00, 0x80, 2 , 32},
557 {18432000, 96000, 1 , 0x00, 0xc0, 3 , 48},
558 {12000000, 96000, 1 , 0x00, 0x7d, 1 , 31},
559 {19200000, 96000, 1 , 0x00, 0xc8, 3 , 25},
561 static inline int get_coeff(int mclk, int rate)
565 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
566 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
573 /* The set of rates we can generate from the above for each SYSCLK */
575 static unsigned int rates_12288[] = {
576 8000, 12000, 16000, 24000, 24000, 32000, 48000, 96000,
579 static struct snd_pcm_hw_constraint_list constraints_12288 = {
580 .count = ARRAY_SIZE(rates_12288),
584 static unsigned int rates_112896[] = {
585 8000, 11025, 22050, 44100,
588 static struct snd_pcm_hw_constraint_list constraints_112896 = {
589 .count = ARRAY_SIZE(rates_112896),
590 .list = rates_112896,
593 static unsigned int rates_12[] = {
594 8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000,
598 static struct snd_pcm_hw_constraint_list constraints_12 = {
599 .count = ARRAY_SIZE(rates_12),
604 * Note that this should be called from init rather than from hw_params.
606 static int es8316_set_dai_sysclk(struct snd_soc_dai *codec_dai,
607 int clk_id, unsigned int freq, int dir)
609 struct snd_soc_codec *codec = codec_dai->codec;
610 struct es8316_priv *es8316 = snd_soc_codec_get_drvdata(codec);
617 es8316->sysclk_constraints = &constraints_112896;
618 es8316->sysclk = freq;
625 es8316->sysclk_constraints = &constraints_12288;
626 es8316->sysclk = freq;
630 es8316->sysclk_constraints = &constraints_12;
631 es8316->sysclk = freq;
637 static int es8316_set_dai_fmt(struct snd_soc_dai *codec_dai,
640 struct snd_soc_codec *codec = codec_dai->codec;
645 alsa_dbg("%s----%d, fmt[%02x]\n", __func__, __LINE__, fmt);
647 iface = snd_soc_read(codec, ES8316_IFACE);
648 adciface = snd_soc_read(codec, ES8316_ADC_IFACE);
649 daciface = snd_soc_read(codec, ES8316_DAC_IFACE);
651 /* set master/slave audio interface */
652 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
653 case SND_SOC_DAIFMT_CBM_CFM:
654 alsa_dbg("es8316 in master mode");
657 case SND_SOC_DAIFMT_CBS_CFS:
658 alsa_dbg("es8316 in slave mode");
666 /* interface format */
668 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
669 case SND_SOC_DAIFMT_I2S:
673 case SND_SOC_DAIFMT_RIGHT_J:
675 case SND_SOC_DAIFMT_LEFT_J:
681 case SND_SOC_DAIFMT_DSP_A:
687 case SND_SOC_DAIFMT_DSP_B:
698 /* clock inversion */
699 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
700 case SND_SOC_DAIFMT_NB_NF:
705 case SND_SOC_DAIFMT_IB_IF:
710 case SND_SOC_DAIFMT_IB_NF:
715 case SND_SOC_DAIFMT_NB_IF:
723 snd_soc_write(codec, ES8316_IFACE, iface);
724 snd_soc_write(codec, ES8316_ADC_IFACE, adciface);
725 snd_soc_write(codec, ES8316_DAC_IFACE, daciface);
729 static int es8316_pcm_startup(struct snd_pcm_substream *substream,
730 struct snd_soc_dai *dai)
732 struct snd_soc_codec *codec = dai->codec;
733 struct es8316_priv *es8316 = snd_soc_codec_get_drvdata(codec);
735 DBG("Enter::%s----%d es8316->sysclk=%d\n",
736 __func__, __LINE__, es8316->sysclk);
738 /* The set of sample rates that can be supported depends on the
739 * MCLK supplied to the CODEC - enforce this.
741 if (!es8316->sysclk) {
743 "No MCLK configured, call set_sysclk() on init\n");
747 snd_pcm_hw_constraint_list(substream->runtime, 0,
748 SNDRV_PCM_HW_PARAM_RATE,
749 es8316->sysclk_constraints);
753 static int es8316_pcm_hw_params(struct snd_pcm_substream *substream,
754 struct snd_pcm_hw_params *params,
755 struct snd_soc_dai *dai)
757 struct snd_soc_pcm_runtime *rtd = substream->private_data;
758 struct snd_soc_codec *codec = rtd->codec;
759 struct es8316_priv *es8316 = snd_soc_codec_get_drvdata(codec);
762 u16 osrate = snd_soc_read(codec,
763 ES8316_CLKMGR_ADCOSR_REG03) & 0xc0;
764 u16 mclkdiv = snd_soc_read(codec,
765 ES8316_CLKMGR_CLKSW_REG01) & 0x7f;
766 u16 srate = snd_soc_read(codec,
767 ES8316_SDP_MS_BCKDIV_REG09) & 0xE0;
768 u16 adciface = snd_soc_read(codec,
769 ES8316_SDP_ADCFMT_REG0A) & 0xE3;
770 u16 daciface = snd_soc_read(codec,
771 ES8316_SDP_DACFMT_REG0B) & 0xE3;
772 u16 adcdiv = snd_soc_read(codec,
773 ES8316_CLKMGR_ADCDIV1_REG04);
774 u16 adclrckdiv_l = snd_soc_read(codec,
775 ES8316_CLKMGR_ADCDIV2_REG05) & 0x00;
776 u16 dacdiv = snd_soc_read(codec, ES8316_CLKMGR_DACDIV1_REG06);
777 u16 daclrckdiv_l = snd_soc_read(codec,
778 ES8316_CLKMGR_DACDIV2_REG07) & 0x00;
780 u16 adclrckdiv_h = adcdiv & 0xf0;
781 u16 daclrckdiv_h = dacdiv & 0xf0;
787 coeff = get_coeff(es8316->sysclk, params_rate(params));
789 coeff = get_coeff(es8316->sysclk / 2, params_rate(params));
794 "Unable to configure sample rate %dHz with %dHz MCLK\n",
795 params_rate(params), es8316->sysclk);
800 switch (params_format(params)) {
801 case SNDRV_PCM_FORMAT_S16_LE:
805 case SNDRV_PCM_FORMAT_S20_3LE:
809 case SNDRV_PCM_FORMAT_S24_LE:
811 case SNDRV_PCM_FORMAT_S32_LE:
817 /* set iface & srate*/
818 snd_soc_update_bits(codec, ES8316_SDP_DACFMT_REG0B, 0xe3, daciface);
819 snd_soc_update_bits(codec, ES8316_SDP_ADCFMT_REG0A, 0xe3, adciface);
820 snd_soc_update_bits(codec, ES8316_CLKMGR_CLKSW_REG01, 0x80, mclkdiv);
822 osrate = coeff_div[coeff].osr;
825 srate |= coeff_div[coeff].sr;
828 adcdiv |= (coeff_div[coeff].div << 4);
829 adclrckdiv_h |= coeff_div[coeff].lrck_h;
831 adclrckdiv_h &= 0x0f;
832 adcdiv |= adclrckdiv_h;
833 adclrckdiv_l = coeff_div[coeff].lrck_l;
835 dacdiv |= (coeff_div[coeff].div << 4);
836 daclrckdiv_h |= coeff_div[coeff].lrck_h;
838 daclrckdiv_h &= 0x0f;
839 dacdiv |= daclrckdiv_h;
840 daclrckdiv_l = coeff_div[coeff].lrck_l;
842 retv = snd_soc_read(codec, ES8316_CLKMGR_ADCDIV2_REG05);
844 es8316_init_regs(codec);
845 if (es8316->dmic_amic == dmic_used)
846 snd_soc_write(codec, ES8316_GPIO_SEL_REG4D,
849 snd_soc_write(codec, ES8316_GPIO_SEL_REG4D,
851 snd_soc_write(codec, ES8316_GPIO_DEBUNCE_INT_REG4E,
853 es8316_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
858 retv = snd_soc_read(codec, ES8316_GPIO_FLAG);
862 static int es8316_mute(struct snd_soc_dai *dai, int mute)
864 struct snd_soc_codec *codec = dai->codec;
865 struct es8316_priv *es8316 = es8316_private;
869 es8316_set_gpio(ES8316_CODEC_SET_SPK, !es8316->spk_gpio_level);
871 snd_soc_write(codec, ES8316_DAC_SET1_REG30, 0x20);
872 } else if (dai->playback_active) {
873 snd_soc_write(codec, ES8316_DAC_SET1_REG30, 0x00);
875 if (hp_irq_flag == 0)
876 es8316_set_gpio(ES8316_CODEC_SET_SPK,
877 es8316->spk_gpio_level);
883 static int es8316_set_bias_level(struct snd_soc_codec *codec,
884 enum snd_soc_bias_level level)
888 case SND_SOC_BIAS_ON:
889 dev_dbg(codec->dev, "%s on\n", __func__);
891 case SND_SOC_BIAS_PREPARE:
892 dev_dbg(codec->dev, "%s prepare\n", __func__);
893 if (es8316_init_reg > 0) {
894 snd_soc_write(codec, ES8316_CLKMGR_CLKSW_REG01, 0x7F);
895 snd_soc_write(codec, ES8316_SYS_PDN_REG0D, 0x00);
896 snd_soc_write(codec, ES8316_ADC_PDN_LINSEL_REG22, 0x00);
897 snd_soc_write(codec, ES8316_DAC_PDN_REG2F, 0x00);
898 snd_soc_write(codec, ES8316_HPMIX_SWITCH_REG14, 0x88);
899 snd_soc_write(codec, ES8316_HPMIX_PDN_REG15, 0x88);
900 snd_soc_write(codec, ES8316_HPMIX_VOL_REG16, 0xBB);
901 snd_soc_write(codec, ES8316_CPHP_PDN2_REG1A, 0x10);
902 snd_soc_write(codec, ES8316_CPHP_LDOCTL_REG1B, 0x30);
903 snd_soc_write(codec, ES8316_CPHP_PDN1_REG19, 0x02);
904 snd_soc_write(codec, ES8316_CPHP_ICAL_VOL_REG18, 0x00);
905 snd_soc_write(codec, ES8316_RESET_REG00, 0xC0);
906 snd_soc_write(codec, ES8316_CPHP_OUTEN_REG17, 0x66);
909 case SND_SOC_BIAS_STANDBY:
910 dev_dbg(codec->dev, "%s standby\n", __func__);
911 if (es8316_init_reg > 0) {
913 ES8316_CLKMGR_CLKSW_REG01, 0x7F);
914 snd_soc_write(codec, ES8316_SYS_PDN_REG0D, 0x00);
916 ES8316_ADC_PDN_LINSEL_REG22, 0x00);
917 snd_soc_write(codec, ES8316_DAC_PDN_REG2F, 0x00);
919 ES8316_HPMIX_SWITCH_REG14, 0x88);
921 ES8316_HPMIX_PDN_REG15, 0x88);
923 ES8316_HPMIX_VOL_REG16, 0xBB);
924 snd_soc_write(codec, ES8316_CPHP_PDN2_REG1A, 0x10);
925 snd_soc_write(codec, ES8316_CPHP_LDOCTL_REG1B, 0x30);
926 snd_soc_write(codec, ES8316_CPHP_PDN1_REG19, 0x02);
927 snd_soc_write(codec, ES8316_CPHP_ICAL_VOL_REG18, 0x00);
928 snd_soc_write(codec, ES8316_RESET_REG00, 0xC0);
929 snd_soc_write(codec, ES8316_CPHP_OUTEN_REG17, 0x66);
932 case SND_SOC_BIAS_OFF:
933 dev_dbg(codec->dev, "%s off\n", __func__);
934 snd_soc_write(codec, ES8316_CPHP_ICAL_VOL_REG18, 0x33);
935 snd_soc_write(codec, ES8316_CPHP_OUTEN_REG17, 0x00);
936 snd_soc_write(codec, ES8316_CPHP_LDOCTL_REG1B, 0x03);
937 snd_soc_write(codec, ES8316_CPHP_PDN2_REG1A, 0x22);
938 snd_soc_write(codec, ES8316_CPHP_PDN1_REG19, 0x06);
939 snd_soc_write(codec, ES8316_HPMIX_SWITCH_REG14, 0x00);
940 snd_soc_write(codec, ES8316_HPMIX_PDN_REG15, 0x33);
941 snd_soc_write(codec, ES8316_HPMIX_VOL_REG16, 0x00);
942 snd_soc_write(codec, ES8316_ADC_PDN_LINSEL_REG22, 0xC0);
943 snd_soc_write(codec, ES8316_DAC_PDN_REG2F, 0x11);
944 snd_soc_write(codec, ES8316_SYS_PDN_REG0D, 0x3F);
945 snd_soc_write(codec, ES8316_CLKMGR_CLKSW_REG01, 0x03);
946 snd_soc_write(codec, ES8316_RESET_REG00, 0x7F);
949 codec->dapm.bias_level = level;
954 #define es8316_RATES SNDRV_PCM_RATE_8000_96000
956 #define es8316_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
957 SNDRV_PCM_FMTBIT_S24_LE)
959 static struct snd_soc_dai_ops es8316_ops = {
960 .startup = es8316_pcm_startup,
961 .hw_params = es8316_pcm_hw_params,
962 .set_fmt = es8316_set_dai_fmt,
963 .set_sysclk = es8316_set_dai_sysclk,
964 .digital_mute = es8316_mute,
967 static struct snd_soc_dai_driver es8316_dai = {
968 .name = "ES8316 HiFi",
970 .stream_name = "Playback",
973 .rates = es8316_RATES,
974 .formats = es8316_FORMATS,
977 .stream_name = "Capture",
980 .rates = es8316_RATES,
981 .formats = es8316_FORMATS,
984 .symmetric_rates = 1,
988 static int es8316_init_regs(struct snd_soc_codec *codec)
990 dev_dbg(codec->dev, "%s\n", __func__);
991 snd_soc_write(codec, ES8316_ADC_VOLUME_REG27, 0x00);
992 snd_soc_write(codec, ES8316_DAC_SET2_REG31, 0x00);
993 snd_soc_write(codec, ES8316_DAC_VOLL_REG33, 0x00);
994 snd_soc_write(codec, ES8316_DAC_VOLR_REG34, 0x00);
995 snd_soc_write(codec, ES8316_SDP_ADCFMT_REG0A, 0x0C);
996 snd_soc_write(codec, ES8316_SDP_DACFMT_REG0B, 0x0C);
997 snd_soc_write(codec, ES8316_CLKMGR_CLKSEL_REG02, 0x09);
998 snd_soc_write(codec, 0x03, 0x19);
999 snd_soc_write(codec, 0x04, 0x21);
1000 snd_soc_write(codec, 0x05, 0x90);
1001 snd_soc_write(codec, 0x06, 0x21);
1002 snd_soc_write(codec, 0x07, 0x90);
1003 snd_soc_write(codec, 0x09, 0x06);
1004 snd_soc_write(codec, ES8316_CLKMGR_CPDIV_REG08, 0x00);
1005 snd_soc_write(codec, ES8316_CLKMGR_CLKSW_REG01, 0x7F);
1006 snd_soc_write(codec, ES8316_SYS_VMIDSEL_REG0C, 0xFa);
1007 snd_soc_write(codec, ES8316_SYS_PDN_REG0D, 0x00);
1008 snd_soc_write(codec, ES8316_RESET_REG00, 0xC0);
1010 snd_soc_write(codec, ES8316_ADC_PDN_LINSEL_REG22, 0x20);
1011 snd_soc_write(codec, ES8316_DAC_PDN_REG2F, 0x00);
1012 snd_soc_write(codec, ES8316_HPMIX_SEL_REG13, 0x00);
1013 snd_soc_write(codec, ES8316_HPMIX_SWITCH_REG14, 0x88);
1014 snd_soc_write(codec, ES8316_HPMIX_PDN_REG15, 0x00);
1015 snd_soc_write(codec, ES8316_HPMIX_VOL_REG16, 0xBB);
1016 snd_soc_write(codec, ES8316_CPHP_PDN2_REG1A, 0x10);
1017 snd_soc_write(codec, ES8316_CPHP_LDOCTL_REG1B, 0x00);
1018 snd_soc_write(codec, ES8316_CPHP_PDN1_REG19, 0x03);
1019 snd_soc_write(codec, ES8316_CPHP_ICAL_VOL_REG18, 0x00);
1020 snd_soc_write(codec, ES8316_SYS_VMIDLOW_REG10, 0x09);
1022 snd_soc_write(codec, ES8316_CPHP_OUTEN_REG17, 0x66);
1024 snd_soc_write(codec, ES8316_GPIO_DEBUNCE_INT_REG4E, 0xf3);
1025 snd_soc_write(codec, ES8316_TESTMODE_REG50, 0xA0);
1026 snd_soc_write(codec, ES8316_TEST2_REG52, 0x03);
1028 snd_soc_write(codec, ES8316_ADC_PGAGAIN_REG23, 0x60);
1029 snd_soc_write(codec, ES8316_ADC_D2SEPGA_REG24, 0x01);
1030 /*adc ds mode, HPF enable*/
1031 snd_soc_write(codec, ES8316_ADC_DMIC_REG25, 0x08);
1032 snd_soc_write(codec, ES8316_ADC_ALC1_REG29, 0xcd);
1033 snd_soc_write(codec, ES8316_ADC_ALC2_REG2A, 0x08);
1034 snd_soc_write(codec, ES8316_ADC_ALC3_REG2B, 0xa0);
1035 snd_soc_write(codec, ES8316_ADC_ALC4_REG2C, 0x05);
1036 snd_soc_write(codec, ES8316_ADC_ALC5_REG2D, 0x06);
1037 snd_soc_write(codec, ES8316_ADC_ALC6_REG2E, 0x61);
1041 static int es8316_suspend(struct snd_soc_codec *codec)
1043 snd_soc_write(codec, ES8316_CPHP_ICAL_VOL_REG18, 0x33);
1044 snd_soc_write(codec, ES8316_CPHP_OUTEN_REG17, 0x00);
1045 snd_soc_write(codec, ES8316_CPHP_LDOCTL_REG1B, 0x03);
1046 snd_soc_write(codec, ES8316_CPHP_PDN2_REG1A, 0x22);
1047 snd_soc_write(codec, ES8316_CPHP_PDN1_REG19, 0x06);
1048 snd_soc_write(codec, ES8316_HPMIX_SWITCH_REG14, 0x00);
1049 snd_soc_write(codec, ES8316_HPMIX_PDN_REG15, 0x33);
1050 snd_soc_write(codec, ES8316_HPMIX_VOL_REG16, 0x00);
1051 snd_soc_write(codec, ES8316_ADC_PDN_LINSEL_REG22, 0xC0);
1052 snd_soc_write(codec, ES8316_CLKMGR_CLKSW_REG01, 0x03);
1056 static int es8316_resume(struct snd_soc_codec *codec)
1058 snd_soc_write(codec, ES8316_CPHP_ICAL_VOL_REG18, 0x00);
1059 snd_soc_write(codec, ES8316_CPHP_LDOCTL_REG1B, 0x30);
1060 snd_soc_write(codec, ES8316_CPHP_PDN2_REG1A, 0x10);
1061 snd_soc_write(codec, ES8316_CPHP_PDN1_REG19, 0x02);
1062 snd_soc_write(codec, ES8316_HPMIX_SWITCH_REG14, 0x88);
1063 snd_soc_write(codec, ES8316_HPMIX_PDN_REG15, 0x88);
1064 snd_soc_write(codec, ES8316_HPMIX_VOL_REG16, 0xbb);
1065 snd_soc_write(codec, ES8316_ADC_PDN_LINSEL_REG22, 0x20);
1066 snd_soc_write(codec, ES8316_CLKMGR_CLKSW_REG01, 0x7f);
1067 snd_soc_write(codec, ES8316_CPHP_OUTEN_REG17, 0x66);
1071 static int es8316_probe(struct snd_soc_codec *codec)
1074 struct es8316_priv *es8316 = snd_soc_codec_get_drvdata(codec);
1076 DBG("---%s--start--\n", __func__);
1078 ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C);
1081 dev_err(codec->dev, "fail to reset audio (%d)\n", ret);
1084 retv = snd_soc_read(codec, ES8316_CLKMGR_ADCDIV2_REG05);
1086 snd_soc_write(codec, ES8316_GPIO_DEBUNCE_INT_REG4E, 0xf0);
1087 snd_soc_write(codec, 0x01, 0x7f);
1088 snd_soc_write(codec, 0x00, 0xc3);
1090 if (es8316->dmic_amic == dmic_used)
1091 snd_soc_write(codec, ES8316_GPIO_SEL_REG4D, 0x02);
1093 snd_soc_write(codec, ES8316_GPIO_SEL_REG4D, 0x00);
1094 snd_soc_write(codec, ES8316_GPIO_DEBUNCE_INT_REG4E, 0xf3);
1096 codec->dapm.idle_bias_off = 0;
1099 #elif defined(HS_TIMER)
1106 static int es8316_remove(struct snd_soc_codec *codec)
1108 es8316_set_bias_level(codec, SND_SOC_BIAS_OFF);
1112 static struct snd_soc_codec_driver soc_codec_dev_es8316 = {
1113 .probe = es8316_probe,
1114 .remove = es8316_remove,
1115 .suspend = es8316_suspend,
1116 .resume = es8316_resume,
1117 .set_bias_level = es8316_set_bias_level,
1118 .reg_cache_size = ARRAY_SIZE(es8316_reg_defaults),
1119 .reg_word_size = sizeof(u8),
1120 .reg_cache_default = es8316_reg_defaults,
1122 .controls = es8316_snd_controls,
1123 .num_controls = ARRAY_SIZE(es8316_snd_controls),
1124 .dapm_widgets = es8316_dapm_widgets,
1125 .num_dapm_widgets = ARRAY_SIZE(es8316_dapm_widgets),
1126 .dapm_routes = es8316_dapm_routes,
1127 .num_dapm_routes = ARRAY_SIZE(es8316_dapm_routes),
1130 #if defined(CONFIG_SPI_MASTER)
1131 static int es8316_spi_probe(struct spi_device *spi)
1133 struct es8316_priv *es8316;
1136 es8316 = kzalloc(sizeof(*es8316), GFP_KERNEL);
1140 spi_set_drvdata(spi, es8316);
1141 ret = snd_soc_register_codec(&spi->dev,
1142 &soc_codec_dev_es8316,
1149 static int es8316_spi_remove(struct spi_device *spi)
1151 snd_soc_unregister_codec(&spi->dev);
1152 kfree(spi_get_drvdata(spi));
1156 static struct spi_driver es8316_spi_driver = {
1159 .owner = THIS_MODULE,
1161 .probe = es8316_spi_probe,
1162 .remove = es8316_spi_remove,
1164 #endif /* CONFIG_SPI_MASTER */
1166 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1168 static void es8316_i2c_shutdown(struct i2c_client *i2c)
1170 struct snd_soc_codec *codec;
1171 struct es8316_priv *es8316 = es8316_private;
1176 es8316_set_gpio(ES8316_CODEC_SET_SPK, !es8316->spk_gpio_level);
1180 codec = es8316_codec;
1181 snd_soc_write(codec, ES8316_CPHP_ICAL_VOL_REG18, 0x33);
1182 snd_soc_write(codec, ES8316_CPHP_OUTEN_REG17, 0x00);
1183 snd_soc_write(codec, ES8316_CPHP_LDOCTL_REG1B, 0x03);
1184 snd_soc_write(codec, ES8316_CPHP_PDN2_REG1A, 0x22);
1185 snd_soc_write(codec, ES8316_CPHP_PDN1_REG19, 0x06);
1186 snd_soc_write(codec, ES8316_HPMIX_SWITCH_REG14, 0x00);
1187 snd_soc_write(codec, ES8316_HPMIX_PDN_REG15, 0x33);
1188 snd_soc_write(codec, ES8316_HPMIX_VOL_REG16, 0x00);
1189 snd_soc_write(codec, ES8316_ADC_PDN_LINSEL_REG22, 0xC0);
1190 snd_soc_write(codec, ES8316_DAC_PDN_REG2F, 0x11);
1191 snd_soc_write(codec, ES8316_SYS_PDN_REG0D, 0x3F);
1192 snd_soc_write(codec, ES8316_CLKMGR_CLKSW_REG01, 0x03);
1193 snd_soc_write(codec, ES8316_RESET_REG00, 0x7F);
1198 static int es8316_i2c_probe(struct i2c_client *i2c_client,
1199 const struct i2c_device_id *id)
1201 struct es8316_priv *es8316;
1203 unsigned long irq_flag = 0;
1205 enum of_gpio_flags flags;
1206 struct device_node *np = i2c_client->dev.of_node;
1208 DBG("---%s---probe start\n", __func__);
1210 es8316 = kzalloc(sizeof(*es8316), GFP_KERNEL);
1214 es8316_private = es8316;
1216 es8316->dmic_amic = amic_used; /*if internal mic is amic*/
1217 i2c_set_clientdata(i2c_client, es8316);
1220 es8316->spk_ctl_gpio = of_get_named_gpio_flags(np,
1221 "spk-con-gpio", 0, &flags);
1222 if (es8316->spk_ctl_gpio < 0) {
1223 DBG("%s() Can not read property spk codec-en-gpio\n", __func__);
1224 es8316->spk_ctl_gpio = INVALID_GPIO;
1226 es8316->spk_gpio_level = (flags & OF_GPIO_ACTIVE_LOW) ? 0 : 1;
1227 ret = gpio_request(es8316->spk_ctl_gpio, NULL);
1228 gpio_direction_output(es8316->spk_ctl_gpio,
1229 !es8316->spk_gpio_level);
1232 es8316->hp_ctl_gpio = of_get_named_gpio_flags(np,
1233 "hp-con-gpio", 0, &flags);
1234 if (es8316->hp_ctl_gpio < 0) {
1235 DBG("%s() Can not read property hp codec-en-gpio\n", __func__);
1236 es8316->hp_ctl_gpio = INVALID_GPIO;
1238 es8316->hp_gpio_level = (flags & OF_GPIO_ACTIVE_LOW) ? 0 : 1;
1239 ret = gpio_request(es8316->hp_ctl_gpio, NULL);
1240 gpio_direction_output(es8316->hp_ctl_gpio, !es8316->hp_gpio_level);
1243 es8316->hp_det_gpio = of_get_named_gpio_flags(np,
1244 "hp-det-gpio", 0, &flags);
1245 if (es8316->hp_det_gpio < 0) {
1246 DBG("%s() Can not read property hp_det gpio\n", __func__);
1247 es8316->hp_det_gpio = INVALID_GPIO;
1249 es8316->hp_det_level = (flags & OF_GPIO_ACTIVE_LOW) ? 0 : 1;
1250 ret = gpio_request(es8316->hp_det_gpio, NULL);
1252 DBG("%s request HP_DET error", __func__);
1255 gpio_direction_input(es8316->hp_det_gpio);
1257 irq_flag = IRQF_TRIGGER_LOW | IRQF_ONESHOT;
1258 hp_irq = gpio_to_irq(es8316->hp_det_gpio);
1261 ret = request_threaded_irq(hp_irq, NULL,
1262 hp_det_irq_handler, irq_flag, "ES8316", NULL);
1265 ret = snd_soc_register_codec(&i2c_client->dev,
1266 &soc_codec_dev_es8316,
1278 static int es8316_i2c_remove(struct i2c_client *client)
1280 snd_soc_unregister_codec(&client->dev);
1281 kfree(i2c_get_clientdata(client));
1285 static const unsigned short normal_i2c[] = {0x10, I2C_CLIENT_END};
1286 static const struct i2c_device_id es8316_i2c_id[] = {
1292 MODULE_DEVICE_TABLE(i2c, es8316_i2c_id);
1294 static struct i2c_driver es8316_i2c_driver = {
1297 .owner = THIS_MODULE,
1299 .shutdown = es8316_i2c_shutdown,
1300 .probe = es8316_i2c_probe,
1301 .remove = es8316_i2c_remove,
1302 .id_table = es8316_i2c_id,
1303 .class = I2C_CLASS_HWMON,
1304 .address_list = normal_i2c,
1308 static int __init es8316_init(void)
1310 DBG("--%s--start--\n", __func__);
1311 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1312 return i2c_add_driver(&es8316_i2c_driver);
1314 #if defined(CONFIG_SPI_MASTER)
1315 return spi_register_driver(&es8316_spi_driver);
1319 static void __exit es8316_exit(void)
1321 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1322 return i2c_del_driver(&es8316_i2c_driver);
1324 #if defined(CONFIG_SPI_MASTER)
1325 return spi_unregister_driver(&es8316_spi_driver);
1330 module_init(es8316_init);
1331 module_exit(es8316_exit);
1333 MODULE_DESCRIPTION("ASoC es8316 driver");
1334 MODULE_AUTHOR("Will <will@everset-semi.com>");
1335 MODULE_LICENSE("GPL");