2 * es8323.c -- es8323 ALSA SoC audio driver
4 * Copyright 2009 Wolfson Microelectronics plc
5 * Copyright 2005 Openedhand Ltd.
7 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/init.h>
17 #include <linux/delay.h>
19 #include <linux/i2c.h>
20 #include <linux/spi/spi.h>
21 #include <linux/platform_device.h>
22 #include <linux/slab.h>
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/tlv.h>
27 #include <sound/soc.h>
28 #include <sound/soc-dapm.h>
29 #include <sound/initval.h>
31 #include <mach/iomux.h>
32 #include <mach/board.h>
33 #include <mach/gpio.h>
35 //#include <linux/tchip_sysinf.h>
39 #include <linux/proc_fs.h>
40 #include <linux/gpio.h>
43 #include <linux/interrupt.h>
44 #include <linux/irq.h>
47 #define DBG(x...) printk(KERN_INFO x)
49 #define DBG(x...) do { } while (0)
53 static int set_spk = 1; // add by xhc when insert hdmi 0, no insert hdmi 1
54 #define RT5633_SPK_TIMER 0 //if enable this, MUST enable RT5633_EQ_FUNC_ENA and RT5633_EQ_FUNC_SEL==RT5633_EQ_FOR_MANUAL first!
55 #if (RT5633_SPK_TIMER == 1)
56 static struct timer_list spk_timer;
57 struct work_struct spk_work;
58 static bool last_is_spk = false;
59 //#define ES8323_HP_PIN RK30_PIN0_PC7 // need modify.
61 //#define SPK_CTL RK29_PIN6_PB7
62 //#define SPK_CON RK29_PIN6_PB6
65 #define SPK_CON RK30_PIN2_PD7 //RK30_PIN4_PC5
66 #define HP_DET RK30_PIN0_PB5
68 static int hp_irq_flag = 0;
69 //#define SPK_CTL RK29_PIN6_PB6
70 //#define EAR_CON_PIN RK29_PIN6_PB5
73 #ifndef es8323_DEF_VOL
74 #define es8323_DEF_VOL 0x1e
77 static int es8323_set_bias_level(struct snd_soc_codec *codec,enum snd_soc_bias_level level);
78 extern int es8323_dapm_pre_event(struct snd_soc_dapm_widget* widget, struct snd_kcontrol * null, int event);
79 extern int es8323_dapm_post_event(struct snd_soc_dapm_widget* widget, struct snd_kcontrol * null, int event);
81 * es8323 register cache
82 * We can't read the es8323 register space when we
83 * are using 2 wire for device control, so we cache them instead.
85 static u16 es8323_reg[] = {
86 0x06, 0x1C, 0xC3, 0xFC, /* 0 *////0x0100 0x0180
87 0xC0, 0x00, 0x00, 0x7C, /* 4 */
88 0x80, 0x00, 0x00, 0x06, /* 8 */
89 0x00, 0x06, 0x30, 0x30, /* 12 */
90 0xC0, 0xC0, 0x38, 0xB0, /* 16 */
91 0x32, 0x06, 0x00, 0x00, /* 20 */
92 0x06, 0x30, 0xC0, 0xC0, /* 24 */
93 0x08, 0x06, 0x1F, 0xF7, /* 28 */
94 0xFD, 0xFF, 0x1F, 0xF7, /* 32 */
95 0xFD, 0xFF, 0x00, 0x38, /* 36 */
96 0x38, 0x38, 0x38, 0x38, /* 40 */
97 0x38, 0x00, 0x00, 0x00, /* 44 */
98 0x00, 0x00, 0x00, 0x00, /* 48 */
99 0x00, 0x00, 0x00, 0x00, /* 52 */
102 /* codec private data */
105 enum snd_soc_control_type control_type;
106 struct snd_pcm_hw_constraint_list *sysclk_constraints;
107 int is_startup; // gModify.Add
111 static void hp_detect_do_switch(struct work_struct *work)
114 int irq = gpio_to_irq(HP_DET);
117 //rk28_send_wakeup_key();
118 printk("hjc:%s,irq=%d\n",__func__,irq);
119 type = gpio_get_value(HP_DET) ? IRQ_TYPE_EDGE_FALLING : IRQ_TYPE_EDGE_RISING;
120 ret = irq_set_irq_type(irq, type);
122 pr_err("%s: irq_set_irq_type(%d, %d) failed\n", __func__, irq, type);
127 if(0 == gpio_get_value(HP_DET)){
128 printk("hp_det = 0,insert hp\n");
129 gpio_set_value(SPK_CON,0);
130 }else if(1 == gpio_get_value(HP_DET)){
131 printk("hp_det = 1,deinsert hp\n");
132 gpio_set_value(SPK_CON,1);
138 static DECLARE_DELAYED_WORK(wakeup_work, hp_detect_do_switch);
141 static irqreturn_t hp_det_irq_handler(int irq, void *dev_id)
144 printk("%s=%d,%d\n",__FUNCTION__,HP_IRQ,HP_DET);
145 //disable_irq_nosync(ts->client->irq);
146 //queue_work(gt801_wq, &ts->work);
147 if(0 == gpio_get_value(HP_DET)){
148 printk("hp_det = 0,insert hp\n");
149 gpio_set_value(SPK_CON,0);
150 }else if(1 == gpio_get_value(HP_DET)){
151 printk("hp_det = 1,insert hp\n");
152 gpio_set_value(SPK_CON,1);
156 printk("hjc:%s>>>>\n",__func__);
157 disable_irq_nosync(irq); // for irq debounce
158 //wake_lock_timeout(&usb_wakelock, WAKE_LOCK_TIMEOUT);
159 schedule_delayed_work(&wakeup_work, HZ / 10);
166 static unsigned int es8323_read_reg_cache(struct snd_soc_codec *codec,
169 //u16 *cache = codec->reg_cache;
170 if (reg >= ARRAY_SIZE(es8323_reg))
172 return es8323_reg[reg];
175 static int es8323_write(struct snd_soc_codec *codec, unsigned int reg,
178 //u16 *cache = codec->reg_cache;
182 BUG_ON(codec->volatile_register);
185 data[1] = value & 0x00ff;
187 if (reg < ARRAY_SIZE(es8323_reg))
188 es8323_reg[reg] = value;
189 ret = codec->hw_write(codec->control_data, data, 2);
198 //#define es8323_reset(c) snd_soc_write(c, es8323_RESET, 0)
199 static int es8323_reset(struct snd_soc_codec *codec)
201 snd_soc_write(codec, ES8323_CONTROL1, 0x80);
202 return snd_soc_write(codec, ES8323_CONTROL1, 0x00);
205 static const char *es8323_line_texts[] = {
206 "Line 1", "Line 2", "PGA"};
208 static const unsigned int es8323_line_values[] = {
210 static const char *es8323_pga_sel[] = {"Line 1", "Line 2", "Differential"};
211 static const char *stereo_3d_txt[] = {"No 3D ", "Level 1","Level 2","Level 3","Level 4","Level 5","Level 6","Level 7"};
212 static const char *alc_func_txt[] = {"Off", "Right", "Left", "Stereo"};
213 static const char *ng_type_txt[] = {"Constant PGA Gain","Mute ADC Output"};
214 static const char *deemph_txt[] = {"None", "32Khz", "44.1Khz", "48Khz"};
215 static const char *adcpol_txt[] = {"Normal", "L Invert", "R Invert","L + R Invert"};
216 static const char *es8323_mono_mux[] = {"Stereo", "Mono (Left)","Mono (Right)"};
217 static const char *es8323_diff_sel[] = {"Line 1", "Line 2"};
219 static const struct soc_enum es8323_enum[]={
220 SOC_VALUE_ENUM_SINGLE(ES8323_DACCONTROL16, 3, 7, ARRAY_SIZE(es8323_line_texts), es8323_line_texts, es8323_line_values),/* LLINE */
221 SOC_VALUE_ENUM_SINGLE(ES8323_DACCONTROL16, 0, 7, ARRAY_SIZE(es8323_line_texts), es8323_line_texts, es8323_line_values),/* rline */
222 SOC_VALUE_ENUM_SINGLE(ES8323_ADCCONTROL2, 6, 3, ARRAY_SIZE(es8323_pga_sel), es8323_line_texts, es8323_line_values),/* Left PGA Mux */
223 SOC_VALUE_ENUM_SINGLE(ES8323_ADCCONTROL2, 4, 3, ARRAY_SIZE(es8323_pga_sel), es8323_line_texts, es8323_line_values),/* Right PGA Mux */
224 SOC_ENUM_SINGLE(ES8323_DACCONTROL7, 2, 8, stereo_3d_txt),/* stereo-3d */
225 SOC_ENUM_SINGLE(ES8323_ADCCONTROL10, 6, 4, alc_func_txt),/*alc func*/
226 SOC_ENUM_SINGLE(ES8323_ADCCONTROL14, 1, 2, ng_type_txt),/*noise gate type*/
227 SOC_ENUM_SINGLE(ES8323_DACCONTROL6, 6, 4, deemph_txt),/*Playback De-emphasis*/
228 SOC_ENUM_SINGLE(ES8323_ADCCONTROL6, 6, 4, adcpol_txt),
229 SOC_ENUM_SINGLE(ES8323_ADCCONTROL3, 3, 3, es8323_mono_mux),
230 SOC_ENUM_SINGLE(ES8323_ADCCONTROL3, 7, 2, es8323_diff_sel),
234 static const DECLARE_TLV_DB_SCALE(pga_tlv, 0, 300, 0);
235 static const DECLARE_TLV_DB_SCALE(adc_tlv, -9600, 50, 1);
236 static const DECLARE_TLV_DB_SCALE(dac_tlv, -9600, 50, 1);
237 static const DECLARE_TLV_DB_SCALE(out_tlv, -4500, 150, 0);
238 static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0);
240 static const struct snd_kcontrol_new es8323_snd_controls[] = {
241 SOC_ENUM("3D Mode", es8323_enum[4]),
242 SOC_SINGLE("ALC Capture Target Volume", ES8323_ADCCONTROL11, 4, 15, 0),
243 SOC_SINGLE("ALC Capture Max PGA", ES8323_ADCCONTROL10, 3, 7, 0),
244 SOC_SINGLE("ALC Capture Min PGA", ES8323_ADCCONTROL10, 0, 7, 0),
245 SOC_ENUM("ALC Capture Function", es8323_enum[5]),
246 SOC_SINGLE("ALC Capture ZC Switch", ES8323_ADCCONTROL13, 6, 1, 0),
247 SOC_SINGLE("ALC Capture Hold Time", ES8323_ADCCONTROL11, 0, 15, 0),
248 SOC_SINGLE("ALC Capture Decay Time", ES8323_ADCCONTROL12, 4, 15, 0),
249 SOC_SINGLE("ALC Capture Attack Time", ES8323_ADCCONTROL12, 0, 15, 0),
250 SOC_SINGLE("ALC Capture NG Threshold", ES8323_ADCCONTROL14, 3, 31, 0),
251 SOC_ENUM("ALC Capture NG Type",es8323_enum[6]),
252 SOC_SINGLE("ALC Capture NG Switch", ES8323_ADCCONTROL14, 0, 1, 0),
253 SOC_SINGLE("ZC Timeout Switch", ES8323_ADCCONTROL13, 6, 1, 0),
254 SOC_DOUBLE_R_TLV("Capture Digital Volume", ES8323_ADCCONTROL8, ES8323_ADCCONTROL9,0, 255, 1, adc_tlv),
255 SOC_SINGLE("Capture Mute", ES8323_ADCCONTROL7, 2, 1, 0),
256 SOC_SINGLE_TLV("Left Channel Capture Volume", ES8323_ADCCONTROL1, 4, 15, 0, bypass_tlv),
257 SOC_SINGLE_TLV("Right Channel Capture Volume", ES8323_ADCCONTROL1, 0, 15, 0, bypass_tlv),
258 SOC_ENUM("Playback De-emphasis", es8323_enum[7]),
259 SOC_ENUM("Capture Polarity", es8323_enum[8]),
260 SOC_DOUBLE_R_TLV("PCM Volume", ES8323_DACCONTROL4, ES8323_DACCONTROL5, 0, 255, 1, dac_tlv),
261 SOC_SINGLE_TLV("Left Mixer Left Bypass Volume", ES8323_DACCONTROL17, 3, 7, 1, bypass_tlv),
262 SOC_SINGLE_TLV("Right Mixer Right Bypass Volume", ES8323_DACCONTROL20, 3, 7, 1, bypass_tlv),
263 SOC_DOUBLE_R_TLV("Output 1 Playback Volume", ES8323_DACCONTROL24, ES8323_DACCONTROL25, 0, 64, 0, out_tlv),
264 SOC_DOUBLE_R_TLV("Output 2 Playback Volume", ES8323_DACCONTROL26, ES8323_DACCONTROL27, 0, 64, 0, out_tlv),
268 static const struct snd_kcontrol_new es8323_left_line_controls =
269 SOC_DAPM_VALUE_ENUM("Route", es8323_enum[0]);
271 static const struct snd_kcontrol_new es8323_right_line_controls =
272 SOC_DAPM_VALUE_ENUM("Route", es8323_enum[1]);
275 static const struct snd_kcontrol_new es8323_left_pga_controls =
276 SOC_DAPM_VALUE_ENUM("Route", es8323_enum[2]);
278 static const struct snd_kcontrol_new es8323_right_pga_controls =
279 SOC_DAPM_VALUE_ENUM("Route", es8323_enum[3]);
282 static const struct snd_kcontrol_new es8323_left_mixer_controls[] = {
283 SOC_DAPM_SINGLE("Left Playback Switch", ES8323_DACCONTROL17, 7, 1, 0),
284 SOC_DAPM_SINGLE("Left Bypass Switch", ES8323_DACCONTROL17, 6, 1, 0),
288 static const struct snd_kcontrol_new es8323_right_mixer_controls[] = {
289 SOC_DAPM_SINGLE("Right Playback Switch", ES8323_DACCONTROL20, 7, 1, 0),
290 SOC_DAPM_SINGLE("Right Bypass Switch", ES8323_DACCONTROL20, 6, 1, 0),
293 /* Differential Mux */
294 //static const char *es8323_diff_sel[] = {"Line 1", "Line 2"};
295 static const struct snd_kcontrol_new es8323_diffmux_controls =
296 SOC_DAPM_ENUM("Route", es8323_enum[10]);
299 static const struct snd_kcontrol_new es8323_monomux_controls =
300 SOC_DAPM_ENUM("Route", es8323_enum[9]);
302 static const struct snd_soc_dapm_widget es8323_dapm_widgets[] = {
304 SND_SOC_DAPM_INPUT("LINPUT1"),
305 SND_SOC_DAPM_INPUT("LINPUT2"),
306 SND_SOC_DAPM_INPUT("RINPUT1"),
307 SND_SOC_DAPM_INPUT("RINPUT2"),
309 SND_SOC_DAPM_MICBIAS("Mic Bias", ES8323_ADCPOWER, 3, 1),
311 SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
312 &es8323_diffmux_controls),
314 SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
315 &es8323_monomux_controls),
316 SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
317 &es8323_monomux_controls),
319 SND_SOC_DAPM_MUX("Left PGA Mux", ES8323_ADCPOWER, 7, 1,
320 &es8323_left_pga_controls),
321 SND_SOC_DAPM_MUX("Right PGA Mux", ES8323_ADCPOWER, 6, 1,
322 &es8323_right_pga_controls),
324 SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
325 &es8323_left_line_controls),
326 SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
327 &es8323_right_line_controls),
329 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", ES8323_ADCPOWER, 4, 1),
330 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", ES8323_ADCPOWER, 5, 1),
332 /* gModify.Cmmt Implement when suspend/startup */
333 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", ES8323_DACPOWER, 7, 0),
334 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", ES8323_DACPOWER, 8, 0),
336 SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
337 &es8323_left_mixer_controls[0],
338 ARRAY_SIZE(es8323_left_mixer_controls)),
339 SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
340 &es8323_right_mixer_controls[0],
341 ARRAY_SIZE(es8323_right_mixer_controls)),
343 SND_SOC_DAPM_PGA("Right Out 2", ES8323_DACPOWER, 2, 0, NULL, 0),
344 SND_SOC_DAPM_PGA("Left Out 2", ES8323_DACPOWER, 3, 0, NULL, 0),
345 SND_SOC_DAPM_PGA("Right Out 1", ES8323_DACPOWER, 4, 0, NULL, 0),
346 SND_SOC_DAPM_PGA("Left Out 1", ES8323_DACPOWER, 5, 0, NULL, 0),
347 SND_SOC_DAPM_PGA("LAMP", ES8323_ADCCONTROL1, 4, 0, NULL, 0),
348 SND_SOC_DAPM_PGA("RAMP", ES8323_ADCCONTROL1, 0, 0, NULL, 0),
350 SND_SOC_DAPM_OUTPUT("LOUT1"),
351 SND_SOC_DAPM_OUTPUT("ROUT1"),
352 SND_SOC_DAPM_OUTPUT("LOUT2"),
353 SND_SOC_DAPM_OUTPUT("ROUT2"),
354 SND_SOC_DAPM_OUTPUT("VREF"),
356 SND_SOC_DAPM_PRE("PRE", es8323_dapm_pre_event),
357 SND_SOC_DAPM_POST("POST", es8323_dapm_post_event),
361 static const struct snd_soc_dapm_route audio_map[] = {
363 { "Left Line Mux", "NULL", "LINPUT1" },
364 { "Left Line Mux", "NULL", "LINPUT2" },
365 { "Left Line Mux", "NULL", "Left PGA Mux" },
367 { "Right Line Mux", "NULL", "RINPUT1" },
368 { "Right Line Mux", "NULL", "RINPUT2" },
369 { "Right Line Mux", "NULL", "Right PGA Mux" },
371 { "Left PGA Mux", "LAMP", "LINPUT1" },
372 { "Left PGA Mux", "LAMP", "LINPUT2" },
373 { "Left PGA Mux", "LAMP", "Differential Mux" },
375 { "Right PGA Mux", "RAMP", "RINPUT1" },
376 { "Right PGA Mux", "RAMP", "RINPUT2" },
377 { "Right PGA Mux", "RAMP", "Differential Mux" },
379 { "Differential Mux", "LAMP", "LINPUT1" },
380 { "Differential Mux", "RAMP", "RINPUT1" },
381 { "Differential Mux", "LAMP", "LINPUT2" },
382 { "Differential Mux", "RAMP", "RINPUT2" },
384 { "Left ADC Mux", "Stereo", "Left PGA Mux" },
385 { "Left ADC Mux", "Mono (Left)", "Left PGA Mux" },
386 //{ "Left ADC Mux", "Digital Mono", "Left PGA Mux" },
388 { "Right ADC Mux", "Stereo", "Right PGA Mux" },
389 { "Right ADC Mux", "Mono (Right)", "Right PGA Mux" },
390 //{ "Right ADC Mux", "Digital Mono", "Right PGA Mux" },
392 { "Left ADC", NULL, "Left ADC Mux" },
393 { "Right ADC", NULL, "Right ADC Mux" },
395 { "Left Line Mux", "LAMP", "LINPUT1" },
396 { "Left Line Mux", "LAMP", "LINPUT2" },
397 { "Left Line Mux", "LAMP", "Left PGA Mux" },
399 { "Right Line Mux", "RAMP", "RINPUT1" },
400 { "Right Line Mux", "RAMP", "RINPUT2" },
401 { "Right Line Mux", "RAMP", "Right PGA Mux" },
403 { "Left Mixer", "Left Playback Switch", "Left DAC" },
404 { "Left Mixer", "Left Bypass Switch", "Left Line Mux" },
406 { "Right Mixer", "Right Playback Switch", "Right DAC" },
407 { "Right Mixer", "Right Bypass Switch", "Right Line Mux" },
409 { "Left Out 1", NULL, "Left Mixer" },
410 { "LOUT1", NULL, "Left Out 1" },
411 { "Right Out 1", NULL, "Right Mixer" },
412 { "ROUT1", NULL, "Right Out 1" },
414 { "Left Out 2", NULL, "Left Mixer" },
415 { "LOUT2", NULL, "Left Out 2" },
416 { "Right Out 2", NULL, "Right Mixer" },
417 { "ROUT2", NULL, "Right Out 2" },
420 int es8323_dapm_pre_event(struct snd_soc_dapm_widget* widget, struct snd_kcontrol * null, int event)
422 // printk("fun:%s, event:%d\r\n", __FUNCTION__, event);
425 widget->dapm->dev_power = 1;
426 es8323_set_bias_level(widget->codec, SND_SOC_BIAS_PREPARE);
430 int es8323_dapm_post_event(struct snd_soc_dapm_widget* widget, struct snd_kcontrol * null, int event)
432 // printk("fun:%s, event:%d\r\n", __FUNCTION__, event);
435 widget->dapm->dev_power = 0;
436 es8323_set_bias_level(widget->codec, SND_SOC_BIAS_STANDBY);
449 /* codec hifi mclk clock divider coefficients */
450 static const struct _coeff_div coeff_div[] = {
452 {12288000, 8000, 1536, 0xa, 0x0},
453 {11289600, 8000, 1408, 0x9, 0x0},
454 {18432000, 8000, 2304, 0xc, 0x0},
455 {16934400, 8000, 2112, 0xb, 0x0},
456 {12000000, 8000, 1500, 0xb, 0x1},
459 {11289600, 11025, 1024, 0x7, 0x0},
460 {16934400, 11025, 1536, 0xa, 0x0},
461 {12000000, 11025, 1088, 0x9, 0x1},
464 {12288000, 16000, 768, 0x6, 0x0},
465 {18432000, 16000, 1152, 0x8, 0x0},
466 {12000000, 16000, 750, 0x7, 0x1},
469 {11289600, 22050, 512, 0x4, 0x0},
470 {16934400, 22050, 768, 0x6, 0x0},
471 {12000000, 22050, 544, 0x6, 0x1},
474 {12288000, 32000, 384, 0x3, 0x0},
475 {18432000, 32000, 576, 0x5, 0x0},
476 {12000000, 32000, 375, 0x4, 0x1},
479 {11289600, 44100, 256, 0x2, 0x0},
480 {16934400, 44100, 384, 0x3, 0x0},
481 {12000000, 44100, 272, 0x3, 0x1},
484 {12288000, 48000, 256, 0x2, 0x0},
485 {18432000, 48000, 384, 0x3, 0x0},
486 {12000000, 48000, 250, 0x2, 0x1},
489 {11289600, 88200, 128, 0x0, 0x0},
490 {16934400, 88200, 192, 0x1, 0x0},
491 {12000000, 88200, 136, 0x1, 0x1},
494 {12288000, 96000, 128, 0x0, 0x0},
495 {18432000, 96000, 192, 0x1, 0x0},
496 {12000000, 96000, 125, 0x0, 0x1},
499 static inline int get_coeff(int mclk, int rate)
503 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
504 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
511 /* The set of rates we can generate from the above for each SYSCLK */
513 static unsigned int rates_12288[] = {
514 8000, 12000, 16000, 24000, 24000, 32000, 48000, 96000,
517 static struct snd_pcm_hw_constraint_list constraints_12288 = {
518 .count = ARRAY_SIZE(rates_12288),
522 static unsigned int rates_112896[] = {
523 8000, 11025, 22050, 44100,
526 static struct snd_pcm_hw_constraint_list constraints_112896 = {
527 .count = ARRAY_SIZE(rates_112896),
528 .list = rates_112896,
531 static unsigned int rates_12[] = {
532 8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000,
536 static struct snd_pcm_hw_constraint_list constraints_12 = {
537 .count = ARRAY_SIZE(rates_12),
541 static void on_off_ext_amp(int i)
543 // struct snd_soc_codec *codec;
548 gpio_set_value(SPK_CON, i); //delete by hjc
550 DBG("*** %s() SPEAKER set SPK_CON %d\n", __FUNCTION__, i);
553 //gpio_direction_output(SPK_CTL, GPIO_LOW);
554 gpio_set_value(SPK_CTL, i);
555 DBG("*** %s() SPEAKER set as %d\n", __FUNCTION__, i);
558 //gpio_direction_output(EAR_CON_PIN, GPIO_LOW);
559 gpio_set_value(EAR_CON_PIN, i);
560 DBG("*** %s() HEADPHONE set as %d\n", __FUNCTION__, i);
566 static void es8323_codec_set_spk(bool on)
575 * Note that this should be called from init rather than from hw_params.
577 static int es8323_set_dai_sysclk(struct snd_soc_dai *codec_dai,
578 int clk_id, unsigned int freq, int dir)
580 struct snd_soc_codec *codec = codec_dai->codec;
581 struct es8323_priv *es8323 = snd_soc_codec_get_drvdata(codec);
583 DBG("Enter::%s----%d\n",__FUNCTION__,__LINE__);
590 es8323->sysclk_constraints = &constraints_112896;
591 es8323->sysclk = freq;
598 es8323->sysclk_constraints = &constraints_12288;
599 es8323->sysclk = freq;
604 es8323->sysclk_constraints = &constraints_12;
605 es8323->sysclk = freq;
611 static int es8323_set_dai_fmt(struct snd_soc_dai *codec_dai,
614 struct snd_soc_codec *codec = codec_dai->codec;
618 alsa_dbg("%s----%d, fmt[%02x]\n",__FUNCTION__,__LINE__,fmt);
620 iface = snd_soc_read(codec, ES8323_IFACE);
621 adciface = snd_soc_read(codec, ES8323_ADC_IFACE);
622 daciface = snd_soc_read(codec, ES8323_DAC_IFACE);
624 /* set master/slave audio interface */
625 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
626 case SND_SOC_DAIFMT_CBM_CFM: // MASTER MODE
627 alsa_dbg("es8323 in master mode");
630 case SND_SOC_DAIFMT_CBS_CFS: // SLAVE MODE
631 alsa_dbg("es8323 in slave mode");
639 /* interface format */
640 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
641 case SND_SOC_DAIFMT_I2S:
643 //daciface &= 0xF9; //updated by david-everest,5-25
646 case SND_SOC_DAIFMT_RIGHT_J:
648 case SND_SOC_DAIFMT_LEFT_J:
650 case SND_SOC_DAIFMT_DSP_A:
652 case SND_SOC_DAIFMT_DSP_B:
658 /* clock inversion */
659 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
660 case SND_SOC_DAIFMT_NB_NF:
663 //daciface &= 0xDF; //UPDATED BY david-everest,5-25
666 case SND_SOC_DAIFMT_IB_IF:
668 //adciface &= 0xDF; //UPDATED BY david-everest,5-25
670 //daciface &= 0xDF; //UPDATED BY david-everest,5-25
673 case SND_SOC_DAIFMT_IB_NF:
675 // adciface |= 0x40; //UPDATED BY david-everest,5-25
677 //daciface |= 0x40; //UPDATED BY david-everest,5-25
680 case SND_SOC_DAIFMT_NB_IF:
683 //daciface |= 0x20; //UPDATED BY david-everest,5-25
690 snd_soc_write(codec, ES8323_IFACE , iface);
691 snd_soc_write(codec, ES8323_ADC_IFACE, adciface);
692 snd_soc_write(codec, ES8323_DAC_IFACE, daciface);
697 static int es8323_pcm_startup(struct snd_pcm_substream *substream,
698 struct snd_soc_dai *dai)
700 struct snd_soc_codec *codec = dai->codec;
701 struct es8323_priv *es8323 = snd_soc_codec_get_drvdata(codec);
703 if (!es8323->is_startup) {
704 es8323->is_startup = 1;
707 snd_soc_write(codec, ES8323_CONTROL1, 0x06);
708 snd_soc_write(codec, ES8323_CONTROL2, 0x72);
709 snd_soc_write(codec, ES8323_DACPOWER, 0x00);
711 //snd_soc_write(codec, ES8323_CHIPPOWER, 0xf3);
712 snd_soc_write(codec, ES8323_DACCONTROL21, 0x80);
714 snd_soc_write(codec, ES8323_ADCPOWER, 0x59);
715 snd_soc_write(codec, ES8323_DACPOWER, 0x3c);
716 snd_soc_write(codec, ES8323_CHIPPOWER, 0x00);
720 DBG("Enter::%s----%d es8323->sysclk=%d\n",__FUNCTION__,__LINE__,es8323->sysclk);
722 /* The set of sample rates that can be supported depends on the
723 * MCLK supplied to the CODEC - enforce this.
725 if (!es8323->sysclk) {
727 "No MCLK configured, call set_sysclk() on init\n");
731 snd_pcm_hw_constraint_list(substream->runtime, 0,
732 SNDRV_PCM_HW_PARAM_RATE,
733 es8323->sysclk_constraints);
738 static int es8323_pcm_hw_params(struct snd_pcm_substream *substream,
739 struct snd_pcm_hw_params *params,
740 struct snd_soc_dai *dai)
743 static int codecfirstuse=0;
744 struct snd_soc_pcm_runtime *rtd = substream->private_data;
745 struct snd_soc_codec *codec = rtd->codec;
746 struct es8323_priv *es8323 = snd_soc_codec_get_drvdata(codec);
747 //u16 iface = snd_soc_read(codec, es8323_IFACE) & 0x1f3;
748 //u16 srate = snd_soc_read(codec, es8323_SRATE) & 0x180;
750 u16 srate = snd_soc_read(codec, ES8323_IFACE) & 0x80;
751 u16 adciface = snd_soc_read(codec, ES8323_ADC_IFACE) & 0xE3;
752 u16 daciface = snd_soc_read(codec, ES8323_DAC_IFACE) & 0xC7;
756 coeff = get_coeff(es8323->sysclk, params_rate(params));
758 coeff = get_coeff(es8323->sysclk / 2, params_rate(params));
763 "Unable to configure sample rate %dHz with %dHz MCLK\n",
764 params_rate(params), es8323->sysclk);
769 switch (params_format(params)) {
770 case SNDRV_PCM_FORMAT_S16_LE:
774 case SNDRV_PCM_FORMAT_S20_3LE:
778 case SNDRV_PCM_FORMAT_S24_LE:
780 case SNDRV_PCM_FORMAT_S32_LE:
786 /* set iface & srate*/
787 snd_soc_write(codec, ES8323_DAC_IFACE, daciface); //dac bits length
788 snd_soc_write(codec, ES8323_ADC_IFACE, adciface); //adc bits length
792 snd_soc_write(codec, ES8323_IFACE, srate); //bclk div,mclkdiv2
793 snd_soc_write(codec, ES8323_ADCCONTROL5, coeff_div[coeff].sr | (coeff_div[coeff].usb) << 4);
794 snd_soc_write(codec, ES8323_DACCONTROL2, coeff_div[coeff].sr | (coeff_div[coeff].usb) << 4);
796 if (codecfirstuse == 0)
798 snd_soc_write(codec, ES8323_LOUT2_VOL, es8323_DEF_VOL);//0x1c); //
799 snd_soc_write(codec, ES8323_ROUT2_VOL, es8323_DEF_VOL);//0x1c); //
806 static int es8323_mute(struct snd_soc_dai *dai, int mute)
808 struct snd_soc_codec *codec = dai->codec;
809 // u16 mute_reg = snd_soc_read(codec, ES8323_DACCONTROL3) & 0xfb;
811 DBG("Enter::%s----%d--mute=%d\n",__FUNCTION__,__LINE__,mute);
814 //snd_soc_write(codec, ES8323_DACCONTROL3, mute_reg | 0x4);
816 snd_soc_write(codec, ES8323_DACCONTROL3, 0x06);//0xe6);
822 snd_soc_write(codec, ES8323_DACCONTROL3, 0x02);//0xe2);
823 snd_soc_write(codec, 0x30,0x1e);
824 snd_soc_write(codec, 0x31,0x1e);
828 on_off_ext_amp(!mute);
833 /////////////////////////////////////////////////////////////////
834 static int es8323_set_bias_level(struct snd_soc_codec *codec,
835 enum snd_soc_bias_level level)
837 struct es8323_priv *es8323 = snd_soc_codec_get_drvdata(codec);
838 // u16 OUT_VOL = snd_soc_read(codec, ES8323_LOUT1_VOL);
841 DBG("Enter::%s----%d level =%d\n",__FUNCTION__,__LINE__,level);
843 case SND_SOC_BIAS_ON:
844 es8323->is_biason = 1;
846 case SND_SOC_BIAS_PREPARE:
847 snd_soc_write(codec, ES8323_ANAVOLMANAG, 0x7C);
848 snd_soc_write(codec, ES8323_CHIPLOPOW1, 0x00);
849 snd_soc_write(codec, ES8323_CHIPLOPOW2, 0xFF);
850 snd_soc_write(codec, ES8323_CHIPPOWER, 0x00);
851 snd_soc_write(codec, ES8323_ADCPOWER, 0x59);
853 case SND_SOC_BIAS_STANDBY:
854 snd_soc_write(codec, ES8323_ANAVOLMANAG, 0x7C);
855 snd_soc_write(codec, ES8323_CHIPLOPOW1, 0x00);
856 snd_soc_write(codec, ES8323_CHIPLOPOW2, 0xFF);
857 snd_soc_write(codec, ES8323_CHIPPOWER, 0x00);
858 snd_soc_write(codec, ES8323_ADCPOWER, 0x59);
860 case SND_SOC_BIAS_OFF:
861 snd_soc_write(codec, ES8323_ANAVOLMANAG, 0x7B);
862 snd_soc_write(codec, ES8323_CHIPLOPOW1, 0xFF);
863 snd_soc_write(codec, ES8323_CHIPLOPOW2, 0xFF);
864 snd_soc_write(codec, ES8323_ADCPOWER, 0xFF);
865 snd_soc_write(codec, ES8323_CHIPPOWER, 0xAA);
867 //snd_soc_write(codec, 0x2b, 0x90);
870 codec->dapm.bias_level = level;
876 #define es8323_RATES SNDRV_PCM_RATE_8000_96000
878 #define es8323_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
879 SNDRV_PCM_FMTBIT_S24_LE)
881 static struct snd_soc_dai_ops es8323_ops = {
882 .startup = es8323_pcm_startup,
883 .hw_params = es8323_pcm_hw_params,
884 .set_fmt = es8323_set_dai_fmt,
885 .set_sysclk = es8323_set_dai_sysclk,
886 .digital_mute = es8323_mute,
889 static struct snd_soc_dai_driver es8323_dai = {
890 .name = "ES8323 HiFi",
892 .stream_name = "Playback",
895 .rates = es8323_RATES,
896 .formats = es8323_FORMATS,
899 .stream_name = "Capture",
902 .rates = es8323_RATES,
903 .formats = es8323_FORMATS,
906 .symmetric_rates = 1,
909 static int es8323_suspend(struct snd_soc_codec *codec, pm_message_t state)
912 DBG("Enter::%s----%d\n",__FUNCTION__,__LINE__);
915 snd_soc_write(codec, 0x19, 0x06);
916 snd_soc_write(codec, 0x07, 0x7B);
917 snd_soc_write(codec, 0x06, 0xFF);
918 snd_soc_write(codec, 0x05, 0xFF);
921 snd_soc_write(codec, 0x19, 0x06);
922 snd_soc_write(codec, 0x30, 0x00);
923 snd_soc_write(codec, 0x31, 0x00);
924 snd_soc_write(codec, ES8323_ADCPOWER, 0xFF);
925 snd_soc_write(codec, ES8323_DACPOWER, 0xc0);
926 snd_soc_write(codec, ES8323_CHIPPOWER, 0xF3);
927 snd_soc_write(codec, 0x00, 0x00);
928 snd_soc_write(codec, 0x01, 0x58);
929 snd_soc_write(codec, 0x2b, 0x9c);
931 gpio_set_value(SPK_CON, 0);
935 static int es8323_resume(struct snd_soc_codec *codec)
939 // u16 *cache = codec->reg_cache;
940 snd_soc_write(codec, 0x2b, 0x80);
941 snd_soc_write(codec, 0x01, 0x50);
942 snd_soc_write(codec, 0x00, 0x32);
943 snd_soc_write(codec, ES8323_CHIPPOWER, 0x00);
944 snd_soc_write(codec, ES8323_DACPOWER, 0x0c);
945 snd_soc_write(codec, ES8323_ADCPOWER, 0x59);
946 snd_soc_write(codec, 0x31, es8323_DEF_VOL);
947 snd_soc_write(codec, 0x30, es8323_DEF_VOL);
948 snd_soc_write(codec, 0x19, 0x02);
949 gpio_set_value(SPK_CON, 1);
953 static u32 cur_reg=0;
954 static struct snd_soc_codec *es8323_codec;
955 static int entry_read(char *page, char **start, off_t off,
956 int count, int *eof, void *data)
960 snd_soc_write(es8323_codec, ES8323_ADCPOWER, 0xff);
961 snd_soc_write(es8323_codec, ES8323_DACPOWER, 0xf0);
962 snd_soc_write(es8323_codec, ES8323_DACPOWER, 0xc0);
963 snd_soc_write(es8323_codec, ES8323_CHIPPOWER, 0xf3);
965 len = sprintf(page, "es8323 suspend...\n");
970 #if (RT5633_SPK_TIMER == 1)
971 static void spk_work_handler(struct work_struct *work)
973 //if(!gpio_get_value(ES8323_HP_PIN)){
974 //gpio_direction_output(SPK_CON,0);
975 // gpio_set_value(SPK_CON, 0);
977 //gpio_direction_output(SPK_CON,1);
978 // gpio_set_value(SPK_CON, 1);
981 void spk_timer_callback(unsigned long data )
984 schedule_work(&spk_work);
985 ret = mod_timer(&spk_timer, jiffies + msecs_to_jiffies(1000));
986 if (ret) printk("Error in mod_timer\n");
990 static int es8323_probe(struct snd_soc_codec *codec)
992 // struct es8323_priv *es8323 = snd_soc_codec_get_drvdata(codec);
993 struct snd_soc_dapm_context *dapm = &codec->dapm;
995 unsigned long flags=0;
998 printk("%s\n", __func__);
1000 ret = gpio_request(RK30_PIN0_PC7, NULL);
1002 printk("%s request RK30_PIN0_PC7 error", __func__);
1005 gpio_direction_input(RK30_PIN0_PC7);
1007 ret = gpio_request(SPK_CON, NULL);
1009 printk("%s request SPK_CON error", __func__);
1012 //gpio_set_value(SPK_CON, 1);
1013 gpio_direction_output(SPK_CON,0);
1016 ret = gpio_request(HP_DET, NULL);
1018 printk("%s request HP_DET error", __func__);
1021 gpio_direction_input(HP_DET);
1023 flags = gpio_get_value(HP_DET) ? IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING;
1025 HP_IRQ = gpio_to_irq(HP_DET);
1027 ret = request_irq(HP_IRQ, hp_det_irq_handler, flags, "ES8323", NULL);
1029 printk("%s:register ISR (irq=%d)\n", __FUNCTION__,HP_IRQ);
1032 printk("request_irq HP_IRQ failed\n");
1035 if (codec == NULL) {
1036 dev_err(codec->dev, "Codec device not registered\n");
1039 codec->read = es8323_read_reg_cache;
1040 codec->write = es8323_write;
1041 codec->hw_write = (hw_write_t)i2c_master_send;
1042 codec->control_data = container_of(codec->dev, struct i2c_client, dev);
1044 es8323_codec = codec;
1045 ret = es8323_reset(codec);
1047 dev_err(codec->dev, "Failed to issue reset\n");
1050 #if (RT5633_SPK_TIMER == 1)
1051 setup_timer( &spk_timer, spk_timer_callback, 0 );
1052 ret = mod_timer( &spk_timer, jiffies + msecs_to_jiffies(5000) );
1054 printk("Error in mod_timer\n");
1055 INIT_WORK(&spk_work, spk_work_handler);
1059 //es8323_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1062 //snd_soc_write(codec, 0x35 , 0xa0);
1063 //snd_soc_write(codec, 0x36 , 0x08); //for 1.8V VDD
1064 snd_soc_write(codec, 0x02,0xf3);
1065 snd_soc_write(codec, 0x2B,0x80);
1066 snd_soc_write(codec, 0x08,0x00); //ES8388 salve
1067 snd_soc_write(codec, 0x00,0x32); //
1068 snd_soc_write(codec, 0x01,0x72); //PLAYBACK & RECORD Mode,EnRefr=1
1069 snd_soc_write(codec, 0x03,0x59); //pdn_ana=0,ibiasgen_pdn=0
1070 snd_soc_write(codec, 0x05,0x00); //pdn_ana=0,ibiasgen_pdn=0
1071 snd_soc_write(codec, 0x06,0xc3); //pdn_ana=0,ibiasgen_pdn=0
1072 snd_soc_write(codec, 0x09,0x88); //ADC L/R PGA = +24dB
1073 //----------------------------------------------------------------------------------------------------------------
1074 snd_soc_write(codec, 0x0a,0xf0); //ADC INPUT=LIN2/RIN2
1075 snd_soc_write(codec, 0x0b,0x82); //ADC INPUT=LIN2/RIN2 //82
1076 //-----------------------------------------------------------------------------------------------------------------
1077 snd_soc_write(codec, 0x0C,0x4c); //I2S-24BIT
1078 snd_soc_write(codec, 0x0d,0x02); //MCLK/LRCK=256
1079 snd_soc_write(codec, 0x10,0x00); //ADC Left Volume=0db
1080 snd_soc_write(codec, 0x11,0x00); //ADC Right Volume=0db
1081 snd_soc_write(codec, 0x12,0xea); // ALC stereo MAXGAIN: 35.5dB, MINGAIN: +6dB (Record Volume increased!)
1082 snd_soc_write(codec, 0x13,0xc0);
1083 snd_soc_write(codec, 0x14,0x05);
1084 snd_soc_write(codec, 0x15,0x06);
1085 snd_soc_write(codec, 0x16,0x53);
1086 snd_soc_write(codec, 0x17,0x18); //I2S-16BIT
1087 snd_soc_write(codec, 0x18,0x02);
1088 snd_soc_write(codec, 0x1A,0x00); //DAC VOLUME=0DB
1089 snd_soc_write(codec, 0x1B,0x00);
1091 snd_soc_write(codec, 0x1E,0x01); //for 47uF capacitors ,15db Bass@90Hz,Fs=44100
1092 snd_soc_write(codec, 0x1F,0x84);
1093 snd_soc_write(codec, 0x20,0xED);
1094 snd_soc_write(codec, 0x21,0xAF);
1095 snd_soc_write(codec, 0x22,0x20);
1096 snd_soc_write(codec, 0x23,0x6C);
1097 snd_soc_write(codec, 0x24,0xE9);
1098 snd_soc_write(codec, 0x25,0xBE);
1100 snd_soc_write(codec, 0x26,0x12); //Left DAC TO Left IXER
1101 snd_soc_write(codec, 0x27,0xb8); //Left DAC TO Left MIXER
1102 snd_soc_write(codec, 0x28,0x38);
1103 snd_soc_write(codec, 0x29,0x38);
1104 snd_soc_write(codec, 0x2A,0xb8);
1105 snd_soc_write(codec, 0x02,0x00); //aa //START DLL and state-machine,START DSM
1106 snd_soc_write(codec, 0x19,0x02); //SOFT RAMP RATE=32LRCKS/STEP,Enable ZERO-CROSS CHECK,DAC MUTE
1107 snd_soc_write(codec, 0x04,0x0c); //pdn_ana=0,ibiasgen_pdn=0
1109 snd_soc_write(codec, 0x2e,0x00);
1110 snd_soc_write(codec, 0x2f,0x00);
1111 snd_soc_write(codec, 0x30,0x08);
1112 snd_soc_write(codec, 0x31,0x08);
1114 snd_soc_write(codec, 0x30,0x0f);
1115 snd_soc_write(codec, 0x31,0x0f);
1117 snd_soc_write(codec, 0x30,0x18);
1118 snd_soc_write(codec, 0x31,0x18);
1120 snd_soc_write(codec, 0x04,0x2c); //pdn_ana=0,ibiasgen_pdn=0
1123 //s8323_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1124 //codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
1126 snd_soc_add_controls(codec, es8323_snd_controls,
1127 ARRAY_SIZE(es8323_snd_controls));
1128 snd_soc_dapm_new_controls(dapm, es8323_dapm_widgets,
1129 ARRAY_SIZE(es8323_dapm_widgets));
1130 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
1132 create_proc_read_entry("es8323_suspend", 0644, NULL, entry_read, NULL);
1137 static int es8323_remove(struct snd_soc_codec *codec)
1139 es8323_set_bias_level(codec, SND_SOC_BIAS_OFF);
1143 void codec_set_spk(bool on)
1145 DBG("Enter::%s----%d--, on = %d\n",__FUNCTION__,__LINE__, on);
1148 gpio_set_value(SPK_CON, on);
1152 static struct snd_soc_codec_driver soc_codec_dev_es8323 = {
1153 .probe = es8323_probe,
1154 .remove = es8323_remove,
1155 .suspend = es8323_suspend,
1156 .resume = es8323_resume,
1157 .set_bias_level = es8323_set_bias_level,
1158 .reg_cache_size = ARRAY_SIZE(es8323_reg),
1159 .reg_word_size = sizeof(u16),
1160 .reg_cache_default = es8323_reg,
1161 //------------------------------------------
1162 //.volatile_register = es8323_volatile_register,
1163 //.readable_register = es8323_readable_register,
1164 .reg_cache_step = 1,
1166 .controls = es8323_snd_controls,
1167 .num_controls = ARRAY_SIZE(es8323_snd_controls),
1168 .dapm_routes = audio_map,
1169 .num_dapm_routes = ARRAY_SIZE(audio_map),
1170 .dapm_widgets = es8323_dapm_widgets,
1171 .num_dapm_widgets = ARRAY_SIZE(es8323_dapm_widgets),
1173 //--------------------------------------------------
1174 .read = es8323_read_reg_cache,
1175 .write = es8323_write,
1179 #if defined(CONFIG_SPI_MASTER)
1180 static int __devinit es8323_spi_probe(struct spi_device *spi)
1182 struct es8323_priv *es8323;
1185 es8323 = kzalloc(sizeof(struct es8323_priv), GFP_KERNEL);
1189 es8323->control_type = SND_SOC_SPI;
1190 spi_set_drvdata(spi, es8323);
1192 ret = snd_soc_register_codec(&spi->dev,
1193 &soc_codec_dev_es8323, &es8323_dai, 1);
1199 static int __devexit es8323_spi_remove(struct spi_device *spi)
1201 snd_soc_unregister_codec(&spi->dev);
1202 kfree(spi_get_drvdata(spi));
1206 static struct spi_driver es8323_spi_driver = {
1209 .owner = THIS_MODULE,
1211 .probe = es8323_spi_probe,
1212 .remove = __devexit_p(es8323_spi_remove),
1214 #endif /* CONFIG_SPI_MASTER */
1216 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1217 static ssize_t es8323_show(struct device *dev, struct device_attribute *attr, char *_buf)
1219 return sprintf(_buf, "%s(): get 0x%04x=0x%04x\n", __FUNCTION__, cur_reg,
1220 snd_soc_read(es8323_codec, cur_reg));
1223 static u32 strtol(const char *nptr, int base)
1226 if(!nptr || (base!=16 && base!=10 && base!=8))
1229 printk("%s(): NULL pointer input\n", __FUNCTION__);
1232 for(ret=0; *nptr; nptr++)
1236 if((base==16 && *nptr>='A' && *nptr<='F') ||
1237 (base==16 && *nptr>='a' && *nptr<='f') ||
1238 (base>=10 && *nptr>='0' && *nptr<='9') ||
1239 (base>=8 && *nptr>='0' && *nptr<='7') )
1242 if(base==16 && *nptr>='A' && *nptr<='F')
1243 ret += *nptr-'A'+10;
1244 else if(base==16 && *nptr>='a' && *nptr<='f')
1245 ret += *nptr-'a'+10;
1246 else if(base>=10 && *nptr>='0' && *nptr<='9')
1248 else if(base>=8 && *nptr>='0' && *nptr<='7')
1257 static ssize_t es8323_store(struct device *dev,
1258 struct device_attribute *attr,
1259 const char *_buf, size_t _count)
1261 const char * p=_buf;
1264 if(!strncmp(_buf, "get", strlen("get")))
1267 cur_reg=(u32)strtol(p, 16);
1268 val=snd_soc_read(es8323_codec, cur_reg);
1269 printk("%s(): get 0x%04x=0x%04x\n", __FUNCTION__, cur_reg, val);
1271 else if(!strncmp(_buf, "put", strlen("put")))
1275 p=strchr(_buf, '=');
1280 snd_soc_write(es8323_codec, reg, val);
1281 printk("%s(): set 0x%04x=0x%04x\n", __FUNCTION__, reg, val);
1284 printk("%s(): Bad string format input!\n", __FUNCTION__);
1287 printk("%s(): Bad string format input!\n", __FUNCTION__);
1292 static struct device *es8323_dev = NULL;
1293 static struct class *es8323_class = NULL;
1294 static DEVICE_ATTR(es8323, 0664, es8323_show, es8323_store);
1295 static __devinit int es8323_i2c_probe(struct i2c_client *i2c,
1296 const struct i2c_device_id *id)
1299 struct es8323_priv *es8323;
1301 struct i2c_adapter *adapter = to_i2c_adapter(i2c->dev.parent);
1305 if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) {
1306 dev_warn(&adapter->dev,
1307 "I2C-Adapter doesn't support I2C_FUNC_I2C\n");
1311 es8323 = kzalloc(sizeof(struct es8323_priv), GFP_KERNEL);
1315 i2c_set_clientdata(i2c, es8323);
1316 es8323->control_type = SND_SOC_I2C;
1318 reg = ES8323_DACCONTROL18;
1319 ret = i2c_master_reg8_recv(i2c, reg, &tmp, 1 ,200 * 1000);
1320 //ret =i2c_master_reg8_recv(client, 0x00, buf, 2, 200*1000);//i2c_write_bytes(client, &test_data, 1); //Test I2C connection.
1322 printk("es8323 probe error\n");
1327 printk("es8323 probe i2c recv ok\n");
1329 ret = snd_soc_register_codec(&i2c->dev,
1330 &soc_codec_dev_es8323, &es8323_dai, 1);
1335 es8323_class = class_create(THIS_MODULE, "es8323");
1336 if (IS_ERR(es8323_class))
1338 printk("Create class audio_es8323.\n");
1341 es8323_dev = device_create(es8323_class, NULL, MKDEV(0, 1), NULL, "dev");
1342 ret = device_create_file(es8323_dev, &dev_attr_es8323);
1344 printk("failed to add dev_attr_es8323 file\n");
1349 static __devexit int es8323_i2c_remove(struct i2c_client *client)
1351 snd_soc_unregister_codec(&client->dev);
1352 kfree(i2c_get_clientdata(client));
1356 static const struct i2c_device_id es8323_i2c_id[] = {
1360 MODULE_DEVICE_TABLE(i2c, es8323_i2c_id);
1362 void es8323_i2c_shutdown(struct i2c_client *client)
1364 printk("Chenzy-------hkw-------%s\n", __func__);
1365 gpio_direction_output(SPK_CON,0);
1367 snd_soc_write(es8323_codec, ES8323_CONTROL2, 0x58);
1368 snd_soc_write(es8323_codec, ES8323_CONTROL1, 0x32);
1369 snd_soc_write(es8323_codec, ES8323_CHIPPOWER, 0xf3);
1370 snd_soc_write(es8323_codec, ES8323_DACPOWER, 0xc0);
1372 snd_soc_write(es8323_codec, ES8323_DACCONTROL26, 0x00);
1373 snd_soc_write(es8323_codec, ES8323_DACCONTROL27, 0x00);
1375 snd_soc_write(es8323_codec, ES8323_CONTROL1, 0x30);
1376 snd_soc_write(es8323_codec, ES8323_CONTROL1, 0x34);
1380 #define I2C_CLK_NAME GPIO0B0_I2S8CHCLK_NAME
1381 #define I2C_CLK_GPIO_MODE GPIO0B_GPIO0B0
1382 #define I2C_GPIO_OUTPUT GPIO_LOW
1383 #define I2C_CLK_CLK_MODE GPIO0B_I2S_8CH_CLK
1384 #define I2C_CLK_GPIO RK30_PIN0_PB0
1386 #define I2C_MCLK_NAME GPIO0B1_I2S8CHSCLK_NAME
1387 #define I2C_MCLK_GPIO_MODE GPIO0B_GPIO0B1
1388 #define I2C_MGPIO_OUTPUT GPIO_LOW
1389 #define I2C_MCLK_CLK_MODE GPIO0B_I2S_8CH_SCLK
1390 #define I2C_MCLK_GPIO RK30_PIN0_PB1
1391 static int es8323_i2c_suspend (struct i2c_client *client, pm_message_t mesg)
1394 rk30_mux_api_set(I2C_CLK_NAME,I2C_CLK_GPIO_MODE);
1395 if (gpio_request(I2C_CLK_GPIO, NULL)) {
1396 printk("func %s, line %d: request gpio fail\n", __FUNCTION__, __LINE__);
1400 gpio_direction_output(I2C_CLK_GPIO,I2C_GPIO_OUTPUT);
1402 rk30_mux_api_set(I2C_MCLK_NAME,I2C_MCLK_GPIO_MODE);
1403 if (gpio_request(I2C_MCLK_GPIO, NULL)) {
1404 printk("func %s, line %d: request gpio fail\n", __FUNCTION__, __LINE__);
1408 gpio_direction_output(I2C_MCLK_GPIO,I2C_MGPIO_OUTPUT);
1410 iomux_set(GPIO1_C1);
1411 if (gpio_request(RK30_PIN1_PC1, NULL)) {
1412 printk("func %s, line %d: request gpio fail\n", __FUNCTION__, __LINE__);
1415 gpio_direction_input(RK30_PIN1_PC1);
1416 gpio_pull_updown(RK30_PIN1_PC1, PullDisable);
1419 iomux_set(GPIO1_C2);
1420 gpio_direction_input(RK30_PIN1_PC2);
1421 gpio_pull_updown(RK30_PIN1_PC2, PullDisable);
1423 iomux_set(GPIO1_C3);
1424 gpio_direction_input(RK30_PIN1_PC3);
1425 gpio_pull_updown(RK30_PIN1_PC3, PullDisable);
1427 iomux_set(GPIO1_C4);
1428 gpio_direction_input(RK30_PIN1_PC4);
1429 gpio_pull_updown(RK30_PIN1_PC4, PullDisable);
1431 iomux_set(GPIO1_C5);
1432 gpio_direction_input(RK30_PIN1_PC5);
1433 gpio_pull_updown(RK30_PIN1_PC5, PullDisable);
1439 static int es8323_i2c_resume(struct i2c_client *client)
1442 gpio_free(I2C_MCLK_GPIO);
1443 gpio_free(I2C_CLK_GPIO);
1445 rk30_mux_api_set(I2C_MCLK_NAME,I2C_MCLK_CLK_MODE);
1446 rk30_mux_api_set(I2C_CLK_NAME,I2C_CLK_CLK_MODE);
1449 gpio_free(RK30_PIN1_PC1);
1450 iomux_set(I2S0_SCLK);
1455 static struct i2c_driver es8323_i2c_driver = {
1458 .owner = THIS_MODULE,
1460 .probe = es8323_i2c_probe,
1461 .remove = __devexit_p(es8323_i2c_remove),
1462 .shutdown = es8323_i2c_shutdown,
1463 .suspend = es8323_i2c_suspend,
1464 .resume = es8323_i2c_resume,
1465 .id_table = es8323_i2c_id,
1469 static int __init es8323_modinit(void)
1471 return i2c_add_driver(&es8323_i2c_driver);
1473 module_init(es8323_modinit);
1475 static void __exit es8323_exit(void)
1478 // if(0 == tcsi_get_value(TCSI_CODEC_ES8323))
1480 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1481 i2c_del_driver(&es8323_i2c_driver);
1483 #if defined(CONFIG_SPI_MASTER)
1484 spi_unregister_driver(&es8323_spi_driver);
1487 module_exit(es8323_exit);
1490 MODULE_DESCRIPTION("ASoC es8323 driver");
1491 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1492 MODULE_LICENSE("GPL");