2 * es8323.c -- es8323 ALSA SoC audio driver
4 * Copyright 2009 Wolfson Microelectronics plc
5 * Copyright 2005 Openedhand Ltd.
7 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/init.h>
17 #include <linux/delay.h>
19 #include <linux/i2c.h>
20 #include <linux/spi/spi.h>
21 #include <linux/platform_device.h>
22 #include <linux/slab.h>
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/tlv.h>
27 #include <sound/soc.h>
28 #include <sound/soc-dapm.h>
29 #include <sound/initval.h>
31 #include <mach/iomux.h>
32 #include <mach/board.h>
33 #include <mach/gpio.h>
35 //#include <linux/tchip_sysinf.h>
39 #include <linux/proc_fs.h>
40 #include <linux/gpio.h>
43 #define DBG(x...) printk(KERN_INFO x)
45 #define DBG(x...) do { } while (0)
49 #define RT5633_SPK_TIMER 0 //if enable this, MUST enable RT5633_EQ_FUNC_ENA and RT5633_EQ_FUNC_SEL==RT5633_EQ_FOR_MANUAL first!
50 #if (RT5633_SPK_TIMER == 1)
51 static struct timer_list spk_timer;
52 struct work_struct spk_work;
53 static bool last_is_spk = false;
54 //#define ES8323_HP_PIN RK30_PIN0_PC7 // need modify.
56 //#define SPK_CTL RK29_PIN6_PB7
57 //#define SPK_CON RK29_PIN6_PB6
60 #define SPK_CON RK30_PIN2_PD7 //RK30_PIN4_PC5
62 //#define SPK_CTL RK29_PIN6_PB6
63 //#define EAR_CON_PIN RK29_PIN6_PB5
66 #ifndef es8323_DEF_VOL
67 #define es8323_DEF_VOL 0x1e
70 static int es8323_set_bias_level(struct snd_soc_codec *codec,
71 enum snd_soc_bias_level level);
73 * es8323 register cache
74 * We can't read the es8323 register space when we
75 * are using 2 wire for device control, so we cache them instead.
77 static u16 es8323_reg[] = {
78 0x06, 0x1C, 0xC3, 0xFC, /* 0 *////0x0100 0x0180
79 0xC0, 0x00, 0x00, 0x7C, /* 4 */
80 0x80, 0x00, 0x00, 0x06, /* 8 */
81 0x00, 0x06, 0x30, 0x30, /* 12 */
82 0xC0, 0xC0, 0x38, 0xB0, /* 16 */
83 0x32, 0x06, 0x00, 0x00, /* 20 */
84 0x06, 0x30, 0xC0, 0xC0, /* 24 */
85 0x08, 0x06, 0x1F, 0xF7, /* 28 */
86 0xFD, 0xFF, 0x1F, 0xF7, /* 32 */
87 0xFD, 0xFF, 0x00, 0x38, /* 36 */
88 0x38, 0x38, 0x38, 0x38, /* 40 */
89 0x38, 0x00, 0x00, 0x00, /* 44 */
90 0x00, 0x00, 0x00, 0x00, /* 48 */
91 0x00, 0x00, 0x00, 0x00, /* 52 */
94 /* codec private data */
97 enum snd_soc_control_type control_type;
98 struct snd_pcm_hw_constraint_list *sysclk_constraints;
99 int is_startup; // gModify.Add
103 static unsigned int es8323_read_reg_cache(struct snd_soc_codec *codec,
106 u16 *cache = codec->reg_cache;
107 if (reg >= ARRAY_SIZE(es8323_reg))
109 return es8323_reg[reg];
112 static int es8323_write(struct snd_soc_codec *codec, unsigned int reg,
115 u16 *cache = codec->reg_cache;
119 BUG_ON(codec->volatile_register);
122 data[1] = value & 0x00ff;
124 if (reg < ARRAY_SIZE(es8323_reg))
125 es8323_reg[reg] = value;
126 ret = codec->hw_write(codec->control_data, data, 2);
135 //#define es8323_reset(c) snd_soc_write(c, es8323_RESET, 0)
136 static int es8323_reset(struct snd_soc_codec *codec)
138 snd_soc_write(codec, ES8323_CONTROL1, 0x80);
139 return snd_soc_write(codec, ES8323_CONTROL1, 0x00);
141 static int es8323_volatile_register(
142 struct snd_soc_codec *codec, unsigned int reg)
154 static int es8323_readable_register(
155 struct snd_soc_codec *codec, unsigned int reg)
171 static const char *bass_boost_txt[] = {"Linear Control", "Adaptive Boost"};
172 static const struct soc_enum bass_boost =
173 SOC_ENUM_SINGLE(es8323_BASS, 7, 2, bass_boost_txt);
175 static const char *bass_filter_txt[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
176 static const struct soc_enum bass_filter =
177 SOC_ENUM_SINGLE(es8323_BASS, 6, 2, bass_filter_txt);
179 static const char *treble_txt[] = {"8kHz", "4kHz"};
180 static const struct soc_enum treble =
181 SOC_ENUM_SINGLE(es8323_TREBLE, 6, 2, treble_txt);
183 static const char *stereo_3d_lc_txt[] = {"200Hz", "500Hz"};
184 static const struct soc_enum stereo_3d_lc =
185 SOC_ENUM_SINGLE(es8323_3D, 5, 2, stereo_3d_lc_txt);
187 static const char *stereo_3d_uc_txt[] = {"2.2kHz", "1.5kHz"};
188 static const struct soc_enum stereo_3d_uc =
189 SOC_ENUM_SINGLE(es8323_3D, 6, 2, stereo_3d_uc_txt);
191 static const char *stereo_3d_func_txt[] = {"Capture", "Playback"};
192 static const struct soc_enum stereo_3d_func =
193 SOC_ENUM_SINGLE(es8323_3D, 7, 2, stereo_3d_func_txt);
195 static const char *stereo_3d_txt[] = {"No 3D ", "Level 1","Level 2","Level 3","Level 4","Level 5","Level 6","Level 7"};
196 static const struct soc_enum stereo_3d =
197 SOC_ENUM_SINGLE(ES8323_DACCONTROL7, 2, 8, stereo_3d_txt);
199 static const char *alc_func_txt[] = {"Off", "Right", "Left", "Stereo"};
200 static const struct soc_enum alc_func =
201 SOC_ENUM_SINGLE(ES8323_ADCCONTROL10, 6, 4, alc_func_txt);
203 static const char *ng_type_txt[] = {"Constant PGA Gain",
205 static const struct soc_enum ng_type =
206 SOC_ENUM_SINGLE(ES8323_ADCCONTROL14, 1, 2, ng_type_txt);
208 static const char *deemph_txt[] = {"None", "32Khz", "44.1Khz", "48Khz"};
209 static const struct soc_enum deemph =
210 SOC_ENUM_SINGLE(ES8323_DACCONTROL6, 6, 4, deemph_txt);
212 static const char *adcpol_txt[] = {"Normal", "L Invert", "R Invert",
214 static const struct soc_enum adcpol =
215 SOC_ENUM_SINGLE(ES8323_ADCCONTROL6, 6, 4, adcpol_txt);
217 static const DECLARE_TLV_DB_SCALE(pga_tlv, 0, 300, 0);
218 static const DECLARE_TLV_DB_SCALE(adc_tlv, -9600, 50, 1);
219 static const DECLARE_TLV_DB_SCALE(dac_tlv, -9600, 50, 1);
220 static const DECLARE_TLV_DB_SCALE(out_tlv, -4500, 150, 0);
221 static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0);
223 static const struct snd_kcontrol_new es8323_snd_controls[] = {
225 SOC_ENUM("Bass Boost", bass_boost),
226 SOC_ENUM("Bass Filter", bass_filter),
227 SOC_SINGLE("Bass Volume", es8323_BASS, 0, 15, 1),
229 SOC_SINGLE("Treble Volume", es8323_TREBLE, 0, 15, 0),
230 SOC_ENUM("Treble Cut-off", treble),
232 SOC_SINGLE("3D Switch", es8323_3D, 0, 1, 0),
233 SOC_SINGLE("3D Volume", es8323_3D, 1, 15, 0),
234 SOC_ENUM("3D Lower Cut-off", stereo_3d_lc),
235 SOC_ENUM("3D Upper Cut-off", stereo_3d_uc),
236 SOC_ENUM("3D Mode", stereo_3d_func),
238 SOC_ENUM("3D Mode", stereo_3d),
239 SOC_SINGLE("ALC Capture Target Volume", ES8323_ADCCONTROL11, 4, 15, 0),
240 SOC_SINGLE("ALC Capture Max PGA", ES8323_ADCCONTROL10, 3, 7, 0),
241 SOC_SINGLE("ALC Capture Min PGA", ES8323_ADCCONTROL10, 0, 7, 0),
242 SOC_ENUM("ALC Capture Function", alc_func),
243 SOC_SINGLE("ALC Capture ZC Switch", ES8323_ADCCONTROL13, 6, 1, 0),
244 SOC_SINGLE("ALC Capture Hold Time", ES8323_ADCCONTROL11, 0, 15, 0),
245 SOC_SINGLE("ALC Capture Decay Time", ES8323_ADCCONTROL12, 4, 15, 0),
246 SOC_SINGLE("ALC Capture Attack Time", ES8323_ADCCONTROL12, 0, 15, 0),
247 SOC_SINGLE("ALC Capture NG Threshold", ES8323_ADCCONTROL14, 3, 31, 0),
248 SOC_ENUM("ALC Capture NG Type", ng_type),
249 SOC_SINGLE("ALC Capture NG Switch", ES8323_ADCCONTROL14, 0, 1, 0),
251 SOC_SINGLE("ZC Timeout Switch", ES8323_ADCCONTROL13, 6, 1, 0),
253 SOC_DOUBLE_R_TLV("Capture Digital Volume", ES8323_ADCCONTROL8, ES8323_ADCCONTROL9,
256 SOC_SINGLE("Capture Mute", ES8323_ADCCONTROL7, 2, 1, 0),
258 SOC_DOUBLE_R_TLV("Capture Volume", es8323_LINVOL, es8323_RINVOL,
261 SOC_SINGLE_TLV("Left Channel Capture Volume", ES8323_ADCCONTROL1, 4, 15, 0, bypass_tlv),
262 SOC_SINGLE_TLV("Right Channel Capture Volume", ES8323_ADCCONTROL1, 0, 15, 0, bypass_tlv),
264 //SOC_DOUBLE_R("Capture ZC Switch", es8323_LINVOL, es8323_RINVOL, 6, 1, 0),
265 //SOC_SINGLE("Capture Switch", ES8323_ADCPOWER, 4, 3, 1),
267 SOC_ENUM("Playback De-emphasis", deemph),
269 SOC_ENUM("Capture Polarity", adcpol),
270 //SOC_SINGLE("Playback 6dB Attenuate", es8323_ADCDAC, 7, 1, 0),
271 //SOC_SINGLE("Capture 6dB Attenuate", es8323_ADCDAC, 8, 1, 0),
273 //SOC_DOUBLE_R_TLV("PCM Volume", ES8323_DACCONTROL4, ES8323_DACCONTROL5, 0, 255, 1, dac_tlv),
275 SOC_SINGLE_TLV("Left Mixer Left Bypass Volume", ES8323_DACCONTROL17, 3, 7, 1, bypass_tlv),
277 SOC_SINGLE_TLV("Left Mixer Right Bypass Volume", es8323_LOUTM2, 4, 7, 1,
279 SOC_SINGLE_TLV("Right Mixer Left Bypass Volume", es8323_ROUTM1, 4, 7, 1,
282 SOC_SINGLE_TLV("Right Mixer Right Bypass Volume", ES8323_DACCONTROL20, 3, 7, 1,
285 //SOC_DOUBLE_R("Output 1 Playback ZC Switch", es8323_LOUT1V,es8323_ROUT1V, 7, 1, 0),
286 SOC_DOUBLE_R_TLV("Output 1 Playback Volume", ES8323_DACCONTROL24, ES8323_DACCONTROL25,
289 //SOC_DOUBLE_R("Output 2 Playback ZC Switch", es8323_LOUT2V,es8323_ROUT2V, 7, 1, 0),
290 SOC_DOUBLE_R_TLV("Output 2 Playback Volume", ES8323_DACCONTROL26, ES8323_DACCONTROL27,
298 static int es8323_lrc_control(struct snd_soc_dapm_widget *w,
299 struct snd_kcontrol *kcontrol, int event)
301 struct snd_soc_codec *codec = w->codec;
302 u16 adctl2 = snd_soc_read(codec, es8323_ADCTL2);
304 /* Use the DAC to gate LRC if active, otherwise use ADC */
306 if (snd_soc_read(codec, es8323_PWR2) & 0x180)
311 DBG("Enter::%s----%d, adctl2 = %x\n",__FUNCTION__,__LINE__,adctl2);
313 return snd_soc_write(codec, es8323_ADCTL2, adctl2);
316 static const char *es8323_line_texts[] = {
317 "Line 1", "Line 2", "PGA"};
319 static const unsigned int es8323_line_values[] = {
322 static const struct soc_enum es8323_lline_enum =
323 SOC_VALUE_ENUM_SINGLE(ES8323_DACCONTROL16, 3, 7,
324 ARRAY_SIZE(es8323_line_texts),
327 static const struct snd_kcontrol_new es8323_left_line_controls =
328 SOC_DAPM_VALUE_ENUM("Route", es8323_lline_enum);
330 static const struct soc_enum es8323_rline_enum =
331 SOC_VALUE_ENUM_SINGLE(ES8323_DACCONTROL16, 0, 7,
332 ARRAY_SIZE(es8323_line_texts),
335 static const struct snd_kcontrol_new es8323_right_line_controls =
336 SOC_DAPM_VALUE_ENUM("Route", es8323_rline_enum);
339 static const struct snd_kcontrol_new es8323_left_mixer_controls[] = {
340 SOC_DAPM_SINGLE("Left Playback Switch", ES8323_DACCONTROL17, 7, 1, 0),
341 SOC_DAPM_SINGLE("Left Bypass Switch", ES8323_DACCONTROL17, 6, 1, 0),
342 //SOC_DAPM_SINGLE("Right Playback Switch", es8323_LOUTM2, 8, 1, 0),
343 //SOC_DAPM_SINGLE("Right Bypass Switch", es8323_LOUTM2, 7, 1, 0),
347 static const struct snd_kcontrol_new es8323_right_mixer_controls[] = {
348 //SOC_DAPM_SINGLE("Left Playback Switch", es8323_ROUTM1, 8, 1, 0),
349 //SOC_DAPM_SINGLE("Left Bypass Switch", es8323_ROUTM1, 7, 1, 0),
350 SOC_DAPM_SINGLE("Right Playback Switch", ES8323_DACCONTROL20, 7, 1, 0),
351 SOC_DAPM_SINGLE("Right Bypass Switch", ES8323_DACCONTROL20, 6, 1, 0),
354 int es8328_dapm_pre_event(struct snd_soc_dapm_widget* widget, struct snd_kcontrol * null, int event);
355 int es8328_dapm_post_event(struct snd_soc_dapm_widget* widget, struct snd_kcontrol * null, int event);
357 static const char *es8323_pga_sel[] = {"Line 1", "Line 2", "Differential"};
358 static const unsigned int es8323_pga_val[] = { 0, 1, 3 };
361 static const struct soc_enum es8323_lpga_enum =
362 SOC_VALUE_ENUM_SINGLE(ES8323_ADCCONTROL2, 6, 3,
363 ARRAY_SIZE(es8323_pga_sel),
366 static const struct snd_kcontrol_new es8323_left_pga_controls =
367 SOC_DAPM_VALUE_ENUM("Route", es8323_lpga_enum);
370 static const struct soc_enum es8323_rpga_enum =
371 SOC_VALUE_ENUM_SINGLE(ES8323_ADCCONTROL2, 4, 3,
372 ARRAY_SIZE(es8323_pga_sel),
375 static const struct snd_kcontrol_new es8323_right_pga_controls =
376 SOC_DAPM_VALUE_ENUM("Route", es8323_rpga_enum);
378 /* Differential Mux */
379 static const char *es8323_diff_sel[] = {"Line 1", "Line 2"};
380 static const struct soc_enum diffmux =
381 SOC_ENUM_SINGLE(ES8323_ADCCONTROL3, 7, 2, es8323_diff_sel);
382 static const struct snd_kcontrol_new es8323_diffmux_controls =
383 SOC_DAPM_ENUM("Route", diffmux);
386 static const char *es8323_mono_mux[] = {"Stereo", "Mono (Left)",
388 static const struct soc_enum monomux =
389 SOC_ENUM_SINGLE(ES8323_ADCCONTROL3, 3, 3, es8323_mono_mux);
390 static const struct snd_kcontrol_new es8323_monomux_controls =
391 SOC_DAPM_ENUM("Route", monomux);
393 static const struct snd_soc_dapm_widget es8323_dapm_widgets[] = {
394 SND_SOC_DAPM_MICBIAS("Mic Bias", ES8323_ADCPOWER, 3, 1),
396 SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
397 &es8323_diffmux_controls),
399 SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
400 &es8323_monomux_controls),
401 SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
402 &es8323_monomux_controls),
404 SND_SOC_DAPM_MUX("Left PGA Mux", ES8323_ADCPOWER, 7, 1,
405 &es8323_left_pga_controls),
406 SND_SOC_DAPM_MUX("Right PGA Mux", ES8323_ADCPOWER, 6, 1,
407 &es8323_right_pga_controls),
409 SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
410 &es8323_left_line_controls),
411 SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
412 &es8323_right_line_controls),
414 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", ES8323_ADCPOWER, 4, 1),
415 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", ES8323_ADCPOWER, 5, 1),
417 /* gModify.Cmmt Implement when suspend/startup */
418 /*SND_SOC_DAPM_DAC("Right DAC", "Right Playback", es8323_PWR2, 7, 0),*/
419 /*SND_SOC_DAPM_DAC("Left DAC", "Left Playback", es8323_PWR2, 8, 0),*/
421 SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
422 &es8323_left_mixer_controls[0],
423 ARRAY_SIZE(es8323_left_mixer_controls)),
424 SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
425 &es8323_right_mixer_controls[0],
426 ARRAY_SIZE(es8323_right_mixer_controls)),
428 SND_SOC_DAPM_PGA("Right Out 2", ES8323_DACPOWER, 2, 0, NULL, 0),
429 SND_SOC_DAPM_PGA("Left Out 2", ES8323_DACPOWER, 3, 0, NULL, 0),
430 SND_SOC_DAPM_PGA("Right Out 1", ES8323_DACPOWER, 4, 0, NULL, 0),
431 SND_SOC_DAPM_PGA("Left Out 1", ES8323_DACPOWER, 5, 0, NULL, 0),
433 //SND_SOC_DAPM_POST("LRC control", es8323_lrc_control),
435 SND_SOC_DAPM_OUTPUT("LOUT1"),
436 SND_SOC_DAPM_OUTPUT("ROUT1"),
437 SND_SOC_DAPM_OUTPUT("LOUT2"),
438 SND_SOC_DAPM_OUTPUT("ROUT2"),
439 SND_SOC_DAPM_OUTPUT("VREF"),
441 SND_SOC_DAPM_INPUT("LINPUT1"),
442 SND_SOC_DAPM_INPUT("LINPUT2"),
443 SND_SOC_DAPM_INPUT("RINPUT1"),
444 SND_SOC_DAPM_INPUT("RINPUT2"),
445 SND_SOC_DAPM_PRE("PRE", es8328_dapm_pre_event),
446 SND_SOC_DAPM_POST("POST", es8328_dapm_post_event),
449 static const struct snd_soc_dapm_route audio_map[] = {
451 { "Left Line Mux", "Line 1", "LINPUT1" },
452 { "Left Line Mux", "Line 2", "LINPUT2" },
453 { "Left Line Mux", "PGA", "Left PGA Mux" },
454 //{ "Left Line Mux", "Differential", "Differential Mux" },
456 { "Right Line Mux", "Line 1", "RINPUT1" },
457 { "Right Line Mux", "Line 2", "RINPUT2" },
458 { "Right Line Mux", "PGA", "Right PGA Mux" },
459 //{ "Right Line Mux", "Differential", "Differential Mux" },
461 { "Left PGA Mux", "Line 1", "LINPUT1" },
462 { "Left PGA Mux", "Line 2", "LINPUT2" },
463 { "Left PGA Mux", "Differential", "Differential Mux" },
465 { "Right PGA Mux", "Line 1", "RINPUT1" },
466 { "Right PGA Mux", "Line 2", "RINPUT2" },
467 { "Right PGA Mux", "Differential", "Differential Mux" },
469 { "Differential Mux", "Line 1", "LINPUT1" },
470 { "Differential Mux", "Line 1", "RINPUT1" },
471 { "Differential Mux", "Line 2", "LINPUT2" },
472 { "Differential Mux", "Line 2", "RINPUT2" },
474 { "Left ADC Mux", "Stereo", "Left PGA Mux" },
475 { "Left ADC Mux", "Mono (Left)", "Left PGA Mux" },
476 //{ "Left ADC Mux", "Digital Mono", "Left PGA Mux" },
478 { "Right ADC Mux", "Stereo", "Right PGA Mux" },
479 { "Right ADC Mux", "Mono (Right)", "Right PGA Mux" },
480 //{ "Right ADC Mux", "Digital Mono", "Right PGA Mux" },
482 { "Left ADC", NULL, "Left ADC Mux" },
483 { "Right ADC", NULL, "Right ADC Mux" },
485 { "Left Line Mux", "Line 1", "LINPUT1" },
486 { "Left Line Mux", "Line 2", "LINPUT2" },
487 { "Left Line Mux", "PGA", "Left PGA Mux" },
488 //{ "Left Line Mux", "Differential", "Differential Mux" },
490 { "Right Line Mux", "Line 1", "RINPUT1" },
491 { "Right Line Mux", "Line 2", "RINPUT2" },
492 { "Right Line Mux", "PGA", "Right PGA Mux" },
493 //{ "Right Line Mux", "Differential", "Differential Mux" },
495 { "Left Mixer", "Left Playback Switch", "Left DAC" },
496 { "Left Mixer", "Left Bypass Switch", "Left Line Mux" },
497 //{ "Left Mixer", "Right Playback Switch", "Right DAC" },
498 //{ "Left Mixer", "Right Bypass Switch", "Right Line Mux" },
500 //{ "Right Mixer", "Left Playback Switch", "Left DAC" },
501 //{ "Right Mixer", "Left Bypass Switch", "Left Line Mux" },
502 { "Right Mixer", "Right Playback Switch", "Right DAC" },
503 { "Right Mixer", "Right Bypass Switch", "Right Line Mux" },
505 { "Left Out 1", NULL, "Left Mixer" },
506 { "LOUT1", NULL, "Left Out 1" },
507 { "Right Out 1", NULL, "Right Mixer" },
508 { "ROUT1", NULL, "Right Out 1" },
510 { "Left Out 2", NULL, "Left Mixer" },
511 { "LOUT2", NULL, "Left Out 2" },
512 { "Right Out 2", NULL, "Right Mixer" },
513 { "ROUT2", NULL, "Right Out 2" },
516 int es8328_dapm_pre_event(struct snd_soc_dapm_widget* widget, struct snd_kcontrol * null, int event)
518 // printk("fun:%s, event:%d\r\n", __FUNCTION__, event);
521 widget->dapm->dev_power = 1;
522 es8323_set_bias_level(widget->codec, SND_SOC_BIAS_PREPARE);
526 int es8328_dapm_post_event(struct snd_soc_dapm_widget* widget, struct snd_kcontrol * null, int event)
528 // printk("fun:%s, event:%d\r\n", __FUNCTION__, event);
531 widget->dapm->dev_power = 0;
532 es8323_set_bias_level(widget->codec, SND_SOC_BIAS_STANDBY);
545 /* codec hifi mclk clock divider coefficients */
546 static const struct _coeff_div coeff_div[] = {
548 {12288000, 8000, 1536, 0xa, 0x0},
549 {11289600, 8000, 1408, 0x9, 0x0},
550 {18432000, 8000, 2304, 0xc, 0x0},
551 {16934400, 8000, 2112, 0xb, 0x0},
552 {12000000, 8000, 1500, 0xb, 0x1},
555 {11289600, 11025, 1024, 0x7, 0x0},
556 {16934400, 11025, 1536, 0xa, 0x0},
557 {12000000, 11025, 1088, 0x9, 0x1},
560 {12288000, 16000, 768, 0x6, 0x0},
561 {18432000, 16000, 1152, 0x8, 0x0},
562 {12000000, 16000, 750, 0x7, 0x1},
565 {11289600, 22050, 512, 0x4, 0x0},
566 {16934400, 22050, 768, 0x6, 0x0},
567 {12000000, 22050, 544, 0x6, 0x1},
570 {12288000, 32000, 384, 0x3, 0x0},
571 {18432000, 32000, 576, 0x5, 0x0},
572 {12000000, 32000, 375, 0x4, 0x1},
575 {11289600, 44100, 256, 0x2, 0x0},
576 {16934400, 44100, 384, 0x3, 0x0},
577 {12000000, 44100, 272, 0x3, 0x1},
580 {12288000, 48000, 256, 0x2, 0x0},
581 {18432000, 48000, 384, 0x3, 0x0},
582 {12000000, 48000, 250, 0x2, 0x1},
585 {11289600, 88200, 128, 0x0, 0x0},
586 {16934400, 88200, 192, 0x1, 0x0},
587 {12000000, 88200, 136, 0x1, 0x1},
590 {12288000, 96000, 128, 0x0, 0x0},
591 {18432000, 96000, 192, 0x1, 0x0},
592 {12000000, 96000, 125, 0x0, 0x1},
595 static inline int get_coeff(int mclk, int rate)
599 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
600 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
607 /* The set of rates we can generate from the above for each SYSCLK */
609 static unsigned int rates_12288[] = {
610 8000, 12000, 16000, 24000, 24000, 32000, 48000, 96000,
613 static struct snd_pcm_hw_constraint_list constraints_12288 = {
614 .count = ARRAY_SIZE(rates_12288),
618 static unsigned int rates_112896[] = {
619 8000, 11025, 22050, 44100,
622 static struct snd_pcm_hw_constraint_list constraints_112896 = {
623 .count = ARRAY_SIZE(rates_112896),
624 .list = rates_112896,
627 static unsigned int rates_12[] = {
628 8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000,
632 static struct snd_pcm_hw_constraint_list constraints_12 = {
633 .count = ARRAY_SIZE(rates_12),
637 static void on_off_ext_amp(int i)
639 struct snd_soc_codec *codec;
640 gpio_set_value(SPK_CON, i);
643 //gpio_direction_output(SPK_CTL, GPIO_LOW);
644 gpio_set_value(SPK_CTL, i);
645 /*snd_soc_write(codec,0x1E,0x1F);
646 snd_soc_write(codec,0x1F,0xF7);
647 snd_soc_write(codec,0x20,0xFD);
648 snd_soc_write(codec,0x21,0xFF);
649 snd_soc_write(codec,0x22,0x1F);
650 snd_soc_write(codec,0x23,0xF7);
651 snd_soc_write(codec,0x24,0xFD);
652 snd_soc_write(codec,0x25,0xFF);
653 snd_soc_write(codec,0x30,0x18);
654 snd_soc_write(codec,0x31,0x18);
656 DBG("*** %s() SPEAKER set as %d\n", __FUNCTION__, i);
659 //gpio_direction_output(EAR_CON_PIN, GPIO_LOW);
660 gpio_set_value(EAR_CON_PIN, i);
661 /*snd_soc_write(codec,0x1E,0x01);//for 47uF capacitors ,15db Bass@90Hz,Fs=44100
662 snd_soc_write(codec,0x1F,0x84);
663 snd_soc_write(codec,0x20,0xED);
664 snd_soc_write(codec,0x21,0xAF);
665 snd_soc_write(codec,0x22,0x20);
666 snd_soc_write(codec,0x23,0x6C);
667 snd_soc_write(codec,0x24,0xE9);
668 snd_soc_write(codec,0x25,0xBE);
669 snd_soc_write(codec,0x30,0x1c);
670 snd_soc_write(codec,0x31,0x1c);
672 DBG("*** %s() HEADPHONE set as %d\n", __FUNCTION__, i);
677 static void es8323_codec_set_spk(bool on)
685 * Note that this should be called from init rather than from hw_params.
687 static int es8323_set_dai_sysclk(struct snd_soc_dai *codec_dai,
688 int clk_id, unsigned int freq, int dir)
690 struct snd_soc_codec *codec = codec_dai->codec;
691 struct es8323_priv *es8323 = snd_soc_codec_get_drvdata(codec);
693 DBG("Enter::%s----%d\n",__FUNCTION__,__LINE__);
700 es8323->sysclk_constraints = &constraints_112896;
701 es8323->sysclk = freq;
708 es8323->sysclk_constraints = &constraints_12288;
709 es8323->sysclk = freq;
714 es8323->sysclk_constraints = &constraints_12;
715 es8323->sysclk = freq;
721 static int es8323_set_dai_fmt(struct snd_soc_dai *codec_dai,
724 struct snd_soc_codec *codec = codec_dai->codec;
728 alsa_dbg("%s----%d, fmt[%02x]\n",__FUNCTION__,__LINE__,fmt);
730 iface = snd_soc_read(codec, ES8323_IFACE);
731 adciface = snd_soc_read(codec, ES8323_ADC_IFACE);
732 daciface = snd_soc_read(codec, ES8323_DAC_IFACE);
734 /* set master/slave audio interface */
735 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
736 case SND_SOC_DAIFMT_CBM_CFM: // MASTER MODE
737 alsa_dbg("es8323 in master mode");
740 case SND_SOC_DAIFMT_CBS_CFS: // SLAVE MODE
741 alsa_dbg("es8323 in slave mode");
749 /* interface format */
750 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
751 case SND_SOC_DAIFMT_I2S:
753 //daciface &= 0xF9; //updated by david-everest,5-25
756 case SND_SOC_DAIFMT_RIGHT_J:
758 case SND_SOC_DAIFMT_LEFT_J:
760 case SND_SOC_DAIFMT_DSP_A:
762 case SND_SOC_DAIFMT_DSP_B:
768 /* clock inversion */
769 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
770 case SND_SOC_DAIFMT_NB_NF:
773 //daciface &= 0xDF; //UPDATED BY david-everest,5-25
776 case SND_SOC_DAIFMT_IB_IF:
778 //adciface &= 0xDF; //UPDATED BY david-everest,5-25
780 //daciface &= 0xDF; //UPDATED BY david-everest,5-25
783 case SND_SOC_DAIFMT_IB_NF:
785 // adciface |= 0x40; //UPDATED BY david-everest,5-25
787 //daciface |= 0x40; //UPDATED BY david-everest,5-25
790 case SND_SOC_DAIFMT_NB_IF:
793 //daciface |= 0x20; //UPDATED BY david-everest,5-25
800 snd_soc_write(codec, ES8323_IFACE , iface);
801 snd_soc_write(codec, ES8323_ADC_IFACE, adciface);
802 snd_soc_write(codec, ES8323_DAC_IFACE, daciface);
807 static int es8323_pcm_startup(struct snd_pcm_substream *substream,
808 struct snd_soc_dai *dai)
810 struct snd_soc_codec *codec = dai->codec;
811 struct es8323_priv *es8323 = snd_soc_codec_get_drvdata(codec);
813 if (!es8323->is_startup) {
814 es8323->is_startup = 1;
817 snd_soc_write(codec, ES8323_CONTROL1, 0x06);
818 snd_soc_write(codec, ES8323_CONTROL2, 0x72);
819 snd_soc_write(codec, ES8323_DACPOWER, 0x00);
821 //snd_soc_write(codec, ES8323_CHIPPOWER, 0xf3);
822 snd_soc_write(codec, ES8323_DACCONTROL21, 0x80);
824 snd_soc_write(codec, ES8323_ADCPOWER, 0x59);
825 snd_soc_write(codec, ES8323_DACPOWER, 0x0c);
826 snd_soc_write(codec, ES8323_CHIPPOWER, 0x00);
830 DBG("Enter::%s----%d es8323->sysclk=%d\n",__FUNCTION__,__LINE__,es8323->sysclk);
832 /* The set of sample rates that can be supported depends on the
833 * MCLK supplied to the CODEC - enforce this.
835 if (!es8323->sysclk) {
837 "No MCLK configured, call set_sysclk() on init\n");
841 snd_pcm_hw_constraint_list(substream->runtime, 0,
842 SNDRV_PCM_HW_PARAM_RATE,
843 es8323->sysclk_constraints);
848 static int es8323_pcm_hw_params(struct snd_pcm_substream *substream,
849 struct snd_pcm_hw_params *params,
850 struct snd_soc_dai *dai)
853 static int codecfirstuse=0;
854 struct snd_soc_pcm_runtime *rtd = substream->private_data;
855 struct snd_soc_codec *codec = rtd->codec;
856 struct es8323_priv *es8323 = snd_soc_codec_get_drvdata(codec);
857 //u16 iface = snd_soc_read(codec, es8323_IFACE) & 0x1f3;
858 //u16 srate = snd_soc_read(codec, es8323_SRATE) & 0x180;
860 u16 srate = snd_soc_read(codec, ES8323_IFACE) & 0x80;
861 u16 adciface = snd_soc_read(codec, ES8323_ADC_IFACE) & 0xE3;
862 u16 daciface = snd_soc_read(codec, ES8323_DAC_IFACE) & 0xC7;
866 coeff = get_coeff(es8323->sysclk, params_rate(params));
868 coeff = get_coeff(es8323->sysclk / 2, params_rate(params));
873 "Unable to configure sample rate %dHz with %dHz MCLK\n",
874 params_rate(params), es8323->sysclk);
879 switch (params_format(params)) {
880 case SNDRV_PCM_FORMAT_S16_LE:
884 case SNDRV_PCM_FORMAT_S20_3LE:
888 case SNDRV_PCM_FORMAT_S24_LE:
890 case SNDRV_PCM_FORMAT_S32_LE:
896 /* set iface & srate*/
897 snd_soc_write(codec, ES8323_DAC_IFACE, daciface); //dac bits length
898 snd_soc_write(codec, ES8323_ADC_IFACE, adciface); //adc bits length
902 snd_soc_write(codec, ES8323_IFACE, srate); //bclk div,mclkdiv2
903 snd_soc_write(codec, ES8323_ADCCONTROL5, coeff_div[coeff].sr | (coeff_div[coeff].usb) << 4);
904 snd_soc_write(codec, ES8323_DACCONTROL2, coeff_div[coeff].sr | (coeff_div[coeff].usb) << 4);
906 if (codecfirstuse == 0)
908 snd_soc_write(codec, ES8323_LOUT2_VOL, es8323_DEF_VOL);//0x1c); //
909 snd_soc_write(codec, ES8323_ROUT2_VOL, es8323_DEF_VOL);//0x1c); //
916 static int es8323_mute(struct snd_soc_dai *dai, int mute)
918 struct snd_soc_codec *codec = dai->codec;
919 u16 mute_reg = snd_soc_read(codec, ES8323_DACCONTROL3) & 0xfb;
921 DBG("Enter::%s----%d--mute=%d\n",__FUNCTION__,__LINE__,mute);
924 //snd_soc_write(codec, ES8323_DACCONTROL3, mute_reg | 0x4);
926 snd_soc_write(codec, ES8323_DACCONTROL3, 0xe6);//0xe6);
932 snd_soc_write(codec, ES8323_DACCONTROL3, 0xe2);//0xe2);
937 on_off_ext_amp(!mute);
942 static int es8323_trigger(struct snd_pcm_substream *substream, int status, struct snd_soc_dai *dai)
944 if(substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
945 if(status == SNDRV_PCM_TRIGGER_START){
948 else if(status == SNDRV_PCM_TRIGGER_STOP){
955 /////////////////////////////////////////////////////////////////
956 static int es8323_set_bias_level(struct snd_soc_codec *codec,
957 enum snd_soc_bias_level level)
959 struct es8323_priv *es8323 = snd_soc_codec_get_drvdata(codec);
960 u16 OUT_VOL = snd_soc_read(codec, ES8323_LOUT1_VOL);
962 DBG("Enter::%s----%d level =%d\n",__FUNCTION__,__LINE__,level);
965 case SND_SOC_BIAS_ON:
966 es8323->is_biason = 1;
969 case SND_SOC_BIAS_PREPARE:
970 snd_soc_write(codec, 0x07, 0x7C);
971 snd_soc_write(codec, 0x05, 0x00);
972 snd_soc_write(codec, 0x06, 0xFF);
973 //snd_soc_write(codec, 0x2b, 0x80);
974 snd_soc_write(codec, ES8323_CHIPPOWER, 0x00);
975 //snd_soc_write(codec, ES8323_DACPOWER, 0x0c);
976 snd_soc_write(codec, ES8323_ADCPOWER, 0x59);
977 //snd_soc_write(codec, 0x19, 0x00);
979 case SND_SOC_BIAS_STANDBY:
981 snd_soc_write(codec, 0x07, 0x7C);
982 snd_soc_write(codec, 0x05, 0x00);
983 snd_soc_write(codec, 0x06, 0xFF);
984 //snd_soc_write(codec, 0x2b, 0x80);
985 snd_soc_write(codec, ES8323_CHIPPOWER, 0x00);
986 //snd_soc_write(codec, ES8323_DACPOWER, 0x0c);
987 snd_soc_write(codec, ES8323_ADCPOWER, 0x59);
988 //snd_soc_write(codec, 0x19, 0x00);
991 case SND_SOC_BIAS_OFF:
992 //snd_soc_write(codec, 0x19, 0x04);
993 //snd_soc_write(codec, ES8323_DACPOWER, 0xcc);
994 snd_soc_write(codec, 0x07, 0x7B);
995 snd_soc_write(codec, 0x05, 0xFF);
996 snd_soc_write(codec, 0x06, 0xFF);
997 snd_soc_write(codec, ES8323_ADCPOWER, 0xFF);
998 snd_soc_write(codec, ES8323_CHIPPOWER, 0xAA);
1000 //snd_soc_write(codec, 0x2b, 0x90);
1003 codec->dapm.bias_level = level;
1009 #define es8323_RATES SNDRV_PCM_RATE_8000_96000
1011 #define es8323_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1012 SNDRV_PCM_FMTBIT_S24_LE)
1014 static struct snd_soc_dai_ops es8323_ops = {
1015 .startup = es8323_pcm_startup,
1016 .hw_params = es8323_pcm_hw_params,
1017 .set_fmt = es8323_set_dai_fmt,
1018 .set_sysclk = es8323_set_dai_sysclk,
1019 .digital_mute = es8323_mute,
1020 // .trigger = es8323_trigger,
1023 static struct snd_soc_dai_driver es8323_dai = {
1024 .name = "ES8323 HiFi",
1026 .stream_name = "Playback",
1029 .rates = es8323_RATES,
1030 .formats = es8323_FORMATS,
1033 .stream_name = "Capture",
1036 .rates = es8323_RATES,
1037 .formats = es8323_FORMATS,
1040 .symmetric_rates = 1,
1043 static int es8323_suspend(struct snd_soc_codec *codec, pm_message_t state)
1046 DBG("Enter::%s----%d\n",__FUNCTION__,__LINE__);
1049 snd_soc_write(codec, 0x19, 0x06);
1050 snd_soc_write(codec, 0x07, 0x7B);
1051 snd_soc_write(codec, 0x06, 0xFF);
1052 snd_soc_write(codec, 0x05, 0xFF);
1055 snd_soc_write(codec, 0x19, 0x06);
1056 snd_soc_write(codec, 0x30, 0x00);
1057 snd_soc_write(codec, 0x31, 0x00);
1060 snd_soc_write(codec, ES8323_ADCPOWER, 0xFF);
1061 snd_soc_write(codec, ES8323_DACPOWER, 0xc0);
1062 snd_soc_write(codec, ES8323_CHIPPOWER, 0xF3);
1063 snd_soc_write(codec, 0x00, 0x00);
1064 snd_soc_write(codec, 0x01, 0x58);
1065 snd_soc_write(codec, 0x2b, 0x9c);
1067 gpio_set_value(SPK_CON, 0);
1071 static int es8323_resume(struct snd_soc_codec *codec)
1075 u16 *cache = codec->reg_cache;
1076 snd_soc_write(codec, 0x2b, 0x80);
1077 snd_soc_write(codec, 0x01, 0x50);
1078 snd_soc_write(codec, 0x00, 0x36);
1080 snd_soc_write(codec, ES8323_CHIPPOWER, 0x00);
1081 snd_soc_write(codec, ES8323_DACPOWER, 0x0c);
1082 snd_soc_write(codec, ES8323_ADCPOWER, 0x59);
1084 snd_soc_write(codec, 0x31, es8323_DEF_VOL);
1085 snd_soc_write(codec, 0x30, es8323_DEF_VOL);
1086 snd_soc_write(codec, 0x19, 0x02);
1087 gpio_set_value(SPK_CON, 1);
1091 static u32 cur_reg=0;
1092 static struct snd_soc_codec *es8323_codec;
1093 static int entry_read(char *page, char **start, off_t off,
1094 int count, int *eof, void *data)
1098 snd_soc_write(es8323_codec, ES8323_ADCPOWER, 0xff);
1099 snd_soc_write(es8323_codec, ES8323_DACPOWER, 0xf0);
1100 snd_soc_write(es8323_codec, ES8323_DACPOWER, 0xc0);
1101 snd_soc_write(es8323_codec, ES8323_CHIPPOWER, 0xf3);
1103 len = sprintf(page, "es8323 suspend...\n");
1108 #if (RT5633_SPK_TIMER == 1)
1109 static void spk_work_handler(struct work_struct *work)
1111 //if(!gpio_get_value(ES8323_HP_PIN)){
1112 //gpio_direction_output(SPK_CON,0);
1113 // gpio_set_value(SPK_CON, 0);
1115 //gpio_direction_output(SPK_CON,1);
1116 // gpio_set_value(SPK_CON, 1);
1119 void spk_timer_callback(unsigned long data )
1122 schedule_work(&spk_work);
1123 ret = mod_timer(&spk_timer, jiffies + msecs_to_jiffies(1000));
1124 if (ret) printk("Error in mod_timer\n");
1128 static int es8323_probe(struct snd_soc_codec *codec)
1130 struct es8323_priv *es8323 = snd_soc_codec_get_drvdata(codec);
1131 struct snd_soc_dapm_context *dapm = &codec->dapm;
1135 printk("%s\n", __func__);
1137 ret = gpio_request(RK30_PIN0_PC7, NULL);
1139 printk("%s request RK30_PIN0_PC7 error", __func__);
1142 gpio_direction_input(RK30_PIN0_PC7);
1144 ret = gpio_request(SPK_CON, NULL);
1146 printk("%s request SPK_CON error", __func__);
1149 //gpio_set_value(SPK_CON, 1);
1150 gpio_direction_output(SPK_CON,0);
1152 if (codec == NULL) {
1153 dev_err(codec->dev, "Codec device not registered\n");
1156 codec->read = es8323_read_reg_cache;
1157 codec->write = es8323_write;
1158 codec->hw_write = (hw_write_t)i2c_master_send;
1159 codec->control_data = container_of(codec->dev, struct i2c_client, dev);
1161 es8323_codec = codec;
1162 ret = es8323_reset(codec);
1164 dev_err(codec->dev, "Failed to issue reset\n");
1167 #if (RT5633_SPK_TIMER == 1)
1168 setup_timer( &spk_timer, spk_timer_callback, 0 );
1169 ret = mod_timer( &spk_timer, jiffies + msecs_to_jiffies(5000) );
1171 printk("Error in mod_timer\n");
1172 INIT_WORK(&spk_work, spk_work_handler);
1176 //es8323_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1179 //snd_soc_write(codec, 0x35 , 0xa0);
1180 //snd_soc_write(codec, 0x36 , 0x08);
1181 snd_soc_write(codec, 0x2B,0x80);
1182 snd_soc_write(codec, 0x08,0x00); //ES8388 salve
1183 snd_soc_write(codec, 0x00,0x36); //
1184 snd_soc_write(codec, 0x01,0x74);
1185 snd_soc_write(codec, 0x01,0x50); //PLAYBACK & RECORD Mode,EnRefr=1
1187 snd_soc_write(codec, 0x04,0xfc); //pdn_ana=0,ibiasgen_pdn=0
1188 snd_soc_write(codec, 0x03,0x59); //pdn_ana=0,ibiasgen_pdn=0
1189 snd_soc_write(codec, 0x05,0x00); //pdn_ana=0,ibiasgen_pdn=0
1190 snd_soc_write(codec, 0x06,0xc3); //pdn_ana=0,ibiasgen_pdn=0
1191 snd_soc_write(codec, 0x02,0xF0); //START DLL and STM
1192 snd_soc_write(codec, 0x02,0xc0); //START DLL and STM
1193 snd_soc_write(codec, 0x09,0x88); //ADC L/R PGA = +24dB
1194 snd_soc_write(codec, 0x2e, 0x00);
1195 snd_soc_write(codec, 0x2f, 0x00);
1196 //----------------------------------------------------------------------------------------------------------------
1197 snd_soc_write(codec, 0x0a,0xf0); //ADC INPUT=LIN2/RIN2
1198 snd_soc_write(codec, 0x0b,0x82); //ADC INPUT=LIN2/RIN2 //82
1199 //-----------------------------------------------------------------------------------------------------------------
1200 snd_soc_write(codec, 0x0C,0x4c); //I2S-24BIT
1201 snd_soc_write(codec, 0x0d,0x02); //MCLK/LRCK=256
1202 snd_soc_write(codec, 0x10,0x00); //ADC Left Volume=0db
1203 snd_soc_write(codec, 0x11,0x00); //ADC Right Volume=0db
1204 snd_soc_write(codec, 0x12,0xea); // ALC stereo MAXGAIN: 35.5dB, MINGAIN: +6dB (Record Volume increased!)
1205 snd_soc_write(codec, 0x13,0xc0);
1206 snd_soc_write(codec, 0x14,0x05);
1207 snd_soc_write(codec, 0x15,0x06);
1208 snd_soc_write(codec, 0x16,0x53);
1209 snd_soc_write(codec, 0x17,0x18); //I2S-16BIT
1210 snd_soc_write(codec, 0x18,0x02);
1211 snd_soc_write(codec, 0x1A,0x0A); //DAC VOLUME=0DB
1212 snd_soc_write(codec, 0x1B,0x0A);
1213 /***********************/
1214 snd_soc_write(codec, 0x1E,0x01); //for 47uF capacitors ,15db Bass@90Hz,Fs=44100
1215 snd_soc_write(codec, 0x1F,0x84);
1216 snd_soc_write(codec, 0x20,0xED);
1217 snd_soc_write(codec, 0x21,0xAF);
1218 snd_soc_write(codec, 0x22,0x20);
1219 snd_soc_write(codec, 0x23,0x6C);
1220 snd_soc_write(codec, 0x24,0xE9);
1221 snd_soc_write(codec, 0x25,0xBE);
1222 /***********************/
1223 snd_soc_write(codec, 0x26,0x12); //Left DAC TO Left MIXER
1224 snd_soc_write(codec, 0x27,0xb8); //Left DAC TO Left MIXER
1225 snd_soc_write(codec, 0x28,0x38);
1226 snd_soc_write(codec, 0x29,0x38);
1227 snd_soc_write(codec, 0x2A,0xb8);
1228 snd_soc_write(codec, 0x2e,0x00);
1229 snd_soc_write(codec, 0x2f,0x00);
1230 snd_soc_write(codec, 0x30,0x00);
1231 snd_soc_write(codec, 0x31,0x00);
1232 snd_soc_write(codec, 0x02,0x00); //aa //START DLL and state-machine,START DSM
1233 snd_soc_write(codec, 0x04,0x3c);
1234 snd_soc_write(codec, 0x19,0xe2); //SOFT RAMP RATE=32LRCKS/STEP,Enable ZERO-CROSS CHECK,DAC MUTE
1239 //s8323_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1240 //codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
1242 snd_soc_add_controls(codec, es8323_snd_controls,
1243 ARRAY_SIZE(es8323_snd_controls));
1244 snd_soc_dapm_new_controls(dapm, es8323_dapm_widgets,
1245 ARRAY_SIZE(es8323_dapm_widgets));
1246 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
1248 create_proc_read_entry("es8323_suspend", 0644, NULL, entry_read, NULL);
1253 static int es8323_remove(struct snd_soc_codec *codec)
1255 es8323_set_bias_level(codec, SND_SOC_BIAS_OFF);
1259 void codec_set_spk(bool on)
1261 struct snd_soc_codec *codec = es8323_codec;
1263 DBG("Enter::%s----%d--\n",__FUNCTION__,__LINE__);
1266 //snd_soc_write(codec, ES8323_DACCONTROL3, mute_reg | 0x4);
1268 snd_soc_write(codec, ES8323_DACCONTROL3, 0x06);//0xe6);
1274 snd_soc_write(codec, ES8323_DACCONTROL3, 0x02);//0xe2);
1283 static struct snd_soc_codec_driver soc_codec_dev_es8323 = {
1284 .probe = es8323_probe,
1285 .remove = es8323_remove,
1286 .suspend = es8323_suspend,
1287 .resume = es8323_resume,
1288 .set_bias_level = es8323_set_bias_level,
1289 .reg_cache_size = ARRAY_SIZE(es8323_reg),
1290 .reg_word_size = sizeof(u16),
1291 .reg_cache_default = es8323_reg,
1292 //------------------------------------------
1293 //.volatile_register = es8323_volatile_register,
1294 //.readable_register = es8323_readable_register,
1295 .reg_cache_step = 1,
1296 .controls = es8323_snd_controls,
1297 .num_controls = ARRAY_SIZE(es8323_snd_controls),
1298 .dapm_routes = audio_map,
1299 .num_dapm_routes = ARRAY_SIZE(audio_map),
1300 .dapm_widgets = es8323_dapm_widgets,
1301 .num_dapm_widgets = ARRAY_SIZE(es8323_dapm_widgets),
1303 //--------------------------------------------------
1304 .read = es8323_read_reg_cache,
1305 .write = es8323_write,
1308 #if defined(CONFIG_SPI_MASTER)
1309 static int __devinit es8323_spi_probe(struct spi_device *spi)
1311 struct es8323_priv *es8323;
1314 es8323 = kzalloc(sizeof(struct es8323_priv), GFP_KERNEL);
1318 es8323->control_type = SND_SOC_SPI;
1319 spi_set_drvdata(spi, es8323);
1321 ret = snd_soc_register_codec(&spi->dev,
1322 &soc_codec_dev_es8323, &es8323_dai, 1);
1328 static int __devexit es8323_spi_remove(struct spi_device *spi)
1330 snd_soc_unregister_codec(&spi->dev);
1331 kfree(spi_get_drvdata(spi));
1335 static struct spi_driver es8323_spi_driver = {
1338 .owner = THIS_MODULE,
1340 .probe = es8323_spi_probe,
1341 .remove = __devexit_p(es8323_spi_remove),
1343 #endif /* CONFIG_SPI_MASTER */
1345 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1346 static ssize_t es8323_show(struct device *dev, struct device_attribute *attr, char *_buf)
1348 return sprintf(_buf, "%s(): get 0x%04x=0x%04x\n", __FUNCTION__, cur_reg,
1349 snd_soc_read(es8323_codec, cur_reg));
1352 static u32 strtol(const char *nptr, int base)
1355 if(!nptr || (base!=16 && base!=10 && base!=8))
1358 printk("%s(): NULL pointer input\n", __FUNCTION__);
1361 for(ret=0; *nptr; nptr++)
1365 if((base==16 && *nptr>='A' && *nptr<='F') ||
1366 (base==16 && *nptr>='a' && *nptr<='f') ||
1367 (base>=10 && *nptr>='0' && *nptr<='9') ||
1368 (base>=8 && *nptr>='0' && *nptr<='7') )
1371 if(base==16 && *nptr>='A' && *nptr<='F')
1372 ret += *nptr-'A'+10;
1373 else if(base==16 && *nptr>='a' && *nptr<='f')
1374 ret += *nptr-'a'+10;
1375 else if(base>=10 && *nptr>='0' && *nptr<='9')
1377 else if(base>=8 && *nptr>='0' && *nptr<='7')
1386 static ssize_t es8323_store(struct device *dev,
1387 struct device_attribute *attr,
1388 const char *_buf, size_t _count)
1390 const char * p=_buf;
1393 if(!strncmp(_buf, "get", strlen("get")))
1396 cur_reg=(u32)strtol(p, 16);
1397 val=snd_soc_read(es8323_codec, cur_reg);
1398 printk("%s(): get 0x%04x=0x%04x\n", __FUNCTION__, cur_reg, val);
1400 else if(!strncmp(_buf, "put", strlen("put")))
1404 p=strchr(_buf, '=');
1409 snd_soc_write(es8323_codec, reg, val);
1410 printk("%s(): set 0x%04x=0x%04x\n", __FUNCTION__, reg, val);
1413 printk("%s(): Bad string format input!\n", __FUNCTION__);
1416 printk("%s(): Bad string format input!\n", __FUNCTION__);
1421 static struct device *es8323_dev = NULL;
1422 static struct class *es8323_class = NULL;
1423 static DEVICE_ATTR(es8323, 0664, es8323_show, es8323_store);
1424 static __devinit int es8323_i2c_probe(struct i2c_client *i2c,
1425 const struct i2c_device_id *id)
1427 printk("hjc:@es8323.c>>>>%s\n",__func__);
1428 struct es8323_priv *es8323;
1430 struct i2c_adapter *adapter = to_i2c_adapter(i2c->dev.parent);
1434 if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) {
1435 dev_warn(&adapter->dev,
1436 "I2C-Adapter doesn't support I2C_FUNC_I2C\n");
1440 es8323 = kzalloc(sizeof(struct es8323_priv), GFP_KERNEL);
1444 i2c_set_clientdata(i2c, es8323);
1445 es8323->control_type = SND_SOC_I2C;
1448 ret = i2c_master_reg8_recv(i2c,reg, &tmp, 1 ,200 * 1000);
1449 //ret =i2c_master_reg8_recv(client, 0x00, buf, 2, 200*1000);//i2c_write_bytes(client, &test_data, 1); //Test I2C connection.
1451 printk("es8323 probe error\n");
1456 printk("es8323 probe ok\n");
1458 ret = snd_soc_register_codec(&i2c->dev,
1459 &soc_codec_dev_es8323, &es8323_dai, 1);
1460 printk("hjc:@es8323.c,snd_soc_register_codec %s,ret=%d\n",__func__,ret);
1465 printk("hjc:@es8323.c 1 %s,\n",__func__);
1466 es8323_class = class_create(THIS_MODULE, "es8323");
1467 printk("hjc:@es8323.c 2 %s,\n",__func__);
1468 if (IS_ERR(es8323_class))
1470 printk("Create class audio_es8323.\n");
1473 printk("hjc:@es8323.c 3 %s,\n",__func__);
1474 es8323_dev = device_create(es8323_class, NULL, MKDEV(0, 1), NULL, "dev");
1475 device_create_file(es8323_dev, &dev_attr_es8323);
1476 printk("hjc:@es8323.c 4 %s,\n",__func__);
1480 static __devexit int es8323_i2c_remove(struct i2c_client *client)
1482 snd_soc_unregister_codec(&client->dev);
1483 kfree(i2c_get_clientdata(client));
1487 static const struct i2c_device_id es8323_i2c_id[] = {
1491 MODULE_DEVICE_TABLE(i2c, es8323_i2c_id);
1493 void es8323_i2c_shutdown(struct i2c_client *client)
1495 printk("Chenzy-------hkw-------%s\n", __func__);
1497 gpio_direction_output(SPK_CON,0);
1501 gpio_direction_output(SPK_CON,0);
1502 //gpio_request(RK30_PIN0_PC7, NULL);
1503 //gpio_direction_output(RK30_PIN0_PC7,0);
1507 // es8323_set_bias_level(es8323_codec, SND_SOC_BIAS_OFF);
1509 //#define SPK_CTL RK29_PIN6_PB6
1511 // //gpio_direction_output(SPK_CTL, GPIO_LOW);
1512 // gpio_set_value(SPK_CTL, i);
1513 // DBG("*** %s() SPEAKER set as %d\n", __FUNCTION__, i);
1517 snd_soc_write(es8323_codec, ES8323_DACCONTROL3, 0x06);//0xe6);
1518 for(i = 0; i <= 0x1d; i++)
1520 snd_soc_write(es8323_codec, ES8323_LOUT2_VOL, 0x1d - i);//0x1c); //
1521 snd_soc_write(es8323_codec, ES8323_ROUT2_VOL, 0x1d - i);//0x1c); //
1523 snd_soc_write(es8323_codec, ES8323_ADCPOWER, 0xFF);
1524 snd_soc_write(es8323_codec, ES8323_DACPOWER, 0xFC);
1525 snd_soc_write(es8323_codec, ES8323_CHIPPOWER, 0xf3);
1531 #define I2C_CLK_NAME GPIO0B0_I2S8CHCLK_NAME
1532 #define I2C_CLK_GPIO_MODE GPIO0B_GPIO0B0
1533 #define I2C_GPIO_OUTPUT GPIO_LOW
1534 #define I2C_CLK_CLK_MODE GPIO0B_I2S_8CH_CLK
1535 #define I2C_CLK_GPIO RK30_PIN0_PB0
1537 #define I2C_MCLK_NAME GPIO0B1_I2S8CHSCLK_NAME
1538 #define I2C_MCLK_GPIO_MODE GPIO0B_GPIO0B1
1539 #define I2C_MGPIO_OUTPUT GPIO_LOW
1540 #define I2C_MCLK_CLK_MODE GPIO0B_I2S_8CH_SCLK
1541 #define I2C_MCLK_GPIO RK30_PIN0_PB1
1542 static int es8323_i2c_suspend (struct i2c_client *client)
1545 rk30_mux_api_set(I2C_CLK_NAME,I2C_CLK_GPIO_MODE);
1546 if (gpio_request(I2C_CLK_GPIO, NULL)) {
1547 printk("func %s, line %d: request gpio fail\n", __FUNCTION__, __LINE__);
1551 gpio_direction_output(I2C_CLK_GPIO,I2C_GPIO_OUTPUT);
1553 rk30_mux_api_set(I2C_MCLK_NAME,I2C_MCLK_GPIO_MODE);
1554 if (gpio_request(I2C_MCLK_GPIO, NULL)) {
1555 printk("func %s, line %d: request gpio fail\n", __FUNCTION__, __LINE__);
1559 gpio_direction_output(I2C_MCLK_GPIO,I2C_MGPIO_OUTPUT);
1561 iomux_set(GPIO1_C1);
1562 if (gpio_request(RK30_PIN1_PC1, NULL)) {
1563 printk("func %s, line %d: request gpio fail\n", __FUNCTION__, __LINE__);
1566 gpio_direction_input(RK30_PIN1_PC1);
1567 gpio_pull_updown(RK30_PIN1_PC1, PullDisable);
1570 iomux_set(GPIO1_C2);
1571 gpio_direction_input(RK30_PIN1_PC2);
1572 gpio_pull_updown(RK30_PIN1_PC2, PullDisable);
1574 iomux_set(GPIO1_C3);
1575 gpio_direction_input(RK30_PIN1_PC3);
1576 gpio_pull_updown(RK30_PIN1_PC3, PullDisable);
1578 iomux_set(GPIO1_C4);
1579 gpio_direction_input(RK30_PIN1_PC4);
1580 gpio_pull_updown(RK30_PIN1_PC4, PullDisable);
1582 iomux_set(GPIO1_C5);
1583 gpio_direction_input(RK30_PIN1_PC5);
1584 gpio_pull_updown(RK30_PIN1_PC5, PullDisable);
1590 static int es8323_i2c_resume(struct i2c_client *client)
1593 gpio_free(I2C_MCLK_GPIO);
1594 gpio_free(I2C_CLK_GPIO);
1596 rk30_mux_api_set(I2C_MCLK_NAME,I2C_MCLK_CLK_MODE);
1597 rk30_mux_api_set(I2C_CLK_NAME,I2C_CLK_CLK_MODE);
1600 gpio_free(RK30_PIN1_PC1);
1601 iomux_set(I2S0_SCLK);
1606 static struct i2c_driver es8323_i2c_driver = {
1609 .owner = THIS_MODULE,
1611 .probe = es8323_i2c_probe,
1612 .remove = __devexit_p(es8323_i2c_remove),
1613 .shutdown = es8323_i2c_shutdown,
1614 .suspend = es8323_i2c_suspend,
1615 .resume = es8323_i2c_resume,
1616 .id_table = es8323_i2c_id,
1620 static int __init es8323_modinit(void)
1622 //if(0 == tcsi_get_value(TCSI_CODEC_ES8323))
1625 //extern int get_sound_card_exist() ;
1626 //extern void set_sound_card_exist(int i) ;
1627 //extern int i2c0_prober_verify(u32 dev_addr, u16 reg, u32 reg_addr_len, u32 reg_val_len, u32 id);
1628 //typedef void (*fp_codec_set_spk)(bool on);
1629 //extern void set_codec_set_spk(fp_codec_set_spk fp);
1630 //if(get_sound_card_exist()) {
1631 // printk("%s():Sound card already exist!\n", __FUNCTION__);
1634 //if(i2c0_prober_verify(0x10, 0x35, 1, 1, 0x0000) != 0) {
1635 // printk("%s(): Ping error with 0x1a\n", __FUNCTION__);
1639 // printk("%s(): Ping OK with 0x1a\n", __FUNCTION__);
1640 //set_sound_card_exist(0x8323);
1641 //set_codec_set_spk(es8323_codec_set_spk);
1643 printk("hjc:@es8323.c>>>>%s\n",__func__);
1644 return i2c_add_driver(&es8323_i2c_driver);
1646 module_init(es8323_modinit);
1648 static void __exit es8323_exit(void)
1651 // if(0 == tcsi_get_value(TCSI_CODEC_ES8323))
1653 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1654 i2c_del_driver(&es8323_i2c_driver);
1656 #if defined(CONFIG_SPI_MASTER)
1657 spi_unregister_driver(&es8323_spi_driver);
1660 module_exit(es8323_exit);
1663 MODULE_DESCRIPTION("ASoC es8323 driver");
1664 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1665 MODULE_LICENSE("GPL");