3 * Copyright (C) 2009 rockchip lhh
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
13 #ifndef _RK1000_CODEC_H
14 #define _RK1000_CODEC_H
16 /* RK1000 register space */
18 #define ACCELCODEC_R00 0x00 //ADC High Pass Filter / DSM
19 #define ACCELCODEC_R01 0x01 //DITHER power
20 #define ACCELCODEC_R02 0x02 //DITHER power
21 #define ACCELCODEC_R03 0x03 //DITHER power
22 #define ACCELCODEC_R04 0x04 //Soft mute / sidetone gain control
23 #define ACCELCODEC_R05 0x05 //Right interpolate filter volume control (MSB)
24 #define ACCELCODEC_R06 0x06 //Right interpolate filter volume control (LSB)
25 #define ACCELCODEC_R07 0x07 //Left interpolate filter volume control (MSB)
26 #define ACCELCODEC_R08 0x08 //Left interpolate filter volume control (LSB)
27 #define ACCELCODEC_R09 0x09 //Audio interface control
28 #define ACCELCODEC_R0A 0x0A //Sample Rate / CLK control
29 #define ACCELCODEC_R0B 0x0B //Decimation filter / Interpolate filter enable
30 #define ACCELCODEC_R0C 0x0C //LIN volume
31 #define ACCELCODEC_R0D 0x0D //LIP volume
32 #define ACCELCODEC_R0E 0x0E //AL volume
33 //#define ACCELCODEC_R0F 0x0F //RIN volume
34 //#define ACCELCODEC_R10 0x10 //RIP volume
35 //#define ACCELCODEC_R11 0x11 //AR volume
36 #define ACCELCODEC_R12 0x12 //Input volume
37 #define ACCELCODEC_R13 0x13 //Left out mix
38 #define ACCELCODEC_R14 0x14 //Right out mix
39 #define ACCELCODEC_R15 0x15 //LPF out mix / SCF
40 #define ACCELCODEC_R16 0x16 //SCF control
41 #define ACCELCODEC_R17 0x17 //LOUT (AOL) volume
42 #define ACCELCODEC_R18 0x18 //ROUT (AOR) volume
43 #define ACCELCODEC_R19 0x19 //MONOOUT (AOM) volume
44 #define ACCELCODEC_R1A 0x1A //MONOOUT / Reference control
45 #define ACCELCODEC_R1B 0x1B //Bias Current control
46 #define ACCELCODEC_R1C 0x1C //ADC control
47 #define ACCELCODEC_R1D 0x1D //Power Mrg 1
48 #define ACCELCODEC_R1E 0x1E //Power Mrg 2
49 #define ACCELCODEC_R1F 0x1F //Power Mrg 3
51 #define RK1000_CACHE_REGNUM 0x1F
54 #define ASC_HPF_ENABLE (0x1) //high_pass filter
55 #define ASC_HPF_DISABLE (0x0)
57 #define ASC_DSM_MODE_ENABLE (0x1 << 1)
58 #define ASC_DSM_MODE_DISABLE (0x0 << 1)
60 #define ASC_SCRAMBLE_ENABLE (0x1 << 2)
61 #define ASC_SCRAMBLE_DISABLE (0x0 << 2)
63 #define ASC_DITHER_ENABLE (0x1 << 3)
64 #define ASC_DITHER_DISABLE (0x0 << 3)
66 #define ASC_BCLKDIV_4 (0x1 << 4)
67 #define ASC_BCLKDIV_8 (0x2 << 4)
68 #define ASC_BCLKDIV_16 (0x3 << 4)
71 #define ASC_INT_MUTE_L (0x1)
72 #define ASC_INT_ACTIVE_L (0x0)
73 #define ASC_INT_MUTE_R (0x1 << 1)
74 #define ASC_INT_ACTIVE_R (0x0 << 1)
76 #define ASC_SIDETONE_L_OFF (0x0 << 2)
77 #define ASC_SIDETONE_L_GAIN_MAX (0x1 << 2)
78 #define ASC_SIDETONE_R_OFF (0x0 << 5)
79 #define ASC_SIDETONE_R_GAIN_MAX (0x1 << 5)
83 #define ASC_INT_VOL_0DB (0x0)
87 #define ASC_DSP_MODE (0x3)
88 #define ASC_I2S_MODE (0x2)
89 #define ASC_LEFT_MODE (0x1)
90 //#define ASC_RIGHT_MODE (0x0)
92 #define ASC_32BIT_MODE (0x3 << 2)
93 #define ASC_24BIT_MODE (0x2 << 2)
94 #define ASC_20BIT_MODE (0x1 << 2)
95 #define ASC_16BIT_MODE (0x0 << 2)
97 #define ASC_INVERT_LRCLK (0x1 << 4)
98 #define ASC_NORMAL_LRCLK (0x0 << 4)
100 #define ASC_LRSWAP_ENABLE (0x1 << 5)
101 #define ASC_LRSWAP_DISABLE (0x0 << 5)
103 #define ASC_MASTER_MODE (0x1 << 6)
104 #define ASC_SLAVE_MODE (0x0 << 6)
106 #define ASC_INVERT_BCLK (0x1 << 7)
107 #define ASC_NORMAL_BCLK (0x0 << 7)
110 #define ASC_USB_MODE (0x1)
111 #define ASC_NORMAL_MODE (0x0)
113 #define FREQ96kHz (0x0e << 1)
114 #define FREQ48kHz (0x00 << 1)
115 #define FREQ441kHz (0x11 << 1)
116 #define FREQ32kHz (0x0c << 1)
117 #define FREQ24kHz (0x1c << 1)
118 #define FREQ2205kHz (0x1B << 1)
119 #define FREQ16kHz (0x0a << 1)
120 #define FREQ12kHz (0x08 << 1)
121 #define FREQ11025kHz (0x19 << 1)
122 //#define FREQ9k6Hz 0x09
123 #define FREQ8kHz (0x06<<1)
125 #define ASC_CLKDIV2 (0x1 << 6)
126 #define ASC_CLKNODIV (0x0 << 6)
128 #define ASC_CLK_ENABLE (0x1 << 7)
129 #define ASC_CLK_DISABLE (0x0 << 7)
132 #define ASC_DEC_ENABLE (0x1) //decimation filter enable
133 #define ASC_DEC_DISABLE (0x0)
134 #define ASC_INT_ENABLE (0x1 << 1) //interpolate filter enable
135 #define ASC_INT_DISABLE (0x0 << 1)
138 #define ASC_INPUT_MUTE (0x1 << 7)
139 #define ASC_INPUT_ACTIVE (0x0 << 7)
140 #define ASC_INPUT_VOL_0DB (0x0)
143 #define ASC_LINE_INPUT (0)
144 #define ASC_MIC_INPUT (1 << 7)
146 #define ASC_MIC_BOOST_0DB (0)
147 #define ASC_MIC_BOOST_20DB (1 << 5)
150 #define ASC_LPGAMXVOL_0DB (0x5)
151 #define ASC_LPGAMX_ENABLE (0x1 << 3) //the left channel PGA output is directly fed into the left mixer
152 #define ASC_LPGAMX_DISABLE (0x0 << 3)
153 #define ASC_ALMXVOL_0DB (0x5 << 4)
154 #define ASC_ALMX_ENABLE (0x1 << 7) //the left second line input is directly fed into the left mixer
155 #define ASC_ALMX_DISABLE (0x0 << 7)
158 #define ASC_RPGAMXVOL_0DB (0x5)
159 #define ASC_RPGAMX_ENABLE (0x1 << 3) //the right channel PGA output is directly fed into the right mixer
160 #define ASC_RPGAMX_DISABLE (0x0 << 3)
161 #define ASC_ARMXVOL_0DB (0x5 << 4)
162 #define ASC_ARMX_ENABLE (0x1 << 7) //)the right second line input is directly fed into the right mixer
163 #define ASC_ARMX_DISABLE (0x0 << 7)
166 #define ASC_LDAMX_ENABLE (0x1 << 2) //the left differential signal from DAC is directly fed into the left mixer
167 #define ASC_LDAMX_DISABLE (0x0 << 2)
168 #define ASC_RDAMX_ENABLE (0x1 << 3) //the right differential signal from DAC is directly fed into the right mixer
169 #define ASC_RDAMX_DISABLE (0x0 << 3)
170 #define ASC_LSCF_MUTE (0x1 << 4) //the left channel LPF is mute
171 #define ASC_LSCF_ACTIVE (0x0 << 4)
172 #define ASC_RSCF_MUTE (0x1 << 5) //the right channel LPF is mute
173 #define ASC_RSCF_ACTIVE (0x0 << 5)
174 #define ASC_LLPFMX_ENABLE (0x1 << 6) //the left channel LPF output is fed into the left into the mixer
175 #define ASC_LLPFMX_DISABLE (0x0 << 6)
176 #define ASC_RLPFMX_ENABLE (0x1 << 7) //the right channel LPF output is fed into the right into the mixer.
177 #define ASC_RLPFMX_DISABLE (0x0 << 7)
180 #define ASC_OUTPUT_MUTE (0x1 << 6)
181 #define ASC_OUTPUT_ACTIVE (0x0 << 6)
182 #define ASC_CROSSZERO_EN (0x1 << 7)
183 #define ASC_OUTPUT_VOL_0DB (0x0F)
185 #define ASC_MONO_OUTPUT_MUTE (0x1 << 7)
186 #define ASC_MONO_OUTPUT_ACTIVE (0x0 << 7)
187 #define ASC_MONO_CROSSZERO_EN (0x1 << 6)
190 #define ASC_VMDSCL_SLOWEST (0x0 << 2)
191 #define ASC_VMDSCL_SLOW (0x1 << 2)
192 #define ASC_VMDSCL_FAST (0x2 << 2)
193 #define ASC_VMDSCL_FASTEST (0x3 << 2)
195 #define ASC_MICBIAS_09 (0x1 << 4)
196 #define ASC_MICBIAS_06 (0x0 << 4)
198 #define ASC_L2M_ENABLE (0x1 << 5) //the right channel LPF output is fed to mono PA
199 #define ASC_L2M_DISABLE (0x0 << 5)
200 #define ASC_R2M_ENABLE (0x1 << 6) //the left channel LPF output is fed to mono PA
201 #define ASC_R2M_DISABLE (0x0 << 6)
202 #define ASC_CAPLESS_ENABLE (0x1 << 7) //the capless connection is enable
203 #define ASC_CAPLESS_DISABLE (0x0 << 7)
206 #define ASC_DITH_0_DIV (0x0 << 3) //the amplitude setting of the ASDM dither(div=vdd/48)
207 #define ASC_DITH_2_DIV (0x1 << 3)
208 #define ASC_DITH_4_DIV (0x2 << 3)
209 #define ASC_DITH_8_DIV (0x3 << 3)
211 #define ASC_DITH_ENABLE (0x1 << 5) //the ASDM dither is enabled
212 #define ASC_DITH_DISABLE (0x0 << 5)
214 #define ASC_DEM_ENABLE (0x1 << 7) //the ASDM DEM is enabled
215 #define ASC_DEM_DISABLE (0x0 << 7)
218 #define ASC_PDVMID_ENABLE (0x1) //the VMID reference is powered down. VMID is connected to GND
219 #define ASC_PDVMID_DISABLE (0x0)
220 #define ASC_PDSDL_ENABLE (0x1 << 2) //the PGA S2D buffer is power down
221 #define ASC_PDSDL_DISABLE (0x0 << 2)
222 #define ASC_PDBSTL_ENABLE (0x1 << 4) //the micphone input Op-Amp is power down
223 #define ASC_PDBSTL_DISABLE (0x0 << 4)
224 #define ASC_PDPGAL_ENABLE (0x1 << 6) //the PGA is power down
225 #define ASC_PDPGAL_DISABLE (0x0 << 6)
226 #define ASC_PDREF_ENABLE (0x1 << 7) //reference generator is power down
227 #define ASC_PDREF_DISABLE (0x0 << 7)
230 #define ASC_PDPAR_ENABLE (0x1) //the right channel PA is power down
231 #define ASC_PDPAR_DISABLE (0x0)
232 #define ASC_PDPAL_ENABLE (0x1 << 1) //the left channel power amplifier is power down
233 #define ASC_PDPAL_DISABLE (0x0 << 1)
234 #define ASC_PDMIXR_ENABLE (0x1 << 2) //the right mixer is power down
235 #define ASC_PDMIXR_DISABLE (0x0 << 2)
236 #define ASC_PDMIXL_ENABLE (0x1 << 3) //the left mixer is power down
237 #define ASC_PDMIXL_DISABLE (0x0 << 3)
238 #define ASC_PDLPFR_ENABLE (0x1 << 4) //the right RC LPF is power down
239 #define ASC_PDLPFR_DISABLE (0x0 << 4)
240 #define ASC_PDLPFL_ENABLE (0x1 << 5) //the left channel RC LPF is power down
241 #define ASC_PDLPFL_DISABLE (0x0 << 5)
242 #define ASC_PDASDML_ENABLE (0x1 << 7) //the ASDM is power down
243 #define ASC_PDASDML_DISABLE (0x0 << 7)
246 #define ASC_PDSCFR_ENABLE (0x1 << 1) //the right channel DAC is power down
247 #define ASC_PDSCFR_DISABLE (0x0 << 1)
248 #define ASC_PDSCFL_ENABLE (0x1 << 2) //the left channel DAC is power down
249 #define ASC_PDSCFL_DISABLE (0x0 << 2)
250 #define ASC_PDMICB_ENABLE (0x1 << 4) //the micbias is power down
251 #define ASC_PDMICB_DISABLE (0x0 << 4)
252 #define ASC_PDIB_ENABLE (0x1 << 5) //the left channel LPF is power down
253 #define ASC_PDIB_DISABLE (0x0 << 5)
254 #define ASC_PDMIXM_ENABLE (0x1 << 6) //the mon mixer is power down
255 #define ASC_PDMIXM_DISABLE (0x0 << 6)
256 #define ASC_PDPAM_ENABLE (0x1 << 7) //the mono PA is power down.
257 #define ASC_PDPAM_DISABLE (0x0 << 7)
259 #define LINE_2_MIXER_GAIN (0x5) //left and right PA gain
260 #define RK1000_CODEC_NUM_REG 0x20
262 //extern struct snd_soc_dai rk1000_codec_dai;
263 //extern struct snd_soc_codec_device soc_codec_dev_rk1000_codec;