sound/soc/codecs/rk610_codec.c

   1 /*
   2  * rk610.c -- RK610 ALSA SoC audio driver
   3  *
   4  * Copyright (C) 2009 rockchip lhh
   5  *
   6  *
   7  * Based on RK610.c
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/module.h>
  15 #include <linux/moduleparam.h>
  16 #include <linux/init.h>
  17 #include <linux/delay.h>
  18 #include <linux/pm.h>
  19 #include <linux/i2c.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/slab.h>
  22 #include <sound/core.h>
  23 #include <sound/pcm.h>
  24 #include <sound/pcm_params.h>
  25 #include <sound/soc.h>
  26 #include <sound/soc-dapm.h>
  27 #include <sound/initval.h>
  28 #include <mach/gpio.h>
  29 #include <mach/iomux.h>
  30 #include <linux/workqueue.h>
  31 #include "rk610_codec.h"
  32
  33 #define RK610_PROC
  34 #ifdef RK610_PROC
  35 #include <linux/proc_fs.h>
  36 #include <linux/seq_file.h>
  37 #include <linux/vmalloc.h>
  38 #endif
  39
  40 //if you find resume rk610 cannot work,you can try RESUME_PROBLEM 1.
  41 //if rk610 Normal working on RESUME_PROBLEM 1, you must detect Machine other driver queue.
  42 //you can look soc-core.c the resume source.s
  43 #define RESUME_PROBLEM 0
  44
  45 #if defined(CONFIG_ARCH_RK3066B)
  46 #define RK610_SPK_CTRL_PIN  RK30_PIN2_PA0
  47 #elif defined(CONFIG_ARCH_RK30)
  48 #define RK610_SPK_CTRL_PIN  RK30_PIN4_PC6
  49 #else
  50 #define RK610_SPK_CTRL_PIN  RK29_PIN6_PB6
  51 #endif
  52 //1:set pll from rk610
  53 #define RK610_CTL_PLL 0
  54
  55 /*
  56  * Debug
  57  */
  58 #if 0
  59 #define DBG(x...)       printk(KERN_INFO x)
  60 #else
  61 #define DBG(x...)
  62 #endif
  63
  64 //it can change rk610 output volume
  65 //0x0000 ~ 0xFFFF
  66 #define Volume_Output 0xF42
  67 //it can change rk610 input volume
  68 //0x00 ~ 0x0E
  69 #define Volume_Input 0x07
  70
  71 #define OUT_CAPLESS  (1)   //ÊÇ·ñÎªÎÞµçÈÝÊä³ö£¬1:ÎÞµçÈÝÊä³ö£¬0:ÓÐµçÈÝÊä³ö
  72
  73 static u32 gVolReg = 0x00;  ///0x0f; //ÓÃÓÚ¼ÇÂ¼ÒôÁ¿¼Ä´æÆ÷
  74 //static u32 gCodecVol = 0x0f;
  75 static u8 gR0AReg = 0;  //ÓÃÓÚ¼ÇÂ¼R0A¼Ä´æÆ÷µÄÖµ£¬ÓÃÓÚ¸Ä±ä²ÉÑùÂÊÇ°Í¨¹ýR0AÍ£Ö¹clk
  76 static u8 gR0BReg = 0;  //ÓÃÓÚ¼ÇÂ¼R0B¼Ä´æÆ÷µÄÖµ£¬ÓÃÓÚ¸Ä±ä²ÉÑùÂÊÇ°Í¨¹ýR0BÍ£Ö¹interplateºÍdecimation
  77 //static u8 gR1314Reg = 0;  //ÓÃÓÚ¼ÇÂ¼R13,R14¼Ä´æÆ÷µÄÖµ£¬ÓÃÓÚFMÒôÁ¿Îª0Ê±
  78
  79 /*
  80  * rk610 register cache
  81  * We can't read the RK610 register space when we
  82  * are using 2 wire for device control, so we cache them instead.
  83  */
  84 static const u16 rk610_codec_reg[] = {
  85         0x0005, 0x0004, 0x00fd, 0x00f3,  /*  0 */
  86         0x0003, 0x0000, 0x0000, 0x0000,  /*  4 */
  87         0x0000, 0x0005, 0x0000, 0x0000,  /*  8 */
  88         0x0097, 0x0097, 0x0097, 0x0097,  /* 12 */
  89         0x0097, 0x0097, 0x00cc, 0x0000,  /* 16 */
  90         0x0000, 0x00f1, 0x0090, 0x00ff,  /* 20 */
  91         0x00ff, 0x00ff, 0x009c, 0x0000,  /* 24 */
  92         0x0000, 0x00ff, 0x00ff, 0x00ff,  /* 28 */
  93 };
  94
  95 static struct snd_soc_codec *rk610_codec_codec;
  96 /* codec private data */
  97 struct rk610_codec_priv {
  98         enum snd_soc_control_type control_type;
  99         unsigned int sysclk;
 100         struct snd_soc_codec codec;
 101         struct snd_pcm_hw_constraint_list *sysclk_constraints;
 102         u16 reg_cache[RK610_CODEC_NUM_REG];
 103
 104         struct delayed_work rk610_delayed_work;
 105         unsigned int spk_ctrl_io;
 106         bool hdmi_ndet;
 107 #if RESUME_PROBLEM
 108         int rk610_workstatus;
 109 #endif
 110 };
 111
 112 void codec_set_spk(bool on)
 113 {
 114         struct rk610_codec_priv *rk610_codec;
 115         if(!rk610_codec_codec)
 116                 return;
 117
 118         rk610_codec=snd_soc_codec_get_drvdata(rk610_codec_codec);
 119         if(!rk610_codec)
 120                 return;
 121
 122         rk610_codec->hdmi_ndet = on;
 123         if(on)
 124                 gpio_set_value(RK610_SPK_CTRL_PIN, GPIO_HIGH);
 125         else
 126                 gpio_set_value(RK610_SPK_CTRL_PIN, GPIO_LOW);
 127 }
 128 EXPORT_SYMBOL(codec_set_spk);
 129
 130 /*
 131  * read rk610 register cache
 132  */
 133 static inline unsigned int rk610_codec_read_reg_cache(struct snd_soc_codec *codec,
 134         unsigned int reg)
 135 {
 136         u16 *cache = codec->reg_cache;
 137         if (reg > RK610_CACHE_REGNUM)
 138                 return -1;
 139         return cache[reg];
 140 }
 141
 142 static unsigned int rk610_codec_read(struct snd_soc_codec *codec, unsigned int r)
 143 {
 144         struct i2c_msg xfer[1];
 145         u8 reg = r;
 146         int ret;
 147         struct i2c_client *client = codec->control_data;
 148
 149         /* Read register */
 150         xfer[0].addr = (client->addr& 0x60)|(reg);
 151         xfer[0].flags = I2C_M_RD;
 152         xfer[0].len = 1;
 153         xfer[0].buf = &reg;
 154         xfer[0].scl_rate = 100000;
 155         ret = i2c_transfer(client->adapter, xfer, 1);
 156         if (ret != 1) {
 157                 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
 158                 return 0;
 159         }
 160
 161         return reg;
 162 }
 163
 164 /*
 165  * write rk610 register cache
 166  */
 167 static inline void rk610_codec_write_reg_cache(struct snd_soc_codec *codec,
 168         unsigned int reg, unsigned int value)
 169 {
 170         u16 *cache = codec->reg_cache;
 171         if (reg > RK610_CACHE_REGNUM)
 172                 return;
 173         cache[reg] = value;
 174 }
 175
 176 static int rk610_codec_write(struct snd_soc_codec *codec, unsigned int reg,
 177         unsigned int value)
 178 {
 179         u8 data[2];
 180         struct i2c_client *i2c;
 181         DBG("Enter::%s, %d, reg=0x%02X, value=0x%02X\n",__FUNCTION__,__LINE__, reg, value);
 182         data[0] = value & 0x00ff;
 183         rk610_codec_write_reg_cache (codec, reg, value);
 184         i2c = (struct i2c_client *)codec->control_data;
 185         i2c->addr = (i2c->addr & 0x60)|reg;
 186
 187         if (codec->hw_write(codec->control_data, data, 1) == 1){
 188 //              DBG("================%s %d Run OK================\n",__FUNCTION__,__LINE__);
 189                 return 0;
 190         }else{
 191                 DBG("================%s %d Run EIO================\n",__FUNCTION__,__LINE__);
 192                 return -EIO;
 193         }
 194 }
 195
 196 void rk610_codec_reg_read(void)
 197 {
 198     struct snd_soc_codec *codec = rk610_codec_codec;
 199     int i;
 200     unsigned int data;
 201
 202     for (i=0; i<=0x1f; i++){
 203         data = rk610_codec_read(codec, i);
 204         printk("reg[0x%x]=0x%x\n",i,data);
 205     }
 206 }
 207
 208 static void spk_ctrl_fun(int status)
 209 {
 210         struct rk610_codec_priv *rk610_codec =snd_soc_codec_get_drvdata(rk610_codec_codec);
 211
 212         if(rk610_codec->spk_ctrl_io)
 213         {
 214                 DBG("--------%s----------status = %d\n",__FUNCTION__,status);
 215                 gpio_set_value(rk610_codec->spk_ctrl_io, status);
 216         }
 217 }
 218
 219 struct _coeff_div {
 220         u32 mclk;
 221         u32 rate;
 222         u16 fs;
 223         u8 sr:5;
 224         u8 usb:1;
 225         u8 bclk;
 226 };
 227
 228 /* codec hifi mclk clock divider coefficients */
 229 static const struct _coeff_div coeff_div[] = {
 230         /* 8k */
 231         {12288000, 8000, 1536, 0x6, 0x0,ASC_BCLKDIV_16},
 232         {11289600, 8000, 1408, 0x16, 0x0,ASC_BCLKDIV_16},
 233         {18432000, 8000, 2304, 0x7, 0x0,ASC_BCLKDIV_16},
 234         {16934400, 8000, 2112, 0x17, 0x0,ASC_BCLKDIV_16},
 235         {8192000, 8000, 1024, 0x0, 0x0,ASC_BCLKDIV_16},
 236         {12000000, 8000, 1500, 0x6, 0x1,ASC_BCLKDIV_16},
 237
 238         /* 11.025k */
 239         {11289600, 11025, 1024, 0x18, 0x0,ASC_BCLKDIV_16},
 240         {16934400, 11025, 1536, 0x19, 0x0,ASC_BCLKDIV_16},
 241         {12000000, 11025, 1088, 0x19, 0x1,ASC_BCLKDIV_16},
 242
 243     /* 12k */
 244         {12288000, 12000, 1024, 0x8, 0x0,ASC_BCLKDIV_16},
 245         {18432000, 12000, 1536, 0x9, 0x0,ASC_BCLKDIV_16},
 246         {12000000, 12000, 1000, 0x8, 0x1,ASC_BCLKDIV_16},
 247
 248         /* 16k */
 249         {12288000, 16000, 768, 0xa, 0x0,ASC_BCLKDIV_8},
 250         {18432000, 16000, 1152, 0xb, 0x0,ASC_BCLKDIV_8},
 251         {12000000, 16000, 750, 0xa, 0x1,ASC_BCLKDIV_8},
 252
 253         /* 22.05k */
 254         {11289600, 22050, 512, 0x1a, 0x0,ASC_BCLKDIV_8},
 255         {16934400, 22050, 768, 0x1b, 0x0,ASC_BCLKDIV_8},
 256         {12000000, 22050, 544, 0x1b, 0x1,ASC_BCLKDIV_8},
 257
 258     /* 24k */
 259         {12288000, 24000, 512, 0x1c, 0x0,ASC_BCLKDIV_8},
 260         {18432000, 24000, 768, 0x1d, 0x0,ASC_BCLKDIV_8},
 261         {12000000, 24000, 500, 0x1c, 0x1,ASC_BCLKDIV_8},
 262
 263         /* 32k */
 264         {12288000, 32000, 384, 0xc, 0x0,ASC_BCLKDIV_8},
 265         {18432000, 32000, 576, 0xd, 0x0,ASC_BCLKDIV_8},
 266         {12000000, 32000, 375, 0xa, 0x1,ASC_BCLKDIV_8},
 267
 268         /* 44.1k */
 269         {11289600, 44100, 256, 0x10, 0x0,ASC_BCLKDIV_4},
 270         {16934400, 44100, 384, 0x11, 0x0,ASC_BCLKDIV_8},
 271         {12000000, 44100, 272, 0x11, 0x1,ASC_BCLKDIV_8},
 272
 273         /* 48k */
 274         {12288000, 48000, 256, 0x0, 0x0,ASC_BCLKDIV_4},
 275         {18432000, 48000, 384, 0x1, 0x0,ASC_BCLKDIV_4},
 276         {12000000, 48000, 250, 0x0, 0x1,ASC_BCLKDIV_4},
 277
 278         /* 88.2k */
 279         {11289600, 88200, 128, 0x1e, 0x0,ASC_BCLKDIV_4},
 280         {16934400, 88200, 192, 0x1f, 0x0,ASC_BCLKDIV_4},
 281         {12000000, 88200, 136, 0x1f, 0x1,ASC_BCLKDIV_4},
 282
 283         /* 96k */
 284         {12288000, 96000, 128, 0xe, 0x0,ASC_BCLKDIV_4},
 285         {18432000, 96000, 192, 0xf, 0x0,ASC_BCLKDIV_4},
 286         {12000000, 96000, 125, 0xe, 0x1,ASC_BCLKDIV_4},
 287 };
 288
 289 static inline int get_coeff(int mclk, int rate)
 290 {
 291         int i;
 292
 293         for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
 294                 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
 295                         return i;
 296         }
 297
 298         return -EINVAL;
 299 }
 300
 301 /* The set of rates we can generate from the above for each SYSCLK */
 302
 303 static unsigned int rates_12288[] = {
 304         8000, 12000, 16000, 24000, 24000, 32000, 48000, 96000,
 305 };
 306
 307 static struct snd_pcm_hw_constraint_list constraints_12288 = {
 308         .count  = ARRAY_SIZE(rates_12288),
 309         .list   = rates_12288,
 310 };
 311
 312 static unsigned int rates_112896[] = {
 313         8000, 11025, 22050, 44100,
 314 };
 315
 316 static struct snd_pcm_hw_constraint_list constraints_112896 = {
 317         .count  = ARRAY_SIZE(rates_112896),
 318         .list   = rates_112896,
 319 };
 320
 321 static unsigned int rates_12[] = {
 322         8000, 11025, 12000, 16000, 22050, 2400, 32000, 41100, 48000,
 323         48000, 88235, 96000,
 324 };
 325
 326 static struct snd_pcm_hw_constraint_list constraints_12 = {
 327         .count  = ARRAY_SIZE(rates_12),
 328         .list   = rates_12,
 329 };
 330
 331 static int rk610_codec_set_bias_level(struct snd_soc_codec *codec,
 332                                  enum snd_soc_bias_level level)
 333 {
 334         struct rk610_codec_priv *rk610_codec =snd_soc_codec_get_drvdata(codec);
 335         DBG("Enter::%s----%d now_level =%d  old_level = %d\n",__FUNCTION__,__LINE__,level,codec->dapm.bias_level);
 336         switch (level) {
 337         case SND_SOC_BIAS_ON:
 338                 break;
 339         case SND_SOC_BIAS_PREPARE:
 340                 /* VREF, VMID=2x50k, digital enabled */
 341         //      rk610_codec_write(codec, ACCELCODEC_R1D, pwr_reg | 0x0080);
 342                 break;
 343
 344         case SND_SOC_BIAS_STANDBY:
 345 #if RESUME_PROBLEM
 346                 if(rk610_codec->rk610_workstatus == SND_SOC_DAPM_STREAM_RESUME)
 347                 {
 348                         DBG("rk610 is resume,have not into standby\n");
 349                         rk610_codec->rk610_workstatus = SND_SOC_DAPM_STREAM_NOP;
 350                         break;
 351                 }
 352 #endif
 353                 printk("rk610 standby\n");
 354                 spk_ctrl_fun(GPIO_LOW);
 355                 rk610_codec_write(codec, ACCELCODEC_R1D, 0xFE);
 356                 rk610_codec_write(codec, ACCELCODEC_R1E, 0xFF);
 357                 rk610_codec_write(codec, ACCELCODEC_R1F, 0xFF);
 358                 break;
 359
 360         case SND_SOC_BIAS_OFF:
 361                 printk("rk610 power off\n");
 362                 spk_ctrl_fun(GPIO_LOW);
 363                 rk610_codec_write(codec, ACCELCODEC_R1D, 0xFF);
 364                 rk610_codec_write(codec, ACCELCODEC_R1E, 0xFF);
 365                 rk610_codec_write(codec, ACCELCODEC_R1F, 0xFF);
 366                 break;
 367         }
 368
 369         codec->dapm.bias_level = level;
 370
 371         return 0;
 372 }
 373
 374 /*
 375  * Note that this should be called from init rather than from hw_params.
 376  */
 377 static int rk610_codec_set_dai_sysclk(struct snd_soc_dai *codec_dai,
 378                 int clk_id, unsigned int freq, int dir)
 379 {
 380         struct snd_soc_codec *codec = codec_dai->codec;
 381
 382         struct rk610_codec_priv *rk610_codec =snd_soc_codec_get_drvdata(codec);
 383
 384         DBG("Enter::%s----%d\n",__FUNCTION__,__LINE__);
 385
 386 #ifdef RK610_CTL_PLL
 387         if(rk610_codec_pll_set(freq))
 388                 return -EINVAL;
 389 #endif
 390         switch (freq) {
 391         case 11289600:
 392         case 18432000:
 393         case 22579200:
 394         case 36864000:
 395                 rk610_codec->sysclk_constraints = &constraints_112896;
 396                 rk610_codec->sysclk = freq;
 397                 break;
 398
 399         case 12288000:
 400         case 16934400:
 401         case 24576000:
 402         case 33868800:
 403                 rk610_codec->sysclk_constraints = &constraints_12288;
 404                 rk610_codec->sysclk = freq;
 405                 break;
 406
 407         case 12000000:
 408         case 24000000:
 409                 rk610_codec->sysclk_constraints = &constraints_12;
 410                 rk610_codec->sysclk = freq;
 411                 break;
 412         default:
 413                 return -EINVAL;
 414         }
 415         return 0;
 416 }
 417
 418 static int rk610_codec_set_dai_fmt(struct snd_soc_dai *codec_dai,
 419                 unsigned int fmt)
 420 {
 421         struct snd_soc_codec *codec = codec_dai->codec;
 422         struct rk610_codec_priv *rk610_codec =snd_soc_codec_get_drvdata(codec);
 423         u16 iface = 0;
 424
 425         spk_ctrl_fun(GPIO_LOW);
 426         rk610_codec_write(codec,ACCELCODEC_R1D, 0x2a);  //setup Vmid and Vref, other module power down
 427         rk610_codec_write(codec,ACCELCODEC_R1E, 0x40);  ///|ASC_PDASDML_ENABLE);
 428
 429         /* set master/slave audio interface */
 430         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 431         case SND_SOC_DAIFMT_CBM_CFM:
 432                 iface = 0x0040;
 433                 break;
 434         case SND_SOC_DAIFMT_CBS_CFS:
 435                 iface = 0x0000;
 436                 break;
 437         default:
 438                 return -EINVAL;
 439         }
 440
 441         /* interface format */
 442         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 443         case SND_SOC_DAIFMT_I2S:
 444                 iface |= 0x0002;
 445                 break;
 446         case SND_SOC_DAIFMT_RIGHT_J:
 447                 break;
 448         case SND_SOC_DAIFMT_LEFT_J:
 449                 iface |= 0x0001;
 450                 break;
 451         case SND_SOC_DAIFMT_DSP_A:
 452                 iface |= 0x0003;
 453                 break;
 454         case SND_SOC_DAIFMT_DSP_B:
 455                 iface |= 0x0013;
 456                 break;
 457         default:
 458                 return -EINVAL;
 459         }
 460
 461         /* clock inversion */
 462         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 463         case SND_SOC_DAIFMT_NB_NF:
 464                 break;
 465         case SND_SOC_DAIFMT_IB_IF:
 466                 iface |= 0x0090;
 467                 break;
 468         case SND_SOC_DAIFMT_IB_NF:
 469                 iface |= 0x0080;
 470                 break;
 471         case SND_SOC_DAIFMT_NB_IF:
 472                 iface |= 0x0010;
 473                 break;
 474         default:
 475                 return -EINVAL;
 476         }
 477
 478         DBG("Enter::%s----%d  iface=%x\n",__FUNCTION__,__LINE__,iface);
 479         rk610_codec_write(codec, ACCELCODEC_R09, iface);
 480         return 0;
 481 }
 482
 483 static int rk610_codec_pcm_hw_params(struct snd_pcm_substream *substream,
 484                                 struct snd_pcm_hw_params *params,
 485                                 struct snd_soc_dai *dai)
 486 {
 487         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 488         struct snd_soc_codec *codec = rtd->codec;
 489         struct rk610_codec_priv *rk610_codec =snd_soc_codec_get_drvdata(codec);
 490
 491         u16 iface = rk610_codec_read_reg_cache(codec, ACCELCODEC_R09) & 0x1f3;
 492         u16 srate = rk610_codec_read_reg_cache(codec, ACCELCODEC_R00) & 0x180;
 493         int coeff;
 494
 495         coeff = get_coeff(rk610_codec->sysclk, params_rate(params));
 496         DBG("Enter::%s----%d  rk610_codec->sysclk=%d coeff = %d\n",__FUNCTION__,__LINE__,rk610_codec->sysclk, coeff);
 497         /* bit size */
 498         switch (params_format(params)) {
 499         case SNDRV_PCM_FORMAT_S16_LE:
 500                 break;
 501         case SNDRV_PCM_FORMAT_S20_3LE:
 502                 iface |= 0x0004;
 503                 break;
 504         case SNDRV_PCM_FORMAT_S24_LE:
 505                 iface |= 0x0008;
 506                 break;
 507         case SNDRV_PCM_FORMAT_S32_LE:
 508                 iface |= 0x000c;
 509                 break;
 510         }
 511         DBG("Enter::%s----%d  iface=%x srate =%x rate=%d\n",__FUNCTION__,__LINE__,iface,srate,params_rate(params));
 512
 513 //      rk610_codec_write(codec,ACCELCODEC_R0C, 0x17);
 514         rk610_codec_write(codec,ACCELCODEC_R04, ASC_INT_MUTE_L|ASC_INT_MUTE_R|ASC_SIDETONE_L_OFF|ASC_SIDETONE_R_OFF);   //soft mute
 515         //±ØÐëÏÈ½«clkºÍEN_INT¶¼disableµô£¬·ñÔòÇÐ»»bclk·ÖÆµÖµ¿ÉÄÜµ¼ÖÂcodecÄÚ²¿Ê±Ðò»ìÂÒµô£¬
 516         //±íÏÖ³öÀ´µÄÏÖÏóÊÇ£¬ÒÔºóµÄÒôÀÖ¶¼±ä³ÉÁËÔëÒô£¬¶øÇÒ¾ÍËã°ÑÊäÈëcodecµÄI2S_DATAOUT¶Ï¿ªÒ²Ò»Ñù³öÔëÒô
 517         rk610_codec_write(codec,ACCELCODEC_R0B, ASC_DEC_DISABLE|ASC_INT_DISABLE);  //0x00
 518
 519         /* set iface & srate */
 520         #ifdef CONFIG_SND_RK29_CODEC_SOC_MASTER
 521         iface |= ASC_INVERT_BCLK;//·×ªBCLK  master×´Ì¬ËÍ³öµÄÉÙÁË°ë¸öÊ±ÖÓ£¬µ¼ÖÂÎ´µ½×î´óÒôÁ¿µÄÊ±ºòÆÆÒô¡¢
 522         #endif
 523         rk610_codec_write(codec, ACCELCODEC_R09, iface);
 524         if (coeff >= 0){
 525             rk610_codec_write(codec, ACCELCODEC_R00, srate|coeff_div[coeff].bclk);
 526                 rk610_codec_write(codec, ACCELCODEC_R0A, (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb|ASC_CLKNODIV|ASC_CLK_ENABLE);
 527         }
 528         rk610_codec_write(codec,ACCELCODEC_R0B, gR0BReg);
 529
 530         return 0;
 531 }
 532
 533 static int rk610_codec_mute(struct snd_soc_dai *dai, int mute)
 534 {
 535     struct snd_soc_codec *codec = dai->codec;
 536         struct rk610_codec_priv *rk610_codec =snd_soc_codec_get_drvdata(codec);
 537     DBG("Enter::%s----%d--mute=%d\n",__FUNCTION__,__LINE__,mute);
 538
 539     if (mute)
 540         {
 541                 rk610_codec_write(codec,ACCELCODEC_R17, 0xFF);  //AOL
 542                 rk610_codec_write(codec,ACCELCODEC_R18, 0xFF);  //AOR
 543         rk610_codec_write(codec,ACCELCODEC_R19, 0xFF);  //AOM
 544         rk610_codec_write(codec,ACCELCODEC_R04, ASC_INT_MUTE_L|ASC_INT_MUTE_R|ASC_SIDETONE_L_OFF|ASC_SIDETONE_R_OFF);  //soft mute
 545         //add for standby
 546         //      if(!dai->capture_active)
 547         //      {
 548         //              rk610_codec_write(codec, ACCELCODEC_R1D, 0xFE);
 549         //              rk610_codec_write(codec, ACCELCODEC_R1E, 0xFF);
 550         //              rk610_codec_write(codec, ACCELCODEC_R1F, 0xFF);
 551         //      }
 552     }
 553         else
 554         {
 555         //      rk610_codec_write(codec,ACCELCODEC_R1D, 0x2a);  //setup Vmid and Vref, other module power down
 556         //      rk610_codec_write(codec,ACCELCODEC_R1E, 0x40);  ///|ASC_PDASDML_ENABLE);
 557                 rk610_codec_write(codec,ACCELCODEC_R17, gVolReg|ASC_OUTPUT_ACTIVE|ASC_CROSSZERO_EN);  //AOL gVolReg|ASC_OUTPUT_ACTIVE|ASC_CROSSZERO_EN);  //AOL
 558                 rk610_codec_write(codec,ACCELCODEC_R18, gVolReg|ASC_OUTPUT_ACTIVE|ASC_CROSSZERO_EN); //gVolReg|ASC_OUTPUT_ACTIVE|ASC_CROSSZERO_EN);  //AOR
 559         rk610_codec_write(codec,ACCELCODEC_R04, ASC_INT_ACTIVE_L|ASC_INT_ACTIVE_R|ASC_SIDETONE_L_OFF|ASC_SIDETONE_R_OFF);
 560                 rk610_codec_write(codec,ACCELCODEC_R19, 0x7F);  //AOM
 561                 msleep(300);
 562                 #if OUT_CAPLESS
 563         rk610_codec_write(codec,ACCELCODEC_R1F, 0x09|ASC_PDMIXM_ENABLE);
 564         #else
 565         rk610_codec_write(codec,ACCELCODEC_R1F, 0x09|ASC_PDMIXM_ENABLE|ASC_PDPAM_ENABLE);
 566                 #endif
 567         //      schedule_delayed_work(&rk610_codec->rk610_delayed_work, 0);
 568         //      rk610_codec_reg_read();
 569                 if(rk610_codec->hdmi_ndet)
 570                         spk_ctrl_fun(GPIO_HIGH);
 571     }
 572
 573     return 0;
 574 }
 575
 576 static void rk610_delayedwork_fun(struct work_struct *work)
 577 {
 578     struct snd_soc_codec *codec = rk610_codec_codec;
 579         DBG("--------%s----------\n",__FUNCTION__);
 580
 581         #if OUT_CAPLESS
 582         rk610_codec_write(codec,ACCELCODEC_R1F, 0x09|ASC_PDMIXM_ENABLE);
 583         #else
 584         rk610_codec_write(codec,ACCELCODEC_R1F, 0x09|ASC_PDMIXM_ENABLE|ASC_PDPAM_ENABLE);
 585         #endif
 586         spk_ctrl_fun(GPIO_HIGH);
 587 }
 588
 589 static struct snd_soc_dai_ops rk610_codec_ops = {
 590         .hw_params = rk610_codec_pcm_hw_params,
 591         .set_fmt = rk610_codec_set_dai_fmt,
 592         .set_sysclk = rk610_codec_set_dai_sysclk,
 593         .digital_mute = rk610_codec_mute,
 594 };
 595
 596 #define RK610_CODEC_RATES SNDRV_PCM_RATE_8000_96000
 597 #define RK610_CODEC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
 598                                                         SNDRV_PCM_FMTBIT_S24_LE)
 599
 600 static struct snd_soc_dai_driver rk610_codec_dai = {
 601         .name = "rk610_codec",
 602         .playback = {
 603                 .stream_name = "Playback",
 604                 .channels_min = 1,
 605                 .channels_max = 2,
 606                 .rates = RK610_CODEC_RATES,
 607                 .formats = RK610_CODEC_FORMATS,
 608         },
 609         .capture = {
 610                 .stream_name = "Capture",
 611                 .channels_min = 1,
 612                 .channels_max = 2,
 613                 .rates = RK610_CODEC_RATES,
 614                 .formats = RK610_CODEC_FORMATS,
 615          },
 616         .ops = &rk610_codec_ops,
 617         .symmetric_rates = 1,
 618 };
 619
 620 static int rk610_codec_suspend(struct snd_soc_codec *codec, pm_message_t state)
 621 {
 622         DBG("Enter::%s----%d\n",__FUNCTION__,__LINE__);
 623         rk610_codec_set_bias_level(codec, SND_SOC_BIAS_OFF);
 624 //      rk610_codec_reg_read();
 625         return 0;
 626 }
 627
 628 static int rk610_codec_resume(struct snd_soc_codec *codec)
 629 {
 630         struct rk610_codec_priv *rk610_codec =snd_soc_codec_get_drvdata(codec);
 631
 632         DBG("Enter::%s----%d\n",__FUNCTION__,__LINE__);
 633         /* Sync reg_cache with the hardware */
 634
 635 //      rk610_codec_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 636 #if RESUME_PROBLEM
 637         rk610_codec->rk610_workstatus = SND_SOC_DAPM_STREAM_RESUME;
 638 #endif
 639         return 0;
 640 }
 641
 642 #define USE_MIC_IN
 643 #define USE_LPF
 644 void rk610_codec_reg_set(void)
 645 {
 646     struct snd_soc_codec *codec = rk610_codec_codec;
 647     unsigned int digital_gain;
 648         unsigned int mic_vol = Volume_Input;
 649         rk610_codec_write(codec,ACCELCODEC_R1D, 0x30);
 650         rk610_codec_write(codec,ACCELCODEC_R1E, 0x40);
 651
 652 #ifdef USE_LPF
 653         // Route R-LPF->R-Mixer, L-LPF->L-Mixer
 654         rk610_codec_write(codec,ACCELCODEC_R15, 0xC1);
 655 #else
 656         // Route RDAC->R-Mixer, LDAC->L->Mixer
 657         rk610_codec_write(codec,ACCELCODEC_R15, 0x0C);
 658 #endif
 659         // With Cap Output, VMID ramp up slow
 660         rk610_codec_write(codec,ACCELCODEC_R1A, 0x14);
 661     mdelay(10);
 662
 663         rk610_codec_write(codec,ACCELCODEC_R0C, 0x10|ASC_INPUT_VOL_0DB);   //LIL
 664     rk610_codec_write(codec,ACCELCODEC_R0D, 0x10|ASC_INPUT_VOL_0DB);   //LIR
 665
 666 #ifdef USE_MIC_IN
 667         if(mic_vol > 0x07)
 668         {
 669                 rk610_codec_write(codec,ACCELCODEC_R12, 0x4c|ASC_MIC_INPUT|ASC_MIC_BOOST_20DB);   //Select MIC input
 670                 mic_vol -= 0x07;
 671         }
 672         else
 673                 rk610_codec_write(codec,ACCELCODEC_R12, 0x4c|ASC_MIC_INPUT);   //Select MIC input
 674     rk610_codec_write(codec,ACCELCODEC_R1C, ASC_DEM_ENABLE);  //0x00);  //use default value
 675 #else
 676     rk610_codec_write(codec,ACCELCODEC_R12, 0x4c);   //Select Line input
 677 #endif
 678
 679     rk610_codec_write(codec,ACCELCODEC_R0E, 0x10|mic_vol);   //MIC
 680
 681         // Diable route PGA->R/L Mixer, PGA gain 0db.
 682     rk610_codec_write(codec,ACCELCODEC_R13, 0x05 | 0 << 3);
 683     rk610_codec_write(codec,ACCELCODEC_R14, 0x05 | 0 << 3);
 684
 685     //2soft mute
 686     rk610_codec_write(codec,ACCELCODEC_R04, ASC_INT_MUTE_L|ASC_INT_MUTE_R|ASC_SIDETONE_L_OFF|ASC_SIDETONE_R_OFF);   //soft mute
 687
 688     //2set default SR and clk
 689     rk610_codec_write(codec,ACCELCODEC_R0A, ASC_NORMAL_MODE|(0x10 << 1)|ASC_CLKNODIV|ASC_CLK_DISABLE);
 690     gR0AReg = ASC_NORMAL_MODE|(0x10 << 1)|ASC_CLKNODIV|ASC_CLK_DISABLE;
 691     //2Config audio  interface
 692     rk610_codec_write(codec,ACCELCODEC_R09, ASC_I2S_MODE|ASC_16BIT_MODE|ASC_NORMAL_LRCLK|ASC_LRSWAP_DISABLE|ASC_MASTER_MODE|ASC_NORMAL_BCLK);
 693     rk610_codec_write(codec,ACCELCODEC_R00, ASC_HPF_ENABLE|ASC_DSM_MODE_DISABLE|ASC_SCRAMBLE_DISABLE|ASC_DITHER_ENABLE|ASC_BCLKDIV_4);
 694     //2volume,input,output
 695     digital_gain = Volume_Output;
 696     rk610_codec_write(codec,ACCELCODEC_R05, (digital_gain >> 8) & 0xFF);
 697     rk610_codec_write(codec,ACCELCODEC_R06, digital_gain & 0xFF);
 698     rk610_codec_write(codec,ACCELCODEC_R07, (digital_gain >> 8) & 0xFF);
 699     rk610_codec_write(codec,ACCELCODEC_R08, digital_gain & 0xFF);
 700
 701     rk610_codec_write(codec,ACCELCODEC_R0B, ASC_DEC_ENABLE|ASC_INT_ENABLE);
 702     gR0BReg = ASC_DEC_ENABLE|ASC_INT_ENABLE;  //ASC_DEC_DISABLE|ASC_INT_ENABLE;
 703
 704
 705 //      #if OUT_CAPLESS
 706 //      rk610_codec_write(codec,ACCELCODEC_R1F, 0x09|ASC_PDMIXM_ENABLE);
 707 //      #else
 708 //      rk610_codec_write(codec,ACCELCODEC_R1F, 0x09|ASC_PDMIXM_ENABLE|ASC_PDPAM_ENABLE);
 709 //      #endif
 710 }
 711
 712 #ifdef RK610_PROC
 713 static int RK610_PROC_init(void);
 714 #endif
 715
 716 static int rk610_codec_probe(struct snd_soc_codec *codec)
 717 {
 718         struct rk610_codec_priv *rk610_codec = snd_soc_codec_get_drvdata(codec);
 719         int ret;
 720
 721 #ifdef RK610_PROC
 722         RK610_PROC_init();
 723 #endif
 724         rk610_codec_codec = codec;
 725         DBG("[%s] start\n", __FUNCTION__);
 726         ret = snd_soc_codec_set_cache_io(codec, 8, 16, rk610_codec->control_type);
 727         if (ret != 0) {
 728                 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
 729                 return ret;
 730         }
 731         //For RK610, i2c write&read method is special, do not use system default method.
 732         codec->write = rk610_codec_write;
 733         codec->read = rk610_codec_read;
 734         codec->hw_write = (hw_write_t)i2c_master_send;
 735
 736         if (rk610_codec_codec == NULL) {
 737                 dev_err(codec->dev, "Codec device not registered\n");
 738                 return -ENODEV;
 739         }
 740
 741         INIT_DELAYED_WORK(&rk610_codec->rk610_delayed_work, rk610_delayedwork_fun);
 742
 743 #ifdef RK610_SPK_CTRL_PIN
 744         rk610_codec->spk_ctrl_io = RK610_SPK_CTRL_PIN;
 745         ret = gpio_request(rk610_codec->spk_ctrl_io, "rk610 spk_ctrl");
 746     if (ret){
 747         printk("rk610_control request gpio fail!\n");
 748                 return ret;
 749     }
 750     gpio_direction_output(rk610_codec->spk_ctrl_io, GPIO_LOW);
 751     gpio_set_value(rk610_codec->spk_ctrl_io, GPIO_LOW);
 752 #else
 753         rk610_codec->spk_ctrl_io = 0;
 754 #endif
 755         rk610_codec->hdmi_ndet = true;
 756 #if RESUME_PROBLEM
 757         rk610_codec->rk610_workstatus = SND_SOC_DAPM_STREAM_NOP;
 758 #endif
 759
 760     rk610_control_init_codec();
 761     rk610_codec_reg_set();
 762 //      rk610_codec_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 763         schedule_delayed_work(&rk610_codec->rk610_delayed_work, msecs_to_jiffies(1000));
 764
 765         codec->dapm.bias_level = SND_SOC_BIAS_PREPARE;
 766         return ret;
 767 }
 768
 769 /* power down chip */
 770 static int rk610_codec_remove(struct snd_soc_codec *codec)
 771 {
 772         rk610_codec_set_bias_level(codec, SND_SOC_BIAS_OFF);
 773         return 0;
 774 }
 775
 776 static struct snd_soc_codec_driver soc_codec_dev_rk610_codec = {
 777         .probe =        rk610_codec_probe,
 778         .remove =       rk610_codec_remove,
 779         .suspend =      rk610_codec_suspend,
 780         .resume =       rk610_codec_resume,
 781         .set_bias_level = rk610_codec_set_bias_level,
 782 //      .volatile_register = wm8900_volatile_register,
 783         .reg_cache_size = ARRAY_SIZE(rk610_codec_reg),
 784         .reg_word_size = sizeof(u16),
 785         .reg_cache_default = rk610_codec_reg,
 786 //      .dapm_widgets = rk610_codec_dapm_widgets,
 787 //      .num_dapm_widgets = ARRAY_SIZE(rk610_codec_dapm_widgets),
 788 //      .dapm_routes = audio_map,
 789 //      .num_dapm_routes = ARRAY_SIZE(audio_map),
 790 };
 791
 792 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 793 static int rk610_codec_i2c_probe(struct i2c_client *i2c,
 794                             const struct i2c_device_id *id)
 795 {
 796         struct rk610_codec_priv *rk610_codec;
 797         int ret;
 798         DBG("%s start\n", __FUNCTION__);
 799         rk610_codec = kzalloc(sizeof(struct rk610_codec_priv), GFP_KERNEL);
 800         if (rk610_codec == NULL)
 801                 return -ENOMEM;
 802
 803         i2c_set_clientdata(i2c, rk610_codec);
 804         rk610_codec->control_type = SND_SOC_I2C;
 805
 806         ret =  snd_soc_register_codec(&i2c->dev,
 807                         &soc_codec_dev_rk610_codec, &rk610_codec_dai, 1);
 808         if (ret < 0) {
 809                 dev_err(&i2c->dev, "Failed to register codec: %d\n", ret);
 810                 kfree(rk610_codec);
 811         }
 812         return ret;
 813 }
 814
 815 static int rk610_codec_i2c_remove(struct i2c_client *client)
 816 {
 817         snd_soc_unregister_codec(&client->dev);
 818         kfree(i2c_get_clientdata(client));
 819         return 0;
 820 }
 821
 822 static const struct i2c_device_id rk610_codec_i2c_id[] = {
 823         { "rk610_i2c_codec", 0 },
 824         { }
 825 };
 826 MODULE_DEVICE_TABLE(i2c, rk610_codec_i2c_id);
 827
 828 /* corgi i2c codec control layer */
 829 static struct i2c_driver rk610_codec_i2c_driver = {
 830         .driver = {
 831                 .name = "RK610_CODEC",
 832                 .owner = THIS_MODULE,
 833         },
 834         .probe = rk610_codec_i2c_probe,
 835         .remove = rk610_codec_i2c_remove,
 836         .id_table = rk610_codec_i2c_id,
 837 };
 838 #endif
 839
 840 static int __init rk610_codec_modinit(void)
 841 {
 842         int ret;
 843         DBG("[%s] start\n", __FUNCTION__);
 844         ret = i2c_add_driver(&rk610_codec_i2c_driver);
 845         if (ret != 0)
 846                 pr_err("rk610 codec: Unable to register I2C driver: %d\n", ret);
 847         return ret;
 848 }
 849 module_init(rk610_codec_modinit);
 850
 851 static void __exit rk610_codec_exit(void)
 852 {
 853         i2c_del_driver(&rk610_codec_i2c_driver);
 854 }
 855 module_exit(rk610_codec_exit);
 856
 857 MODULE_DESCRIPTION("ASoC RK610 CODEC driver");
 858 MODULE_AUTHOR("rk@rock-chips.com");
 859 MODULE_LICENSE("GPL");
 860
 861 //=====================================================================
 862 //Proc
 863 #ifdef RK610_PROC
 864 static ssize_t RK610_PROC_write(struct file *file, const char __user *buffer,
 865                            unsigned long len, void *data)
 866 {
 867         char *cookie_pot;
 868
 869         cookie_pot = (char *)vmalloc( len );
 870         if (!cookie_pot)
 871         {
 872                 return -ENOMEM;
 873         }
 874         else
 875         {
 876                 if (copy_from_user( cookie_pot, buffer, len ))
 877                         return -EFAULT;
 878         }
 879
 880         switch(cookie_pot[0])
 881         {
 882         case 'p':
 883                 spk_ctrl_fun(GPIO_HIGH);
 884                 break;
 885         case 'o':
 886                 spk_ctrl_fun(GPIO_LOW);
 887                 break;
 888         }
 889
 890         return len;
 891 }
 892
 893 static int RK610_PROC_init(void)
 894 {
 895         struct proc_dir_entry *RK610_PROC_entry;
 896         RK610_PROC_entry = create_proc_entry("driver/rk610_ts", 0777, NULL);
 897         if(RK610_PROC_entry != NULL)
 898         {
 899                 RK610_PROC_entry->write_proc = RK610_PROC_write;
 900                 return -1;
 901         }
 902         else
 903         {
 904                 printk("create proc error !\n");
 905         }
 906         return 0;
 907 }
 908
 909 #endif