2 * rt286.c -- RT286 ALSA SoC audio codec driver
4 * Copyright 2013 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_device.h>
19 #include <linux/spi/spi.h>
20 #include <linux/dmi.h>
21 #include <linux/acpi.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/initval.h>
28 #include <sound/tlv.h>
29 #include <sound/jack.h>
30 #include <linux/workqueue.h>
31 #include <sound/rt286.h>
32 #include <sound/hda_verbs.h>
36 #define RT286_VENDOR_ID 0x10ec0286
37 #define RT288_VENDOR_ID 0x10ec0288
40 struct regmap *regmap;
41 struct snd_soc_codec *codec;
42 struct rt286_platform_data pdata;
43 struct i2c_client *i2c;
44 struct snd_soc_jack *jack;
45 struct delayed_work jack_detect_work;
48 struct reg_default *index_cache;
51 static struct reg_default rt286_index_def[] = {
73 #define INDEX_CACHE_SIZE ARRAY_SIZE(rt286_index_def)
75 static const struct reg_default rt286_reg[] = {
76 { 0x00170500, 0x00000400 },
77 { 0x00220000, 0x00000031 },
78 { 0x00239000, 0x0000007f },
79 { 0x0023a000, 0x0000007f },
80 { 0x00270500, 0x00000400 },
81 { 0x00370500, 0x00000400 },
82 { 0x00870500, 0x00000400 },
83 { 0x00920000, 0x00000031 },
84 { 0x00935000, 0x000000c3 },
85 { 0x00936000, 0x000000c3 },
86 { 0x00970500, 0x00000400 },
87 { 0x00b37000, 0x00000097 },
88 { 0x00b37200, 0x00000097 },
89 { 0x00b37300, 0x00000097 },
90 { 0x00c37000, 0x00000000 },
91 { 0x00c37100, 0x00000080 },
92 { 0x01270500, 0x00000400 },
93 { 0x01370500, 0x00000400 },
94 { 0x01371f00, 0x411111f0 },
95 { 0x01439000, 0x00000080 },
96 { 0x0143a000, 0x00000080 },
97 { 0x01470700, 0x00000000 },
98 { 0x01470500, 0x00000400 },
99 { 0x01470c00, 0x00000000 },
100 { 0x01470100, 0x00000000 },
101 { 0x01837000, 0x00000000 },
102 { 0x01870500, 0x00000400 },
103 { 0x02050000, 0x00000000 },
104 { 0x02139000, 0x00000080 },
105 { 0x0213a000, 0x00000080 },
106 { 0x02170100, 0x00000000 },
107 { 0x02170500, 0x00000400 },
108 { 0x02170700, 0x00000000 },
109 { 0x02270100, 0x00000000 },
110 { 0x02370100, 0x00000000 },
111 { 0x01870700, 0x00000020 },
112 { 0x00830000, 0x000000c3 },
113 { 0x00930000, 0x000000c3 },
114 { 0x01270700, 0x00000000 },
117 static bool rt286_volatile_register(struct device *dev, unsigned int reg)
121 case RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
122 case RT286_GET_HP_SENSE:
123 case RT286_GET_MIC1_SENSE:
124 case RT286_PROC_COEF:
133 static bool rt286_readable_register(struct device *dev, unsigned int reg)
137 case RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
138 case RT286_GET_HP_SENSE:
139 case RT286_GET_MIC1_SENSE:
140 case RT286_SET_AUDIO_POWER:
141 case RT286_SET_HPO_POWER:
142 case RT286_SET_SPK_POWER:
143 case RT286_SET_DMIC1_POWER:
149 case RT286_SET_PIN_HPO:
150 case RT286_SET_PIN_SPK:
151 case RT286_SET_PIN_DMIC1:
153 case RT286_SET_AMP_GAIN_HPO:
154 case RT286_SET_DMIC2_DEFAULT:
155 case RT286_DACL_GAIN:
156 case RT286_DACR_GAIN:
157 case RT286_ADCL_GAIN:
158 case RT286_ADCR_GAIN:
160 case RT286_SPOL_GAIN:
161 case RT286_SPOR_GAIN:
162 case RT286_HPOL_GAIN:
163 case RT286_HPOR_GAIN:
164 case RT286_F_DAC_SWITCH:
165 case RT286_F_RECMIX_SWITCH:
166 case RT286_REC_MIC_SWITCH:
167 case RT286_REC_I2S_SWITCH:
168 case RT286_REC_LINE_SWITCH:
169 case RT286_REC_BEEP_SWITCH:
170 case RT286_DAC_FORMAT:
171 case RT286_ADC_FORMAT:
172 case RT286_COEF_INDEX:
173 case RT286_PROC_COEF:
174 case RT286_SET_AMP_GAIN_ADC_IN1:
175 case RT286_SET_AMP_GAIN_ADC_IN2:
176 case RT286_SET_POWER(RT286_DAC_OUT1):
177 case RT286_SET_POWER(RT286_DAC_OUT2):
178 case RT286_SET_POWER(RT286_ADC_IN1):
179 case RT286_SET_POWER(RT286_ADC_IN2):
180 case RT286_SET_POWER(RT286_DMIC2):
181 case RT286_SET_POWER(RT286_MIC1):
188 static int rt286_hw_write(void *context, unsigned int reg, unsigned int value)
190 struct i2c_client *client = context;
191 struct rt286_priv *rt286 = i2c_get_clientdata(client);
195 /* handle index registers */
197 rt286_hw_write(client, RT286_COEF_INDEX, reg);
198 for (i = 0; i < INDEX_CACHE_SIZE; i++) {
199 if (reg == rt286->index_cache[i].reg) {
200 rt286->index_cache[i].def = value;
205 reg = RT286_PROC_COEF;
208 data[0] = (reg >> 24) & 0xff;
209 data[1] = (reg >> 16) & 0xff;
211 * 4 bit VID: reg should be 0
212 * 12 bit VID: value should be 0
213 * So we use an OR operator to handle it rather than use if condition.
215 data[2] = ((reg >> 8) & 0xff) | ((value >> 8) & 0xff);
216 data[3] = value & 0xff;
218 ret = i2c_master_send(client, data, 4);
223 pr_err("ret=%d\n", ret);
230 static int rt286_hw_read(void *context, unsigned int reg, unsigned int *value)
232 struct i2c_client *client = context;
233 struct i2c_msg xfer[2];
236 unsigned int index, vid, buf = 0x0;
238 /* handle index registers */
240 rt286_hw_write(client, RT286_COEF_INDEX, reg);
241 reg = RT286_PROC_COEF;
245 vid = (reg >> 8) & 0xfff;
247 if (AC_VERB_GET_AMP_GAIN_MUTE == (vid & 0xf00)) {
248 index = (reg >> 8) & 0xf;
249 reg = (reg & ~0xf0f) | index;
251 be_reg = cpu_to_be32(reg);
254 xfer[0].addr = client->addr;
257 xfer[0].buf = (u8 *)&be_reg;
260 xfer[1].addr = client->addr;
261 xfer[1].flags = I2C_M_RD;
263 xfer[1].buf = (u8 *)&buf;
265 ret = i2c_transfer(client->adapter, xfer, 2);
271 *value = be32_to_cpu(buf);
277 static void rt286_index_sync(struct snd_soc_codec *codec)
279 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
282 for (i = 0; i < INDEX_CACHE_SIZE; i++) {
283 snd_soc_write(codec, rt286->index_cache[i].reg,
284 rt286->index_cache[i].def);
289 static int rt286_support_power_controls[] = {
300 #define RT286_POWER_REG_LEN ARRAY_SIZE(rt286_support_power_controls)
302 static int rt286_jack_detect(struct rt286_priv *rt286, bool *hp, bool *mic)
304 unsigned int val, buf;
311 if (rt286->pdata.cbj_en) {
312 regmap_read(rt286->regmap, RT286_GET_HP_SENSE, &buf);
313 *hp = buf & 0x80000000;
315 /* power on HV,VERF */
316 regmap_update_bits(rt286->regmap,
317 RT286_DC_GAIN, 0x200, 0x200);
319 snd_soc_dapm_force_enable_pin(&rt286->codec->dapm,
321 snd_soc_dapm_force_enable_pin(&rt286->codec->dapm,
324 snd_soc_dapm_force_enable_pin(&rt286->codec->dapm,
326 snd_soc_dapm_sync(&rt286->codec->dapm);
328 regmap_write(rt286->regmap, RT286_SET_MIC1, 0x24);
331 regmap_update_bits(rt286->regmap,
332 RT286_CBJ_CTRL1, 0xfcc0, 0xd400);
334 regmap_read(rt286->regmap, RT286_CBJ_CTRL2, &val);
336 if (0x0070 == (val & 0x0070)) {
339 regmap_update_bits(rt286->regmap,
340 RT286_CBJ_CTRL1, 0xfcc0, 0xe400);
342 regmap_read(rt286->regmap,
343 RT286_CBJ_CTRL2, &val);
344 if (0x0070 == (val & 0x0070))
349 regmap_update_bits(rt286->regmap,
350 RT286_DC_GAIN, 0x200, 0x0);
354 regmap_write(rt286->regmap, RT286_SET_MIC1, 0x20);
357 regmap_read(rt286->regmap, RT286_GET_HP_SENSE, &buf);
358 *hp = buf & 0x80000000;
359 regmap_read(rt286->regmap, RT286_GET_MIC1_SENSE, &buf);
360 *mic = buf & 0x80000000;
363 snd_soc_dapm_disable_pin(&rt286->codec->dapm, "HV");
364 snd_soc_dapm_disable_pin(&rt286->codec->dapm, "VREF");
366 snd_soc_dapm_disable_pin(&rt286->codec->dapm, "LDO1");
367 snd_soc_dapm_sync(&rt286->codec->dapm);
372 static void rt286_jack_detect_work(struct work_struct *work)
374 struct rt286_priv *rt286 =
375 container_of(work, struct rt286_priv, jack_detect_work.work);
380 rt286_jack_detect(rt286, &hp, &mic);
383 status |= SND_JACK_HEADPHONE;
386 status |= SND_JACK_MICROPHONE;
388 snd_soc_jack_report(rt286->jack, status,
389 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
392 int rt286_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack)
394 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
400 if (rt286->jack->status | SND_JACK_HEADPHONE)
401 snd_soc_dapm_force_enable_pin(&codec->dapm, "LDO1");
402 regmap_update_bits(rt286->regmap, RT286_IRQ_CTRL, 0x2, 0x2);
403 /* Send an initial empty report */
404 snd_soc_jack_report(rt286->jack, rt286->jack->status,
405 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
408 regmap_update_bits(rt286->regmap, RT286_IRQ_CTRL, 0x2, 0x0);
409 snd_soc_dapm_disable_pin(&codec->dapm, "LDO1");
411 snd_soc_dapm_sync(&codec->dapm);
415 EXPORT_SYMBOL_GPL(rt286_mic_detect);
417 static int is_mclk_mode(struct snd_soc_dapm_widget *source,
418 struct snd_soc_dapm_widget *sink)
420 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
421 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
423 if (rt286->clk_id == RT286_SCLK_S_MCLK)
429 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6350, 50, 0);
430 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
432 static const struct snd_kcontrol_new rt286_snd_controls[] = {
433 SOC_DOUBLE_R_TLV("DAC0 Playback Volume", RT286_DACL_GAIN,
434 RT286_DACR_GAIN, 0, 0x7f, 0, out_vol_tlv),
435 SOC_DOUBLE_R("ADC0 Capture Switch", RT286_ADCL_GAIN,
436 RT286_ADCR_GAIN, 7, 1, 1),
437 SOC_DOUBLE_R_TLV("ADC0 Capture Volume", RT286_ADCL_GAIN,
438 RT286_ADCR_GAIN, 0, 0x7f, 0, out_vol_tlv),
439 SOC_SINGLE_TLV("AMIC Volume", RT286_MIC_GAIN,
440 0, 0x3, 0, mic_vol_tlv),
441 SOC_DOUBLE_R("Speaker Playback Switch", RT286_SPOL_GAIN,
442 RT286_SPOR_GAIN, RT286_MUTE_SFT, 1, 1),
446 static const struct snd_kcontrol_new rt286_front_mix[] = {
447 SOC_DAPM_SINGLE("DAC Switch", RT286_F_DAC_SWITCH,
448 RT286_MUTE_SFT, 1, 1),
449 SOC_DAPM_SINGLE("RECMIX Switch", RT286_F_RECMIX_SWITCH,
450 RT286_MUTE_SFT, 1, 1),
453 /* Analog Input Mixer */
454 static const struct snd_kcontrol_new rt286_rec_mix[] = {
455 SOC_DAPM_SINGLE("Mic1 Switch", RT286_REC_MIC_SWITCH,
456 RT286_MUTE_SFT, 1, 1),
457 SOC_DAPM_SINGLE("I2S Switch", RT286_REC_I2S_SWITCH,
458 RT286_MUTE_SFT, 1, 1),
459 SOC_DAPM_SINGLE("Line1 Switch", RT286_REC_LINE_SWITCH,
460 RT286_MUTE_SFT, 1, 1),
461 SOC_DAPM_SINGLE("Beep Switch", RT286_REC_BEEP_SWITCH,
462 RT286_MUTE_SFT, 1, 1),
465 static const struct snd_kcontrol_new spo_enable_control =
466 SOC_DAPM_SINGLE("Switch", RT286_SET_PIN_SPK,
467 RT286_SET_PIN_SFT, 1, 0);
469 static const struct snd_kcontrol_new hpol_enable_control =
470 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT286_HPOL_GAIN,
471 RT286_MUTE_SFT, 1, 1);
473 static const struct snd_kcontrol_new hpor_enable_control =
474 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT286_HPOR_GAIN,
475 RT286_MUTE_SFT, 1, 1);
478 static const char * const rt286_adc_src[] = {
479 "Mic", "RECMIX", "Dmic"
482 static const int rt286_adc_values[] = {
486 static SOC_VALUE_ENUM_SINGLE_DECL(
487 rt286_adc0_enum, RT286_ADC0_MUX, RT286_ADC_SEL_SFT,
488 RT286_ADC_SEL_MASK, rt286_adc_src, rt286_adc_values);
490 static const struct snd_kcontrol_new rt286_adc0_mux =
491 SOC_DAPM_ENUM("ADC 0 source", rt286_adc0_enum);
493 static SOC_VALUE_ENUM_SINGLE_DECL(
494 rt286_adc1_enum, RT286_ADC1_MUX, RT286_ADC_SEL_SFT,
495 RT286_ADC_SEL_MASK, rt286_adc_src, rt286_adc_values);
497 static const struct snd_kcontrol_new rt286_adc1_mux =
498 SOC_DAPM_ENUM("ADC 1 source", rt286_adc1_enum);
500 static const char * const rt286_dac_src[] = {
504 static SOC_ENUM_SINGLE_DECL(rt286_hpo_enum, RT286_HPO_MUX,
507 static const struct snd_kcontrol_new rt286_hpo_mux =
508 SOC_DAPM_ENUM("HPO source", rt286_hpo_enum);
511 static SOC_ENUM_SINGLE_DECL(rt286_spo_enum, RT286_SPK_MUX,
514 static const struct snd_kcontrol_new rt286_spo_mux =
515 SOC_DAPM_ENUM("SPO source", rt286_spo_enum);
517 static int rt286_spk_event(struct snd_soc_dapm_widget *w,
518 struct snd_kcontrol *kcontrol, int event)
520 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
523 case SND_SOC_DAPM_POST_PMU:
525 RT286_SPK_EAPD, RT286_SET_EAPD_HIGH);
527 case SND_SOC_DAPM_PRE_PMD:
529 RT286_SPK_EAPD, RT286_SET_EAPD_LOW);
539 static int rt286_set_dmic1_event(struct snd_soc_dapm_widget *w,
540 struct snd_kcontrol *kcontrol, int event)
542 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
545 case SND_SOC_DAPM_POST_PMU:
546 snd_soc_write(codec, RT286_SET_PIN_DMIC1, 0x20);
548 case SND_SOC_DAPM_PRE_PMD:
549 snd_soc_write(codec, RT286_SET_PIN_DMIC1, 0);
558 static int rt286_vref_event(struct snd_soc_dapm_widget *w,
559 struct snd_kcontrol *kcontrol, int event)
561 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
564 case SND_SOC_DAPM_PRE_PMU:
565 snd_soc_update_bits(codec,
566 RT286_CBJ_CTRL1, 0x0400, 0x0000);
576 static int rt286_ldo2_event(struct snd_soc_dapm_widget *w,
577 struct snd_kcontrol *kcontrol, int event)
579 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
582 case SND_SOC_DAPM_POST_PMU:
583 snd_soc_update_bits(codec, RT286_POWER_CTRL2, 0x38, 0x08);
585 case SND_SOC_DAPM_PRE_PMD:
586 snd_soc_update_bits(codec, RT286_POWER_CTRL2, 0x38, 0x30);
595 static int rt286_mic1_event(struct snd_soc_dapm_widget *w,
596 struct snd_kcontrol *kcontrol, int event)
598 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
601 case SND_SOC_DAPM_PRE_PMU:
602 snd_soc_update_bits(codec,
603 RT286_A_BIAS_CTRL3, 0xc000, 0x8000);
604 snd_soc_update_bits(codec,
605 RT286_A_BIAS_CTRL2, 0xc000, 0x8000);
607 case SND_SOC_DAPM_POST_PMD:
608 snd_soc_update_bits(codec,
609 RT286_A_BIAS_CTRL3, 0xc000, 0x0000);
610 snd_soc_update_bits(codec,
611 RT286_A_BIAS_CTRL2, 0xc000, 0x0000);
620 static const struct snd_soc_dapm_widget rt286_dapm_widgets[] = {
621 SND_SOC_DAPM_SUPPLY_S("HV", 1, RT286_POWER_CTRL1,
623 SND_SOC_DAPM_SUPPLY("VREF", RT286_POWER_CTRL1,
624 0, 1, rt286_vref_event, SND_SOC_DAPM_PRE_PMU),
625 SND_SOC_DAPM_SUPPLY_S("LDO1", 1, RT286_POWER_CTRL2,
627 SND_SOC_DAPM_SUPPLY_S("LDO2", 2, RT286_POWER_CTRL1,
628 13, 1, rt286_ldo2_event, SND_SOC_DAPM_PRE_PMD |
629 SND_SOC_DAPM_POST_PMU),
630 SND_SOC_DAPM_SUPPLY("MCLK MODE", RT286_PLL_CTRL1,
632 SND_SOC_DAPM_SUPPLY("MIC1 Input Buffer", SND_SOC_NOPM,
633 0, 0, rt286_mic1_event, SND_SOC_DAPM_PRE_PMU |
634 SND_SOC_DAPM_POST_PMD),
637 SND_SOC_DAPM_INPUT("DMIC1 Pin"),
638 SND_SOC_DAPM_INPUT("DMIC2 Pin"),
639 SND_SOC_DAPM_INPUT("MIC1"),
640 SND_SOC_DAPM_INPUT("LINE1"),
641 SND_SOC_DAPM_INPUT("Beep"),
644 SND_SOC_DAPM_PGA_E("DMIC1", RT286_SET_POWER(RT286_DMIC1), 0, 1,
645 NULL, 0, rt286_set_dmic1_event,
646 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
647 SND_SOC_DAPM_PGA("DMIC2", RT286_SET_POWER(RT286_DMIC2), 0, 1,
649 SND_SOC_DAPM_SUPPLY("DMIC Receiver", SND_SOC_NOPM,
653 SND_SOC_DAPM_MIXER("RECMIX", SND_SOC_NOPM, 0, 0,
654 rt286_rec_mix, ARRAY_SIZE(rt286_rec_mix)),
657 SND_SOC_DAPM_ADC("ADC 0", NULL, SND_SOC_NOPM, 0, 0),
658 SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
661 SND_SOC_DAPM_MUX("ADC 0 Mux", RT286_SET_POWER(RT286_ADC_IN1), 0, 1,
663 SND_SOC_DAPM_MUX("ADC 1 Mux", RT286_SET_POWER(RT286_ADC_IN2), 0, 1,
666 /* Audio Interface */
667 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
668 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
669 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
670 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
674 SND_SOC_DAPM_DAC("DAC 0", NULL, SND_SOC_NOPM, 0, 0),
675 SND_SOC_DAPM_DAC("DAC 1", NULL, SND_SOC_NOPM, 0, 0),
678 SND_SOC_DAPM_MUX("SPK Mux", SND_SOC_NOPM, 0, 0, &rt286_spo_mux),
679 SND_SOC_DAPM_MUX("HPO Mux", SND_SOC_NOPM, 0, 0, &rt286_hpo_mux),
681 SND_SOC_DAPM_SUPPLY("HP Power", RT286_SET_PIN_HPO,
682 RT286_SET_PIN_SFT, 0, NULL, 0),
685 SND_SOC_DAPM_MIXER("Front", RT286_SET_POWER(RT286_DAC_OUT1), 0, 1,
686 rt286_front_mix, ARRAY_SIZE(rt286_front_mix)),
687 SND_SOC_DAPM_PGA("Surround", RT286_SET_POWER(RT286_DAC_OUT2), 0, 1,
691 SND_SOC_DAPM_SWITCH_E("SPO", SND_SOC_NOPM, 0, 0,
692 &spo_enable_control, rt286_spk_event,
693 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
694 SND_SOC_DAPM_SWITCH("HPO L", SND_SOC_NOPM, 0, 0,
695 &hpol_enable_control),
696 SND_SOC_DAPM_SWITCH("HPO R", SND_SOC_NOPM, 0, 0,
697 &hpor_enable_control),
700 SND_SOC_DAPM_OUTPUT("SPOL"),
701 SND_SOC_DAPM_OUTPUT("SPOR"),
702 SND_SOC_DAPM_OUTPUT("HPO Pin"),
703 SND_SOC_DAPM_OUTPUT("SPDIF"),
706 static const struct snd_soc_dapm_route rt286_dapm_routes[] = {
707 {"ADC 0", NULL, "MCLK MODE", is_mclk_mode},
708 {"ADC 1", NULL, "MCLK MODE", is_mclk_mode},
709 {"Front", NULL, "MCLK MODE", is_mclk_mode},
710 {"Surround", NULL, "MCLK MODE", is_mclk_mode},
712 {"HP Power", NULL, "LDO1"},
713 {"HP Power", NULL, "LDO2"},
715 {"MIC1", NULL, "LDO1"},
716 {"MIC1", NULL, "LDO2"},
717 {"MIC1", NULL, "HV"},
718 {"MIC1", NULL, "VREF"},
719 {"MIC1", NULL, "MIC1 Input Buffer"},
721 {"SPO", NULL, "LDO1"},
722 {"SPO", NULL, "LDO2"},
724 {"SPO", NULL, "VREF"},
726 {"DMIC1", NULL, "DMIC1 Pin"},
727 {"DMIC2", NULL, "DMIC2 Pin"},
728 {"DMIC1", NULL, "DMIC Receiver"},
729 {"DMIC2", NULL, "DMIC Receiver"},
731 {"RECMIX", "Beep Switch", "Beep"},
732 {"RECMIX", "Line1 Switch", "LINE1"},
733 {"RECMIX", "Mic1 Switch", "MIC1"},
735 {"ADC 0 Mux", "Dmic", "DMIC1"},
736 {"ADC 0 Mux", "RECMIX", "RECMIX"},
737 {"ADC 0 Mux", "Mic", "MIC1"},
738 {"ADC 1 Mux", "Dmic", "DMIC2"},
739 {"ADC 1 Mux", "RECMIX", "RECMIX"},
740 {"ADC 1 Mux", "Mic", "MIC1"},
742 {"ADC 0", NULL, "ADC 0 Mux"},
743 {"ADC 1", NULL, "ADC 1 Mux"},
745 {"AIF1TX", NULL, "ADC 0"},
746 {"AIF2TX", NULL, "ADC 1"},
748 {"DAC 0", NULL, "AIF1RX"},
749 {"DAC 1", NULL, "AIF2RX"},
751 {"Front", "DAC Switch", "DAC 0"},
752 {"Front", "RECMIX Switch", "RECMIX"},
754 {"Surround", NULL, "DAC 1"},
756 {"SPK Mux", "Front", "Front"},
757 {"SPK Mux", "Surround", "Surround"},
759 {"HPO Mux", "Front", "Front"},
760 {"HPO Mux", "Surround", "Surround"},
762 {"SPO", "Switch", "SPK Mux"},
763 {"HPO L", "Switch", "HPO Mux"},
764 {"HPO R", "Switch", "HPO Mux"},
765 {"HPO L", NULL, "HP Power"},
766 {"HPO R", NULL, "HP Power"},
768 {"SPOL", NULL, "SPO"},
769 {"SPOR", NULL, "SPO"},
770 {"HPO Pin", NULL, "HPO L"},
771 {"HPO Pin", NULL, "HPO R"},
774 static int rt286_hw_params(struct snd_pcm_substream *substream,
775 struct snd_pcm_hw_params *params,
776 struct snd_soc_dai *dai)
778 struct snd_soc_codec *codec = dai->codec;
779 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
780 unsigned int val = 0;
783 switch (params_rate(params)) {
784 /* bit 14 0:48K 1:44.1K */
791 dev_err(codec->dev, "Unsupported sample rate %d\n",
792 params_rate(params));
795 switch (rt286->sys_clk) {
798 if (params_rate(params) != 48000) {
799 dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n",
800 params_rate(params), rt286->sys_clk);
806 if (params_rate(params) != 44100) {
807 dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n",
808 params_rate(params), rt286->sys_clk);
814 if (params_channels(params) <= 16) {
815 /* bit 3:0 Number of Channel */
816 val |= (params_channels(params) - 1);
818 dev_err(codec->dev, "Unsupported channels %d\n",
819 params_channels(params));
824 switch (params_width(params)) {
825 /* bit 6:4 Bits per Sample */
849 snd_soc_update_bits(codec,
850 RT286_I2S_CTRL1, 0x0018, d_len_code << 3);
851 dev_dbg(codec->dev, "format val = 0x%x\n", val);
853 snd_soc_update_bits(codec, RT286_DAC_FORMAT, 0x407f, val);
854 snd_soc_update_bits(codec, RT286_ADC_FORMAT, 0x407f, val);
859 static int rt286_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
861 struct snd_soc_codec *codec = dai->codec;
863 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
864 case SND_SOC_DAIFMT_CBM_CFM:
865 snd_soc_update_bits(codec,
866 RT286_I2S_CTRL1, 0x800, 0x800);
868 case SND_SOC_DAIFMT_CBS_CFS:
869 snd_soc_update_bits(codec,
870 RT286_I2S_CTRL1, 0x800, 0x0);
876 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
877 case SND_SOC_DAIFMT_I2S:
878 snd_soc_update_bits(codec,
879 RT286_I2S_CTRL1, 0x300, 0x0);
881 case SND_SOC_DAIFMT_LEFT_J:
882 snd_soc_update_bits(codec,
883 RT286_I2S_CTRL1, 0x300, 0x1 << 8);
885 case SND_SOC_DAIFMT_DSP_A:
886 snd_soc_update_bits(codec,
887 RT286_I2S_CTRL1, 0x300, 0x2 << 8);
889 case SND_SOC_DAIFMT_DSP_B:
890 snd_soc_update_bits(codec,
891 RT286_I2S_CTRL1, 0x300, 0x3 << 8);
896 /* bit 15 Stream Type 0:PCM 1:Non-PCM */
897 snd_soc_update_bits(codec, RT286_DAC_FORMAT, 0x8000, 0);
898 snd_soc_update_bits(codec, RT286_ADC_FORMAT, 0x8000, 0);
903 static int rt286_set_dai_sysclk(struct snd_soc_dai *dai,
904 int clk_id, unsigned int freq, int dir)
906 struct snd_soc_codec *codec = dai->codec;
907 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
909 dev_dbg(codec->dev, "%s freq=%d\n", __func__, freq);
911 if (RT286_SCLK_S_MCLK == clk_id) {
912 snd_soc_update_bits(codec,
913 RT286_I2S_CTRL2, 0x0100, 0x0);
914 snd_soc_update_bits(codec,
915 RT286_PLL_CTRL1, 0x20, 0x20);
917 snd_soc_update_bits(codec,
918 RT286_I2S_CTRL2, 0x0100, 0x0100);
919 snd_soc_update_bits(codec,
920 RT286_PLL_CTRL, 0x4, 0x4);
921 snd_soc_update_bits(codec,
922 RT286_PLL_CTRL1, 0x20, 0x0);
927 if (RT286_SCLK_S_MCLK == clk_id) {
928 dev_err(codec->dev, "Should not use MCLK\n");
931 snd_soc_update_bits(codec,
932 RT286_I2S_CTRL2, 0x40, 0x40);
935 if (RT286_SCLK_S_MCLK == clk_id) {
936 dev_err(codec->dev, "Should not use MCLK\n");
939 snd_soc_update_bits(codec,
940 RT286_I2S_CTRL2, 0x40, 0x0);
944 snd_soc_update_bits(codec,
945 RT286_I2S_CTRL2, 0x8, 0x0);
946 snd_soc_update_bits(codec,
947 RT286_CLK_DIV, 0xfc1e, 0x0004);
951 snd_soc_update_bits(codec,
952 RT286_I2S_CTRL2, 0x8, 0x8);
953 snd_soc_update_bits(codec,
954 RT286_CLK_DIV, 0xfc1e, 0x5406);
957 dev_err(codec->dev, "Unsupported system clock\n");
961 rt286->sys_clk = freq;
962 rt286->clk_id = clk_id;
967 static int rt286_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
969 struct snd_soc_codec *codec = dai->codec;
971 dev_dbg(codec->dev, "%s ratio=%d\n", __func__, ratio);
973 snd_soc_update_bits(codec,
974 RT286_I2S_CTRL1, 0x1000, 0x1000);
976 snd_soc_update_bits(codec,
977 RT286_I2S_CTRL1, 0x1000, 0x0);
983 static int rt286_set_bias_level(struct snd_soc_codec *codec,
984 enum snd_soc_bias_level level)
987 case SND_SOC_BIAS_PREPARE:
988 if (SND_SOC_BIAS_STANDBY == codec->dapm.bias_level) {
990 RT286_SET_AUDIO_POWER, AC_PWRST_D0);
991 snd_soc_update_bits(codec,
992 RT286_DC_GAIN, 0x200, 0x200);
996 case SND_SOC_BIAS_ON:
998 snd_soc_update_bits(codec,
999 RT286_CBJ_CTRL1, 0x0400, 0x0400);
1000 snd_soc_update_bits(codec,
1001 RT286_DC_GAIN, 0x200, 0x0);
1005 case SND_SOC_BIAS_STANDBY:
1006 snd_soc_write(codec,
1007 RT286_SET_AUDIO_POWER, AC_PWRST_D3);
1008 snd_soc_update_bits(codec,
1009 RT286_CBJ_CTRL1, 0x0400, 0x0000);
1015 codec->dapm.bias_level = level;
1020 static irqreturn_t rt286_irq(int irq, void *data)
1022 struct rt286_priv *rt286 = data;
1027 rt286_jack_detect(rt286, &hp, &mic);
1030 regmap_update_bits(rt286->regmap, RT286_IRQ_CTRL, 0x1, 0x1);
1033 status |= SND_JACK_HEADPHONE;
1036 status |= SND_JACK_MICROPHONE;
1038 snd_soc_jack_report(rt286->jack, status,
1039 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
1041 pm_wakeup_event(&rt286->i2c->dev, 300);
1046 static int rt286_probe(struct snd_soc_codec *codec)
1048 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
1050 rt286->codec = codec;
1051 codec->dapm.bias_level = SND_SOC_BIAS_OFF;
1053 if (rt286->i2c->irq) {
1054 regmap_update_bits(rt286->regmap,
1055 RT286_IRQ_CTRL, 0x2, 0x2);
1057 INIT_DELAYED_WORK(&rt286->jack_detect_work,
1058 rt286_jack_detect_work);
1059 schedule_delayed_work(&rt286->jack_detect_work,
1060 msecs_to_jiffies(1250));
1066 static int rt286_remove(struct snd_soc_codec *codec)
1068 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
1070 cancel_delayed_work_sync(&rt286->jack_detect_work);
1076 static int rt286_suspend(struct snd_soc_codec *codec)
1078 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
1080 regcache_cache_only(rt286->regmap, true);
1081 regcache_mark_dirty(rt286->regmap);
1086 static int rt286_resume(struct snd_soc_codec *codec)
1088 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
1090 regcache_cache_only(rt286->regmap, false);
1091 rt286_index_sync(codec);
1092 regcache_sync(rt286->regmap);
1097 #define rt286_suspend NULL
1098 #define rt286_resume NULL
1101 #define RT286_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
1102 #define RT286_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1103 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1105 static const struct snd_soc_dai_ops rt286_aif_dai_ops = {
1106 .hw_params = rt286_hw_params,
1107 .set_fmt = rt286_set_dai_fmt,
1108 .set_sysclk = rt286_set_dai_sysclk,
1109 .set_bclk_ratio = rt286_set_bclk_ratio,
1112 static struct snd_soc_dai_driver rt286_dai[] = {
1114 .name = "rt286-aif1",
1117 .stream_name = "AIF1 Playback",
1120 .rates = RT286_STEREO_RATES,
1121 .formats = RT286_FORMATS,
1124 .stream_name = "AIF1 Capture",
1127 .rates = RT286_STEREO_RATES,
1128 .formats = RT286_FORMATS,
1130 .ops = &rt286_aif_dai_ops,
1131 .symmetric_rates = 1,
1134 .name = "rt286-aif2",
1137 .stream_name = "AIF2 Playback",
1140 .rates = RT286_STEREO_RATES,
1141 .formats = RT286_FORMATS,
1144 .stream_name = "AIF2 Capture",
1147 .rates = RT286_STEREO_RATES,
1148 .formats = RT286_FORMATS,
1150 .ops = &rt286_aif_dai_ops,
1151 .symmetric_rates = 1,
1156 static struct snd_soc_codec_driver soc_codec_dev_rt286 = {
1157 .probe = rt286_probe,
1158 .remove = rt286_remove,
1159 .suspend = rt286_suspend,
1160 .resume = rt286_resume,
1161 .set_bias_level = rt286_set_bias_level,
1162 .idle_bias_off = true,
1163 .controls = rt286_snd_controls,
1164 .num_controls = ARRAY_SIZE(rt286_snd_controls),
1165 .dapm_widgets = rt286_dapm_widgets,
1166 .num_dapm_widgets = ARRAY_SIZE(rt286_dapm_widgets),
1167 .dapm_routes = rt286_dapm_routes,
1168 .num_dapm_routes = ARRAY_SIZE(rt286_dapm_routes),
1171 static const struct regmap_config rt286_regmap = {
1174 .max_register = 0x02370100,
1175 .volatile_reg = rt286_volatile_register,
1176 .readable_reg = rt286_readable_register,
1177 .reg_write = rt286_hw_write,
1178 .reg_read = rt286_hw_read,
1179 .cache_type = REGCACHE_RBTREE,
1180 .reg_defaults = rt286_reg,
1181 .num_reg_defaults = ARRAY_SIZE(rt286_reg),
1184 static const struct i2c_device_id rt286_i2c_id[] = {
1189 MODULE_DEVICE_TABLE(i2c, rt286_i2c_id);
1191 static const struct acpi_device_id rt286_acpi_match[] = {
1195 MODULE_DEVICE_TABLE(acpi, rt286_acpi_match);
1197 static struct dmi_system_id force_combo_jack_table[] = {
1199 .ident = "Intel Wilson Beach",
1201 DMI_MATCH(DMI_BOARD_NAME, "Wilson Beach SDS")
1207 static struct dmi_system_id dmi_dell_dino[] = {
1209 .ident = "Dell Dino",
1211 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
1212 DMI_MATCH(DMI_PRODUCT_NAME, "XPS 13 9343")
1218 static int rt286_i2c_probe(struct i2c_client *i2c,
1219 const struct i2c_device_id *id)
1221 struct rt286_platform_data *pdata = dev_get_platdata(&i2c->dev);
1222 struct rt286_priv *rt286;
1225 rt286 = devm_kzalloc(&i2c->dev, sizeof(*rt286),
1230 rt286->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt286_regmap);
1231 if (IS_ERR(rt286->regmap)) {
1232 ret = PTR_ERR(rt286->regmap);
1233 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1238 regmap_read(rt286->regmap,
1239 RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID), &ret);
1240 if (ret != RT286_VENDOR_ID && ret != RT288_VENDOR_ID) {
1242 "Device with ID register %x is not rt286\n", ret);
1246 rt286->index_cache = rt286_index_def;
1248 i2c_set_clientdata(i2c, rt286);
1251 rt286->pdata = *pdata;
1253 if (dmi_check_system(force_combo_jack_table) ||
1254 dmi_check_system(dmi_dell_dino))
1255 rt286->pdata.cbj_en = true;
1257 regmap_write(rt286->regmap, RT286_SET_AUDIO_POWER, AC_PWRST_D3);
1259 for (i = 0; i < RT286_POWER_REG_LEN; i++)
1260 regmap_write(rt286->regmap,
1261 RT286_SET_POWER(rt286_support_power_controls[i]),
1264 if (!rt286->pdata.cbj_en) {
1265 regmap_write(rt286->regmap, RT286_CBJ_CTRL2, 0x0000);
1266 regmap_write(rt286->regmap, RT286_MIC1_DET_CTRL, 0x0816);
1267 regmap_update_bits(rt286->regmap,
1268 RT286_CBJ_CTRL1, 0xf000, 0xb000);
1270 regmap_update_bits(rt286->regmap,
1271 RT286_CBJ_CTRL1, 0xf000, 0x5000);
1276 if (!rt286->pdata.gpio2_en)
1277 regmap_write(rt286->regmap, RT286_SET_DMIC2_DEFAULT, 0x4000);
1279 regmap_write(rt286->regmap, RT286_SET_DMIC2_DEFAULT, 0);
1283 regmap_write(rt286->regmap, RT286_MISC_CTRL1, 0x0000);
1284 /* Power down LDO, VREF */
1285 regmap_update_bits(rt286->regmap, RT286_POWER_CTRL2, 0xc, 0x0);
1286 regmap_update_bits(rt286->regmap, RT286_POWER_CTRL1, 0x1001, 0x1001);
1288 /* Set depop parameter */
1289 regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL2, 0x403a, 0x401a);
1290 regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL3, 0xf777, 0x4737);
1291 regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL4, 0x00ff, 0x003f);
1293 if (dmi_check_system(dmi_dell_dino)) {
1294 regmap_update_bits(rt286->regmap,
1295 RT286_SET_GPIO_MASK, 0x40, 0x40);
1296 regmap_update_bits(rt286->regmap,
1297 RT286_SET_GPIO_DIRECTION, 0x40, 0x40);
1298 regmap_update_bits(rt286->regmap,
1299 RT286_SET_GPIO_DATA, 0x40, 0x40);
1300 regmap_update_bits(rt286->regmap,
1301 RT286_GPIO_CTRL, 0xc, 0x8);
1304 if (rt286->i2c->irq) {
1305 ret = request_threaded_irq(rt286->i2c->irq, NULL, rt286_irq,
1306 IRQF_TRIGGER_HIGH | IRQF_ONESHOT, "rt286", rt286);
1309 "Failed to reguest IRQ: %d\n", ret);
1314 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt286,
1315 rt286_dai, ARRAY_SIZE(rt286_dai));
1320 static int rt286_i2c_remove(struct i2c_client *i2c)
1322 struct rt286_priv *rt286 = i2c_get_clientdata(i2c);
1325 free_irq(i2c->irq, rt286);
1326 snd_soc_unregister_codec(&i2c->dev);
1332 static struct i2c_driver rt286_i2c_driver = {
1335 .owner = THIS_MODULE,
1336 .acpi_match_table = ACPI_PTR(rt286_acpi_match),
1338 .probe = rt286_i2c_probe,
1339 .remove = rt286_i2c_remove,
1340 .id_table = rt286_i2c_id,
1343 module_i2c_driver(rt286_i2c_driver);
1345 MODULE_DESCRIPTION("ASoC RT286 driver");
1346 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1347 MODULE_LICENSE("GPL");