Audio: delete codec_set_spk, update rk616 codec driver
[firefly-linux-kernel-4.4.55.git] / sound / soc / codecs / rt5631.c
1 /*
2  * rt5631.c  --  RT5631 ALSA Soc Audio driver
3  *
4  * Copyright 2011 Realtek Microelectronics
5  *
6  * Author: flove <flove@realtek.com>
7  *
8  * Based on WM8753.c
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13  *
14  */
15 #include <linux/module.h>
16 #include <linux/moduleparam.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/pm.h>
20 #include <linux/i2c.h>
21 #include <linux/platform_device.h>
22 #include <linux/spi/spi.h>
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/soc.h>
27 #include <sound/soc-dapm.h>
28 #include <sound/initval.h>
29 #include <sound/tlv.h>
30 #include "rt5631.h"
31 #include <linux/timer.h>
32
33 #if 0
34 #define DBG(x...)       printk(x)
35 #else
36 #define DBG(x...)
37 #endif
38 /*
39 1.0.25
40      add support sample rate up to 192k
41 1.0.26
42         add support kernel3.10
43 */
44 #define RT5631_VERSION "0.01 alsa 1.0.26"
45
46 #define RT5631_ALC_DAC_FUNC_ENA 0       //ALC functio for DAC
47 #define RT5631_ALC_ADC_FUNC_ENA 0       //ALC function for ADC
48 #define RT5631_SPK_TIMER        1       //if enable this, MUST enable RT5631_EQ_FUNC_ENA first!
49
50 struct rt5631_priv {
51         int codec_version;
52         int master;
53         int sysclk;
54         int dmic_used_flag;
55         int eq_mode;
56         int pll_used_flag;
57 };
58 #if (RT5631_SPK_TIMER == 1)
59 static struct timer_list spk_timer;
60 struct work_struct  spk_work;
61 //static bool last_is_spk = false;      // need modify.
62 static int last_is_spk = -1;    //bard 9-13
63 #endif
64
65 static struct snd_soc_codec *rt5631_codec;
66 struct delayed_work rt5631_delay_cap; //bard 7-16
67 EXPORT_SYMBOL(rt5631_delay_cap); //bard 7-16
68 static const u16 rt5631_reg[0x80];
69 static int timesofbclk = 32;
70 bool isPlaybackon = false, isCaptureon = false;
71
72 module_param(timesofbclk, int, S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH);
73 MODULE_PARM_DESC(timeofbclk, "relationship between bclk and fs");
74
75 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -9435, 37, 0);
76 static inline int rt5631_write(struct snd_soc_codec *codec,
77                         unsigned int reg, unsigned int val)
78 {
79         return snd_soc_write(codec, reg, val);
80 }
81
82 static inline unsigned int rt5631_read(struct snd_soc_codec *codec,
83                                 unsigned int reg)
84 {
85         return snd_soc_read(codec, reg);
86 }
87
88 static int rt5631_write_mask(struct snd_soc_codec *codec,
89         unsigned int reg, unsigned int value, unsigned int mask)
90 {
91         unsigned int reg_val;
92         int ret = 0;
93
94         if (!mask)
95                 return 0;
96
97         if (mask != 0xffff) {
98                 reg_val = rt5631_read(codec, reg);
99                 reg_val &= ~mask;
100                 reg_val |= (value & mask);
101                 ret = rt5631_write(codec, reg, reg_val);
102         } else {
103                 ret = rt5631_write(codec, reg, value);
104         }
105
106         return ret;
107 }
108
109 static void rt5631_write_index(struct snd_soc_codec *codec,
110                 unsigned int reg, unsigned int value)
111 {
112         rt5631_write(codec, RT5631_INDEX_ADD, reg);
113         rt5631_write(codec, RT5631_INDEX_DATA, value);
114         return;
115 }
116
117 static unsigned int rt5631_read_index(struct snd_soc_codec *codec,
118                                 unsigned int reg)
119 {
120         unsigned int value;
121
122         rt5631_write(codec, RT5631_INDEX_ADD, reg);
123         value = rt5631_read(codec, RT5631_INDEX_DATA);
124
125         return value;
126 }
127
128 static void rt5631_write_index_mask(struct snd_soc_codec *codec,
129         unsigned int reg, unsigned int value, unsigned int mask)
130 {
131         unsigned int reg_val;
132
133         if (!mask)
134                 return;
135
136         if (mask != 0xffff) {
137                 reg_val = rt5631_read_index(codec, reg);
138                 reg_val &= ~mask;
139                 reg_val |= (value & mask);
140                 rt5631_write_index(codec, reg, reg_val);
141         } else {
142                 rt5631_write_index(codec, reg, value);
143         }
144
145         return;
146 }
147
148 static inline int rt5631_reset(struct snd_soc_codec *codec)
149 {
150         return snd_soc_write(codec, RT5631_RESET, 0);
151 }
152
153 struct rt5631_init_reg {
154         u8 reg;
155         u16 val;
156 };
157
158 #ifndef DEF_VOL
159 #define DEF_VOL                                 0xd4//0xd4 -30dB 0xc0 0dB
160 #endif
161 #ifndef DEF_VOL_SPK
162 #define DEF_VOL_SPK                             0xc4
163 #endif
164
165 /*
166  * speaker channel volume select SPKMIXER, 0DB by default
167  * Headphone channel volume select OUTMIXER,0DB by default
168  * AXO1/AXO2 channel volume select OUTMIXER,0DB by default
169  * Record Mixer source from Mic1/Mic2 by default
170  * Mic1/Mic2 boost 40dB by default
171  * DAC_L-->OutMixer_L by default
172  * DAC_R-->OutMixer_R by default
173  * DAC-->SpeakerMixer
174  * Speaker volume-->SPOMixer(L-->L,R-->R)
175  * Speaker AMP ratio gain is 1.44X
176  * HP from OutMixer,speaker out from SpeakerOut Mixer
177  * enable HP zero cross
178  * change Mic1 & mic2 to differential mode
179  */
180 static struct rt5631_init_reg init_list[] = {
181
182         {RT5631_SPK_OUT_VOL             , (DEF_VOL_SPK<<8) | DEF_VOL_SPK},//speaker channel volume select SPKMIXER,0DB by default
183         {RT5631_HP_OUT_VOL              , (DEF_VOL<<8) | DEF_VOL},//Headphone channel volume select OUTMIXER,0DB by default
184         {RT5631_MONO_AXO_1_2_VOL        , 0xE0c0},//AXO1/AXO2 channel volume select OUTMIXER,0DB by default
185         //{RT5631_STEREO_DAC_VOL_1      , 0x004C},
186         {RT5631_STEREO_DAC_VOL_2        , 0x0303},
187         {RT5631_ADC_REC_MIXER           , 0xb0f0},//Record Mixer source from Mic1 by default
188         {RT5631_ADC_CTRL_1              , 0x0004},//STEREO ADC CONTROL 1
189         {RT5631_MIC_CTRL_2              , 0x4400},//0x8800},//0x6600}, //Mic1/Mic2 boost 40DB by default
190         {RT5631_PWR_MANAG_ADD1          , 0x93e0},
191         {RT5631_SDP_CTRL        , 0x8002},
192         //increase hpo charge pump VEE
193         {RT5631_INDEX_ADD                       , 0x45},
194         {RT5631_INDEX_DATA                      , 0x6530},
195         
196 #if RT5631_ALC_ADC_FUNC_ENA     
197
198         {RT5631_ALC_CTRL_1              , 0x060a},//ALC CONTROL 1
199         {RT5631_ALC_CTRL_2              , 0x0002},//ALC CONTROL 2
200         {RT5631_ALC_CTRL_3              , 0xe088},//ALC CONTROL 3
201         
202 #endif  
203         {RT5631_OUTMIXER_L_CTRL         , 0xdfC0},//DAC_L-->OutMixer_L by default
204         {RT5631_OUTMIXER_R_CTRL         , 0xdfC0},//DAC_R-->OutMixer_R by default
205         {RT5631_AXO1MIXER_CTRL          , 0x8840},//OutMixer_L-->AXO1Mixer by default
206         {RT5631_AXO2MIXER_CTRL          , 0x8880},//OutMixer_R-->AXO2Mixer by default
207         {RT5631_SPK_MIXER_CTRL          , 0xd8d8},//DAC-->SpeakerMixer
208         {RT5631_SPK_MONO_OUT_CTRL       , 0x0c00},//Speaker volume-->SPOMixer(L-->L,R-->R)      
209         {RT5631_GEN_PUR_CTRL_REG        , 0x4e00},//Speaker AMP ratio gain is 1.27x
210 #if defined(CONFIG_ADJUST_VOL_BY_CODEC)
211         {RT5631_SPK_MONO_HP_OUT_CTRL    , 0x0000},//HP from outputmixer,speaker out from SpeakerOut Mixer       
212 #else
213         {RT5631_SPK_MONO_HP_OUT_CTRL    , 0x000c},//HP from DAC,speaker out from SpeakerOut Mixer
214 #endif
215         {RT5631_DEPOP_FUN_CTRL_2        , 0x8000},//HP depop by register control        
216         {RT5631_INT_ST_IRQ_CTRL_2       , 0x0f18},//enable HP zero cross        
217         {RT5631_MIC_CTRL_1              , 0x8000},//set mic 1 to differnetial mode
218         {RT5631_GPIO_CTRL               , 0x0000},//set GPIO to input pin       
219 //      {RT5631_JACK_DET_CTRL           , 0x4e80},//Jack detect for GPIO,high is HP,low is speaker      
220         {RT5631_JACK_DET_CTRL           , 0x4bc0},//Jack detect for GPIO,high is speaker,low is hp      
221 };
222 #define RT5631_INIT_REG_LEN ARRAY_SIZE(init_list)
223
224 /*
225  * EQ parameter
226  */
227 enum {
228         NORMAL,
229         CLUB,
230         DANCE,
231         LIVE,
232         POP,
233         ROCK,
234         OPPO,
235         TREBLE,
236         BASS,
237         HFREQ,  
238         SPK_FR  
239 };
240
241 struct hw_eq_preset {
242         u16 type;
243         u16 value[22];
244         u16 ctrl;
245 };
246
247 /*
248  * EQ param reg : 0x0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7,
249  *              0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf
250  * EQ control reg : 0x6e
251  */
252 struct hw_eq_preset hweq_preset[] = {
253         {NORMAL , {0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
254                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
255                 0x0000, 0x0000, 0x0000, 0x0000}, 0x0000},
256         {CLUB   , {0x1C10, 0x0000, 0xC1CC, 0x1E5D, 0x0699, 0xCD48,
257                 0x188D, 0x0699, 0xC3B6, 0x1CD0, 0x0699, 0x0436,
258                 0x0000, 0x0000, 0x0000, 0x0000}, 0x000E},
259         {DANCE  , {0x1F2C, 0x095B, 0xC071, 0x1F95, 0x0616, 0xC96E,
260                 0x1B11, 0xFC91, 0xDCF2, 0x1194, 0xFAF2, 0x0436,
261                 0x0000, 0x0000, 0x0000, 0x0000}, 0x000F},
262         {LIVE   , {0x1EB5, 0xFCB6, 0xC24A, 0x1DF8, 0x0E7C, 0xC883,
263                 0x1C10, 0x0699, 0xDA41, 0x1561, 0x0295, 0x0436,
264                 0x0000, 0x0000, 0x0000, 0x0000}, 0x000F},
265         {POP    , {0x1EB5, 0xFCB6, 0xC1D4, 0x1E5D, 0x0E23, 0xD92E,
266                 0x16E6, 0xFCB6, 0x0000, 0x0969, 0xF988, 0x0436,
267                 0x0000, 0x0000, 0x0000, 0x0000}, 0x000F},
268         {ROCK   , {0x1EB5, 0xFCB6, 0xC071, 0x1F95, 0x0424, 0xC30A,
269                 0x1D27, 0xF900, 0x0C5D, 0x0FC7, 0x0E23, 0x0436,
270                 0x0000, 0x0000, 0x0000, 0x0000}, 0x000F},
271         {OPPO   , {0x0000, 0x0000, 0xCA4A, 0x17F8, 0x0FEC, 0xCA4A,
272                 0x17F8, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
273                 0x0000, 0x0000, 0x0000, 0x0000}, 0x000F},
274         {TREBLE , {0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
275                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x188D,
276                 0x1699, 0x0000, 0x0000, 0x0000}, 0x0010},
277         {BASS   , {0x1A43, 0x0C00, 0x0000, 0x0000, 0x0000, 0x0000,
278                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
279                 0x0000, 0x0000, 0x0000, 0x0000}, 0x0001},
280         //      {HFREQ, {0x1BBC,0x0000,0xC9A4,0x1BBC,0x0000,0x2997,0x142D,0xFCB6,0xEF01,0x1BBC,0x0000,0xE835,0x0FEC,0xC66E,0x1A29,0x1CEE},0x0014},//orig
281         //{HFREQ, {0x1BBC,0x0000,0xC9A4,0x1BBC,0x0000,0x2997,0x142D,0xFCB6,0x1E97,0x08AC,0xFCB6,0xEEA6,0x095B,0xC66E,0x1A29,0x1CEE},0x0018},//roy 20120904 
282         {HFREQ, {0x1FBC,0x1D18,0x11C1,0x0B2B,0xFF1B,0x1F8D,0x09F3,0xFB54,0xEF01,0x1BBC,0x0000,0xE835,0x2298,0xC66E,0x1A29,0x1CEE},0x0014},//roy 20120914 
283         {SPK_FR,{0x1DE4,0xF405,0xC306,0x1D60,0x01F3,0x07CA,0x12AF,0xF805,0xE904,0x1C10,0x0000,0x1C8B,0x0000,0xc5e1,0x1afb,0x1d46},0x0003},
284 };
285
286 static int rt5631_reg_init(struct snd_soc_codec *codec)
287 {
288         int i;
289
290         for (i = 0; i < RT5631_INIT_REG_LEN; i++)
291                 rt5631_write(codec, init_list[i].reg, init_list[i].val);
292
293         return 0;
294 }
295 //bard 7-16 s
296 void rt5631_adc_on(struct work_struct *work)
297 {
298         int val;
299
300         val = snd_soc_read(rt5631_codec,RT5631_ADC_REC_MIXER);
301         snd_soc_write(rt5631_codec,RT5631_ADC_REC_MIXER,0xf0f0);
302
303         snd_soc_update_bits(rt5631_codec, RT5631_PWR_MANAG_ADD1,
304                 PWR_ADC_L_CLK | PWR_ADC_R_CLK, 0);
305         snd_soc_update_bits(rt5631_codec, RT5631_PWR_MANAG_ADD1,
306                 PWR_ADC_L_CLK | PWR_ADC_R_CLK,
307                 PWR_ADC_L_CLK | PWR_ADC_R_CLK);
308         snd_soc_write(rt5631_codec,RT5631_ADC_REC_MIXER,val);
309         snd_soc_update_bits(rt5631_codec, RT5631_ADC_CTRL_1,
310                                 RT_L_MUTE|RT_R_MUTE,0x0);
311
312 }
313 //bard 7-16 e
314 static const char *rt5631_spol_source_sel[] = {
315         "SPOLMIX", "MONOIN_RX", "VDAC", "DACL"};
316 static const char *rt5631_spor_source_sel[] = {
317         "SPORMIX", "MONOIN_RX", "VDAC", "DACR"};
318 static const char *rt5631_mono_source_sel[] = {"MONOMIX", "MONOIN_RX", "VDAC"};
319 static const char *rt5631_input_mode_source_sel[] = {
320         "Single-end", "Differential"};
321 static const char *rt5631_mic_boost[] = {"Bypass", "+20db", "+24db", "+30db",
322                         "+35db", "+40db", "+44db", "+50db", "+52db"};
323 static const char *rt5631_hpl_source_sel[] = {"LEFT HPVOL", "LEFT DAC"};
324 static const char *rt5631_hpr_source_sel[] = {"RIGHT HPVOL", "RIGHT DAC"};
325 static const char *rt5631_eq_sel[] = {"NORMAL", "CLUB", "DANCE", "LIVE", "POP",
326                                 "ROCK", "OPPO", "TREBLE", "BASS"};
327
328
329 static const struct soc_enum rt5631_enum[] = {
330 SOC_ENUM_SINGLE(RT5631_SPK_MONO_HP_OUT_CTRL, 14, 4, rt5631_spol_source_sel),
331 SOC_ENUM_SINGLE(RT5631_SPK_MONO_HP_OUT_CTRL, 10, 4, rt5631_spor_source_sel),
332 SOC_ENUM_SINGLE(RT5631_SPK_MONO_HP_OUT_CTRL, 6, 3, rt5631_mono_source_sel),
333 SOC_ENUM_SINGLE(RT5631_MIC_CTRL_1, 15, 2,  rt5631_input_mode_source_sel),
334 SOC_ENUM_SINGLE(RT5631_MIC_CTRL_1, 7, 2,  rt5631_input_mode_source_sel),
335 SOC_ENUM_SINGLE(RT5631_MONO_INPUT_VOL, 15, 2, rt5631_input_mode_source_sel),
336 SOC_ENUM_SINGLE(RT5631_MIC_CTRL_2, 12, 9, rt5631_mic_boost),
337 SOC_ENUM_SINGLE(RT5631_MIC_CTRL_2, 8, 9, rt5631_mic_boost),
338 SOC_ENUM_SINGLE(RT5631_SPK_MONO_HP_OUT_CTRL, 3, 2, rt5631_hpl_source_sel),
339 SOC_ENUM_SINGLE(RT5631_SPK_MONO_HP_OUT_CTRL, 2, 2, rt5631_hpr_source_sel),
340 SOC_ENUM_SINGLE(0, 4, 9, rt5631_eq_sel),
341 };
342
343 static int rt5631_dmic_get(struct snd_kcontrol *kcontrol,
344                 struct snd_ctl_elem_value *ucontrol)
345 {
346         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
347         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
348
349         ucontrol->value.integer.value[0] = rt5631->dmic_used_flag;
350
351         return 0;
352 }
353
354 static void rt5631_close_dmic(struct snd_soc_codec *codec)
355 {
356         rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
357                 DMIC_L_CH_MUTE | DMIC_R_CH_MUTE,
358                 DMIC_L_CH_MUTE_MASK | DMIC_R_CH_MUTE_MASK);
359         rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
360                 DMIC_DIS, DMIC_ENA_MASK);
361         return;
362 }
363
364 static int rt5631_dmic_put(struct snd_kcontrol *kcontrol,
365                 struct snd_ctl_elem_value *ucontrol)
366 {
367         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
368         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
369
370         if (rt5631->dmic_used_flag == ucontrol->value.integer.value[0])
371                 return 0;
372
373         if (ucontrol->value.integer.value[0]) {
374                 rt5631->dmic_used_flag = 1;
375         } else {
376                 rt5631_close_dmic(codec);
377                 rt5631->dmic_used_flag = 0;
378         }
379
380         return 0;
381 }
382
383 static int rt5631_eq_sel_get(struct snd_kcontrol *kcontrol,
384                 struct snd_ctl_elem_value *ucontrol)
385 {
386         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
387         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
388
389         ucontrol->value.integer.value[0] = rt5631->eq_mode;
390
391         return 0;
392 }
393
394 static void rt5631_update_eqmode(struct snd_soc_codec *codec, int mode)
395 {
396         int i;
397
398         DBG("enter rt5631_update_eqmode=========\n");
399         if (NORMAL == mode) {
400                 /* In Normal mode, the EQ parameter is cleared,
401                  * and hardware LP, BP1, BP2, BP3, HP1, HP2
402                  * block control and EQ block are disabled.
403                  */
404                 for (i = RT5631_EQ_BW_LOP; i <= RT5631_EQ_HPF_GAIN; i++)
405                         rt5631_write_index(codec, i,
406                                 hweq_preset[mode].value[i]);
407                 rt5631_write_mask(codec, RT5631_EQ_CTRL, 0x0000, 0x003f);
408                 rt5631_write_index_mask(codec, RT5631_EQ_PRE_VOL_CTRL
409                                                 , 0x0000, 0x8000);
410         } else {
411                 /* Fill and update EQ parameter,
412                  * and EQ block are enabled.
413                  */
414                 rt5631_write_index_mask(codec, RT5631_EQ_PRE_VOL_CTRL
415                                                 , 0x8000, 0x8000);
416                 rt5631_write(codec, RT5631_EQ_CTRL,
417                         hweq_preset[mode].ctrl);
418                 for (i = RT5631_EQ_BW_LOP; i <= RT5631_EQ_HPF_GAIN; i++)
419                         rt5631_write_index(codec, i,
420                                 hweq_preset[mode].value[i]);
421                 rt5631_write_mask(codec, RT5631_EQ_CTRL, 0x4000, 0x4000);
422         }
423
424         return;
425 }
426
427 static int rt5631_eq_sel_put(struct snd_kcontrol *kcontrol,
428                 struct snd_ctl_elem_value *ucontrol)
429 {
430         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
431         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
432
433         if (rt5631->eq_mode == ucontrol->value.integer.value[0])
434                 return 0;
435
436         rt5631_update_eqmode(codec, ucontrol->value.enumerated.item[0]);
437         rt5631->eq_mode = ucontrol->value.integer.value[0];
438
439         return 0;
440 }
441
442 #if (RT5631_SPK_TIMER == 1)
443 static void spk_work_handler(struct work_struct *work)
444 {
445         struct snd_soc_codec *codec = rt5631_codec;
446         int is_spk = (rt5631_read(codec, 0x4a)) & 0x04; //detect rt5631 reg4a[3], 1'b:SPK, 0'b:HP ; //bard 9-13
447         //if(last_is_spk != is_spk)
448         //      printk("%s---%s is in use.last is %s in use\n", __FUNCTION__,is_spk?"speaker":"headphone",last_is_spk?"speaker":"headphone");
449         //printk("last_is_spk=%d is_spk=%d\n",last_is_spk,is_spk);
450         if(is_spk && (last_is_spk != is_spk)){
451                 rt5631_write_index_mask(codec,0x11,0x0000,0x0007);      //0db
452                 rt5631_write_index(codec,0x12,0x0003);                  //0db
453                 rt5631_update_eqmode(codec, SPK_FR);            // SPK is in use, enable EQ mode of SPK_FR.
454         
455
456         }else if(!is_spk && (last_is_spk != is_spk)){
457         //flove071311   rt5631_update_eqmode(codec, NORMAL);            // HP is in use, enable EQ mode of NORMAL.
458                 rt5631_write_index_mask(codec,0x11,0x0002,0x0003);
459                 rt5631_write_index(codec,0x12,0x0007);  
460                 rt5631_update_eqmode(codec,HFREQ);              
461         }
462         last_is_spk = is_spk;
463 }
464
465 /* timer to judge SPK or HP in use, and handle EQ issues accordingly. */
466 void spk_timer_callback(unsigned long data )
467 {       
468         int ret = 0;
469
470         schedule_work(&spk_work);
471
472         //DBG("Starting timer to fire in 1000ms (%ld)\n", jiffies );
473   ret = mod_timer(&spk_timer, jiffies + msecs_to_jiffies(1000));
474   if (ret) printk("Error in mod_timer\n");
475 }
476 #endif
477
478 static const struct snd_kcontrol_new rt5631_snd_controls[] = {
479 SOC_ENUM("MIC1 Mode Control",  rt5631_enum[3]),
480 SOC_ENUM("MIC1 Boost", rt5631_enum[6]),
481 SOC_ENUM("MIC2 Mode Control", rt5631_enum[4]),
482 SOC_ENUM("MIC2 Boost", rt5631_enum[7]),
483 SOC_ENUM("MONOIN Mode Control", rt5631_enum[5]),
484 SOC_DOUBLE_TLV("PCM Playback Volume", RT5631_STEREO_DAC_VOL_2, 8, 0, 255, 1, dac_vol_tlv),
485 SOC_DOUBLE("PCM Playback Switch", RT5631_STEREO_DAC_VOL_1, 15, 7, 1, 1),
486 SOC_DOUBLE("MONOIN_RX Capture Volume", RT5631_MONO_INPUT_VOL, 8, 0, 31, 1),
487 SOC_DOUBLE("AXI Capture Volume", RT5631_AUX_IN_VOL, 8, 0, 31, 1),
488 SOC_SINGLE("AXO1 Playback Switch", RT5631_MONO_AXO_1_2_VOL, 15, 1, 1),
489 SOC_SINGLE("AXO2 Playback Switch", RT5631_MONO_AXO_1_2_VOL, 7, 1, 1),
490 SOC_DOUBLE("OUTVOL Playback Volume", RT5631_MONO_AXO_1_2_VOL, 8, 0, 31, 1),
491 SOC_DOUBLE("Speaker Playback Switch", RT5631_SPK_OUT_VOL, 15, 7, 1, 1),
492 SOC_DOUBLE("Speaker Playback Volume", RT5631_SPK_OUT_VOL, 8, 0, 63, 1),
493 SOC_SINGLE("MONO Playback Switch", RT5631_MONO_AXO_1_2_VOL, 13, 1, 1),
494 SOC_DOUBLE("HP Playback Switch", RT5631_HP_OUT_VOL, 15, 7, 1, 1),
495 SOC_DOUBLE("HP Playback Volume", RT5631_HP_OUT_VOL, 8, 0, 63, 1),
496 SOC_SINGLE_EXT("DMIC Capture Switch", 0, 2, 1, 0,
497         rt5631_dmic_get, rt5631_dmic_put),
498 SOC_ENUM_EXT("EQ Mode", rt5631_enum[10], rt5631_eq_sel_get, rt5631_eq_sel_put),
499 };
500
501 static const struct snd_kcontrol_new rt5631_recmixl_mixer_controls[] = {
502 SOC_DAPM_SINGLE("OUTMIXL Capture Switch", RT5631_ADC_REC_MIXER, 15, 1, 1),
503 SOC_DAPM_SINGLE("MIC1_BST1 Capture Switch", RT5631_ADC_REC_MIXER, 14, 1, 1),
504 SOC_DAPM_SINGLE("AXILVOL Capture Switch", RT5631_ADC_REC_MIXER, 13, 1, 1),
505 SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER, 12, 1, 1),
506 };
507
508 static const struct snd_kcontrol_new rt5631_recmixr_mixer_controls[] = {
509 SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER, 4, 1, 1),
510 SOC_DAPM_SINGLE("AXIRVOL Capture Switch", RT5631_ADC_REC_MIXER, 5, 1, 1),
511 SOC_DAPM_SINGLE("MIC2_BST2 Capture Switch", RT5631_ADC_REC_MIXER, 6, 1, 1),
512 SOC_DAPM_SINGLE("OUTMIXR Capture Switch", RT5631_ADC_REC_MIXER, 7, 1, 1),
513 };
514
515 static const struct snd_kcontrol_new rt5631_spkmixl_mixer_controls[] = {
516 SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_SPK_MIXER_CTRL, 15, 1, 1),
517 SOC_DAPM_SINGLE("MIC1_P Playback Switch", RT5631_SPK_MIXER_CTRL, 14, 1, 1),
518 SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_SPK_MIXER_CTRL, 13, 1, 1),
519 SOC_DAPM_SINGLE("OUTMIXL Playback Switch", RT5631_SPK_MIXER_CTRL, 12, 1, 1),
520 };
521
522 static const struct snd_kcontrol_new rt5631_spkmixr_mixer_controls[] = {
523 SOC_DAPM_SINGLE("OUTMIXR Playback Switch", RT5631_SPK_MIXER_CTRL, 4, 1, 1),
524 SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_SPK_MIXER_CTRL, 5, 1, 1),
525 SOC_DAPM_SINGLE("MIC2_P Playback Switch", RT5631_SPK_MIXER_CTRL, 6, 1, 1),
526 SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_SPK_MIXER_CTRL, 7, 1, 1),
527 };
528
529 static const struct snd_kcontrol_new rt5631_outmixl_mixer_controls[] = {
530 SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_L_CTRL, 15, 1, 1),
531 SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_L_CTRL, 14, 1, 1),
532 SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_OUTMIXER_L_CTRL, 13, 1, 1),
533 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_L_CTRL, 12, 1, 1),
534 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_L_CTRL, 11, 1, 1),
535 SOC_DAPM_SINGLE("MONOIN_RXP Playback Switch", RT5631_OUTMIXER_L_CTRL, 10, 1, 1),
536 SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_L_CTRL, 9, 1, 1),
537 SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_L_CTRL, 8, 1, 1),
538 SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_L_CTRL, 7, 1, 1),
539 };
540
541 static const struct snd_kcontrol_new rt5631_outmixr_mixer_controls[] = {
542 SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_R_CTRL, 7, 1, 1),
543 SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_R_CTRL, 8, 1, 1),
544 SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_R_CTRL, 9, 1, 1),
545 SOC_DAPM_SINGLE("MONOIN_RXN Playback Switch", RT5631_OUTMIXER_R_CTRL, 10, 1, 1),
546 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_R_CTRL, 11, 1, 1),
547 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_R_CTRL, 12, 1, 1),
548 SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_OUTMIXER_R_CTRL, 13, 1, 1),
549 SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_R_CTRL, 14, 1, 1),
550 SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_R_CTRL, 15, 1, 1),
551 };
552
553 static const struct snd_kcontrol_new rt5631_AXO1MIX_mixer_controls[] = {
554 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO1MIXER_CTRL, 15 , 1, 1),
555 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO1MIXER_CTRL, 11, 1, 1),
556 SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO1MIXER_CTRL, 7 , 1 , 1),
557 SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO1MIXER_CTRL, 6, 1, 1),
558 };
559
560 static const struct snd_kcontrol_new rt5631_AXO2MIX_mixer_controls[] = {
561 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO2MIXER_CTRL, 15, 1, 1),
562 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO2MIXER_CTRL, 11, 1, 1),
563 SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO2MIXER_CTRL, 7, 1, 1),
564 SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO2MIXER_CTRL, 6, 1 , 1),
565 };
566
567 static const struct snd_kcontrol_new rt5631_spolmix_mixer_controls[] = {
568 SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL, 15, 1, 1),
569 SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL, 14, 1, 1),
570 };
571
572 static const struct snd_kcontrol_new rt5631_spormix_mixer_controls[] = {
573 SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL, 13, 1, 1),
574 SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL, 12, 1, 1),
575 };
576
577 static const struct snd_kcontrol_new rt5631_monomix_mixer_controls[] = {
578 SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL, 11, 1, 1),
579 SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL, 10, 1, 1),
580 };
581
582 static const struct snd_kcontrol_new rt5631_spol_mux_control =
583 SOC_DAPM_ENUM("Route", rt5631_enum[0]);
584 static const struct snd_kcontrol_new rt5631_spor_mux_control =
585 SOC_DAPM_ENUM("Route", rt5631_enum[1]);
586 static const struct snd_kcontrol_new rt5631_mono_mux_control =
587 SOC_DAPM_ENUM("Route", rt5631_enum[2]);
588
589 static const struct snd_kcontrol_new rt5631_hpl_mux_control =
590 SOC_DAPM_ENUM("Route", rt5631_enum[8]);
591 static const struct snd_kcontrol_new rt5631_hpr_mux_control =
592 SOC_DAPM_ENUM("Route", rt5631_enum[9]);
593
594 //ALC for DAC function
595 #if (RT5631_ALC_DAC_FUNC_ENA == 1)
596 static void rt5631_alc_enable(struct snd_soc_codec *codec,unsigned int EnableALC)
597 {
598         if(EnableALC)
599         {
600                 rt5631_write(codec, 0x64,0x0206);
601                 rt5631_write(codec, 0x65,0x0003);
602                 rt5631_write_index(codec, 0x21,0x5000);
603                 rt5631_write_index(codec, 0x22,0xa480);
604                 rt5631_write_index(codec, 0x23,0x0a08);
605                 rt5631_write(codec, 0x0c,0x0010);
606                 rt5631_write(codec, 0x66,0x650a);
607                 
608         }
609         else
610         {
611                 rt5631_write(codec, 0x66,0x250A);
612                 rt5631_write(codec, 0x0c,0x0000);               
613         }       
614         
615 }
616 #endif
617
618 static int spk_event(struct snd_soc_dapm_widget *w,
619         struct snd_kcontrol *kcontrol, int event)
620 {
621         struct snd_soc_codec *codec = w->codec;
622         static int spkl_out_enable, spkr_out_enable;
623
624         switch (event) {
625         case SND_SOC_DAPM_POST_PMU:
626
627 #if (RT5631_ALC_DAC_FUNC_ENA == 1)              
628                rt5631_alc_enable(codec, 1);
629 #endif          
630
631                 if (!spkl_out_enable && !strcmp(w->name, "SPKL Amp")) {
632                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD4,
633                                         PWR_SPK_L_VOL, PWR_SPK_L_VOL);
634                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1,
635                                         PWR_CLASS_D, PWR_CLASS_D);
636                         rt5631_write_mask(codec, RT5631_SPK_OUT_VOL,
637                                         0, RT_L_MUTE);
638                         spkl_out_enable = 1;
639                 }
640                 if (!spkr_out_enable && !strcmp(w->name, "SPKR Amp")) {
641                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD4,
642                                         PWR_SPK_R_VOL, PWR_SPK_R_VOL);
643                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1,
644                                         PWR_CLASS_D, PWR_CLASS_D);
645                         rt5631_write_mask(codec, RT5631_SPK_OUT_VOL,
646                                         0, RT_R_MUTE);
647                         spkr_out_enable = 1;
648                 }
649                 break;
650
651         case SND_SOC_DAPM_POST_PMD:
652                 if (spkl_out_enable && !strcmp(w->name, "SPKL Amp")) {
653                         rt5631_write_mask(codec, RT5631_SPK_OUT_VOL,
654                                         RT_L_MUTE, RT_L_MUTE);
655                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD4,
656                                         0, PWR_SPK_L_VOL);
657                         spkl_out_enable = 0;
658                 }
659                 if (spkr_out_enable && !strcmp(w->name, "SPKR Amp")) {
660                         rt5631_write_mask(codec, RT5631_SPK_OUT_VOL,
661                                         RT_R_MUTE, RT_R_MUTE);
662                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD4,
663                                         0, PWR_SPK_R_VOL);
664                         spkr_out_enable = 0;
665                 }
666                 if (0 == spkl_out_enable && 0 == spkr_out_enable)
667                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1,
668                                         0, PWR_CLASS_D);
669
670 #if (RT5631_ALC_DAC_FUNC_ENA == 1)                      
671                 rt5631_alc_enable(codec, 0);
672 #endif
673
674                 break;
675
676         default:
677                 return 0;
678         }
679
680         return 0;
681 }
682
683
684 static void hp_depop_mode2_onebit(struct snd_soc_codec *codec, int enable)
685 {
686         unsigned int soft_vol, hp_zc;
687
688         rt5631_write_mask(codec, RT5631_DEPOP_FUN_CTRL_2, 0, EN_ONE_BIT_DEPOP);
689
690         soft_vol = rt5631_read(codec, RT5631_SOFT_VOL_CTRL);
691         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, 0);
692         hp_zc = rt5631_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
693         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
694         if (enable) {
695                 rt5631_write_index(codec, RT5631_TEST_MODE_CTRL, 0x84c0);
696                 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x309f);
697                 rt5631_write_index(codec, RT5631_CP_INTL_REG2, 0x6530);
698                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_2,
699                                 EN_CAP_FREE_DEPOP);
700         } else {
701                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_2, 0);
702                 schedule_timeout_uninterruptible(msecs_to_jiffies(100));
703         }
704
705         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
706         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
707
708         return;
709 }
710
711 static void hp_mute_unmute_depop_onebit(struct snd_soc_codec *codec, int enable)
712 {
713         unsigned int soft_vol, hp_zc;
714
715         rt5631_write_mask(codec, RT5631_DEPOP_FUN_CTRL_2, 0, EN_ONE_BIT_DEPOP);
716         soft_vol = rt5631_read(codec, RT5631_SOFT_VOL_CTRL);
717         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, 0);
718         hp_zc = rt5631_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
719         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
720         if (enable) {
721                 schedule_timeout_uninterruptible(msecs_to_jiffies(10));
722                 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x307f);
723                 rt5631_write_mask(codec, RT5631_HP_OUT_VOL, 0,
724                                 RT_L_MUTE | RT_R_MUTE);
725                 schedule_timeout_uninterruptible(msecs_to_jiffies(300));
726
727         } else {
728                 rt5631_write_mask(codec, RT5631_HP_OUT_VOL,
729                         RT_L_MUTE | RT_R_MUTE, RT_L_MUTE | RT_R_MUTE);
730                 schedule_timeout_uninterruptible(msecs_to_jiffies(100));
731         }
732         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
733         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
734
735         return;
736 }
737
738 static void hp_depop2(struct snd_soc_codec *codec, int enable)
739 {
740         unsigned int soft_vol, hp_zc;
741
742         rt5631_write_mask(codec, RT5631_DEPOP_FUN_CTRL_2,
743                 EN_ONE_BIT_DEPOP, EN_ONE_BIT_DEPOP);
744         soft_vol = rt5631_read(codec, RT5631_SOFT_VOL_CTRL);
745         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, 0);
746         hp_zc = rt5631_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
747         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
748         if (enable) {
749                 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x303e);
750                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
751                         PWR_CHARGE_PUMP | PWR_HP_L_AMP | PWR_HP_R_AMP,
752                         PWR_CHARGE_PUMP | PWR_HP_L_AMP | PWR_HP_R_AMP);
753                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1,
754                         POW_ON_SOFT_GEN | EN_DEPOP2_FOR_HP);
755                 schedule_timeout_uninterruptible(msecs_to_jiffies(100));
756                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
757                         PWR_HP_DEPOP_DIS, PWR_HP_DEPOP_DIS);
758         } else {
759                 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x303F);
760                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1,
761                         POW_ON_SOFT_GEN | EN_MUTE_UNMUTE_DEPOP |
762                         PD_HPAMP_L_ST_UP | PD_HPAMP_R_ST_UP);
763                 schedule_timeout_uninterruptible(msecs_to_jiffies(75));
764                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1,
765                         POW_ON_SOFT_GEN | PD_HPAMP_L_ST_UP | PD_HPAMP_R_ST_UP);
766                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3, 0,
767                                         PWR_HP_DEPOP_DIS);
768                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1,
769                         POW_ON_SOFT_GEN | EN_DEPOP2_FOR_HP |
770                         PD_HPAMP_L_ST_UP | PD_HPAMP_R_ST_UP);
771                 schedule_timeout_uninterruptible(msecs_to_jiffies(80));
772                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1, POW_ON_SOFT_GEN);
773                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3, 0,
774                         PWR_CHARGE_PUMP | PWR_HP_L_AMP | PWR_HP_R_AMP);
775         }
776
777         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
778         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
779
780         return;
781 }
782
783 static void hp_mute_unmute_depop(struct snd_soc_codec *codec, int enable)
784 {
785         unsigned int soft_vol, hp_zc;
786
787         rt5631_write_mask(codec, RT5631_DEPOP_FUN_CTRL_2,
788                 EN_ONE_BIT_DEPOP, EN_ONE_BIT_DEPOP);
789         soft_vol = rt5631_read(codec, RT5631_SOFT_VOL_CTRL);
790         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, 0);
791         hp_zc = rt5631_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
792         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
793         if (enable) {
794                 schedule_timeout_uninterruptible(msecs_to_jiffies(10));
795                 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x302f);
796                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1,
797                         POW_ON_SOFT_GEN | EN_MUTE_UNMUTE_DEPOP |
798                         EN_HP_R_M_UN_MUTE_DEPOP | EN_HP_L_M_UN_MUTE_DEPOP);
799                 rt5631_write_mask(codec, RT5631_HP_OUT_VOL, 0,
800                                 RT_L_MUTE | RT_R_MUTE);
801                 schedule_timeout_uninterruptible(msecs_to_jiffies(160));
802         } else {
803                 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x302f);
804                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1,
805                         POW_ON_SOFT_GEN | EN_MUTE_UNMUTE_DEPOP |
806                         EN_HP_R_M_UN_MUTE_DEPOP | EN_HP_L_M_UN_MUTE_DEPOP);
807                 rt5631_write_mask(codec, RT5631_HP_OUT_VOL,
808                         RT_L_MUTE | RT_R_MUTE, RT_L_MUTE | RT_R_MUTE);
809                 schedule_timeout_uninterruptible(msecs_to_jiffies(150));
810         }
811
812         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
813         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
814
815         return;
816 }
817
818 static int hp_event(struct snd_soc_dapm_widget *w,
819         struct snd_kcontrol *kcontrol, int event)
820 {
821         struct snd_soc_codec *codec = w->codec;
822         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
823         static bool hp_en;
824         int pu_l, pu_r;
825
826         pu_l = rt5631_read(codec, RT5631_PWR_MANAG_ADD4) & PWR_HP_L_OUT_VOL;
827         pu_r = rt5631_read(codec, RT5631_PWR_MANAG_ADD4) & PWR_HP_R_OUT_VOL;
828         switch (event) {
829         case SND_SOC_DAPM_PRE_PMD:
830                 if ((pu_l && pu_r) && hp_en) {
831                         if (rt5631->codec_version) {
832                                 hp_mute_unmute_depop_onebit(codec, 0);
833                                 hp_depop_mode2_onebit(codec, 0);
834                         } else {
835                                 hp_mute_unmute_depop(codec, 0);
836                                 hp_depop2(codec, 0);
837                         }
838                         hp_en = false;
839                 }
840                 break;
841
842         case SND_SOC_DAPM_POST_PMU:
843                 if ((pu_l && pu_r) && !hp_en) {
844                         if (rt5631->codec_version) {
845                                 hp_depop_mode2_onebit(codec, 1);
846                                 hp_mute_unmute_depop_onebit(codec, 1);
847                         } else {
848                                 hp_depop2(codec, 1);
849                                 hp_mute_unmute_depop(codec, 1);
850                         }
851                         hp_en = true;
852                 }
853                 break;
854
855         default:
856                 break;
857         }
858
859         return 0;
860 }
861
862 static int dac_to_hp_event(struct snd_soc_dapm_widget *w,
863                 struct snd_kcontrol *kcontrol, int event)
864 {
865         struct snd_soc_codec *codec = w->codec;
866         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
867         static bool hp_en;
868
869         switch (event) {
870         case SND_SOC_DAPM_PRE_PMD:
871                 if (hp_en) {
872                         if (rt5631->codec_version) {
873                                 hp_mute_unmute_depop_onebit(codec, 0);
874                                 hp_depop_mode2_onebit(codec, 0);
875                         } else {
876                                 hp_mute_unmute_depop(codec, 0);
877                                 hp_depop2(codec, 0);
878                         }
879                         hp_en = false;
880                 }
881                 break;
882
883         case SND_SOC_DAPM_POST_PMU:
884                 if (!hp_en) {
885                         if (rt5631->codec_version) {
886                                 hp_depop_mode2_onebit(codec, 1);
887                                 hp_mute_unmute_depop_onebit(codec, 1);
888                         } else {
889                                 hp_depop2(codec, 1);
890                                 hp_mute_unmute_depop(codec, 1);
891                         }
892                         hp_en = true;
893                 }
894                 break;
895
896         default:
897                 break;
898         }
899
900         return 0;
901 }
902
903 static int mic_event(struct snd_soc_dapm_widget *w,
904         struct snd_kcontrol *kcontrol, int event)
905 {
906         struct snd_soc_codec *codec = w->codec;
907         int val_mic1, val_mic2;
908
909         val_mic1 = rt5631_read(codec, RT5631_PWR_MANAG_ADD2) &
910                                 PWR_MIC1_BOOT_GAIN;
911         val_mic2 = rt5631_read(codec, RT5631_PWR_MANAG_ADD2) &
912                                 PWR_MIC2_BOOT_GAIN;
913         switch (event) {
914         case SND_SOC_DAPM_POST_PMU:
915                 /*
916                  * If microphone is stereo, need not copy ADC channel
917                  * If mic1 is used, copy ADC left to right
918                  * If mic2 is used, copy ADC right to left
919                  */
920                 if (val_mic1 && val_mic2)
921                         rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
922                                                         0x0000, 0xc000);
923                 else if (val_mic1)
924                         rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
925                                                         0x4000, 0xc000);
926                 else if (val_mic2)
927                         rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
928                                                         0x8000, 0xc000);
929                 else
930                         rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
931                                                         0x0000, 0xc000);
932                 break;
933
934         default:
935                 break;
936         }
937
938         return 0;
939 }
940
941 static int auxo1_event(struct snd_soc_dapm_widget *w,
942         struct snd_kcontrol *kcontrol, int event)
943 {
944         struct snd_soc_codec *codec = w->codec;
945         static bool aux1_en;
946
947         switch (event) {
948         case SND_SOC_DAPM_PRE_PMD:
949                 if (aux1_en) {
950                         rt5631_write_mask(codec, RT5631_MONO_AXO_1_2_VOL,
951                                                 RT_L_MUTE, RT_L_MUTE);
952                         aux1_en = false;
953                 }
954                 break;
955
956         case SND_SOC_DAPM_POST_PMU:
957                 if (!aux1_en) {
958                         rt5631_write_mask(codec, RT5631_MONO_AXO_1_2_VOL,
959                                                 0, RT_L_MUTE);
960                         aux1_en = true;
961                 }
962                 break;
963
964         default:
965                 break;
966         }
967
968         return 0;
969 }
970
971 static int auxo2_event(struct snd_soc_dapm_widget *w,
972         struct snd_kcontrol *kcontrol, int event)
973 {
974         struct snd_soc_codec *codec = w->codec;
975         static bool aux2_en;
976
977         switch (event) {
978         case SND_SOC_DAPM_PRE_PMD:
979                 if (aux2_en) {
980                         rt5631_write_mask(codec, RT5631_MONO_AXO_1_2_VOL,
981                                                 RT_R_MUTE, RT_R_MUTE);
982                         aux2_en = false;
983                 }
984                 break;
985
986         case SND_SOC_DAPM_POST_PMU:
987                 if (!aux2_en) {
988                         rt5631_write_mask(codec, RT5631_MONO_AXO_1_2_VOL,
989                                                 0, RT_R_MUTE);
990                         aux2_en = true;
991                 }
992                 break;
993
994         default:
995                 break;
996         }
997
998         return 0;
999 }
1000
1001 static int mono_event(struct snd_soc_dapm_widget *w,
1002         struct snd_kcontrol *kcontrol, int event)
1003 {
1004         struct snd_soc_codec *codec = w->codec;
1005         static bool mono_en;
1006
1007         switch (event) {
1008         case SND_SOC_DAPM_PRE_PMD:
1009                 if (mono_en) {
1010                         rt5631_write_mask(codec, RT5631_MONO_AXO_1_2_VOL,
1011                                                 MUTE_MONO, MUTE_MONO);
1012                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
1013                                                 0, PWR_MONO_DEPOP_DIS);
1014                         mono_en = false;
1015                 }
1016                 break;
1017
1018         case SND_SOC_DAPM_POST_PMU:
1019                 if (!mono_en) {
1020                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
1021                                 PWR_MONO_DEPOP_DIS, PWR_MONO_DEPOP_DIS);
1022                         rt5631_write_mask(codec, RT5631_MONO_AXO_1_2_VOL,
1023                                                 0, MUTE_MONO);
1024                         mono_en = true;
1025                 }
1026                 break;
1027
1028         default:
1029                 break;
1030         }
1031
1032         return 0;
1033 }
1034
1035 /**
1036  * config_common_power - control all common power of codec system
1037  * @pmu: power up or not
1038  */
1039 static int config_common_power(struct snd_soc_codec *codec, bool pmu)
1040 {
1041         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1042         unsigned int mux_val;
1043
1044         if (pmu) {
1045                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1,
1046                         PWR_MAIN_I2S_EN | PWR_DAC_REF,
1047                         PWR_MAIN_I2S_EN | PWR_DAC_REF);
1048                 mux_val = rt5631_read(codec, RT5631_SPK_MONO_HP_OUT_CTRL);
1049                 //if (!(mux_val & HP_L_MUX_SEL_DAC_L))
1050                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1,
1051                                 PWR_DAC_L_TO_MIXER, PWR_DAC_L_TO_MIXER);
1052                 //if (!(mux_val & HP_R_MUX_SEL_DAC_R))
1053                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1,
1054                                 PWR_DAC_R_TO_MIXER, PWR_DAC_R_TO_MIXER);
1055                 if (rt5631->pll_used_flag)
1056                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD2,
1057                                                 PWR_PLL, PWR_PLL);
1058         } else if (isPlaybackon == false && isCaptureon == false){
1059                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1, 0,
1060                         PWR_MAIN_I2S_EN | PWR_DAC_REF |
1061                         PWR_DAC_L_TO_MIXER | PWR_DAC_R_TO_MIXER);
1062                 if (rt5631->pll_used_flag)
1063                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD2,
1064                                                 0, PWR_PLL);
1065         }
1066
1067         return 0;
1068 }
1069
1070 static int adc_event(struct snd_soc_dapm_widget *w,
1071         struct snd_kcontrol *kcontrol, int event)
1072 {
1073         struct snd_soc_codec *codec = w->codec;
1074         static bool pmu;
1075
1076         switch (event) {
1077         case SND_SOC_DAPM_POST_PMD:
1078                 if (pmu) {
1079                         isPlaybackon = false;
1080                         config_common_power(codec, false);
1081                         pmu = false;
1082                 }
1083                 break;
1084
1085         case SND_SOC_DAPM_PRE_PMU:
1086                 if (!pmu) {
1087                         isPlaybackon = true;
1088                         config_common_power(codec, true);
1089                         pmu = true;
1090                 }
1091                 break;
1092
1093         default:
1094                 break;
1095         }
1096
1097         return 0;
1098 }
1099
1100 static int dac_event(struct snd_soc_dapm_widget *w,
1101         struct snd_kcontrol *kcontrol, int event)
1102 {
1103         struct snd_soc_codec *codec = w->codec;
1104         static bool pmu;
1105
1106         switch (event) {
1107         case SND_SOC_DAPM_POST_PMD:
1108                 if (pmu) {
1109                         isCaptureon = false;
1110                         config_common_power(codec, false);
1111                         pmu = false;
1112                 }
1113                 break;
1114
1115         case SND_SOC_DAPM_PRE_PMU:
1116                 if (!pmu) {
1117                         isCaptureon = true;
1118                         config_common_power(codec, true);
1119                         pmu = true;
1120                 }
1121                 break;
1122
1123         default:
1124                 break;
1125         }
1126
1127         return 0;
1128 }
1129
1130 static const struct snd_soc_dapm_widget rt5631_dapm_widgets[] = {
1131 SND_SOC_DAPM_INPUT("MIC1"),
1132 SND_SOC_DAPM_INPUT("MIC2"),
1133 SND_SOC_DAPM_INPUT("AXIL"),
1134 SND_SOC_DAPM_INPUT("AXIR"),
1135 SND_SOC_DAPM_INPUT("MONOIN_RXN"),
1136 SND_SOC_DAPM_INPUT("MONOIN_RXP"),
1137
1138 SND_SOC_DAPM_MICBIAS("Mic Bias1", RT5631_PWR_MANAG_ADD2, 3, 0),
1139 SND_SOC_DAPM_MICBIAS("Mic Bias2", RT5631_PWR_MANAG_ADD2, 2, 0),
1140
1141 SND_SOC_DAPM_PGA_E("Mic1 Boost", RT5631_PWR_MANAG_ADD2, 5, 0, NULL, 0,
1142                 mic_event, SND_SOC_DAPM_POST_PMU),
1143 SND_SOC_DAPM_PGA_E("Mic2 Boost", RT5631_PWR_MANAG_ADD2, 4, 0, NULL, 0,
1144                 mic_event, SND_SOC_DAPM_POST_PMU),
1145 SND_SOC_DAPM_PGA("MONOIN_RXP Boost", RT5631_PWR_MANAG_ADD4, 7, 0, NULL, 0),
1146 SND_SOC_DAPM_PGA("MONOIN_RXN Boost", RT5631_PWR_MANAG_ADD4, 6, 0, NULL, 0),
1147 SND_SOC_DAPM_PGA("AXIL Boost", RT5631_PWR_MANAG_ADD4, 9, 0, NULL, 0),
1148 SND_SOC_DAPM_PGA("AXIR Boost", RT5631_PWR_MANAG_ADD4, 8, 0, NULL, 0),
1149 SND_SOC_DAPM_MIXER("MONO_IN", SND_SOC_NOPM, 0, 0, NULL, 0),
1150
1151 SND_SOC_DAPM_MIXER("RECMIXL Mixer", RT5631_PWR_MANAG_ADD2, 11, 0,
1152                 &rt5631_recmixl_mixer_controls[0],
1153                 ARRAY_SIZE(rt5631_recmixl_mixer_controls)),
1154 SND_SOC_DAPM_MIXER("RECMIXR Mixer", RT5631_PWR_MANAG_ADD2, 10, 0,
1155                 &rt5631_recmixr_mixer_controls[0],
1156                 ARRAY_SIZE(rt5631_recmixr_mixer_controls)),
1157 SND_SOC_DAPM_MIXER("ADC Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
1158
1159 SND_SOC_DAPM_ADC_E("Left ADC", "Left ADC HIFI Capture",
1160                 RT5631_PWR_MANAG_ADD1, 11, 0,
1161                 adc_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU),
1162 SND_SOC_DAPM_ADC_E("Right ADC", "Right ADC HIFI Capture",
1163                 RT5631_PWR_MANAG_ADD1, 10, 0,
1164                 adc_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU),
1165 SND_SOC_DAPM_DAC_E("Left DAC", "Left DAC HIFI Playback",
1166                 RT5631_PWR_MANAG_ADD1, 9, 0,
1167                 dac_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU),
1168 SND_SOC_DAPM_DAC_E("Right DAC", "Right DAC HIFI Playback",
1169                 RT5631_PWR_MANAG_ADD1, 8, 0,
1170                 dac_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU),
1171 SND_SOC_DAPM_DAC("Voice DAC", "Voice DAC Mono Playback", SND_SOC_NOPM, 0, 0),
1172 SND_SOC_DAPM_PGA("Voice DAC Boost", SND_SOC_NOPM, 0, 0, NULL, 0),
1173
1174 SND_SOC_DAPM_MIXER("SPKMIXL Mixer", RT5631_PWR_MANAG_ADD2, 13, 0,
1175                 &rt5631_spkmixl_mixer_controls[0],
1176                 ARRAY_SIZE(rt5631_spkmixl_mixer_controls)),
1177 SND_SOC_DAPM_MIXER("OUTMIXL Mixer", RT5631_PWR_MANAG_ADD2, 15, 0,
1178                 &rt5631_outmixl_mixer_controls[0],
1179                 ARRAY_SIZE(rt5631_outmixl_mixer_controls)),
1180 SND_SOC_DAPM_MIXER("OUTMIXR Mixer", RT5631_PWR_MANAG_ADD2, 14, 0,
1181                 &rt5631_outmixr_mixer_controls[0],
1182                 ARRAY_SIZE(rt5631_outmixr_mixer_controls)),
1183 SND_SOC_DAPM_MIXER("SPKMIXR Mixer", RT5631_PWR_MANAG_ADD2, 12, 0,
1184                 &rt5631_spkmixr_mixer_controls[0],
1185                 ARRAY_SIZE(rt5631_spkmixr_mixer_controls)),
1186
1187 SND_SOC_DAPM_PGA("Left SPK Vol", RT5631_PWR_MANAG_ADD4, 15, 0, NULL, 0),
1188 SND_SOC_DAPM_PGA("Right SPK Vol", RT5631_PWR_MANAG_ADD4, 14, 0, NULL, 0),
1189 SND_SOC_DAPM_PGA_E("Left HP Vol", RT5631_PWR_MANAG_ADD4, 11, 0, NULL, 0,
1190                 hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1191 SND_SOC_DAPM_PGA_E("Right HP Vol", RT5631_PWR_MANAG_ADD4, 10, 0, NULL, 0,
1192                 hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1193
1194 SND_SOC_DAPM_PGA_E("Left DAC_HP", SND_SOC_NOPM, 0, 0, NULL, 0,
1195         dac_to_hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1196 SND_SOC_DAPM_PGA_E("Right DAC_HP", SND_SOC_NOPM, 0, 0, NULL, 0,
1197         dac_to_hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1198
1199 SND_SOC_DAPM_PGA("Left Out Vol", RT5631_PWR_MANAG_ADD4, 13, 0, NULL, 0),
1200 SND_SOC_DAPM_PGA("Right Out Vol", RT5631_PWR_MANAG_ADD4, 12, 0, NULL, 0),
1201
1202 SND_SOC_DAPM_MIXER_E("AXO1MIX Mixer", RT5631_PWR_MANAG_ADD3, 11, 0,
1203                 &rt5631_AXO1MIX_mixer_controls[0],
1204                 ARRAY_SIZE(rt5631_AXO1MIX_mixer_controls),
1205                 auxo1_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1206 SND_SOC_DAPM_MIXER("SPOLMIX Mixer", SND_SOC_NOPM, 0, 0,
1207                 &rt5631_spolmix_mixer_controls[0],
1208                 ARRAY_SIZE(rt5631_spolmix_mixer_controls)),
1209 SND_SOC_DAPM_MIXER("MONOMIX Mixer", RT5631_PWR_MANAG_ADD3, 9, 0,
1210                 &rt5631_monomix_mixer_controls[0],
1211                 ARRAY_SIZE(rt5631_monomix_mixer_controls)),
1212 SND_SOC_DAPM_MIXER("SPORMIX Mixer", SND_SOC_NOPM, 0, 0,
1213                 &rt5631_spormix_mixer_controls[0],
1214                 ARRAY_SIZE(rt5631_spormix_mixer_controls)),
1215 SND_SOC_DAPM_MIXER_E("AXO2MIX Mixer", RT5631_PWR_MANAG_ADD3, 10, 0,
1216                 &rt5631_AXO2MIX_mixer_controls[0],
1217                 ARRAY_SIZE(rt5631_AXO2MIX_mixer_controls),
1218                 auxo2_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1219
1220 SND_SOC_DAPM_MUX("SPOL Mux", SND_SOC_NOPM, 0, 0, &rt5631_spol_mux_control),
1221 SND_SOC_DAPM_MUX("SPOR Mux", SND_SOC_NOPM, 0, 0, &rt5631_spor_mux_control),
1222 SND_SOC_DAPM_MUX("Mono Mux", SND_SOC_NOPM, 0, 0, &rt5631_mono_mux_control),
1223 SND_SOC_DAPM_MUX("HPL Mux", SND_SOC_NOPM, 0, 0, &rt5631_hpl_mux_control),
1224 SND_SOC_DAPM_MUX("HPR Mux", SND_SOC_NOPM, 0, 0, &rt5631_hpr_mux_control),
1225
1226 SND_SOC_DAPM_PGA_E("Mono Amp", RT5631_PWR_MANAG_ADD3, 7, 0, NULL, 0,
1227                 mono_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1228 SND_SOC_DAPM_PGA_E("SPKL Amp", SND_SOC_NOPM, 0, 0, NULL, 0,
1229                 spk_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
1230 SND_SOC_DAPM_PGA_E("SPKR Amp", SND_SOC_NOPM, 1, 0, NULL, 0,
1231                 spk_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
1232
1233 SND_SOC_DAPM_OUTPUT("AUXO1"),
1234 SND_SOC_DAPM_OUTPUT("AUXO2"),
1235 SND_SOC_DAPM_OUTPUT("SPOL"),
1236 SND_SOC_DAPM_OUTPUT("SPOR"),
1237 SND_SOC_DAPM_OUTPUT("HPOL"),
1238 SND_SOC_DAPM_OUTPUT("HPOR"),
1239 SND_SOC_DAPM_OUTPUT("MONO"),
1240 };
1241
1242
1243 static const struct snd_soc_dapm_route audio_map[] = {
1244         {"Mic1 Boost", NULL, "MIC1"},
1245         {"Mic2 Boost", NULL, "MIC2"},
1246         {"MONOIN_RXP Boost", NULL, "MONOIN_RXP"},
1247         {"MONOIN_RXN Boost", NULL, "MONOIN_RXN"},
1248         {"AXIL Boost", NULL, "AXIL"},
1249         {"AXIR Boost", NULL, "AXIR"},
1250
1251         {"MONO_IN", NULL, "MONOIN_RXP Boost"},
1252         {"MONO_IN", NULL, "MONOIN_RXN Boost"},
1253
1254         {"RECMIXL Mixer", "OUTMIXL Capture Switch", "OUTMIXL Mixer"},
1255         {"RECMIXL Mixer", "MIC1_BST1 Capture Switch", "Mic1 Boost"},
1256         {"RECMIXL Mixer", "AXILVOL Capture Switch", "AXIL Boost"},
1257         {"RECMIXL Mixer", "MONOIN_RX Capture Switch", "MONO_IN"},
1258
1259         {"RECMIXR Mixer", "OUTMIXR Capture Switch", "OUTMIXR Mixer"},
1260         {"RECMIXR Mixer", "MIC2_BST2 Capture Switch", "Mic2 Boost"},
1261         {"RECMIXR Mixer", "AXIRVOL Capture Switch", "AXIR Boost"},
1262         {"RECMIXR Mixer", "MONOIN_RX Capture Switch", "MONO_IN"},
1263
1264         {"ADC Mixer", NULL, "RECMIXL Mixer"},
1265         {"ADC Mixer", NULL, "RECMIXR Mixer"},
1266         {"Left ADC", NULL, "ADC Mixer"},
1267         {"Right ADC", NULL, "ADC Mixer"},
1268
1269         {"Voice DAC Boost", NULL, "Voice DAC"},
1270
1271         {"SPKMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
1272         {"SPKMIXL Mixer", "MIC1_P Playback Switch", "MIC1"},
1273         {"SPKMIXL Mixer", "DACL Playback Switch", "Left DAC"},
1274         {"SPKMIXL Mixer", "OUTMIXL Playback Switch", "OUTMIXL Mixer"},
1275
1276         {"SPKMIXR Mixer", "OUTMIXR Playback Switch", "OUTMIXR Mixer"},
1277         {"SPKMIXR Mixer", "DACR Playback Switch", "Right DAC"},
1278         {"SPKMIXR Mixer", "MIC2_P Playback Switch", "MIC2"},
1279         {"SPKMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
1280
1281         {"OUTMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
1282         {"OUTMIXL Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
1283         {"OUTMIXL Mixer", "DACL Playback Switch", "Left DAC"},
1284         {"OUTMIXL Mixer", "MIC1_BST1 Playback Switch", "Mic1 Boost"},
1285         {"OUTMIXL Mixer", "MIC2_BST2 Playback Switch", "Mic2 Boost"},
1286         {"OUTMIXL Mixer", "MONOIN_RXP Playback Switch", "MONOIN_RXP Boost"},
1287         {"OUTMIXL Mixer", "AXILVOL Playback Switch", "AXIL Boost"},
1288         {"OUTMIXL Mixer", "AXIRVOL Playback Switch", "AXIR Boost"},
1289         {"OUTMIXL Mixer", "VDAC Playback Switch", "Voice DAC Boost"},
1290
1291         {"OUTMIXR Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
1292         {"OUTMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
1293         {"OUTMIXR Mixer", "DACR Playback Switch", "Right DAC"},
1294         {"OUTMIXR Mixer", "MIC1_BST1 Playback Switch", "Mic1 Boost"},
1295         {"OUTMIXR Mixer", "MIC2_BST2 Playback Switch", "Mic2 Boost"},
1296         {"OUTMIXR Mixer", "MONOIN_RXN Playback Switch", "MONOIN_RXN Boost"},
1297         {"OUTMIXR Mixer", "AXILVOL Playback Switch", "AXIL Boost"},
1298         {"OUTMIXR Mixer", "AXIRVOL Playback Switch", "AXIR Boost"},
1299         {"OUTMIXR Mixer", "VDAC Playback Switch", "Voice DAC Boost"},
1300
1301         {"Left SPK Vol",  NULL, "SPKMIXL Mixer"},
1302         {"Right SPK Vol",  NULL, "SPKMIXR Mixer"},
1303         {"Left HP Vol",  NULL, "OUTMIXL Mixer"},
1304         {"Left Out Vol",  NULL, "OUTMIXL Mixer"},
1305         {"Right Out Vol",  NULL, "OUTMIXR Mixer"},
1306         {"Right HP Vol",  NULL, "OUTMIXR Mixer"},
1307
1308         {"AXO1MIX Mixer", "MIC1_BST1 Playback Switch", "Mic1 Boost"},
1309         {"AXO1MIX Mixer", "OUTVOLL Playback Switch", "Left Out Vol"},
1310         {"AXO1MIX Mixer", "OUTVOLR Playback Switch", "Right Out Vol"},
1311         {"AXO1MIX Mixer", "MIC2_BST2 Playback Switch", "Mic2 Boost"},
1312
1313         {"AXO2MIX Mixer", "MIC1_BST1 Playback Switch", "Mic1 Boost"},
1314         {"AXO2MIX Mixer", "OUTVOLL Playback Switch", "Left Out Vol"},
1315         {"AXO2MIX Mixer", "OUTVOLR Playback Switch", "Right Out Vol"},
1316         {"AXO2MIX Mixer", "MIC2_BST2 Playback Switch", "Mic2 Boost"},
1317
1318         {"SPOLMIX Mixer", "SPKVOLL Playback Switch", "Left SPK Vol"},
1319         {"SPOLMIX Mixer", "SPKVOLR Playback Switch", "Right SPK Vol"},
1320
1321         {"SPORMIX Mixer", "SPKVOLL Playback Switch", "Left SPK Vol"},
1322         {"SPORMIX Mixer", "SPKVOLR Playback Switch", "Right SPK Vol"},
1323
1324         {"MONOMIX Mixer", "OUTVOLL Playback Switch", "Left Out Vol"},
1325         {"MONOMIX Mixer", "OUTVOLR Playback Switch", "Right Out Vol"},
1326
1327         {"SPOL Mux", "SPOLMIX", "SPOLMIX Mixer"},
1328         {"SPOL Mux", "MONOIN_RX", "MONO_IN"},
1329         {"SPOL Mux", "VDAC", "Voice DAC Boost"},
1330         {"SPOL Mux", "DACL", "Left DAC"},
1331
1332         {"SPOR Mux", "SPORMIX", "SPORMIX Mixer"},
1333         {"SPOR Mux", "MONOIN_RX", "MONO_IN"},
1334         {"SPOR Mux", "VDAC", "Voice DAC Boost"},
1335         {"SPOR Mux", "DACR", "Right DAC"},
1336
1337         {"Mono Mux", "MONOMIX", "MONOMIX Mixer"},
1338         {"Mono Mux", "MONOIN_RX", "MONO_IN"},
1339         {"Mono Mux", "VDAC", "Voice DAC Boost"},
1340
1341         {"Right DAC_HP", "NULL", "Right DAC"},
1342         {"Left DAC_HP", "NULL", "Left DAC"},
1343
1344         {"HPL Mux", "LEFT HPVOL", "Left HP Vol"},
1345         {"HPL Mux", "LEFT DAC", "Left DAC_HP"},
1346         {"HPR Mux", "RIGHT HPVOL", "Right HP Vol"},
1347         {"HPR Mux", "RIGHT DAC", "Right DAC_HP"},
1348
1349         {"SPKL Amp", NULL, "SPOL Mux"},
1350         {"SPKR Amp", NULL, "SPOR Mux"},
1351         {"Mono Amp", NULL, "Mono Mux"},
1352
1353         {"AUXO1", NULL, "AXO1MIX Mixer"},
1354         {"AUXO2", NULL, "AXO2MIX Mixer"},
1355         {"SPOL", NULL, "SPKL Amp"},
1356         {"SPOR", NULL, "SPKR Amp"},
1357
1358         {"HPOL", NULL, "HPL Mux"},
1359         {"HPOR", NULL, "HPR Mux"},
1360
1361         {"MONO", NULL, "Mono Amp"}
1362 };
1363
1364 static int rt5631_add_widgets(struct snd_soc_codec *codec)
1365 {
1366         struct snd_soc_dapm_context *dapm = &codec->dapm;
1367
1368         snd_soc_dapm_new_controls(dapm, rt5631_dapm_widgets,
1369                         ARRAY_SIZE(rt5631_dapm_widgets));
1370         snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
1371
1372         return 0;
1373 }
1374
1375 static int voltab[2][16] = 
1376 {
1377     //spk
1378     {0x27, 0x1b, 0x18, 0x15, 0x13, 0x11, 0x0f, 0x0e, 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06},
1379     //hp
1380     {0x1f, 0x1c, 0x1a, 0x18, 0x16, 0x14, 0x12, 0x10, 0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},
1381 };
1382 static int gvolume = 0;
1383
1384 #if 1
1385 static int get_vol(int max, int min, int stage_num, int stage)
1386 {
1387         int ret, step=((max-min)<<8)/(stage_num-1);
1388         if(stage==stage_num-1)
1389                 ret=min;
1390         else if(stage==0)
1391                 ret=max;
1392         else {
1393                 ret=(stage_num-stage-1) * step;
1394                 ret >>= 8;
1395                 ret = min+ret;
1396         }
1397         DBG("%s(): ret=%02x, max=0x%02x, min=0x%02x, stage_num=%d, stage=%d\n", 
1398                 __FUNCTION__, 
1399                 ret,
1400                 max,
1401                 min,
1402                 stage_num,
1403                 stage);
1404         return ret;
1405 }
1406
1407 static void rt5631_set_volume(int vollevel)
1408 {
1409         struct snd_soc_codec *codec = rt5631_codec;
1410         int tmpvol1, tmpvol2;
1411
1412         //DBG("rt5631_set_volume = %d\n", vollevel);
1413     
1414         if (vollevel > 15) vollevel = 8;
1415         gvolume = vollevel;
1416         
1417 //      tmpvol1 = voltab[0][vollevel];
1418 //      tmpvol2 = voltab[1][vollevel];
1419         tmpvol1=get_vol(0x27, DEF_VOL_SPK&0x3f, 16, vollevel);
1420         tmpvol2=get_vol(0x1f, DEF_VOL&0x1f, 16, vollevel);
1421
1422         if(vollevel == 0){
1423                 rt5631_write_mask(codec, RT5631_SPK_OUT_VOL, 0x8080, 0x8080);
1424                 rt5631_write_mask(codec, RT5631_HP_OUT_VOL, 0x8080, 0x8080);
1425         }
1426 //      else{
1427 //              rt5631_write_mask(codec, RT5631_SPK_OUT_VOL, 0x00, 0x8080);
1428 //              rt5631_write_mask(codec, RT5631_HP_OUT_VOL, 0x00, 0x8080);
1429 //      }
1430
1431         rt5631_write_mask(codec, RT5631_SPK_OUT_VOL, ((tmpvol1<<8)|tmpvol1), 0x3f3f);
1432         rt5631_write_mask(codec, RT5631_HP_OUT_VOL,  ((tmpvol2<<8)|tmpvol2), 0x3f3f);
1433 }
1434
1435 static void rt5631_set_eq(int on)
1436 {
1437         struct snd_soc_codec *codec = rt5631_codec;
1438         unsigned int Reg0C;
1439
1440         Reg0C = rt5631_read(codec, RT5631_STEREO_DAC_VOL_1);
1441         DBG("------- rt5631_set_eq: read Reg0C = 0x%04x\n", Reg0C);
1442
1443         Reg0C &= 0xFF80;
1444         if(on) { 
1445                 Reg0C |= 0x10;
1446         } else {
1447                 Reg0C |= 0x00;
1448         }
1449
1450         DBG("------- rt5631_set_eq: write Reg0C = 0x%04x\n", Reg0C);
1451         rt5631_write(codec, RT5631_STEREO_DAC_VOL_1, Reg0C);
1452 }
1453
1454 #else
1455
1456 static void rt5631_set_volume(int vollevel)
1457 {
1458         struct snd_soc_codec *codec = rt5631_codec;
1459         u8 tmpvol1, tmpvol2;
1460         u16 spk_vol, hp_vol;
1461
1462         DBG("rt5631_set_volume = %d\n", vollevel);
1463     
1464         if (vollevel > 15) vollevel = 8;
1465         gvolume = vollevel;
1466         
1467         tmpvol1 = voltab[0][vollevel];
1468         tmpvol2 = voltab[1][vollevel];
1469
1470         spk_vol = snd_soc_read(codec, RT5631_SPK_OUT_VOL);
1471         hp_vol  = snd_soc_read(codec, RT5631_HP_OUT_VOL);
1472
1473         DBG("\n\nold value: 0x%04x, 0x%04x\n", spk_vol & 0x3F3F, hp_vol & 0x3F3F);
1474         DBG("new value: 0x%04x\n", (tmpvol1<<8)|tmpvol1, (tmpvol2<<8)|tmpvol2);
1475
1476         spk_vol &= 0x3C3C;
1477         spk_vol |= (tmpvol1<<8)|tmpvol1;
1478         hp_vol  &= 0x3C3C;
1479         hp_vol  |= (tmpvol2<<8)|tmpvol2;
1480
1481         snd_soc_write(codec, RT5631_SPK_OUT_VOL, spk_vol);
1482         snd_soc_write(codec, RT5631_HP_OUT_VOL , hp_vol);
1483 }
1484
1485 #endif
1486 struct coeff_clk_div {
1487         u32 mclk;
1488         u32 bclk;
1489         u32 rate;
1490         u16 reg_val;
1491 };
1492
1493 /* PLL divisors yes*/
1494 struct pll_div {
1495         u32 pll_in;
1496         u32 pll_out;
1497         u16 reg_val;
1498 };
1499
1500 static const struct pll_div codec_master_pll_div[] = {
1501         {2048000,  8192000,  0x0ea0},
1502         {3686400,  8192000,  0x4e27},
1503         {12000000,  8192000,  0x456b},
1504         {13000000,  8192000,  0x495f},
1505         {13100000,  8192000,  0x0320},
1506         {2048000,  11289600,  0xf637},
1507         {3686400,  11289600,  0x2f22},
1508         {12000000,  11289600,  0x3e2f},
1509         {13000000,  11289600,  0x4d5b},
1510         {13100000,  11289600,  0x363b},
1511         {2048000,  16384000,  0x1ea0},
1512         {3686400,  16384000,  0x9e27},
1513         {12000000,  16384000,  0x452b},
1514         {13000000,  16384000,  0x542f},
1515         {13100000,  16384000,  0x03a0},
1516         {2048000,  16934400,  0xe625},
1517         {3686400,  16934400,  0x9126},
1518         {12000000,  16934400,  0x4d2c},
1519         {13000000,  16934400,  0x742f},
1520         {13100000,  16934400,  0x3c27},
1521         {2048000,  22579200,  0x2aa0},
1522         {3686400,  22579200,  0x2f20},
1523         {12000000,  22579200,  0x7e2f},
1524         {13000000,  22579200,  0x742f},
1525         {13100000,  22579200,  0x3c27},
1526         {2048000,  24576000,  0x2ea0},
1527         {3686400,  24576000,  0xee27},
1528         {12000000,  24576000,  0x2915},
1529         {13000000,  24576000,  0x772e},
1530         {13100000,  24576000,  0x0d20},
1531         {26000000,  24576000,  0x2027},
1532         {26000000,  22579200,  0x392f},
1533         {24576000,  22579200,  0x0921},
1534         {24576000,  24576000,  0x02a0},
1535 };
1536
1537 static const struct pll_div codec_slave_pll_div[] = {
1538         {256000,  2048000,  0x46f0},
1539         {256000,  4096000,  0x3ea0},
1540         {352800,         5644800,  0x3ea0},
1541         {512000,         8192000,  0x3ea0},
1542         {1024000,  8192000,  0x46f0},
1543         {705600,  11289600,  0x3ea0},
1544         {1024000,  16384000,  0x3ea0},
1545         {1411200,  22579200,  0x3ea0},
1546         {1536000,  24576000,  0x3ea0},
1547         {2048000,  16384000,  0x1ea0},
1548         {2822400,  22579200,  0x1ea0},
1549         {2822400,  45158400,  0x5ec0},
1550         {5644800,  45158400,  0x46f0},
1551         {3072000,  24576000,  0x1ea0},
1552         {3072000,  49152000,  0x5ec0},
1553         {6144000,  49152000,  0x46f0},
1554         {705600,  11289600,  0x3ea0},
1555         {705600,  8467200,  0x3ab0},
1556         {24576000,  24576000,  0x02a0},
1557         {1411200,  11289600,  0x1690},
1558         {2822400,  11289600,  0x0a90},
1559         {1536000,  12288000,  0x1690},
1560         {3072000,  12288000,  0x0a90},
1561 };
1562
1563 static struct coeff_clk_div coeff_div[] = {
1564         /* sysclk is 256fs */
1565         {2048000,  8000 * 32,  8000, 0x1000},
1566         {2048000,  8000 * 64,  8000, 0x0000},
1567         {2822400,  11025 * 32,  11025,  0x1000},
1568         {2822400,  11025 * 64,  11025,  0x0000},
1569         {4096000,  16000 * 32,  16000,  0x1000},
1570         {4096000,  16000 * 64,  16000,  0x0000},
1571         {5644800,  22050 * 32,  22050,  0x1000},
1572         {5644800,  22050 * 64,  22050,  0x0000},
1573         {8192000,  32000 * 32,  32000,  0x1000},
1574         {8192000,  32000 * 64,  32000,  0x0000},
1575         {11289600,  44100 * 32,  44100,  0x1000},
1576         {11289600,  44100 * 64,  44100,  0x0000},
1577         {12288000,  48000 * 32,  48000,  0x1000},
1578         {12288000,  48000 * 64,  48000,  0x0000},
1579         {22579200,  88200 * 32,  88200,  0x1000},
1580         {22579200,  88200 * 64,  88200,  0x0000},
1581         {24576000,  96000 * 32,  96000,  0x1000},
1582         {24576000,  96000 * 64,  96000,  0x0000},
1583         {22579200,  176400 * 32,  176400,  0x1000},
1584         {22579200,  176400 * 64,  176400,  0x0000},
1585         {24576000,  192000 * 32,  192000,  0x1000},
1586         {24576000,  162000 * 64,  192000,  0x0000},
1587         /* sysclk is 512fs */
1588         {4096000,  8000 * 32,  8000, 0x3000},
1589         {4096000,  8000 * 64,  8000, 0x2000},
1590         {5644800,  11025 * 32,  11025, 0x3000},
1591         {5644800,  11025 * 64,  11025, 0x2000},
1592         {8192000,  16000 * 32,  16000, 0x3000},
1593         {8192000,  16000 * 64,  16000, 0x2000},
1594         {11289600,  22050 * 32,  22050, 0x3000},
1595         {11289600,  22050 * 64,  22050, 0x2000},
1596         {16384000,  32000 * 32,  32000, 0x3000},
1597         {16384000,  32000 * 64,  32000, 0x2000},
1598         {22579200,  44100 * 32,  44100, 0x3000},
1599         {22579200,  44100 * 64,  44100, 0x2000},
1600         {24576000,  48000 * 32,  48000, 0x3000},
1601         {24576000,  48000 * 64,  48000, 0x2000},
1602         {45158400,  88200 * 32,  88200, 0x3000},
1603         {45158400,  88200 * 64,  88200, 0x2000},
1604         {49152000,  96000 * 32,  96000, 0x3000},
1605         {49152000,  96000 * 64,  96000, 0x2000},
1606         /* sysclk is 24.576Mhz or 22.5792Mhz */
1607         {24576000,  8000 * 32,  8000,  0x7080},
1608         {24576000,  8000 * 64,  8000,  0x6080},
1609         {24576000,  16000 * 32,  16000,  0x5080},
1610         {24576000,  16000 * 64,  16000,  0x4080},
1611         {24576000,  24000 * 32,  24000,  0x5000},
1612         {24576000,  24000 * 64,  24000,  0x4000},
1613         {24576000,  32000 * 32,  32000,  0x3080},
1614         {24576000,  32000 * 64,  32000,  0x2080},
1615         {22579200,  11025 * 32,  11025,  0x7000},
1616         {22579200,  11025 * 64,  11025,  0x6000},
1617         {22579200,  22050 * 32,  22050,  0x5000},
1618         {22579200,  22050 * 64,  22050,  0x4000},
1619 };
1620
1621 static int get_coeff(int mclk, int rate, int timesofbclk)
1622 {
1623         int i;
1624
1625         for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
1626                 if (coeff_div[i].mclk == mclk && coeff_div[i].rate == rate &&
1627                         (coeff_div[i].bclk / coeff_div[i].rate) == timesofbclk)
1628                         return i;
1629         }
1630         return -EINVAL;
1631 }
1632
1633 static int get_coeff_in_slave_mode(int mclk, int rate)
1634 {
1635         return get_coeff(mclk, rate, timesofbclk);
1636 }
1637
1638 static int get_coeff_in_master_mode(int mclk, int rate, int bclk)
1639 {
1640         return get_coeff(mclk, rate, (bclk / rate));
1641 }
1642
1643 static void rt5631_set_dmic_params(struct snd_soc_codec *codec,
1644         struct snd_pcm_hw_params *params)
1645 {
1646         int rate;
1647
1648         rt5631_write_mask(codec, RT5631_GPIO_CTRL,
1649                 GPIO_PIN_FUN_SEL_GPIO_DIMC | GPIO_DMIC_FUN_SEL_DIMC,
1650                 GPIO_PIN_FUN_SEL_MASK | GPIO_DMIC_FUN_SEL_MASK);
1651         rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL, DMIC_ENA, DMIC_ENA_MASK);
1652         rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
1653                 DMIC_L_CH_LATCH_FALLING | DMIC_R_CH_LATCH_RISING,
1654                 DMIC_L_CH_LATCH_MASK|DMIC_R_CH_LATCH_MASK);
1655
1656         rate = params_rate(params);
1657         switch (rate) {
1658         case 44100:
1659         case 48000:
1660                 rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
1661                         DMIC_CLK_CTRL_TO_32FS, DMIC_CLK_CTRL_MASK);
1662                 break;
1663
1664         case 32000:
1665         case 22050:
1666                 rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
1667                         DMIC_CLK_CTRL_TO_64FS, DMIC_CLK_CTRL_MASK);
1668                 break;
1669
1670         case 16000:
1671         case 11025:
1672         case 8000:
1673                 rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
1674                         DMIC_CLK_CTRL_TO_128FS, DMIC_CLK_CTRL_MASK);
1675                 break;
1676
1677         default:
1678                 break;
1679         }
1680
1681         rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
1682                 DMIC_L_CH_UNMUTE | DMIC_R_CH_UNMUTE,
1683                 DMIC_L_CH_MUTE_MASK | DMIC_R_CH_MUTE_MASK);
1684
1685         return;
1686 }
1687
1688 static int rt5631_hifi_pcm_params(struct snd_pcm_substream *substream,
1689                 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1690 {
1691         struct snd_soc_pcm_runtime *rtd = substream->private_data;
1692         struct snd_soc_codec *codec = rtd->codec;
1693         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1694         int stream = substream->stream, rate = params_rate(params), coeff;
1695         unsigned int iface = 0;
1696
1697         pr_debug("enter %s\n", __func__);
1698
1699         if (!rt5631->master)
1700                 coeff = get_coeff_in_slave_mode(rt5631->sysclk, rate);
1701         else
1702                 coeff = get_coeff_in_master_mode(rt5631->sysclk, rate,
1703                                         rate * timesofbclk);
1704         if (coeff < 0)
1705                 pr_err("%s: get coeff err!\n", __func__);
1706
1707         switch (params_format(params)) {
1708         case SNDRV_PCM_FORMAT_S16_LE:
1709                 break;
1710         case SNDRV_PCM_FORMAT_S20_3LE:
1711                 iface |= SDP_I2S_DL_20;
1712                 break;
1713         case SNDRV_PCM_FORMAT_S24_LE:
1714                 iface |= SDP_I2S_DL_24;
1715                 break;
1716         case SNDRV_PCM_FORMAT_S8:
1717                 iface |= SDP_I2S_DL_8;
1718                 break;
1719         default:
1720                 return -EINVAL;
1721         }
1722
1723         if (SNDRV_PCM_STREAM_CAPTURE == stream) {
1724                 if (rt5631->dmic_used_flag)
1725                         rt5631_set_dmic_params(codec, params);
1726         }
1727
1728         rt5631_write_mask(codec, RT5631_SDP_CTRL, iface, SDP_I2S_DL_MASK);
1729
1730         if (coeff >= 0)
1731                 rt5631_write(codec, RT5631_STEREO_AD_DA_CLK_CTRL,
1732                                         coeff_div[coeff].reg_val);
1733
1734         return 0;
1735 }
1736
1737 static int rt5631_hifi_codec_set_dai_fmt(struct snd_soc_dai *codec_dai,
1738                                                 unsigned int fmt)
1739 {
1740         struct snd_soc_codec *codec = codec_dai->codec;
1741         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1742         unsigned int iface = 0;
1743
1744         pr_debug("enter %s\n", __func__);
1745
1746         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1747         case SND_SOC_DAIFMT_CBM_CFM:
1748                 rt5631->master = 1;
1749                 break;
1750         case SND_SOC_DAIFMT_CBS_CFS:
1751                 iface |= SDP_MODE_SEL_SLAVE;
1752                 rt5631->master = 0;
1753                 break;
1754         default:
1755                 return -EINVAL;
1756         }
1757
1758         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1759         case SND_SOC_DAIFMT_I2S:
1760                 break;
1761         case SND_SOC_DAIFMT_LEFT_J:
1762                 iface |= SDP_I2S_DF_LEFT;
1763                 break;
1764         case SND_SOC_DAIFMT_DSP_A:
1765                 iface |= SDP_I2S_DF_PCM_A;
1766                 break;
1767         case SND_SOC_DAIFMT_DSP_B:
1768                 iface  |= SDP_I2S_DF_PCM_B;
1769                 break;
1770         default:
1771                 return -EINVAL;
1772         }
1773
1774         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1775         case SND_SOC_DAIFMT_NB_NF:
1776                 break;
1777         case SND_SOC_DAIFMT_IB_NF:
1778                 iface |= SDP_I2S_BCLK_POL_CTRL;
1779                 break;
1780         default:
1781                 return -EINVAL;
1782         }
1783
1784         rt5631_write(codec, RT5631_SDP_CTRL, iface);
1785
1786         return 0;
1787 }
1788
1789 static int rt5631_hifi_codec_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1790                                 int clk_id, unsigned int freq, int dir)
1791 {
1792         struct snd_soc_codec *codec = codec_dai->codec;
1793         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1794
1795         DBG("enter %s, syclk=%d\n", __func__, freq);
1796         if ((freq >= (256 * 8000)) && (freq <= (512 * 96000))) {
1797                 rt5631->sysclk = freq;
1798                 return 0;
1799         }
1800
1801         pr_info("unsupported sysclk freq %u for audio i2s\n", freq);
1802         pr_info("set sysclk to 24.576Mhz by default\n");
1803
1804         rt5631->sysclk = 24576000;
1805         return 0;
1806 }
1807
1808 static int rt5631_codec_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1809                 int source, unsigned int freq_in, unsigned int freq_out)
1810 {
1811         struct snd_soc_codec *codec = codec_dai->codec;
1812         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1813         int i, ret = -EINVAL;
1814
1815         DBG(KERN_DEBUG "enter %s\n", __func__);
1816
1817         if (!freq_in || !freq_out)
1818                 return 0;
1819
1820         if (rt5631->master) {
1821                 for (i = 0; i < ARRAY_SIZE(codec_master_pll_div); i++)
1822                         if (freq_in == codec_master_pll_div[i].pll_in &&
1823                         freq_out == codec_master_pll_div[i].pll_out) {
1824                                 rt5631_write(codec, RT5631_PLL_CTRL,
1825                                         codec_master_pll_div[i].reg_val);
1826                                 schedule_timeout_uninterruptible(
1827                                         msecs_to_jiffies(20));
1828                                 rt5631_write(codec, RT5631_GLOBAL_CLK_CTRL,
1829                                         SYSCLK_SOUR_SEL_PLL);
1830                                 rt5631->pll_used_flag = 1;
1831                                 ret = 0;
1832                                 break;
1833                         }
1834         } else {
1835                 for (i = 0; i < ARRAY_SIZE(codec_slave_pll_div); i++)
1836                         if (freq_in == codec_slave_pll_div[i].pll_in &&
1837                         freq_out == codec_slave_pll_div[i].pll_out) {
1838                                 rt5631_write(codec, RT5631_PLL_CTRL,
1839                                         codec_slave_pll_div[i].reg_val);
1840                                 schedule_timeout_uninterruptible(
1841                                         msecs_to_jiffies(20));
1842                                 rt5631_write(codec, RT5631_GLOBAL_CLK_CTRL,
1843                                         SYSCLK_SOUR_SEL_PLL |
1844                                         PLLCLK_SOUR_SEL_BITCLK);
1845                                 rt5631->pll_used_flag = 1;
1846                                 ret = 0;
1847                                 break;
1848                         }
1849         }
1850
1851         return ret;
1852 }
1853
1854 #if defined(CONFIG_ADJUST_VOL_BY_CODEC)
1855 static int rt5631_trigger(struct snd_pcm_substream *substream, int status, struct snd_soc_dai *dai)
1856 {
1857         //DBG("rt5631_trigger\n");
1858         if(status == SNDRV_PCM_TRIGGER_VOLUME){
1859                 //DBG("rt5631_trigger: vol = %d\n", substream->number);
1860                 if(substream->number < 100){
1861                         rt5631_set_volume(substream->number);
1862                 } else {
1863                         if(substream->number == 100) { // eq off
1864                                 DBG("---------- eq off\n");
1865                                 rt5631_set_eq(0);
1866                         } else { // eq on   +6dB
1867                                 DBG("---------- eq on\n");
1868                                 rt5631_set_eq(1);
1869                         }
1870                 }               
1871         }
1872
1873         return 0;
1874 }
1875 #endif
1876
1877 static ssize_t rt5631_index_reg_show(struct device *dev,
1878         struct device_attribute *attr, char *buf)
1879 {
1880         #define IDX_REG_FMT "%02x: %04x\n"
1881         #define IDX_REG_LEN 9
1882         unsigned int val;
1883         int cnt = 0, i;
1884
1885         cnt += sprintf(buf, "RT5631 index register\n");
1886         for (i = 0; i < 0x55; i++) {
1887                 if (cnt + IDX_REG_LEN >= PAGE_SIZE - 1)
1888                         break;
1889                 val = rt5631_read_index(rt5631_codec, i);
1890                 if (!val)
1891                         continue;
1892                 cnt += sprintf(buf + cnt, IDX_REG_FMT, i, val);
1893         }
1894
1895         if (cnt >= PAGE_SIZE)
1896                 cnt = PAGE_SIZE - 1;
1897
1898         return cnt;
1899 }
1900 static DEVICE_ATTR(index_reg, 0444, rt5631_index_reg_show, NULL);
1901
1902 #define RT5631_STEREO_RATES SNDRV_PCM_RATE_8000_192000
1903 #define RT5631_FORMAT   (SNDRV_PCM_FMTBIT_S16_LE | \
1904                         SNDRV_PCM_FMTBIT_S20_3LE | \
1905                         SNDRV_PCM_FMTBIT_S24_LE | \
1906                         SNDRV_PCM_FMTBIT_S8)
1907
1908 static struct snd_soc_dai_ops rt5631_ops = {
1909         .hw_params = rt5631_hifi_pcm_params,
1910         .set_fmt = rt5631_hifi_codec_set_dai_fmt,
1911         .set_sysclk = rt5631_hifi_codec_set_dai_sysclk,
1912         .set_pll = rt5631_codec_set_dai_pll,
1913 #if defined(CONFIG_ADJUST_VOL_BY_CODEC)
1914     .trigger = rt5631_trigger,
1915 #endif
1916 };
1917
1918 static struct snd_soc_dai_driver rt5631_dai[] = {
1919         {
1920                 .name = "rt5631-hifi",
1921                 .playback = {
1922                         .stream_name = "HIFI Playback",
1923                         .channels_min = 1,
1924                         .channels_max = 2,
1925                         .rates = RT5631_STEREO_RATES,
1926                         .formats = RT5631_FORMAT,
1927                 },
1928                 .capture = {
1929                         .stream_name = "HIFI Capture",
1930                         .channels_min = 1,
1931                         .channels_max = 2,
1932                         .rates = RT5631_STEREO_RATES,
1933                         .formats = RT5631_FORMAT,
1934                 },
1935                 .ops = &rt5631_ops,
1936         },
1937 };
1938
1939 static int rt5631_set_bias_level(struct snd_soc_codec *codec,
1940                         enum snd_soc_bias_level level)
1941 {
1942         switch (level) {
1943         case SND_SOC_BIAS_ON:
1944                 break;
1945
1946         case SND_SOC_BIAS_PREPARE:
1947                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
1948                         PWR_VREF | PWR_MAIN_BIAS, PWR_VREF | PWR_MAIN_BIAS);
1949                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD2,
1950                         PWR_MICBIAS1_VOL | PWR_MICBIAS2_VOL,
1951                         PWR_MICBIAS1_VOL | PWR_MICBIAS2_VOL);
1952                 break;
1953
1954         case SND_SOC_BIAS_STANDBY:
1955         //      rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD2, 0,
1956         //              PWR_MICBIAS1_VOL | PWR_MICBIAS2_VOL);
1957                 printk("standby rt5631\n");
1958                 rt5631_write(codec, RT5631_PWR_MANAG_ADD1, 0x0000);
1959                 rt5631_write(codec, RT5631_PWR_MANAG_ADD2, 0x0000);
1960                 rt5631_write(codec, RT5631_PWR_MANAG_ADD3, 0x0000);
1961                 rt5631_write(codec, RT5631_PWR_MANAG_ADD4, 0x0000);             
1962                 break;
1963
1964         case SND_SOC_BIAS_OFF:
1965                 rt5631_write_mask(codec, RT5631_SPK_OUT_VOL,
1966                         RT_L_MUTE | RT_R_MUTE, RT_L_MUTE | RT_R_MUTE);
1967                 rt5631_write_mask(codec, RT5631_HP_OUT_VOL,
1968                         RT_L_MUTE | RT_R_MUTE, RT_L_MUTE | RT_R_MUTE);
1969                 rt5631_write(codec, RT5631_PWR_MANAG_ADD1, 0x0000);
1970                 rt5631_write(codec, RT5631_PWR_MANAG_ADD2, 0x0000);
1971                 rt5631_write(codec, RT5631_PWR_MANAG_ADD3, 0x0000);
1972                 rt5631_write(codec, RT5631_PWR_MANAG_ADD4, 0x0000);
1973                 break;
1974
1975         default:
1976                 break;
1977         }
1978         codec->dapm.bias_level = level;
1979
1980         return 0;
1981 }
1982
1983 static int rt5631_probe(struct snd_soc_codec *codec)
1984 {
1985         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1986         unsigned int val;
1987         int ret;
1988         ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
1989         if (ret != 0) {
1990                 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
1991                 return ret;
1992         }
1993         codec->cache_bypass = 1;
1994
1995         val = rt5631_read_index(codec, RT5631_ADDA_MIXER_INTL_REG3);
1996         if (val & 0x0002)
1997                 rt5631->codec_version = 1;
1998         else
1999                 rt5631->codec_version = 0;
2000
2001         rt5631_reset(codec);
2002         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
2003                 PWR_VREF | PWR_MAIN_BIAS, PWR_VREF | PWR_MAIN_BIAS);
2004         schedule_timeout_uninterruptible(msecs_to_jiffies(80));
2005         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3, PWR_FAST_VREF_CTRL,
2006                                         PWR_FAST_VREF_CTRL);
2007         rt5631_reg_init(codec);
2008
2009         /* power off ClassD auto Recovery */
2010         if (rt5631->codec_version)
2011                 rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
2012                                         0x2000, 0x2000);
2013         else
2014                 rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
2015                                         0, 0x2000);
2016
2017         codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
2018         rt5631_codec = codec;
2019
2020 #if (RT5631_SPK_TIMER == 1)
2021         /* Timer module installing */
2022         setup_timer( &spk_timer, spk_timer_callback, 0 );
2023         DBG( "Starting timer to fire in 5s (%ld)\n", jiffies );
2024         ret = mod_timer( &spk_timer, jiffies + msecs_to_jiffies(5000) );
2025         if (ret) printk("Error in mod_timer\n");
2026
2027         INIT_WORK(&spk_work, spk_work_handler);
2028 #endif
2029 //bard 7-16 s
2030         INIT_DELAYED_WORK(&rt5631_delay_cap,rt5631_adc_on);
2031 //bard 7-16 e
2032         snd_soc_add_codec_controls(codec, rt5631_snd_controls,
2033                 ARRAY_SIZE(rt5631_snd_controls));
2034         rt5631_add_widgets(codec);
2035
2036         ret = device_create_file(codec->dev, &dev_attr_index_reg);
2037         if (ret != 0) {
2038                 dev_err(codec->dev,
2039                         "Failed to create index_reg sysfs files: %d\n", ret);
2040                 return ret;
2041         }
2042
2043         DBG("RT5631 initial ok!\n");
2044
2045         return 0;
2046 }
2047
2048 static int rt5631_remove(struct snd_soc_codec *codec)
2049 {
2050
2051
2052 #if (RT5631_SPK_TIMER == 1)     
2053         /* Timer¡¡module¡¡uninstalling */
2054         int ret;
2055         ret = del_timer(&spk_timer);
2056         if(ret) printk("The timer is still in use...\n");
2057         DBG("Timer module uninstalling\n");
2058 #endif
2059
2060
2061         rt5631_set_bias_level(codec, SND_SOC_BIAS_OFF);
2062         return 0;
2063 }
2064
2065 static int rt5631_suspend(struct snd_soc_codec *codec)
2066 {
2067         rt5631_set_bias_level(codec, SND_SOC_BIAS_OFF);
2068         return 0;
2069 }
2070
2071 static int rt5631_resume(struct snd_soc_codec *codec)
2072 {
2073         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
2074
2075         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
2076                 PWR_VREF | PWR_MAIN_BIAS, PWR_VREF | PWR_MAIN_BIAS);
2077         schedule_timeout_uninterruptible(msecs_to_jiffies(110));
2078         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
2079                 PWR_FAST_VREF_CTRL, PWR_FAST_VREF_CTRL);
2080         rt5631_reg_init(codec);
2081
2082         /* power off ClassD auto Recovery */
2083         if (rt5631->codec_version)
2084                 rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
2085                                         0x2000, 0x2000);
2086         else
2087                 rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
2088                                         0, 0x2000);
2089
2090 #if (RT5631_SPK_TIMER == 1)
2091                 //last_is_spk = !last_is_spk;   //wired~, update eqmode right here by spk_timer.
2092                 last_is_spk = -1;       //wired~, update eqmode right here by spk_timer. //bard 9-13
2093 #endif
2094
2095         return 0;
2096 }
2097
2098 /*
2099  * detect short current for mic1
2100  */
2101 int rt5631_ext_mic_detect(void)
2102 {
2103         struct snd_soc_codec *codec = rt5631_codec;
2104         int det;
2105
2106         rt5631_write_mask(codec, RT5631_MIC_CTRL_2, MICBIAS1_S_C_DET_ENA,
2107                                 MICBIAS1_S_C_DET_MASK);
2108         det = rt5631_read(codec, RT5631_INT_ST_IRQ_CTRL_2) & 0x0001;
2109         rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2, 0x0001, 0x00001);
2110
2111         return det;
2112 }
2113 EXPORT_SYMBOL_GPL(rt5631_ext_mic_detect);
2114
2115 static struct snd_soc_codec_driver soc_codec_dev_rt5631 = {
2116         .probe = rt5631_probe,
2117         .remove = rt5631_remove,
2118         .suspend = rt5631_suspend,
2119         .resume = rt5631_resume,
2120         .set_bias_level = rt5631_set_bias_level,
2121         .reg_cache_size = ARRAY_SIZE(rt5631_reg),
2122         .reg_word_size = sizeof(u16),
2123         .reg_cache_default = rt5631_reg,
2124         .reg_cache_step = 1,
2125 };
2126
2127 void rt5631_shutdown(struct i2c_client *client)
2128 {
2129         rt5631_set_bias_level(rt5631_codec, SND_SOC_BIAS_OFF);
2130 }
2131
2132
2133 static const struct i2c_device_id rt5631_i2c_id[] = {
2134         { "rt5631", 0 },
2135         { }
2136 };
2137 MODULE_DEVICE_TABLE(i2c, rt5631_i2c_id);
2138
2139 static int rt5631_i2c_probe(struct i2c_client *i2c,
2140                     const struct i2c_device_id *id)
2141 {
2142         struct rt5631_priv *rt5631;
2143         int ret;
2144
2145         printk("RT5631 Audio Codec %s\n", RT5631_VERSION);
2146
2147         rt5631 = kzalloc(sizeof(struct rt5631_priv), GFP_KERNEL);
2148         if (NULL == rt5631)
2149                 return -ENOMEM;
2150
2151         i2c_set_clientdata(i2c, rt5631);
2152
2153         ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5631,
2154                         rt5631_dai, ARRAY_SIZE(rt5631_dai));
2155         if (ret < 0)
2156                 kfree(rt5631);
2157
2158         return ret;
2159 }
2160
2161 static int rt5631_i2c_remove(struct i2c_client *client)
2162 {
2163         snd_soc_unregister_codec(&client->dev);
2164         kfree(i2c_get_clientdata(client));
2165         return 0;
2166 }
2167
2168 static struct i2c_driver rt5631_i2c_driver = {
2169         .driver = {
2170                 .name = "rt5631",
2171                 .owner = THIS_MODULE,
2172         },
2173         .probe = rt5631_i2c_probe,
2174         .remove   = rt5631_i2c_remove,
2175         .id_table = rt5631_i2c_id,
2176         .shutdown = rt5631_shutdown,
2177 };
2178
2179 static int __init rt5631_modinit(void)
2180 {
2181         return i2c_add_driver(&rt5631_i2c_driver);
2182 }
2183 module_init(rt5631_modinit);
2184
2185 static void __exit rt5631_modexit(void)
2186 {
2187         i2c_del_driver(&rt5631_i2c_driver);
2188 }
2189 module_exit(rt5631_modexit);
2190
2191 MODULE_DESCRIPTION("ASoC RT5631 driver");
2192 MODULE_AUTHOR("flove <flove@realtek.com>");
2193 MODULE_LICENSE("GPL");