factoryToolV4.0 support on rk3168,lcd,bL,codec,tp,usbwifi,battery control by parameter
[firefly-linux-kernel-4.4.55.git] / sound / soc / codecs / rt5631.c
1 /*
2  * rt5631.c  --  RT5631 ALSA Soc Audio driver
3  *
4  * Copyright 2011 Realtek Microelectronics
5  *
6  * Author: flove <flove@realtek.com>
7  *
8  * Based on WM8753.c
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13  *
14  */
15 #include <linux/module.h>
16 #include <linux/moduleparam.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/pm.h>
20 #include <linux/i2c.h>
21 #include <linux/platform_device.h>
22 #include <linux/spi/spi.h>
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/soc.h>
27 #include <sound/soc-dapm.h>
28 #include <sound/initval.h>
29 #include <sound/tlv.h>
30 #include "rt5631.h"
31 #include <linux/timer.h>
32
33 #if 0
34 #define DBG(x...)       printk(x)
35 #else
36 #define DBG(x...)
37 #endif
38 /*
39 1.0.25
40      add support sample rate up to 192k
41 */
42 #define RT5631_VERSION "0.01 alsa 1.0.25"
43
44 #define RT5631_ALC_DAC_FUNC_ENA 0       //ALC functio for DAC
45 #define RT5631_ALC_ADC_FUNC_ENA 0       //ALC function for ADC
46 #define RT5631_SPK_TIMER        1       //if enable this, MUST enable RT5631_EQ_FUNC_ENA first!
47
48 struct rt5631_priv {
49         int codec_version;
50         int master;
51         int sysclk;
52         int dmic_used_flag;
53         int eq_mode;
54         int pll_used_flag;
55 };
56 #if (RT5631_SPK_TIMER == 1)
57 static struct timer_list spk_timer;
58 struct work_struct  spk_work;
59 //static bool last_is_spk = false;      // need modify.
60 static int last_is_spk = -1;    //bard 9-13
61 #endif
62
63 #ifdef CONFIG_MACH_RK_FAC 
64         rt5631_hdmi_ctrl=0;
65 #endif
66 static struct snd_soc_codec *rt5631_codec;
67 struct delayed_work rt5631_delay_cap; //bard 7-16
68 EXPORT_SYMBOL(rt5631_delay_cap); //bard 7-16
69 static const u16 rt5631_reg[0x80];
70 static int timesofbclk = 32;
71 bool isPlaybackon = false, isCaptureon = false;
72
73 module_param(timesofbclk, int, S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH);
74 MODULE_PARM_DESC(timeofbclk, "relationship between bclk and fs");
75
76 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -9435, 37, 0);
77 static inline int rt5631_write(struct snd_soc_codec *codec,
78                         unsigned int reg, unsigned int val)
79 {
80         return snd_soc_write(codec, reg, val);
81 }
82
83 static inline unsigned int rt5631_read(struct snd_soc_codec *codec,
84                                 unsigned int reg)
85 {
86         return snd_soc_read(codec, reg);
87 }
88
89 static int rt5631_write_mask(struct snd_soc_codec *codec,
90         unsigned int reg, unsigned int value, unsigned int mask)
91 {
92         unsigned int reg_val;
93         int ret = 0;
94
95         if (!mask)
96                 return 0;
97
98         if (mask != 0xffff) {
99                 reg_val = rt5631_read(codec, reg);
100                 reg_val &= ~mask;
101                 reg_val |= (value & mask);
102                 ret = rt5631_write(codec, reg, reg_val);
103         } else {
104                 ret = rt5631_write(codec, reg, value);
105         }
106
107         return ret;
108 }
109
110 static void rt5631_write_index(struct snd_soc_codec *codec,
111                 unsigned int reg, unsigned int value)
112 {
113         rt5631_write(codec, RT5631_INDEX_ADD, reg);
114         rt5631_write(codec, RT5631_INDEX_DATA, value);
115         return;
116 }
117
118 static unsigned int rt5631_read_index(struct snd_soc_codec *codec,
119                                 unsigned int reg)
120 {
121         unsigned int value;
122
123         rt5631_write(codec, RT5631_INDEX_ADD, reg);
124         value = rt5631_read(codec, RT5631_INDEX_DATA);
125
126         return value;
127 }
128
129 static void rt5631_write_index_mask(struct snd_soc_codec *codec,
130         unsigned int reg, unsigned int value, unsigned int mask)
131 {
132         unsigned int reg_val;
133
134         if (!mask)
135                 return;
136
137         if (mask != 0xffff) {
138                 reg_val = rt5631_read_index(codec, reg);
139                 reg_val &= ~mask;
140                 reg_val |= (value & mask);
141                 rt5631_write_index(codec, reg, reg_val);
142         } else {
143                 rt5631_write_index(codec, reg, value);
144         }
145
146         return;
147 }
148
149 static inline int rt5631_reset(struct snd_soc_codec *codec)
150 {
151         return snd_soc_write(codec, RT5631_RESET, 0);
152 }
153
154 struct rt5631_init_reg {
155         u8 reg;
156         u16 val;
157 };
158
159 #ifndef DEF_VOL
160 #define DEF_VOL                                 0xd4//0xd4 -30dB 0xc0 0dB
161 #endif
162 #ifndef DEF_VOL_SPK
163 #define DEF_VOL_SPK                             0xc4
164 #endif
165
166 /*
167  * speaker channel volume select SPKMIXER, 0DB by default
168  * Headphone channel volume select OUTMIXER,0DB by default
169  * AXO1/AXO2 channel volume select OUTMIXER,0DB by default
170  * Record Mixer source from Mic1/Mic2 by default
171  * Mic1/Mic2 boost 40dB by default
172  * DAC_L-->OutMixer_L by default
173  * DAC_R-->OutMixer_R by default
174  * DAC-->SpeakerMixer
175  * Speaker volume-->SPOMixer(L-->L,R-->R)
176  * Speaker AMP ratio gain is 1.44X
177  * HP from OutMixer,speaker out from SpeakerOut Mixer
178  * enable HP zero cross
179  * change Mic1 & mic2 to differential mode
180  */
181 static struct rt5631_init_reg init_list[] = {
182
183         {RT5631_SPK_OUT_VOL             , (DEF_VOL_SPK<<8) | DEF_VOL_SPK},//speaker channel volume select SPKMIXER,0DB by default
184         {RT5631_HP_OUT_VOL              , (DEF_VOL<<8) | DEF_VOL},//Headphone channel volume select OUTMIXER,0DB by default
185         {RT5631_MONO_AXO_1_2_VOL        , 0xE0c0},//AXO1/AXO2 channel volume select OUTMIXER,0DB by default
186         //{RT5631_STEREO_DAC_VOL_1      , 0x004C},
187         {RT5631_STEREO_DAC_VOL_2        , 0x0303},
188         {RT5631_ADC_REC_MIXER           , 0xb0f0},//Record Mixer source from Mic1 by default
189         {RT5631_ADC_CTRL_1              , 0x0004},//STEREO ADC CONTROL 1
190         {RT5631_MIC_CTRL_2              , 0x4400},//0x8800},//0x6600}, //Mic1/Mic2 boost 40DB by default
191         {RT5631_PWR_MANAG_ADD1          , 0x93e0},
192         {RT5631_SDP_CTRL        , 0x8002},
193         //increase hpo charge pump VEE
194         {RT5631_INDEX_ADD                       , 0x45},
195         {RT5631_INDEX_DATA                      , 0x6530},
196         
197 #if RT5631_ALC_ADC_FUNC_ENA     
198
199         {RT5631_ALC_CTRL_1              , 0x060a},//ALC CONTROL 1
200         {RT5631_ALC_CTRL_2              , 0x0002},//ALC CONTROL 2
201         {RT5631_ALC_CTRL_3              , 0xe088},//ALC CONTROL 3
202         
203 #endif  
204         {RT5631_OUTMIXER_L_CTRL         , 0xdfC0},//DAC_L-->OutMixer_L by default
205         {RT5631_OUTMIXER_R_CTRL         , 0xdfC0},//DAC_R-->OutMixer_R by default
206         {RT5631_AXO1MIXER_CTRL          , 0x8840},//OutMixer_L-->AXO1Mixer by default
207         {RT5631_AXO2MIXER_CTRL          , 0x8880},//OutMixer_R-->AXO2Mixer by default
208         {RT5631_SPK_MIXER_CTRL          , 0xd8d8},//DAC-->SpeakerMixer
209         {RT5631_SPK_MONO_OUT_CTRL       , 0x0c00},//Speaker volume-->SPOMixer(L-->L,R-->R)      
210         {RT5631_GEN_PUR_CTRL_REG        , 0x4e00},//Speaker AMP ratio gain is 1.27x
211 #if defined(CONFIG_ADJUST_VOL_BY_CODEC)
212         {RT5631_SPK_MONO_HP_OUT_CTRL    , 0x0000},//HP from outputmixer,speaker out from SpeakerOut Mixer       
213 #else
214         {RT5631_SPK_MONO_HP_OUT_CTRL    , 0x000c},//HP from DAC,speaker out from SpeakerOut Mixer
215 #endif
216         {RT5631_DEPOP_FUN_CTRL_2        , 0x8000},//HP depop by register control        
217         {RT5631_INT_ST_IRQ_CTRL_2       , 0x0f18},//enable HP zero cross        
218         {RT5631_MIC_CTRL_1              , 0x8000},//set mic 1 to differnetial mode
219         {RT5631_GPIO_CTRL               , 0x0000},//set GPIO to input pin       
220 //      {RT5631_JACK_DET_CTRL           , 0x4e80},//Jack detect for GPIO,high is HP,low is speaker      
221         {RT5631_JACK_DET_CTRL           , 0x4bc0},//Jack detect for GPIO,high is speaker,low is hp      
222 };
223 #define RT5631_INIT_REG_LEN ARRAY_SIZE(init_list)
224
225 /*
226  * EQ parameter
227  */
228 enum {
229         NORMAL,
230         CLUB,
231         DANCE,
232         LIVE,
233         POP,
234         ROCK,
235         OPPO,
236         TREBLE,
237         BASS,
238         HFREQ,  
239         SPK_FR  
240 };
241
242 struct hw_eq_preset {
243         u16 type;
244         u16 value[22];
245         u16 ctrl;
246 };
247
248 /*
249  * EQ param reg : 0x0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7,
250  *              0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf
251  * EQ control reg : 0x6e
252  */
253 struct hw_eq_preset hweq_preset[] = {
254         {NORMAL , {0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
255                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
256                 0x0000, 0x0000, 0x0000, 0x0000}, 0x0000},
257         {CLUB   , {0x1C10, 0x0000, 0xC1CC, 0x1E5D, 0x0699, 0xCD48,
258                 0x188D, 0x0699, 0xC3B6, 0x1CD0, 0x0699, 0x0436,
259                 0x0000, 0x0000, 0x0000, 0x0000}, 0x000E},
260         {DANCE  , {0x1F2C, 0x095B, 0xC071, 0x1F95, 0x0616, 0xC96E,
261                 0x1B11, 0xFC91, 0xDCF2, 0x1194, 0xFAF2, 0x0436,
262                 0x0000, 0x0000, 0x0000, 0x0000}, 0x000F},
263         {LIVE   , {0x1EB5, 0xFCB6, 0xC24A, 0x1DF8, 0x0E7C, 0xC883,
264                 0x1C10, 0x0699, 0xDA41, 0x1561, 0x0295, 0x0436,
265                 0x0000, 0x0000, 0x0000, 0x0000}, 0x000F},
266         {POP    , {0x1EB5, 0xFCB6, 0xC1D4, 0x1E5D, 0x0E23, 0xD92E,
267                 0x16E6, 0xFCB6, 0x0000, 0x0969, 0xF988, 0x0436,
268                 0x0000, 0x0000, 0x0000, 0x0000}, 0x000F},
269         {ROCK   , {0x1EB5, 0xFCB6, 0xC071, 0x1F95, 0x0424, 0xC30A,
270                 0x1D27, 0xF900, 0x0C5D, 0x0FC7, 0x0E23, 0x0436,
271                 0x0000, 0x0000, 0x0000, 0x0000}, 0x000F},
272         {OPPO   , {0x0000, 0x0000, 0xCA4A, 0x17F8, 0x0FEC, 0xCA4A,
273                 0x17F8, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
274                 0x0000, 0x0000, 0x0000, 0x0000}, 0x000F},
275         {TREBLE , {0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
276                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x188D,
277                 0x1699, 0x0000, 0x0000, 0x0000}, 0x0010},
278         {BASS   , {0x1A43, 0x0C00, 0x0000, 0x0000, 0x0000, 0x0000,
279                 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
280                 0x0000, 0x0000, 0x0000, 0x0000}, 0x0001},
281         //      {HFREQ, {0x1BBC,0x0000,0xC9A4,0x1BBC,0x0000,0x2997,0x142D,0xFCB6,0xEF01,0x1BBC,0x0000,0xE835,0x0FEC,0xC66E,0x1A29,0x1CEE},0x0014},//orig
282         //{HFREQ, {0x1BBC,0x0000,0xC9A4,0x1BBC,0x0000,0x2997,0x142D,0xFCB6,0x1E97,0x08AC,0xFCB6,0xEEA6,0x095B,0xC66E,0x1A29,0x1CEE},0x0018},//roy 20120904 
283         {HFREQ, {0x1FBC,0x1D18,0x11C1,0x0B2B,0xFF1B,0x1F8D,0x09F3,0xFB54,0xEF01,0x1BBC,0x0000,0xE835,0x2298,0xC66E,0x1A29,0x1CEE},0x0014},//roy 20120914 
284         {SPK_FR,{0x1DE4,0xF405,0xC306,0x1D60,0x01F3,0x07CA,0x12AF,0xF805,0xE904,0x1C10,0x0000,0x1C8B,0x0000,0xc5e1,0x1afb,0x1d46},0x0003},
285 };
286
287 static int rt5631_reg_init(struct snd_soc_codec *codec)
288 {
289         int i;
290
291         for (i = 0; i < RT5631_INIT_REG_LEN; i++)
292                 rt5631_write(codec, init_list[i].reg, init_list[i].val);
293
294         return 0;
295 }
296 //bard 7-16 s
297 void rt5631_adc_on(struct work_struct *work)
298 {
299         int val;
300
301         val = snd_soc_read(rt5631_codec,RT5631_ADC_REC_MIXER);
302         snd_soc_write(rt5631_codec,RT5631_ADC_REC_MIXER,0xf0f0);
303
304         snd_soc_update_bits(rt5631_codec, RT5631_PWR_MANAG_ADD1,
305                 PWR_ADC_L_CLK | PWR_ADC_R_CLK, 0);
306         snd_soc_update_bits(rt5631_codec, RT5631_PWR_MANAG_ADD1,
307                 PWR_ADC_L_CLK | PWR_ADC_R_CLK,
308                 PWR_ADC_L_CLK | PWR_ADC_R_CLK);
309         snd_soc_write(rt5631_codec,RT5631_ADC_REC_MIXER,val);
310         snd_soc_update_bits(rt5631_codec, RT5631_ADC_CTRL_1,
311                                 RT_L_MUTE|RT_R_MUTE,0x0);
312
313 }
314 //bard 7-16 e
315 static const char *rt5631_spol_source_sel[] = {
316         "SPOLMIX", "MONOIN_RX", "VDAC", "DACL"};
317 static const char *rt5631_spor_source_sel[] = {
318         "SPORMIX", "MONOIN_RX", "VDAC", "DACR"};
319 static const char *rt5631_mono_source_sel[] = {"MONOMIX", "MONOIN_RX", "VDAC"};
320 static const char *rt5631_input_mode_source_sel[] = {
321         "Single-end", "Differential"};
322 static const char *rt5631_mic_boost[] = {"Bypass", "+20db", "+24db", "+30db",
323                         "+35db", "+40db", "+44db", "+50db", "+52db"};
324 static const char *rt5631_hpl_source_sel[] = {"LEFT HPVOL", "LEFT DAC"};
325 static const char *rt5631_hpr_source_sel[] = {"RIGHT HPVOL", "RIGHT DAC"};
326 static const char *rt5631_eq_sel[] = {"NORMAL", "CLUB", "DANCE", "LIVE", "POP",
327                                 "ROCK", "OPPO", "TREBLE", "BASS"};
328
329
330 static const struct soc_enum rt5631_enum[] = {
331 SOC_ENUM_SINGLE(RT5631_SPK_MONO_HP_OUT_CTRL, 14, 4, rt5631_spol_source_sel),
332 SOC_ENUM_SINGLE(RT5631_SPK_MONO_HP_OUT_CTRL, 10, 4, rt5631_spor_source_sel),
333 SOC_ENUM_SINGLE(RT5631_SPK_MONO_HP_OUT_CTRL, 6, 3, rt5631_mono_source_sel),
334 SOC_ENUM_SINGLE(RT5631_MIC_CTRL_1, 15, 2,  rt5631_input_mode_source_sel),
335 SOC_ENUM_SINGLE(RT5631_MIC_CTRL_1, 7, 2,  rt5631_input_mode_source_sel),
336 SOC_ENUM_SINGLE(RT5631_MONO_INPUT_VOL, 15, 2, rt5631_input_mode_source_sel),
337 SOC_ENUM_SINGLE(RT5631_MIC_CTRL_2, 12, 9, rt5631_mic_boost),
338 SOC_ENUM_SINGLE(RT5631_MIC_CTRL_2, 8, 9, rt5631_mic_boost),
339 SOC_ENUM_SINGLE(RT5631_SPK_MONO_HP_OUT_CTRL, 3, 2, rt5631_hpl_source_sel),
340 SOC_ENUM_SINGLE(RT5631_SPK_MONO_HP_OUT_CTRL, 2, 2, rt5631_hpr_source_sel),
341 SOC_ENUM_SINGLE(0, 4, 9, rt5631_eq_sel),
342 };
343
344 static int rt5631_dmic_get(struct snd_kcontrol *kcontrol,
345                 struct snd_ctl_elem_value *ucontrol)
346 {
347         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
348         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
349
350         ucontrol->value.integer.value[0] = rt5631->dmic_used_flag;
351
352         return 0;
353 }
354
355 static void rt5631_close_dmic(struct snd_soc_codec *codec)
356 {
357         rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
358                 DMIC_L_CH_MUTE | DMIC_R_CH_MUTE,
359                 DMIC_L_CH_MUTE_MASK | DMIC_R_CH_MUTE_MASK);
360         rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
361                 DMIC_DIS, DMIC_ENA_MASK);
362         return;
363 }
364
365 static int rt5631_dmic_put(struct snd_kcontrol *kcontrol,
366                 struct snd_ctl_elem_value *ucontrol)
367 {
368         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
369         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
370
371         if (rt5631->dmic_used_flag == ucontrol->value.integer.value[0])
372                 return 0;
373
374         if (ucontrol->value.integer.value[0]) {
375                 rt5631->dmic_used_flag = 1;
376         } else {
377                 rt5631_close_dmic(codec);
378                 rt5631->dmic_used_flag = 0;
379         }
380
381         return 0;
382 }
383
384 static int rt5631_eq_sel_get(struct snd_kcontrol *kcontrol,
385                 struct snd_ctl_elem_value *ucontrol)
386 {
387         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
388         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
389
390         ucontrol->value.integer.value[0] = rt5631->eq_mode;
391
392         return 0;
393 }
394
395 static void rt5631_update_eqmode(struct snd_soc_codec *codec, int mode)
396 {
397         int i;
398
399         DBG("enter rt5631_update_eqmode=========\n");
400         if (NORMAL == mode) {
401                 /* In Normal mode, the EQ parameter is cleared,
402                  * and hardware LP, BP1, BP2, BP3, HP1, HP2
403                  * block control and EQ block are disabled.
404                  */
405                 for (i = RT5631_EQ_BW_LOP; i <= RT5631_EQ_HPF_GAIN; i++)
406                         rt5631_write_index(codec, i,
407                                 hweq_preset[mode].value[i]);
408                 rt5631_write_mask(codec, RT5631_EQ_CTRL, 0x0000, 0x003f);
409                 rt5631_write_index_mask(codec, RT5631_EQ_PRE_VOL_CTRL
410                                                 , 0x0000, 0x8000);
411         } else {
412                 /* Fill and update EQ parameter,
413                  * and EQ block are enabled.
414                  */
415                 rt5631_write_index_mask(codec, RT5631_EQ_PRE_VOL_CTRL
416                                                 , 0x8000, 0x8000);
417                 rt5631_write(codec, RT5631_EQ_CTRL,
418                         hweq_preset[mode].ctrl);
419                 for (i = RT5631_EQ_BW_LOP; i <= RT5631_EQ_HPF_GAIN; i++)
420                         rt5631_write_index(codec, i,
421                                 hweq_preset[mode].value[i]);
422                 rt5631_write_mask(codec, RT5631_EQ_CTRL, 0x4000, 0x4000);
423         }
424
425         return;
426 }
427
428 static int rt5631_eq_sel_put(struct snd_kcontrol *kcontrol,
429                 struct snd_ctl_elem_value *ucontrol)
430 {
431         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
432         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
433
434         if (rt5631->eq_mode == ucontrol->value.integer.value[0])
435                 return 0;
436
437         rt5631_update_eqmode(codec, ucontrol->value.enumerated.item[0]);
438         rt5631->eq_mode = ucontrol->value.integer.value[0];
439
440         return 0;
441 }
442
443 #if (RT5631_SPK_TIMER == 1)
444 static void spk_work_handler(struct work_struct *work)
445 {
446         struct snd_soc_codec *codec = rt5631_codec;
447         int is_spk = (rt5631_read(codec, 0x4a)) & 0x04; //detect rt5631 reg4a[3], 1'b:SPK, 0'b:HP ; //bard 9-13
448         //if(last_is_spk != is_spk)
449         //      printk("%s---%s is in use.last is %s in use\n", __FUNCTION__,is_spk?"speaker":"headphone",last_is_spk?"speaker":"headphone");
450         //printk("last_is_spk=%d is_spk=%d\n",last_is_spk,is_spk);
451         if(is_spk && (last_is_spk != is_spk)){
452                 rt5631_write_index_mask(codec,0x11,0x0000,0x0007);      //0db
453                 rt5631_write_index(codec,0x12,0x0003);                  //0db
454                 rt5631_update_eqmode(codec, SPK_FR);            // SPK is in use, enable EQ mode of SPK_FR.
455         
456
457         }else if(!is_spk && (last_is_spk != is_spk)){
458         //flove071311   rt5631_update_eqmode(codec, NORMAL);            // HP is in use, enable EQ mode of NORMAL.
459                 rt5631_write_index_mask(codec,0x11,0x0002,0x0003);
460                 rt5631_write_index(codec,0x12,0x0007);  
461                 rt5631_update_eqmode(codec,HFREQ);              
462         }
463         last_is_spk = is_spk;
464 }
465
466 /* timer to judge SPK or HP in use, and handle EQ issues accordingly. */
467 void spk_timer_callback(unsigned long data )
468 {       
469         int ret = 0;
470
471         schedule_work(&spk_work);
472
473         //DBG("Starting timer to fire in 1000ms (%ld)\n", jiffies );
474   ret = mod_timer(&spk_timer, jiffies + msecs_to_jiffies(1000));
475   if (ret) printk("Error in mod_timer\n");
476 }
477 #endif
478
479 static const struct snd_kcontrol_new rt5631_snd_controls[] = {
480 SOC_ENUM("MIC1 Mode Control",  rt5631_enum[3]),
481 SOC_ENUM("MIC1 Boost", rt5631_enum[6]),
482 SOC_ENUM("MIC2 Mode Control", rt5631_enum[4]),
483 SOC_ENUM("MIC2 Boost", rt5631_enum[7]),
484 SOC_ENUM("MONOIN Mode Control", rt5631_enum[5]),
485 SOC_DOUBLE_TLV("PCM Playback Volume", RT5631_STEREO_DAC_VOL_2, 8, 0, 255, 1, dac_vol_tlv),
486 SOC_DOUBLE("PCM Playback Switch", RT5631_STEREO_DAC_VOL_1, 15, 7, 1, 1),
487 SOC_DOUBLE("MONOIN_RX Capture Volume", RT5631_MONO_INPUT_VOL, 8, 0, 31, 1),
488 SOC_DOUBLE("AXI Capture Volume", RT5631_AUX_IN_VOL, 8, 0, 31, 1),
489 SOC_SINGLE("AXO1 Playback Switch", RT5631_MONO_AXO_1_2_VOL, 15, 1, 1),
490 SOC_SINGLE("AXO2 Playback Switch", RT5631_MONO_AXO_1_2_VOL, 7, 1, 1),
491 SOC_DOUBLE("OUTVOL Playback Volume", RT5631_MONO_AXO_1_2_VOL, 8, 0, 31, 1),
492 SOC_DOUBLE("Speaker Playback Switch", RT5631_SPK_OUT_VOL, 15, 7, 1, 1),
493 SOC_DOUBLE("Speaker Playback Volume", RT5631_SPK_OUT_VOL, 8, 0, 63, 1),
494 SOC_SINGLE("MONO Playback Switch", RT5631_MONO_AXO_1_2_VOL, 13, 1, 1),
495 SOC_DOUBLE("HP Playback Switch", RT5631_HP_OUT_VOL, 15, 7, 1, 1),
496 SOC_DOUBLE("HP Playback Volume", RT5631_HP_OUT_VOL, 8, 0, 63, 1),
497 SOC_SINGLE_EXT("DMIC Capture Switch", 0, 2, 1, 0,
498         rt5631_dmic_get, rt5631_dmic_put),
499 SOC_ENUM_EXT("EQ Mode", rt5631_enum[10], rt5631_eq_sel_get, rt5631_eq_sel_put),
500 };
501
502 static const struct snd_kcontrol_new rt5631_recmixl_mixer_controls[] = {
503 SOC_DAPM_SINGLE("OUTMIXL Capture Switch", RT5631_ADC_REC_MIXER, 15, 1, 1),
504 SOC_DAPM_SINGLE("MIC1_BST1 Capture Switch", RT5631_ADC_REC_MIXER, 14, 1, 1),
505 SOC_DAPM_SINGLE("AXILVOL Capture Switch", RT5631_ADC_REC_MIXER, 13, 1, 1),
506 SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER, 12, 1, 1),
507 };
508
509 static const struct snd_kcontrol_new rt5631_recmixr_mixer_controls[] = {
510 SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER, 4, 1, 1),
511 SOC_DAPM_SINGLE("AXIRVOL Capture Switch", RT5631_ADC_REC_MIXER, 5, 1, 1),
512 SOC_DAPM_SINGLE("MIC2_BST2 Capture Switch", RT5631_ADC_REC_MIXER, 6, 1, 1),
513 SOC_DAPM_SINGLE("OUTMIXR Capture Switch", RT5631_ADC_REC_MIXER, 7, 1, 1),
514 };
515
516 static const struct snd_kcontrol_new rt5631_spkmixl_mixer_controls[] = {
517 SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_SPK_MIXER_CTRL, 15, 1, 1),
518 SOC_DAPM_SINGLE("MIC1_P Playback Switch", RT5631_SPK_MIXER_CTRL, 14, 1, 1),
519 SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_SPK_MIXER_CTRL, 13, 1, 1),
520 SOC_DAPM_SINGLE("OUTMIXL Playback Switch", RT5631_SPK_MIXER_CTRL, 12, 1, 1),
521 };
522
523 static const struct snd_kcontrol_new rt5631_spkmixr_mixer_controls[] = {
524 SOC_DAPM_SINGLE("OUTMIXR Playback Switch", RT5631_SPK_MIXER_CTRL, 4, 1, 1),
525 SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_SPK_MIXER_CTRL, 5, 1, 1),
526 SOC_DAPM_SINGLE("MIC2_P Playback Switch", RT5631_SPK_MIXER_CTRL, 6, 1, 1),
527 SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_SPK_MIXER_CTRL, 7, 1, 1),
528 };
529
530 static const struct snd_kcontrol_new rt5631_outmixl_mixer_controls[] = {
531 SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_L_CTRL, 15, 1, 1),
532 SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_L_CTRL, 14, 1, 1),
533 SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_OUTMIXER_L_CTRL, 13, 1, 1),
534 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_L_CTRL, 12, 1, 1),
535 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_L_CTRL, 11, 1, 1),
536 SOC_DAPM_SINGLE("MONOIN_RXP Playback Switch", RT5631_OUTMIXER_L_CTRL, 10, 1, 1),
537 SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_L_CTRL, 9, 1, 1),
538 SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_L_CTRL, 8, 1, 1),
539 SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_L_CTRL, 7, 1, 1),
540 };
541
542 static const struct snd_kcontrol_new rt5631_outmixr_mixer_controls[] = {
543 SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_R_CTRL, 7, 1, 1),
544 SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_R_CTRL, 8, 1, 1),
545 SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_R_CTRL, 9, 1, 1),
546 SOC_DAPM_SINGLE("MONOIN_RXN Playback Switch", RT5631_OUTMIXER_R_CTRL, 10, 1, 1),
547 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_R_CTRL, 11, 1, 1),
548 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_R_CTRL, 12, 1, 1),
549 SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_OUTMIXER_R_CTRL, 13, 1, 1),
550 SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_R_CTRL, 14, 1, 1),
551 SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_R_CTRL, 15, 1, 1),
552 };
553
554 static const struct snd_kcontrol_new rt5631_AXO1MIX_mixer_controls[] = {
555 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO1MIXER_CTRL, 15 , 1, 1),
556 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO1MIXER_CTRL, 11, 1, 1),
557 SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO1MIXER_CTRL, 7 , 1 , 1),
558 SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO1MIXER_CTRL, 6, 1, 1),
559 };
560
561 static const struct snd_kcontrol_new rt5631_AXO2MIX_mixer_controls[] = {
562 SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO2MIXER_CTRL, 15, 1, 1),
563 SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO2MIXER_CTRL, 11, 1, 1),
564 SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO2MIXER_CTRL, 7, 1, 1),
565 SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO2MIXER_CTRL, 6, 1 , 1),
566 };
567
568 static const struct snd_kcontrol_new rt5631_spolmix_mixer_controls[] = {
569 SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL, 15, 1, 1),
570 SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL, 14, 1, 1),
571 };
572
573 static const struct snd_kcontrol_new rt5631_spormix_mixer_controls[] = {
574 SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL, 13, 1, 1),
575 SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL, 12, 1, 1),
576 };
577
578 static const struct snd_kcontrol_new rt5631_monomix_mixer_controls[] = {
579 SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL, 11, 1, 1),
580 SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL, 10, 1, 1),
581 };
582
583 static const struct snd_kcontrol_new rt5631_spol_mux_control =
584 SOC_DAPM_ENUM("Route", rt5631_enum[0]);
585 static const struct snd_kcontrol_new rt5631_spor_mux_control =
586 SOC_DAPM_ENUM("Route", rt5631_enum[1]);
587 static const struct snd_kcontrol_new rt5631_mono_mux_control =
588 SOC_DAPM_ENUM("Route", rt5631_enum[2]);
589
590 static const struct snd_kcontrol_new rt5631_hpl_mux_control =
591 SOC_DAPM_ENUM("Route", rt5631_enum[8]);
592 static const struct snd_kcontrol_new rt5631_hpr_mux_control =
593 SOC_DAPM_ENUM("Route", rt5631_enum[9]);
594
595 //ALC for DAC function
596 #if (RT5631_ALC_DAC_FUNC_ENA == 1)
597 static void rt5631_alc_enable(struct snd_soc_codec *codec,unsigned int EnableALC)
598 {
599         if(EnableALC)
600         {
601                 rt5631_write(codec, 0x64,0x0206);
602                 rt5631_write(codec, 0x65,0x0003);
603                 rt5631_write_index(codec, 0x21,0x5000);
604                 rt5631_write_index(codec, 0x22,0xa480);
605                 rt5631_write_index(codec, 0x23,0x0a08);
606                 rt5631_write(codec, 0x0c,0x0010);
607                 rt5631_write(codec, 0x66,0x650a);
608                 
609         }
610         else
611         {
612                 rt5631_write(codec, 0x66,0x250A);
613                 rt5631_write(codec, 0x0c,0x0000);               
614         }       
615         
616 }
617 #endif
618
619 static int spk_event(struct snd_soc_dapm_widget *w,
620         struct snd_kcontrol *kcontrol, int event)
621 {
622         struct snd_soc_codec *codec = w->codec;
623         static int spkl_out_enable, spkr_out_enable;
624
625         switch (event) {
626         case SND_SOC_DAPM_POST_PMU:
627
628 #if (RT5631_ALC_DAC_FUNC_ENA == 1)              
629                rt5631_alc_enable(codec, 1);
630 #endif          
631
632                 if (!spkl_out_enable && !strcmp(w->name, "SPKL Amp")) {
633                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD4,
634                                         PWR_SPK_L_VOL, PWR_SPK_L_VOL);
635                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1,
636                                         PWR_CLASS_D, PWR_CLASS_D);
637                         rt5631_write_mask(codec, RT5631_SPK_OUT_VOL,
638                                         0, RT_L_MUTE);
639                         spkl_out_enable = 1;
640                 }
641                 if (!spkr_out_enable && !strcmp(w->name, "SPKR Amp")) {
642                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD4,
643                                         PWR_SPK_R_VOL, PWR_SPK_R_VOL);
644                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1,
645                                         PWR_CLASS_D, PWR_CLASS_D);
646                         rt5631_write_mask(codec, RT5631_SPK_OUT_VOL,
647                                         0, RT_R_MUTE);
648                         spkr_out_enable = 1;
649                 }
650                 break;
651
652         case SND_SOC_DAPM_POST_PMD:
653                 if (spkl_out_enable && !strcmp(w->name, "SPKL Amp")) {
654                         rt5631_write_mask(codec, RT5631_SPK_OUT_VOL,
655                                         RT_L_MUTE, RT_L_MUTE);
656                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD4,
657                                         0, PWR_SPK_L_VOL);
658                         spkl_out_enable = 0;
659                 }
660                 if (spkr_out_enable && !strcmp(w->name, "SPKR Amp")) {
661                         rt5631_write_mask(codec, RT5631_SPK_OUT_VOL,
662                                         RT_R_MUTE, RT_R_MUTE);
663                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD4,
664                                         0, PWR_SPK_R_VOL);
665                         spkr_out_enable = 0;
666                 }
667                 if (0 == spkl_out_enable && 0 == spkr_out_enable)
668                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1,
669                                         0, PWR_CLASS_D);
670
671 #if (RT5631_ALC_DAC_FUNC_ENA == 1)                      
672                 rt5631_alc_enable(codec, 0);
673 #endif
674
675                 break;
676
677         default:
678                 return 0;
679         }
680
681         return 0;
682 }
683
684
685 static void hp_depop_mode2_onebit(struct snd_soc_codec *codec, int enable)
686 {
687         unsigned int soft_vol, hp_zc;
688
689         rt5631_write_mask(codec, RT5631_DEPOP_FUN_CTRL_2, 0, EN_ONE_BIT_DEPOP);
690
691         soft_vol = rt5631_read(codec, RT5631_SOFT_VOL_CTRL);
692         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, 0);
693         hp_zc = rt5631_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
694         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
695         if (enable) {
696                 rt5631_write_index(codec, RT5631_TEST_MODE_CTRL, 0x84c0);
697                 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x309f);
698                 rt5631_write_index(codec, RT5631_CP_INTL_REG2, 0x6530);
699                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_2,
700                                 EN_CAP_FREE_DEPOP);
701         } else {
702                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_2, 0);
703                 schedule_timeout_uninterruptible(msecs_to_jiffies(100));
704         }
705
706         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
707         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
708
709         return;
710 }
711
712 static void hp_mute_unmute_depop_onebit(struct snd_soc_codec *codec, int enable)
713 {
714         unsigned int soft_vol, hp_zc;
715
716         rt5631_write_mask(codec, RT5631_DEPOP_FUN_CTRL_2, 0, EN_ONE_BIT_DEPOP);
717         soft_vol = rt5631_read(codec, RT5631_SOFT_VOL_CTRL);
718         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, 0);
719         hp_zc = rt5631_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
720         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
721         if (enable) {
722                 schedule_timeout_uninterruptible(msecs_to_jiffies(10));
723                 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x307f);
724                 rt5631_write_mask(codec, RT5631_HP_OUT_VOL, 0,
725                                 RT_L_MUTE | RT_R_MUTE);
726                 schedule_timeout_uninterruptible(msecs_to_jiffies(300));
727
728         } else {
729                 rt5631_write_mask(codec, RT5631_HP_OUT_VOL,
730                         RT_L_MUTE | RT_R_MUTE, RT_L_MUTE | RT_R_MUTE);
731                 schedule_timeout_uninterruptible(msecs_to_jiffies(100));
732         }
733         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
734         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
735
736         return;
737 }
738
739 static void hp_depop2(struct snd_soc_codec *codec, int enable)
740 {
741         unsigned int soft_vol, hp_zc;
742
743         rt5631_write_mask(codec, RT5631_DEPOP_FUN_CTRL_2,
744                 EN_ONE_BIT_DEPOP, EN_ONE_BIT_DEPOP);
745         soft_vol = rt5631_read(codec, RT5631_SOFT_VOL_CTRL);
746         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, 0);
747         hp_zc = rt5631_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
748         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
749         if (enable) {
750                 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x303e);
751                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
752                         PWR_CHARGE_PUMP | PWR_HP_L_AMP | PWR_HP_R_AMP,
753                         PWR_CHARGE_PUMP | PWR_HP_L_AMP | PWR_HP_R_AMP);
754                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1,
755                         POW_ON_SOFT_GEN | EN_DEPOP2_FOR_HP);
756                 schedule_timeout_uninterruptible(msecs_to_jiffies(100));
757                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
758                         PWR_HP_DEPOP_DIS, PWR_HP_DEPOP_DIS);
759         } else {
760                 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x303F);
761                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1,
762                         POW_ON_SOFT_GEN | EN_MUTE_UNMUTE_DEPOP |
763                         PD_HPAMP_L_ST_UP | PD_HPAMP_R_ST_UP);
764                 schedule_timeout_uninterruptible(msecs_to_jiffies(75));
765                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1,
766                         POW_ON_SOFT_GEN | PD_HPAMP_L_ST_UP | PD_HPAMP_R_ST_UP);
767                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3, 0,
768                                         PWR_HP_DEPOP_DIS);
769                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1,
770                         POW_ON_SOFT_GEN | EN_DEPOP2_FOR_HP |
771                         PD_HPAMP_L_ST_UP | PD_HPAMP_R_ST_UP);
772                 schedule_timeout_uninterruptible(msecs_to_jiffies(80));
773                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1, POW_ON_SOFT_GEN);
774                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3, 0,
775                         PWR_CHARGE_PUMP | PWR_HP_L_AMP | PWR_HP_R_AMP);
776         }
777
778         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
779         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
780
781         return;
782 }
783
784 static void hp_mute_unmute_depop(struct snd_soc_codec *codec, int enable)
785 {
786         unsigned int soft_vol, hp_zc;
787
788         rt5631_write_mask(codec, RT5631_DEPOP_FUN_CTRL_2,
789                 EN_ONE_BIT_DEPOP, EN_ONE_BIT_DEPOP);
790         soft_vol = rt5631_read(codec, RT5631_SOFT_VOL_CTRL);
791         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, 0);
792         hp_zc = rt5631_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
793         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
794         if (enable) {
795                 schedule_timeout_uninterruptible(msecs_to_jiffies(10));
796                 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x302f);
797                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1,
798                         POW_ON_SOFT_GEN | EN_MUTE_UNMUTE_DEPOP |
799                         EN_HP_R_M_UN_MUTE_DEPOP | EN_HP_L_M_UN_MUTE_DEPOP);
800                 rt5631_write_mask(codec, RT5631_HP_OUT_VOL, 0,
801                                 RT_L_MUTE | RT_R_MUTE);
802                 schedule_timeout_uninterruptible(msecs_to_jiffies(160));
803         } else {
804                 rt5631_write_index(codec, RT5631_SPK_INTL_CTRL, 0x302f);
805                 rt5631_write(codec, RT5631_DEPOP_FUN_CTRL_1,
806                         POW_ON_SOFT_GEN | EN_MUTE_UNMUTE_DEPOP |
807                         EN_HP_R_M_UN_MUTE_DEPOP | EN_HP_L_M_UN_MUTE_DEPOP);
808                 rt5631_write_mask(codec, RT5631_HP_OUT_VOL,
809                         RT_L_MUTE | RT_R_MUTE, RT_L_MUTE | RT_R_MUTE);
810                 schedule_timeout_uninterruptible(msecs_to_jiffies(150));
811         }
812
813         rt5631_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
814         rt5631_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
815
816         return;
817 }
818
819 static int hp_event(struct snd_soc_dapm_widget *w,
820         struct snd_kcontrol *kcontrol, int event)
821 {
822         struct snd_soc_codec *codec = w->codec;
823         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
824         static bool hp_en;
825         int pu_l, pu_r;
826
827         pu_l = rt5631_read(codec, RT5631_PWR_MANAG_ADD4) & PWR_HP_L_OUT_VOL;
828         pu_r = rt5631_read(codec, RT5631_PWR_MANAG_ADD4) & PWR_HP_R_OUT_VOL;
829         switch (event) {
830         case SND_SOC_DAPM_PRE_PMD:
831                 if ((pu_l && pu_r) && hp_en) {
832                         if (rt5631->codec_version) {
833                                 hp_mute_unmute_depop_onebit(codec, 0);
834                                 hp_depop_mode2_onebit(codec, 0);
835                         } else {
836                                 hp_mute_unmute_depop(codec, 0);
837                                 hp_depop2(codec, 0);
838                         }
839                         hp_en = false;
840                 }
841                 break;
842
843         case SND_SOC_DAPM_POST_PMU:
844                 if ((pu_l && pu_r) && !hp_en) {
845                         if (rt5631->codec_version) {
846                                 hp_depop_mode2_onebit(codec, 1);
847                                 hp_mute_unmute_depop_onebit(codec, 1);
848                         } else {
849                                 hp_depop2(codec, 1);
850                                 hp_mute_unmute_depop(codec, 1);
851                         }
852                         hp_en = true;
853                 }
854                 break;
855
856         default:
857                 break;
858         }
859
860         return 0;
861 }
862
863 static int dac_to_hp_event(struct snd_soc_dapm_widget *w,
864                 struct snd_kcontrol *kcontrol, int event)
865 {
866         struct snd_soc_codec *codec = w->codec;
867         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
868         static bool hp_en;
869
870         switch (event) {
871         case SND_SOC_DAPM_PRE_PMD:
872                 if (hp_en) {
873                         if (rt5631->codec_version) {
874                                 hp_mute_unmute_depop_onebit(codec, 0);
875                                 hp_depop_mode2_onebit(codec, 0);
876                         } else {
877                                 hp_mute_unmute_depop(codec, 0);
878                                 hp_depop2(codec, 0);
879                         }
880                         hp_en = false;
881                 }
882                 break;
883
884         case SND_SOC_DAPM_POST_PMU:
885                 if (!hp_en) {
886                         if (rt5631->codec_version) {
887                                 hp_depop_mode2_onebit(codec, 1);
888                                 hp_mute_unmute_depop_onebit(codec, 1);
889                         } else {
890                                 hp_depop2(codec, 1);
891                                 hp_mute_unmute_depop(codec, 1);
892                         }
893                         hp_en = true;
894                 }
895                 break;
896
897         default:
898                 break;
899         }
900
901         return 0;
902 }
903
904 static int mic_event(struct snd_soc_dapm_widget *w,
905         struct snd_kcontrol *kcontrol, int event)
906 {
907         struct snd_soc_codec *codec = w->codec;
908         int val_mic1, val_mic2;
909
910         val_mic1 = rt5631_read(codec, RT5631_PWR_MANAG_ADD2) &
911                                 PWR_MIC1_BOOT_GAIN;
912         val_mic2 = rt5631_read(codec, RT5631_PWR_MANAG_ADD2) &
913                                 PWR_MIC2_BOOT_GAIN;
914         switch (event) {
915         case SND_SOC_DAPM_POST_PMU:
916                 /*
917                  * If microphone is stereo, need not copy ADC channel
918                  * If mic1 is used, copy ADC left to right
919                  * If mic2 is used, copy ADC right to left
920                  */
921                 if (val_mic1 && val_mic2)
922                         rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
923                                                         0x0000, 0xc000);
924                 else if (val_mic1)
925                         rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
926                                                         0x4000, 0xc000);
927                 else if (val_mic2)
928                         rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
929                                                         0x8000, 0xc000);
930                 else
931                         rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
932                                                         0x0000, 0xc000);
933                 break;
934
935         default:
936                 break;
937         }
938
939         return 0;
940 }
941
942 static int auxo1_event(struct snd_soc_dapm_widget *w,
943         struct snd_kcontrol *kcontrol, int event)
944 {
945         struct snd_soc_codec *codec = w->codec;
946         static bool aux1_en;
947
948         switch (event) {
949         case SND_SOC_DAPM_PRE_PMD:
950                 if (aux1_en) {
951                         rt5631_write_mask(codec, RT5631_MONO_AXO_1_2_VOL,
952                                                 RT_L_MUTE, RT_L_MUTE);
953                         aux1_en = false;
954                 }
955                 break;
956
957         case SND_SOC_DAPM_POST_PMU:
958                 if (!aux1_en) {
959                         rt5631_write_mask(codec, RT5631_MONO_AXO_1_2_VOL,
960                                                 0, RT_L_MUTE);
961                         aux1_en = true;
962                 }
963                 break;
964
965         default:
966                 break;
967         }
968
969         return 0;
970 }
971
972 static int auxo2_event(struct snd_soc_dapm_widget *w,
973         struct snd_kcontrol *kcontrol, int event)
974 {
975         struct snd_soc_codec *codec = w->codec;
976         static bool aux2_en;
977
978         switch (event) {
979         case SND_SOC_DAPM_PRE_PMD:
980                 if (aux2_en) {
981                         rt5631_write_mask(codec, RT5631_MONO_AXO_1_2_VOL,
982                                                 RT_R_MUTE, RT_R_MUTE);
983                         aux2_en = false;
984                 }
985                 break;
986
987         case SND_SOC_DAPM_POST_PMU:
988                 if (!aux2_en) {
989                         rt5631_write_mask(codec, RT5631_MONO_AXO_1_2_VOL,
990                                                 0, RT_R_MUTE);
991                         aux2_en = true;
992                 }
993                 break;
994
995         default:
996                 break;
997         }
998
999         return 0;
1000 }
1001
1002 static int mono_event(struct snd_soc_dapm_widget *w,
1003         struct snd_kcontrol *kcontrol, int event)
1004 {
1005         struct snd_soc_codec *codec = w->codec;
1006         static bool mono_en;
1007
1008         switch (event) {
1009         case SND_SOC_DAPM_PRE_PMD:
1010                 if (mono_en) {
1011                         rt5631_write_mask(codec, RT5631_MONO_AXO_1_2_VOL,
1012                                                 MUTE_MONO, MUTE_MONO);
1013                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
1014                                                 0, PWR_MONO_DEPOP_DIS);
1015                         mono_en = false;
1016                 }
1017                 break;
1018
1019         case SND_SOC_DAPM_POST_PMU:
1020                 if (!mono_en) {
1021                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
1022                                 PWR_MONO_DEPOP_DIS, PWR_MONO_DEPOP_DIS);
1023                         rt5631_write_mask(codec, RT5631_MONO_AXO_1_2_VOL,
1024                                                 0, MUTE_MONO);
1025                         mono_en = true;
1026                 }
1027                 break;
1028
1029         default:
1030                 break;
1031         }
1032
1033         return 0;
1034 }
1035
1036 /**
1037  * config_common_power - control all common power of codec system
1038  * @pmu: power up or not
1039  */
1040 static int config_common_power(struct snd_soc_codec *codec, bool pmu)
1041 {
1042         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1043         unsigned int mux_val;
1044
1045         if (pmu) {
1046                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1,
1047                         PWR_MAIN_I2S_EN | PWR_DAC_REF,
1048                         PWR_MAIN_I2S_EN | PWR_DAC_REF);
1049                 mux_val = rt5631_read(codec, RT5631_SPK_MONO_HP_OUT_CTRL);
1050                 //if (!(mux_val & HP_L_MUX_SEL_DAC_L))
1051                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1,
1052                                 PWR_DAC_L_TO_MIXER, PWR_DAC_L_TO_MIXER);
1053                 //if (!(mux_val & HP_R_MUX_SEL_DAC_R))
1054                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1,
1055                                 PWR_DAC_R_TO_MIXER, PWR_DAC_R_TO_MIXER);
1056                 if (rt5631->pll_used_flag)
1057                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD2,
1058                                                 PWR_PLL, PWR_PLL);
1059         } else if (isPlaybackon == false && isCaptureon == false){
1060                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD1, 0,
1061                         PWR_MAIN_I2S_EN | PWR_DAC_REF |
1062                         PWR_DAC_L_TO_MIXER | PWR_DAC_R_TO_MIXER);
1063                 if (rt5631->pll_used_flag)
1064                         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD2,
1065                                                 0, PWR_PLL);
1066         }
1067
1068         return 0;
1069 }
1070
1071 static int adc_event(struct snd_soc_dapm_widget *w,
1072         struct snd_kcontrol *kcontrol, int event)
1073 {
1074         struct snd_soc_codec *codec = w->codec;
1075         static bool pmu;
1076
1077         switch (event) {
1078         case SND_SOC_DAPM_POST_PMD:
1079                 if (pmu) {
1080                         isPlaybackon = false;
1081                         config_common_power(codec, false);
1082                         pmu = false;
1083                 }
1084                 break;
1085
1086         case SND_SOC_DAPM_PRE_PMU:
1087                 if (!pmu) {
1088                         isPlaybackon = true;
1089                         config_common_power(codec, true);
1090                         pmu = true;
1091                 }
1092                 break;
1093
1094         default:
1095                 break;
1096         }
1097
1098         return 0;
1099 }
1100
1101 static int dac_event(struct snd_soc_dapm_widget *w,
1102         struct snd_kcontrol *kcontrol, int event)
1103 {
1104         struct snd_soc_codec *codec = w->codec;
1105         static bool pmu;
1106
1107         switch (event) {
1108         case SND_SOC_DAPM_POST_PMD:
1109                 if (pmu) {
1110                         isCaptureon = false;
1111                         config_common_power(codec, false);
1112                         pmu = false;
1113                 }
1114                 break;
1115
1116         case SND_SOC_DAPM_PRE_PMU:
1117                 if (!pmu) {
1118                         isCaptureon = true;
1119                         config_common_power(codec, true);
1120                         pmu = true;
1121                 }
1122                 break;
1123
1124         default:
1125                 break;
1126         }
1127
1128         return 0;
1129 }
1130
1131 static const struct snd_soc_dapm_widget rt5631_dapm_widgets[] = {
1132 SND_SOC_DAPM_INPUT("MIC1"),
1133 SND_SOC_DAPM_INPUT("MIC2"),
1134 SND_SOC_DAPM_INPUT("AXIL"),
1135 SND_SOC_DAPM_INPUT("AXIR"),
1136 SND_SOC_DAPM_INPUT("MONOIN_RXN"),
1137 SND_SOC_DAPM_INPUT("MONOIN_RXP"),
1138
1139 SND_SOC_DAPM_MICBIAS("Mic Bias1", RT5631_PWR_MANAG_ADD2, 3, 0),
1140 SND_SOC_DAPM_MICBIAS("Mic Bias2", RT5631_PWR_MANAG_ADD2, 2, 0),
1141
1142 SND_SOC_DAPM_PGA_E("Mic1 Boost", RT5631_PWR_MANAG_ADD2, 5, 0, NULL, 0,
1143                 mic_event, SND_SOC_DAPM_POST_PMU),
1144 SND_SOC_DAPM_PGA_E("Mic2 Boost", RT5631_PWR_MANAG_ADD2, 4, 0, NULL, 0,
1145                 mic_event, SND_SOC_DAPM_POST_PMU),
1146 SND_SOC_DAPM_PGA("MONOIN_RXP Boost", RT5631_PWR_MANAG_ADD4, 7, 0, NULL, 0),
1147 SND_SOC_DAPM_PGA("MONOIN_RXN Boost", RT5631_PWR_MANAG_ADD4, 6, 0, NULL, 0),
1148 SND_SOC_DAPM_PGA("AXIL Boost", RT5631_PWR_MANAG_ADD4, 9, 0, NULL, 0),
1149 SND_SOC_DAPM_PGA("AXIR Boost", RT5631_PWR_MANAG_ADD4, 8, 0, NULL, 0),
1150 SND_SOC_DAPM_MIXER("MONO_IN", SND_SOC_NOPM, 0, 0, NULL, 0),
1151
1152 SND_SOC_DAPM_MIXER("RECMIXL Mixer", RT5631_PWR_MANAG_ADD2, 11, 0,
1153                 &rt5631_recmixl_mixer_controls[0],
1154                 ARRAY_SIZE(rt5631_recmixl_mixer_controls)),
1155 SND_SOC_DAPM_MIXER("RECMIXR Mixer", RT5631_PWR_MANAG_ADD2, 10, 0,
1156                 &rt5631_recmixr_mixer_controls[0],
1157                 ARRAY_SIZE(rt5631_recmixr_mixer_controls)),
1158 SND_SOC_DAPM_MIXER("ADC Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
1159
1160 SND_SOC_DAPM_ADC_E("Left ADC", "Left ADC HIFI Capture",
1161                 RT5631_PWR_MANAG_ADD1, 11, 0,
1162                 adc_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU),
1163 SND_SOC_DAPM_ADC_E("Right ADC", "Right ADC HIFI Capture",
1164                 RT5631_PWR_MANAG_ADD1, 10, 0,
1165                 adc_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU),
1166 SND_SOC_DAPM_DAC_E("Left DAC", "Left DAC HIFI Playback",
1167                 RT5631_PWR_MANAG_ADD1, 9, 0,
1168                 dac_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU),
1169 SND_SOC_DAPM_DAC_E("Right DAC", "Right DAC HIFI Playback",
1170                 RT5631_PWR_MANAG_ADD1, 8, 0,
1171                 dac_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_PRE_PMU),
1172 SND_SOC_DAPM_DAC("Voice DAC", "Voice DAC Mono Playback", SND_SOC_NOPM, 0, 0),
1173 SND_SOC_DAPM_PGA("Voice DAC Boost", SND_SOC_NOPM, 0, 0, NULL, 0),
1174
1175 SND_SOC_DAPM_MIXER("SPKMIXL Mixer", RT5631_PWR_MANAG_ADD2, 13, 0,
1176                 &rt5631_spkmixl_mixer_controls[0],
1177                 ARRAY_SIZE(rt5631_spkmixl_mixer_controls)),
1178 SND_SOC_DAPM_MIXER("OUTMIXL Mixer", RT5631_PWR_MANAG_ADD2, 15, 0,
1179                 &rt5631_outmixl_mixer_controls[0],
1180                 ARRAY_SIZE(rt5631_outmixl_mixer_controls)),
1181 SND_SOC_DAPM_MIXER("OUTMIXR Mixer", RT5631_PWR_MANAG_ADD2, 14, 0,
1182                 &rt5631_outmixr_mixer_controls[0],
1183                 ARRAY_SIZE(rt5631_outmixr_mixer_controls)),
1184 SND_SOC_DAPM_MIXER("SPKMIXR Mixer", RT5631_PWR_MANAG_ADD2, 12, 0,
1185                 &rt5631_spkmixr_mixer_controls[0],
1186                 ARRAY_SIZE(rt5631_spkmixr_mixer_controls)),
1187
1188 SND_SOC_DAPM_PGA("Left SPK Vol", RT5631_PWR_MANAG_ADD4, 15, 0, NULL, 0),
1189 SND_SOC_DAPM_PGA("Right SPK Vol", RT5631_PWR_MANAG_ADD4, 14, 0, NULL, 0),
1190 SND_SOC_DAPM_PGA_E("Left HP Vol", RT5631_PWR_MANAG_ADD4, 11, 0, NULL, 0,
1191                 hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1192 SND_SOC_DAPM_PGA_E("Right HP Vol", RT5631_PWR_MANAG_ADD4, 10, 0, NULL, 0,
1193                 hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1194
1195 SND_SOC_DAPM_PGA_E("Left DAC_HP", SND_SOC_NOPM, 0, 0, NULL, 0,
1196         dac_to_hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1197 SND_SOC_DAPM_PGA_E("Right DAC_HP", SND_SOC_NOPM, 0, 0, NULL, 0,
1198         dac_to_hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1199
1200 SND_SOC_DAPM_PGA("Left Out Vol", RT5631_PWR_MANAG_ADD4, 13, 0, NULL, 0),
1201 SND_SOC_DAPM_PGA("Right Out Vol", RT5631_PWR_MANAG_ADD4, 12, 0, NULL, 0),
1202
1203 SND_SOC_DAPM_MIXER_E("AXO1MIX Mixer", RT5631_PWR_MANAG_ADD3, 11, 0,
1204                 &rt5631_AXO1MIX_mixer_controls[0],
1205                 ARRAY_SIZE(rt5631_AXO1MIX_mixer_controls),
1206                 auxo1_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1207 SND_SOC_DAPM_MIXER("SPOLMIX Mixer", SND_SOC_NOPM, 0, 0,
1208                 &rt5631_spolmix_mixer_controls[0],
1209                 ARRAY_SIZE(rt5631_spolmix_mixer_controls)),
1210 SND_SOC_DAPM_MIXER("MONOMIX Mixer", RT5631_PWR_MANAG_ADD3, 9, 0,
1211                 &rt5631_monomix_mixer_controls[0],
1212                 ARRAY_SIZE(rt5631_monomix_mixer_controls)),
1213 SND_SOC_DAPM_MIXER("SPORMIX Mixer", SND_SOC_NOPM, 0, 0,
1214                 &rt5631_spormix_mixer_controls[0],
1215                 ARRAY_SIZE(rt5631_spormix_mixer_controls)),
1216 SND_SOC_DAPM_MIXER_E("AXO2MIX Mixer", RT5631_PWR_MANAG_ADD3, 10, 0,
1217                 &rt5631_AXO2MIX_mixer_controls[0],
1218                 ARRAY_SIZE(rt5631_AXO2MIX_mixer_controls),
1219                 auxo2_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1220
1221 SND_SOC_DAPM_MUX("SPOL Mux", SND_SOC_NOPM, 0, 0, &rt5631_spol_mux_control),
1222 SND_SOC_DAPM_MUX("SPOR Mux", SND_SOC_NOPM, 0, 0, &rt5631_spor_mux_control),
1223 SND_SOC_DAPM_MUX("Mono Mux", SND_SOC_NOPM, 0, 0, &rt5631_mono_mux_control),
1224 SND_SOC_DAPM_MUX("HPL Mux", SND_SOC_NOPM, 0, 0, &rt5631_hpl_mux_control),
1225 SND_SOC_DAPM_MUX("HPR Mux", SND_SOC_NOPM, 0, 0, &rt5631_hpr_mux_control),
1226
1227 SND_SOC_DAPM_PGA_E("Mono Amp", RT5631_PWR_MANAG_ADD3, 7, 0, NULL, 0,
1228                 mono_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1229 SND_SOC_DAPM_PGA_E("SPKL Amp", SND_SOC_NOPM, 0, 0, NULL, 0,
1230                 spk_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
1231 SND_SOC_DAPM_PGA_E("SPKR Amp", SND_SOC_NOPM, 1, 0, NULL, 0,
1232                 spk_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
1233
1234 SND_SOC_DAPM_OUTPUT("AUXO1"),
1235 SND_SOC_DAPM_OUTPUT("AUXO2"),
1236 SND_SOC_DAPM_OUTPUT("SPOL"),
1237 SND_SOC_DAPM_OUTPUT("SPOR"),
1238 SND_SOC_DAPM_OUTPUT("HPOL"),
1239 SND_SOC_DAPM_OUTPUT("HPOR"),
1240 SND_SOC_DAPM_OUTPUT("MONO"),
1241 };
1242
1243
1244 static const struct snd_soc_dapm_route audio_map[] = {
1245         {"Mic1 Boost", NULL, "MIC1"},
1246         {"Mic2 Boost", NULL, "MIC2"},
1247         {"MONOIN_RXP Boost", NULL, "MONOIN_RXP"},
1248         {"MONOIN_RXN Boost", NULL, "MONOIN_RXN"},
1249         {"AXIL Boost", NULL, "AXIL"},
1250         {"AXIR Boost", NULL, "AXIR"},
1251
1252         {"MONO_IN", NULL, "MONOIN_RXP Boost"},
1253         {"MONO_IN", NULL, "MONOIN_RXN Boost"},
1254
1255         {"RECMIXL Mixer", "OUTMIXL Capture Switch", "OUTMIXL Mixer"},
1256         {"RECMIXL Mixer", "MIC1_BST1 Capture Switch", "Mic1 Boost"},
1257         {"RECMIXL Mixer", "AXILVOL Capture Switch", "AXIL Boost"},
1258         {"RECMIXL Mixer", "MONOIN_RX Capture Switch", "MONO_IN"},
1259
1260         {"RECMIXR Mixer", "OUTMIXR Capture Switch", "OUTMIXR Mixer"},
1261         {"RECMIXR Mixer", "MIC2_BST2 Capture Switch", "Mic2 Boost"},
1262         {"RECMIXR Mixer", "AXIRVOL Capture Switch", "AXIR Boost"},
1263         {"RECMIXR Mixer", "MONOIN_RX Capture Switch", "MONO_IN"},
1264
1265         {"ADC Mixer", NULL, "RECMIXL Mixer"},
1266         {"ADC Mixer", NULL, "RECMIXR Mixer"},
1267         {"Left ADC", NULL, "ADC Mixer"},
1268         {"Right ADC", NULL, "ADC Mixer"},
1269
1270         {"Voice DAC Boost", NULL, "Voice DAC"},
1271
1272         {"SPKMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
1273         {"SPKMIXL Mixer", "MIC1_P Playback Switch", "MIC1"},
1274         {"SPKMIXL Mixer", "DACL Playback Switch", "Left DAC"},
1275         {"SPKMIXL Mixer", "OUTMIXL Playback Switch", "OUTMIXL Mixer"},
1276
1277         {"SPKMIXR Mixer", "OUTMIXR Playback Switch", "OUTMIXR Mixer"},
1278         {"SPKMIXR Mixer", "DACR Playback Switch", "Right DAC"},
1279         {"SPKMIXR Mixer", "MIC2_P Playback Switch", "MIC2"},
1280         {"SPKMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
1281
1282         {"OUTMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
1283         {"OUTMIXL Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
1284         {"OUTMIXL Mixer", "DACL Playback Switch", "Left DAC"},
1285         {"OUTMIXL Mixer", "MIC1_BST1 Playback Switch", "Mic1 Boost"},
1286         {"OUTMIXL Mixer", "MIC2_BST2 Playback Switch", "Mic2 Boost"},
1287         {"OUTMIXL Mixer", "MONOIN_RXP Playback Switch", "MONOIN_RXP Boost"},
1288         {"OUTMIXL Mixer", "AXILVOL Playback Switch", "AXIL Boost"},
1289         {"OUTMIXL Mixer", "AXIRVOL Playback Switch", "AXIR Boost"},
1290         {"OUTMIXL Mixer", "VDAC Playback Switch", "Voice DAC Boost"},
1291
1292         {"OUTMIXR Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
1293         {"OUTMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
1294         {"OUTMIXR Mixer", "DACR Playback Switch", "Right DAC"},
1295         {"OUTMIXR Mixer", "MIC1_BST1 Playback Switch", "Mic1 Boost"},
1296         {"OUTMIXR Mixer", "MIC2_BST2 Playback Switch", "Mic2 Boost"},
1297         {"OUTMIXR Mixer", "MONOIN_RXN Playback Switch", "MONOIN_RXN Boost"},
1298         {"OUTMIXR Mixer", "AXILVOL Playback Switch", "AXIL Boost"},
1299         {"OUTMIXR Mixer", "AXIRVOL Playback Switch", "AXIR Boost"},
1300         {"OUTMIXR Mixer", "VDAC Playback Switch", "Voice DAC Boost"},
1301
1302         {"Left SPK Vol",  NULL, "SPKMIXL Mixer"},
1303         {"Right SPK Vol",  NULL, "SPKMIXR Mixer"},
1304         {"Left HP Vol",  NULL, "OUTMIXL Mixer"},
1305         {"Left Out Vol",  NULL, "OUTMIXL Mixer"},
1306         {"Right Out Vol",  NULL, "OUTMIXR Mixer"},
1307         {"Right HP Vol",  NULL, "OUTMIXR Mixer"},
1308
1309         {"AXO1MIX Mixer", "MIC1_BST1 Playback Switch", "Mic1 Boost"},
1310         {"AXO1MIX Mixer", "OUTVOLL Playback Switch", "Left Out Vol"},
1311         {"AXO1MIX Mixer", "OUTVOLR Playback Switch", "Right Out Vol"},
1312         {"AXO1MIX Mixer", "MIC2_BST2 Playback Switch", "Mic2 Boost"},
1313
1314         {"AXO2MIX Mixer", "MIC1_BST1 Playback Switch", "Mic1 Boost"},
1315         {"AXO2MIX Mixer", "OUTVOLL Playback Switch", "Left Out Vol"},
1316         {"AXO2MIX Mixer", "OUTVOLR Playback Switch", "Right Out Vol"},
1317         {"AXO2MIX Mixer", "MIC2_BST2 Playback Switch", "Mic2 Boost"},
1318
1319         {"SPOLMIX Mixer", "SPKVOLL Playback Switch", "Left SPK Vol"},
1320         {"SPOLMIX Mixer", "SPKVOLR Playback Switch", "Right SPK Vol"},
1321
1322         {"SPORMIX Mixer", "SPKVOLL Playback Switch", "Left SPK Vol"},
1323         {"SPORMIX Mixer", "SPKVOLR Playback Switch", "Right SPK Vol"},
1324
1325         {"MONOMIX Mixer", "OUTVOLL Playback Switch", "Left Out Vol"},
1326         {"MONOMIX Mixer", "OUTVOLR Playback Switch", "Right Out Vol"},
1327
1328         {"SPOL Mux", "SPOLMIX", "SPOLMIX Mixer"},
1329         {"SPOL Mux", "MONOIN_RX", "MONO_IN"},
1330         {"SPOL Mux", "VDAC", "Voice DAC Boost"},
1331         {"SPOL Mux", "DACL", "Left DAC"},
1332
1333         {"SPOR Mux", "SPORMIX", "SPORMIX Mixer"},
1334         {"SPOR Mux", "MONOIN_RX", "MONO_IN"},
1335         {"SPOR Mux", "VDAC", "Voice DAC Boost"},
1336         {"SPOR Mux", "DACR", "Right DAC"},
1337
1338         {"Mono Mux", "MONOMIX", "MONOMIX Mixer"},
1339         {"Mono Mux", "MONOIN_RX", "MONO_IN"},
1340         {"Mono Mux", "VDAC", "Voice DAC Boost"},
1341
1342         {"Right DAC_HP", "NULL", "Right DAC"},
1343         {"Left DAC_HP", "NULL", "Left DAC"},
1344
1345         {"HPL Mux", "LEFT HPVOL", "Left HP Vol"},
1346         {"HPL Mux", "LEFT DAC", "Left DAC_HP"},
1347         {"HPR Mux", "RIGHT HPVOL", "Right HP Vol"},
1348         {"HPR Mux", "RIGHT DAC", "Right DAC_HP"},
1349
1350         {"SPKL Amp", NULL, "SPOL Mux"},
1351         {"SPKR Amp", NULL, "SPOR Mux"},
1352         {"Mono Amp", NULL, "Mono Mux"},
1353
1354         {"AUXO1", NULL, "AXO1MIX Mixer"},
1355         {"AUXO2", NULL, "AXO2MIX Mixer"},
1356         {"SPOL", NULL, "SPKL Amp"},
1357         {"SPOR", NULL, "SPKR Amp"},
1358
1359         {"HPOL", NULL, "HPL Mux"},
1360         {"HPOR", NULL, "HPR Mux"},
1361
1362         {"MONO", NULL, "Mono Amp"}
1363 };
1364
1365 static int rt5631_add_widgets(struct snd_soc_codec *codec)
1366 {
1367         struct snd_soc_dapm_context *dapm = &codec->dapm;
1368
1369         snd_soc_dapm_new_controls(dapm, rt5631_dapm_widgets,
1370                         ARRAY_SIZE(rt5631_dapm_widgets));
1371         snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
1372
1373         return 0;
1374 }
1375
1376 static int voltab[2][16] = 
1377 {
1378     //spk
1379     {0x27, 0x1b, 0x18, 0x15, 0x13, 0x11, 0x0f, 0x0e, 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06},
1380     //hp
1381     {0x1f, 0x1c, 0x1a, 0x18, 0x16, 0x14, 0x12, 0x10, 0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},
1382 };
1383 static int gvolume = 0;
1384
1385 #if 1
1386 static int get_vol(int max, int min, int stage_num, int stage)
1387 {
1388         int ret, step=((max-min)<<8)/(stage_num-1);
1389         if(stage==stage_num-1)
1390                 ret=min;
1391         else if(stage==0)
1392                 ret=max;
1393         else {
1394                 ret=(stage_num-stage-1) * step;
1395                 ret >>= 8;
1396                 ret = min+ret;
1397         }
1398         DBG("%s(): ret=%02x, max=0x%02x, min=0x%02x, stage_num=%d, stage=%d\n", 
1399                 __FUNCTION__, 
1400                 ret,
1401                 max,
1402                 min,
1403                 stage_num,
1404                 stage);
1405         return ret;
1406 }
1407
1408 static void rt5631_set_volume(int vollevel)
1409 {
1410         struct snd_soc_codec *codec = rt5631_codec;
1411         int tmpvol1, tmpvol2;
1412
1413         //DBG("rt5631_set_volume = %d\n", vollevel);
1414     
1415         if (vollevel > 15) vollevel = 8;
1416         gvolume = vollevel;
1417         
1418 //      tmpvol1 = voltab[0][vollevel];
1419 //      tmpvol2 = voltab[1][vollevel];
1420         tmpvol1=get_vol(0x27, DEF_VOL_SPK&0x3f, 16, vollevel);
1421         tmpvol2=get_vol(0x1f, DEF_VOL&0x1f, 16, vollevel);
1422
1423         if(vollevel == 0){
1424                 rt5631_write_mask(codec, RT5631_SPK_OUT_VOL, 0x8080, 0x8080);
1425                 rt5631_write_mask(codec, RT5631_HP_OUT_VOL, 0x8080, 0x8080);
1426         }
1427 //      else{
1428 //              rt5631_write_mask(codec, RT5631_SPK_OUT_VOL, 0x00, 0x8080);
1429 //              rt5631_write_mask(codec, RT5631_HP_OUT_VOL, 0x00, 0x8080);
1430 //      }
1431
1432         rt5631_write_mask(codec, RT5631_SPK_OUT_VOL, ((tmpvol1<<8)|tmpvol1), 0x3f3f);
1433         rt5631_write_mask(codec, RT5631_HP_OUT_VOL,  ((tmpvol2<<8)|tmpvol2), 0x3f3f);
1434 }
1435
1436 static void rt5631_set_eq(int on)
1437 {
1438         struct snd_soc_codec *codec = rt5631_codec;
1439         unsigned int Reg0C;
1440
1441         Reg0C = rt5631_read(codec, RT5631_STEREO_DAC_VOL_1);
1442         DBG("------- rt5631_set_eq: read Reg0C = 0x%04x\n", Reg0C);
1443
1444         Reg0C &= 0xFF80;
1445         if(on) { 
1446                 Reg0C |= 0x10;
1447         } else {
1448                 Reg0C |= 0x00;
1449         }
1450
1451         DBG("------- rt5631_set_eq: write Reg0C = 0x%04x\n", Reg0C);
1452         rt5631_write(codec, RT5631_STEREO_DAC_VOL_1, Reg0C);
1453 }
1454
1455 #else
1456
1457 static void rt5631_set_volume(int vollevel)
1458 {
1459         struct snd_soc_codec *codec = rt5631_codec;
1460         u8 tmpvol1, tmpvol2;
1461         u16 spk_vol, hp_vol;
1462
1463         DBG("rt5631_set_volume = %d\n", vollevel);
1464     
1465         if (vollevel > 15) vollevel = 8;
1466         gvolume = vollevel;
1467         
1468         tmpvol1 = voltab[0][vollevel];
1469         tmpvol2 = voltab[1][vollevel];
1470
1471         spk_vol = snd_soc_read(codec, RT5631_SPK_OUT_VOL);
1472         hp_vol  = snd_soc_read(codec, RT5631_HP_OUT_VOL);
1473
1474         DBG("\n\nold value: 0x%04x, 0x%04x\n", spk_vol & 0x3F3F, hp_vol & 0x3F3F);
1475         DBG("new value: 0x%04x\n", (tmpvol1<<8)|tmpvol1, (tmpvol2<<8)|tmpvol2);
1476
1477         spk_vol &= 0x3C3C;
1478         spk_vol |= (tmpvol1<<8)|tmpvol1;
1479         hp_vol  &= 0x3C3C;
1480         hp_vol  |= (tmpvol2<<8)|tmpvol2;
1481
1482         snd_soc_write(codec, RT5631_SPK_OUT_VOL, spk_vol);
1483         snd_soc_write(codec, RT5631_HP_OUT_VOL , hp_vol);
1484 }
1485
1486 #endif
1487 struct coeff_clk_div {
1488         u32 mclk;
1489         u32 bclk;
1490         u32 rate;
1491         u16 reg_val;
1492 };
1493
1494 /* PLL divisors yes*/
1495 struct pll_div {
1496         u32 pll_in;
1497         u32 pll_out;
1498         u16 reg_val;
1499 };
1500
1501 static const struct pll_div codec_master_pll_div[] = {
1502         {2048000,  8192000,  0x0ea0},
1503         {3686400,  8192000,  0x4e27},
1504         {12000000,  8192000,  0x456b},
1505         {13000000,  8192000,  0x495f},
1506         {13100000,  8192000,  0x0320},
1507         {2048000,  11289600,  0xf637},
1508         {3686400,  11289600,  0x2f22},
1509         {12000000,  11289600,  0x3e2f},
1510         {13000000,  11289600,  0x4d5b},
1511         {13100000,  11289600,  0x363b},
1512         {2048000,  16384000,  0x1ea0},
1513         {3686400,  16384000,  0x9e27},
1514         {12000000,  16384000,  0x452b},
1515         {13000000,  16384000,  0x542f},
1516         {13100000,  16384000,  0x03a0},
1517         {2048000,  16934400,  0xe625},
1518         {3686400,  16934400,  0x9126},
1519         {12000000,  16934400,  0x4d2c},
1520         {13000000,  16934400,  0x742f},
1521         {13100000,  16934400,  0x3c27},
1522         {2048000,  22579200,  0x2aa0},
1523         {3686400,  22579200,  0x2f20},
1524         {12000000,  22579200,  0x7e2f},
1525         {13000000,  22579200,  0x742f},
1526         {13100000,  22579200,  0x3c27},
1527         {2048000,  24576000,  0x2ea0},
1528         {3686400,  24576000,  0xee27},
1529         {12000000,  24576000,  0x2915},
1530         {13000000,  24576000,  0x772e},
1531         {13100000,  24576000,  0x0d20},
1532         {26000000,  24576000,  0x2027},
1533         {26000000,  22579200,  0x392f},
1534         {24576000,  22579200,  0x0921},
1535         {24576000,  24576000,  0x02a0},
1536 };
1537
1538 static const struct pll_div codec_slave_pll_div[] = {
1539         {256000,  2048000,  0x46f0},
1540         {256000,  4096000,  0x3ea0},
1541         {352800,         5644800,  0x3ea0},
1542         {512000,         8192000,  0x3ea0},
1543         {1024000,  8192000,  0x46f0},
1544         {705600,  11289600,  0x3ea0},
1545         {1024000,  16384000,  0x3ea0},
1546         {1411200,  22579200,  0x3ea0},
1547         {1536000,  24576000,  0x3ea0},
1548         {2048000,  16384000,  0x1ea0},
1549         {2822400,  22579200,  0x1ea0},
1550         {2822400,  45158400,  0x5ec0},
1551         {5644800,  45158400,  0x46f0},
1552         {3072000,  24576000,  0x1ea0},
1553         {3072000,  49152000,  0x5ec0},
1554         {6144000,  49152000,  0x46f0},
1555         {705600,  11289600,  0x3ea0},
1556         {705600,  8467200,  0x3ab0},
1557         {24576000,  24576000,  0x02a0},
1558         {1411200,  11289600,  0x1690},
1559         {2822400,  11289600,  0x0a90},
1560         {1536000,  12288000,  0x1690},
1561         {3072000,  12288000,  0x0a90},
1562 };
1563
1564 struct coeff_clk_div coeff_div[] = {
1565         /* sysclk is 256fs */
1566         {2048000,  8000 * 32,  8000, 0x1000},
1567         {2048000,  8000 * 64,  8000, 0x0000},
1568         {2822400,  11025 * 32,  11025,  0x1000},
1569         {2822400,  11025 * 64,  11025,  0x0000},
1570         {4096000,  16000 * 32,  16000,  0x1000},
1571         {4096000,  16000 * 64,  16000,  0x0000},
1572         {5644800,  22050 * 32,  22050,  0x1000},
1573         {5644800,  22050 * 64,  22050,  0x0000},
1574         {8192000,  32000 * 32,  32000,  0x1000},
1575         {8192000,  32000 * 64,  32000,  0x0000},
1576         {11289600,  44100 * 32,  44100,  0x1000},
1577         {11289600,  44100 * 64,  44100,  0x0000},
1578         {12288000,  48000 * 32,  48000,  0x1000},
1579         {12288000,  48000 * 64,  48000,  0x0000},
1580         {22579200,  88200 * 32,  88200,  0x1000},
1581         {22579200,  88200 * 64,  88200,  0x0000},
1582         {24576000,  96000 * 32,  96000,  0x1000},
1583         {24576000,  96000 * 64,  96000,  0x0000},
1584         {22579200,  176400 * 32,  176400,  0x1000},
1585         {22579200,  176400 * 64,  176400,  0x0000},
1586         {24576000,  192000 * 32,  192000,  0x1000},
1587         {24576000,  162000 * 64,  192000,  0x0000},
1588         /* sysclk is 512fs */
1589         {4096000,  8000 * 32,  8000, 0x3000},
1590         {4096000,  8000 * 64,  8000, 0x2000},
1591         {5644800,  11025 * 32,  11025, 0x3000},
1592         {5644800,  11025 * 64,  11025, 0x2000},
1593         {8192000,  16000 * 32,  16000, 0x3000},
1594         {8192000,  16000 * 64,  16000, 0x2000},
1595         {11289600,  22050 * 32,  22050, 0x3000},
1596         {11289600,  22050 * 64,  22050, 0x2000},
1597         {16384000,  32000 * 32,  32000, 0x3000},
1598         {16384000,  32000 * 64,  32000, 0x2000},
1599         {22579200,  44100 * 32,  44100, 0x3000},
1600         {22579200,  44100 * 64,  44100, 0x2000},
1601         {24576000,  48000 * 32,  48000, 0x3000},
1602         {24576000,  48000 * 64,  48000, 0x2000},
1603         {45158400,  88200 * 32,  88200, 0x3000},
1604         {45158400,  88200 * 64,  88200, 0x2000},
1605         {49152000,  96000 * 32,  96000, 0x3000},
1606         {49152000,  96000 * 64,  96000, 0x2000},
1607         /* sysclk is 24.576Mhz or 22.5792Mhz */
1608         {24576000,  8000 * 32,  8000,  0x7080},
1609         {24576000,  8000 * 64,  8000,  0x6080},
1610         {24576000,  16000 * 32,  16000,  0x5080},
1611         {24576000,  16000 * 64,  16000,  0x4080},
1612         {24576000,  24000 * 32,  24000,  0x5000},
1613         {24576000,  24000 * 64,  24000,  0x4000},
1614         {24576000,  32000 * 32,  32000,  0x3080},
1615         {24576000,  32000 * 64,  32000,  0x2080},
1616         {22579200,  11025 * 32,  11025,  0x7000},
1617         {22579200,  11025 * 64,  11025,  0x6000},
1618         {22579200,  22050 * 32,  22050,  0x5000},
1619         {22579200,  22050 * 64,  22050,  0x4000},
1620 };
1621
1622 static int get_coeff(int mclk, int rate, int timesofbclk)
1623 {
1624         int i;
1625
1626         for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
1627                 if (coeff_div[i].mclk == mclk && coeff_div[i].rate == rate &&
1628                         (coeff_div[i].bclk / coeff_div[i].rate) == timesofbclk)
1629                         return i;
1630         }
1631         return -EINVAL;
1632 }
1633
1634 static int get_coeff_in_slave_mode(int mclk, int rate)
1635 {
1636         return get_coeff(mclk, rate, timesofbclk);
1637 }
1638
1639 static int get_coeff_in_master_mode(int mclk, int rate, int bclk)
1640 {
1641         return get_coeff(mclk, rate, (bclk / rate));
1642 }
1643
1644 static void rt5631_set_dmic_params(struct snd_soc_codec *codec,
1645         struct snd_pcm_hw_params *params)
1646 {
1647         int rate;
1648
1649         rt5631_write_mask(codec, RT5631_GPIO_CTRL,
1650                 GPIO_PIN_FUN_SEL_GPIO_DIMC | GPIO_DMIC_FUN_SEL_DIMC,
1651                 GPIO_PIN_FUN_SEL_MASK | GPIO_DMIC_FUN_SEL_MASK);
1652         rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL, DMIC_ENA, DMIC_ENA_MASK);
1653         rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
1654                 DMIC_L_CH_LATCH_FALLING | DMIC_R_CH_LATCH_RISING,
1655                 DMIC_L_CH_LATCH_MASK|DMIC_R_CH_LATCH_MASK);
1656
1657         rate = params_rate(params);
1658         switch (rate) {
1659         case 44100:
1660         case 48000:
1661                 rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
1662                         DMIC_CLK_CTRL_TO_32FS, DMIC_CLK_CTRL_MASK);
1663                 break;
1664
1665         case 32000:
1666         case 22050:
1667                 rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
1668                         DMIC_CLK_CTRL_TO_64FS, DMIC_CLK_CTRL_MASK);
1669                 break;
1670
1671         case 16000:
1672         case 11025:
1673         case 8000:
1674                 rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
1675                         DMIC_CLK_CTRL_TO_128FS, DMIC_CLK_CTRL_MASK);
1676                 break;
1677
1678         default:
1679                 break;
1680         }
1681
1682         rt5631_write_mask(codec, RT5631_DIG_MIC_CTRL,
1683                 DMIC_L_CH_UNMUTE | DMIC_R_CH_UNMUTE,
1684                 DMIC_L_CH_MUTE_MASK | DMIC_R_CH_MUTE_MASK);
1685
1686         return;
1687 }
1688
1689 static int rt5631_hifi_pcm_params(struct snd_pcm_substream *substream,
1690                 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1691 {
1692         struct snd_soc_pcm_runtime *rtd = substream->private_data;
1693         struct snd_soc_codec *codec = rtd->codec;
1694         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1695         int stream = substream->stream, rate = params_rate(params), coeff;
1696         unsigned int iface = 0;
1697
1698         pr_debug("enter %s\n", __func__);
1699
1700         if (!rt5631->master)
1701                 coeff = get_coeff_in_slave_mode(rt5631->sysclk, rate);
1702         else
1703                 coeff = get_coeff_in_master_mode(rt5631->sysclk, rate,
1704                                         rate * timesofbclk);
1705         if (coeff < 0)
1706                 pr_err("%s: get coeff err!\n", __func__);
1707
1708         switch (params_format(params)) {
1709         case SNDRV_PCM_FORMAT_S16_LE:
1710                 break;
1711         case SNDRV_PCM_FORMAT_S20_3LE:
1712                 iface |= SDP_I2S_DL_20;
1713                 break;
1714         case SNDRV_PCM_FORMAT_S24_LE:
1715                 iface |= SDP_I2S_DL_24;
1716                 break;
1717         case SNDRV_PCM_FORMAT_S8:
1718                 iface |= SDP_I2S_DL_8;
1719                 break;
1720         default:
1721                 return -EINVAL;
1722         }
1723
1724         if (SNDRV_PCM_STREAM_CAPTURE == stream) {
1725                 if (rt5631->dmic_used_flag)
1726                         rt5631_set_dmic_params(codec, params);
1727         }
1728
1729         rt5631_write_mask(codec, RT5631_SDP_CTRL, iface, SDP_I2S_DL_MASK);
1730
1731         if (coeff >= 0)
1732                 rt5631_write(codec, RT5631_STEREO_AD_DA_CLK_CTRL,
1733                                         coeff_div[coeff].reg_val);
1734
1735         return 0;
1736 }
1737
1738 static int rt5631_hifi_codec_set_dai_fmt(struct snd_soc_dai *codec_dai,
1739                                                 unsigned int fmt)
1740 {
1741         struct snd_soc_codec *codec = codec_dai->codec;
1742         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1743         unsigned int iface = 0;
1744
1745         pr_debug("enter %s\n", __func__);
1746
1747         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1748         case SND_SOC_DAIFMT_CBM_CFM:
1749                 rt5631->master = 1;
1750                 break;
1751         case SND_SOC_DAIFMT_CBS_CFS:
1752                 iface |= SDP_MODE_SEL_SLAVE;
1753                 rt5631->master = 0;
1754                 break;
1755         default:
1756                 return -EINVAL;
1757         }
1758
1759         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1760         case SND_SOC_DAIFMT_I2S:
1761                 break;
1762         case SND_SOC_DAIFMT_LEFT_J:
1763                 iface |= SDP_I2S_DF_LEFT;
1764                 break;
1765         case SND_SOC_DAIFMT_DSP_A:
1766                 iface |= SDP_I2S_DF_PCM_A;
1767                 break;
1768         case SND_SOC_DAIFMT_DSP_B:
1769                 iface  |= SDP_I2S_DF_PCM_B;
1770                 break;
1771         default:
1772                 return -EINVAL;
1773         }
1774
1775         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1776         case SND_SOC_DAIFMT_NB_NF:
1777                 break;
1778         case SND_SOC_DAIFMT_IB_NF:
1779                 iface |= SDP_I2S_BCLK_POL_CTRL;
1780                 break;
1781         default:
1782                 return -EINVAL;
1783         }
1784
1785         rt5631_write(codec, RT5631_SDP_CTRL, iface);
1786
1787         return 0;
1788 }
1789
1790 static int rt5631_hifi_codec_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1791                                 int clk_id, unsigned int freq, int dir)
1792 {
1793         struct snd_soc_codec *codec = codec_dai->codec;
1794         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1795
1796         DBG("enter %s, syclk=%d\n", __func__, freq);
1797         if ((freq >= (256 * 8000)) && (freq <= (512 * 96000))) {
1798                 rt5631->sysclk = freq;
1799                 return 0;
1800         }
1801
1802         pr_info("unsupported sysclk freq %u for audio i2s\n", freq);
1803         pr_info("set sysclk to 24.576Mhz by default\n");
1804
1805         rt5631->sysclk = 24576000;
1806         return 0;
1807 }
1808
1809 static int rt5631_codec_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1810                 int source, unsigned int freq_in, unsigned int freq_out)
1811 {
1812         struct snd_soc_codec *codec = codec_dai->codec;
1813         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1814         int i, ret = -EINVAL;
1815
1816         DBG(KERN_DEBUG "enter %s\n", __func__);
1817
1818         if (!freq_in || !freq_out)
1819                 return 0;
1820
1821         if (rt5631->master) {
1822                 for (i = 0; i < ARRAY_SIZE(codec_master_pll_div); i++)
1823                         if (freq_in == codec_master_pll_div[i].pll_in &&
1824                         freq_out == codec_master_pll_div[i].pll_out) {
1825                                 rt5631_write(codec, RT5631_PLL_CTRL,
1826                                         codec_master_pll_div[i].reg_val);
1827                                 schedule_timeout_uninterruptible(
1828                                         msecs_to_jiffies(20));
1829                                 rt5631_write(codec, RT5631_GLOBAL_CLK_CTRL,
1830                                         SYSCLK_SOUR_SEL_PLL);
1831                                 rt5631->pll_used_flag = 1;
1832                                 ret = 0;
1833                                 break;
1834                         }
1835         } else {
1836                 for (i = 0; i < ARRAY_SIZE(codec_slave_pll_div); i++)
1837                         if (freq_in == codec_slave_pll_div[i].pll_in &&
1838                         freq_out == codec_slave_pll_div[i].pll_out) {
1839                                 rt5631_write(codec, RT5631_PLL_CTRL,
1840                                         codec_slave_pll_div[i].reg_val);
1841                                 schedule_timeout_uninterruptible(
1842                                         msecs_to_jiffies(20));
1843                                 rt5631_write(codec, RT5631_GLOBAL_CLK_CTRL,
1844                                         SYSCLK_SOUR_SEL_PLL |
1845                                         PLLCLK_SOUR_SEL_BITCLK);
1846                                 rt5631->pll_used_flag = 1;
1847                                 ret = 0;
1848                                 break;
1849                         }
1850         }
1851
1852         return ret;
1853 }
1854
1855 #if defined(CONFIG_ADJUST_VOL_BY_CODEC)
1856 static int rt5631_trigger(struct snd_pcm_substream *substream, int status, struct snd_soc_dai *dai)
1857 {
1858         //DBG("rt5631_trigger\n");
1859         if(status == SNDRV_PCM_TRIGGER_VOLUME){
1860                 //DBG("rt5631_trigger: vol = %d\n", substream->number);
1861                 if(substream->number < 100){
1862                         rt5631_set_volume(substream->number);
1863                 } else {
1864                         if(substream->number == 100) { // eq off
1865                                 DBG("---------- eq off\n");
1866                                 rt5631_set_eq(0);
1867                         } else { // eq on   +6dB
1868                                 DBG("---------- eq on\n");
1869                                 rt5631_set_eq(1);
1870                         }
1871                 }               
1872         }
1873
1874         return 0;
1875 }
1876 #endif
1877
1878 static ssize_t rt5631_index_reg_show(struct device *dev,
1879         struct device_attribute *attr, char *buf)
1880 {
1881         #define IDX_REG_FMT "%02x: %04x\n"
1882         #define IDX_REG_LEN 9
1883         unsigned int val;
1884         int cnt = 0, i;
1885
1886         cnt += sprintf(buf, "RT5631 index register\n");
1887         for (i = 0; i < 0x55; i++) {
1888                 if (cnt + IDX_REG_LEN >= PAGE_SIZE - 1)
1889                         break;
1890                 val = rt5631_read_index(rt5631_codec, i);
1891                 if (!val)
1892                         continue;
1893                 cnt += sprintf(buf + cnt, IDX_REG_FMT, i, val);
1894         }
1895
1896         if (cnt >= PAGE_SIZE)
1897                 cnt = PAGE_SIZE - 1;
1898
1899         return cnt;
1900 }
1901 static DEVICE_ATTR(index_reg, 0444, rt5631_index_reg_show, NULL);
1902
1903 #define RT5631_STEREO_RATES SNDRV_PCM_RATE_8000_192000
1904 #define RT5631_FORMAT   (SNDRV_PCM_FMTBIT_S16_LE | \
1905                         SNDRV_PCM_FMTBIT_S20_3LE | \
1906                         SNDRV_PCM_FMTBIT_S24_LE | \
1907                         SNDRV_PCM_FMTBIT_S8)
1908
1909 struct snd_soc_dai_ops rt5631_ops = {
1910         .hw_params = rt5631_hifi_pcm_params,
1911         .set_fmt = rt5631_hifi_codec_set_dai_fmt,
1912         .set_sysclk = rt5631_hifi_codec_set_dai_sysclk,
1913         .set_pll = rt5631_codec_set_dai_pll,
1914 #if defined(CONFIG_ADJUST_VOL_BY_CODEC)
1915     .trigger = rt5631_trigger,
1916 #endif
1917 };
1918
1919 struct snd_soc_dai_driver rt5631_dai[] = {
1920         {
1921                 .name = "RT5631 HiFi",
1922                 .playback = {
1923                         .stream_name = "HIFI Playback",
1924                         .channels_min = 1,
1925                         .channels_max = 2,
1926                         .rates = RT5631_STEREO_RATES,
1927                         .formats = RT5631_FORMAT,
1928                 },
1929                 .capture = {
1930                         .stream_name = "HIFI Capture",
1931                         .channels_min = 1,
1932                         .channels_max = 2,
1933                         .rates = RT5631_STEREO_RATES,
1934                         .formats = RT5631_FORMAT,
1935                 },
1936                 .ops = &rt5631_ops,
1937         },
1938 };
1939 EXPORT_SYMBOL_GPL(rt5631_dai);
1940
1941 static int rt5631_set_bias_level(struct snd_soc_codec *codec,
1942                         enum snd_soc_bias_level level)
1943 {
1944         switch (level) {
1945         case SND_SOC_BIAS_ON:
1946                 break;
1947
1948         case SND_SOC_BIAS_PREPARE:
1949                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
1950                         PWR_VREF | PWR_MAIN_BIAS, PWR_VREF | PWR_MAIN_BIAS);
1951                 rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD2,
1952                         PWR_MICBIAS1_VOL | PWR_MICBIAS2_VOL,
1953                         PWR_MICBIAS1_VOL | PWR_MICBIAS2_VOL);
1954                 break;
1955
1956         case SND_SOC_BIAS_STANDBY:
1957         //      rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD2, 0,
1958         //              PWR_MICBIAS1_VOL | PWR_MICBIAS2_VOL);
1959                 printk("standby rt5631\n");
1960                 rt5631_write(codec, RT5631_PWR_MANAG_ADD1, 0x0000);
1961                 rt5631_write(codec, RT5631_PWR_MANAG_ADD2, 0x0000);
1962                 rt5631_write(codec, RT5631_PWR_MANAG_ADD3, 0x0000);
1963                 rt5631_write(codec, RT5631_PWR_MANAG_ADD4, 0x0000);             
1964                 break;
1965
1966         case SND_SOC_BIAS_OFF:
1967                 rt5631_write_mask(codec, RT5631_SPK_OUT_VOL,
1968                         RT_L_MUTE | RT_R_MUTE, RT_L_MUTE | RT_R_MUTE);
1969                 rt5631_write_mask(codec, RT5631_HP_OUT_VOL,
1970                         RT_L_MUTE | RT_R_MUTE, RT_L_MUTE | RT_R_MUTE);
1971                 rt5631_write(codec, RT5631_PWR_MANAG_ADD1, 0x0000);
1972                 rt5631_write(codec, RT5631_PWR_MANAG_ADD2, 0x0000);
1973                 rt5631_write(codec, RT5631_PWR_MANAG_ADD3, 0x0000);
1974                 rt5631_write(codec, RT5631_PWR_MANAG_ADD4, 0x0000);
1975                 break;
1976
1977         default:
1978                 break;
1979         }
1980         codec->dapm.bias_level = level;
1981
1982         return 0;
1983 }
1984
1985 static int rt5631_probe(struct snd_soc_codec *codec)
1986 {
1987         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
1988         unsigned int val;
1989         int ret;
1990         ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
1991         if (ret != 0) {
1992                 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
1993                 return ret;
1994         }
1995         codec->cache_bypass = 1;
1996
1997         val = rt5631_read_index(codec, RT5631_ADDA_MIXER_INTL_REG3);
1998         if (val & 0x0002)
1999                 rt5631->codec_version = 1;
2000         else
2001                 rt5631->codec_version = 0;
2002
2003         rt5631_reset(codec);
2004         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
2005                 PWR_VREF | PWR_MAIN_BIAS, PWR_VREF | PWR_MAIN_BIAS);
2006         schedule_timeout_uninterruptible(msecs_to_jiffies(80));
2007         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3, PWR_FAST_VREF_CTRL,
2008                                         PWR_FAST_VREF_CTRL);
2009         rt5631_reg_init(codec);
2010
2011         /* power off ClassD auto Recovery */
2012         if (rt5631->codec_version)
2013                 rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
2014                                         0x2000, 0x2000);
2015         else
2016                 rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
2017                                         0, 0x2000);
2018
2019         codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
2020         rt5631_codec = codec;
2021
2022 #if (RT5631_SPK_TIMER == 1)
2023         /* Timer module installing */
2024         setup_timer( &spk_timer, spk_timer_callback, 0 );
2025         DBG( "Starting timer to fire in 5s (%ld)\n", jiffies );
2026         ret = mod_timer( &spk_timer, jiffies + msecs_to_jiffies(5000) );
2027         if (ret) printk("Error in mod_timer\n");
2028
2029         INIT_WORK(&spk_work, spk_work_handler);
2030 #endif
2031 //bard 7-16 s
2032         INIT_DELAYED_WORK(&rt5631_delay_cap,rt5631_adc_on);
2033 //bard 7-16 e
2034         snd_soc_add_controls(codec, rt5631_snd_controls,
2035                 ARRAY_SIZE(rt5631_snd_controls));
2036         rt5631_add_widgets(codec);
2037
2038         ret = device_create_file(codec->dev, &dev_attr_index_reg);
2039         if (ret != 0) {
2040                 dev_err(codec->dev,
2041                         "Failed to create index_reg sysfs files: %d\n", ret);
2042                 return ret;
2043         }
2044
2045         DBG("RT5631 initial ok!\n");
2046
2047         return 0;
2048 }
2049
2050 static int rt5631_remove(struct snd_soc_codec *codec)
2051 {
2052
2053
2054 #if (RT5631_SPK_TIMER == 1)     
2055         /* Timer¡¡module¡¡uninstalling */
2056         int ret;
2057         ret = del_timer(&spk_timer);
2058         if(ret) printk("The timer is still in use...\n");
2059         DBG("Timer module uninstalling\n");
2060 #endif
2061
2062
2063         rt5631_set_bias_level(codec, SND_SOC_BIAS_OFF);
2064         return 0;
2065 }
2066
2067 static int rt5631_suspend(struct snd_soc_codec *codec, pm_message_t state)
2068 {
2069         rt5631_set_bias_level(codec, SND_SOC_BIAS_OFF);
2070         return 0;
2071 }
2072
2073 static int rt5631_resume(struct snd_soc_codec *codec)
2074 {
2075         struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
2076
2077         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
2078                 PWR_VREF | PWR_MAIN_BIAS, PWR_VREF | PWR_MAIN_BIAS);
2079         schedule_timeout_uninterruptible(msecs_to_jiffies(110));
2080         rt5631_write_mask(codec, RT5631_PWR_MANAG_ADD3,
2081                 PWR_FAST_VREF_CTRL, PWR_FAST_VREF_CTRL);
2082         rt5631_reg_init(codec);
2083
2084         /* power off ClassD auto Recovery */
2085         if (rt5631->codec_version)
2086                 rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
2087                                         0x2000, 0x2000);
2088         else
2089                 rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2,
2090                                         0, 0x2000);
2091
2092 #if (RT5631_SPK_TIMER == 1)
2093                 //last_is_spk = !last_is_spk;   //wired~, update eqmode right here by spk_timer.
2094                 last_is_spk = -1;       //wired~, update eqmode right here by spk_timer. //bard 9-13
2095 #endif
2096
2097         return 0;
2098 }
2099
2100 #ifdef CONFIG_MACH_RK_FAC
2101 void rt5631_codec_set_spk(bool on)
2102 {
2103         struct snd_soc_codec *codec = rt5631_codec;     
2104         if(rt5631_hdmi_ctrl)
2105         {
2106                 DBG("%s: %d\n", __func__, on);
2107                 
2108                 if(!codec)
2109                         return;
2110                 mutex_lock(&codec->mutex);
2111                 if(on){
2112                         DBG("snd_soc_dapm_enable_pin\n");
2113                         snd_soc_dapm_enable_pin(&codec->dapm, "Headphone Jack");
2114                         snd_soc_dapm_enable_pin(&codec->dapm, "Ext Spk");
2115                 }
2116                 else{
2117                         DBG("snd_soc_dapm_disable_pin\n");
2118                         snd_soc_dapm_disable_pin(&codec->dapm, "Headphone Jack");
2119                         snd_soc_dapm_disable_pin(&codec->dapm, "Ext Spk");
2120                 }
2121         
2122                 snd_soc_dapm_sync(&codec->dapm);
2123                 mutex_unlock(&codec->mutex);
2124         }
2125         return;
2126 }
2127 #else
2128 void codec_set_spk(bool on)
2129 {
2130         struct snd_soc_codec *codec = rt5631_codec;
2131
2132         DBG("%s: %d\n", __func__, on);
2133
2134         if(!codec)
2135                 return;
2136         mutex_lock(&codec->mutex);
2137         if(on){
2138                 DBG("snd_soc_dapm_enable_pin\n");
2139                 snd_soc_dapm_enable_pin(&codec->dapm, "Headphone Jack");
2140                 snd_soc_dapm_enable_pin(&codec->dapm, "Ext Spk");
2141         }
2142         else{
2143                 DBG("snd_soc_dapm_disable_pin\n");
2144                 snd_soc_dapm_disable_pin(&codec->dapm, "Headphone Jack");
2145                 snd_soc_dapm_disable_pin(&codec->dapm, "Ext Spk");
2146         }
2147
2148         snd_soc_dapm_sync(&codec->dapm);
2149         mutex_unlock(&codec->mutex);
2150         return;
2151 }
2152 #endif 
2153
2154 /*
2155  * detect short current for mic1
2156  */
2157 int rt5631_ext_mic_detect(void)
2158 {
2159         struct snd_soc_codec *codec = rt5631_codec;
2160         int det;
2161
2162         rt5631_write_mask(codec, RT5631_MIC_CTRL_2, MICBIAS1_S_C_DET_ENA,
2163                                 MICBIAS1_S_C_DET_MASK);
2164         det = rt5631_read(codec, RT5631_INT_ST_IRQ_CTRL_2) & 0x0001;
2165         rt5631_write_mask(codec, RT5631_INT_ST_IRQ_CTRL_2, 0x0001, 0x00001);
2166
2167         return det;
2168 }
2169 EXPORT_SYMBOL_GPL(rt5631_ext_mic_detect);
2170
2171 static struct snd_soc_codec_driver soc_codec_dev_rt5631 = {
2172         .probe = rt5631_probe,
2173         .remove = rt5631_remove,
2174         .suspend = rt5631_suspend,
2175         .resume = rt5631_resume,
2176         .set_bias_level = rt5631_set_bias_level,
2177         .reg_cache_size = ARRAY_SIZE(rt5631_reg),
2178         .reg_word_size = sizeof(u16),
2179         .reg_cache_default = rt5631_reg,
2180         .reg_cache_step = 1,
2181 };
2182
2183 void rt5631_shutdown(struct i2c_client *client)
2184 {
2185         rt5631_set_bias_level(rt5631_codec, SND_SOC_BIAS_OFF);
2186 }
2187
2188
2189 static const struct i2c_device_id rt5631_i2c_id[] = {
2190         { "rt5631", 0 },
2191         { }
2192 };
2193 MODULE_DEVICE_TABLE(i2c, rt5631_i2c_id);
2194
2195 static int rt5631_i2c_probe(struct i2c_client *i2c,
2196                     const struct i2c_device_id *id)
2197 {
2198         struct rt5631_priv *rt5631;
2199         int ret;
2200
2201         printk("RT5631 Audio Codec %s\n", RT5631_VERSION);
2202
2203         rt5631 = kzalloc(sizeof(struct rt5631_priv), GFP_KERNEL);
2204         if (NULL == rt5631)
2205                 return -ENOMEM;
2206
2207         i2c_set_clientdata(i2c, rt5631);
2208
2209         ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5631,
2210                         rt5631_dai, ARRAY_SIZE(rt5631_dai));
2211         if (ret < 0)
2212                 kfree(rt5631);
2213 #ifdef CONFIG_MACH_RK_FAC             
2214         rt5631_hdmi_ctrl=1;
2215 #endif 
2216
2217         return ret;
2218 }
2219
2220 static __devexit int rt5631_i2c_remove(struct i2c_client *client)
2221 {
2222         snd_soc_unregister_codec(&client->dev);
2223         kfree(i2c_get_clientdata(client));
2224         return 0;
2225 }
2226
2227 struct i2c_driver rt5631_i2c_driver = {
2228         .driver = {
2229                 .name = "RT5631",
2230                 .owner = THIS_MODULE,
2231         },
2232         .probe = rt5631_i2c_probe,
2233         .remove   = __devexit_p(rt5631_i2c_remove),
2234         .id_table = rt5631_i2c_id,
2235         .shutdown = rt5631_shutdown,
2236 };
2237
2238 static int __init rt5631_modinit(void)
2239 {
2240         return i2c_add_driver(&rt5631_i2c_driver);
2241 }
2242 module_init(rt5631_modinit);
2243
2244 static void __exit rt5631_modexit(void)
2245 {
2246         i2c_del_driver(&rt5631_i2c_driver);
2247 }
2248 module_exit(rt5631_modexit);
2249
2250 MODULE_DESCRIPTION("ASoC RT5631 driver");
2251 MODULE_AUTHOR("flove <flove@realtek.com>");
2252 MODULE_LICENSE("GPL");