sound/soc/codecs/rt5645.c

   1 /*
   2  * rt5645.c  --  RT5645 ALSA SoC audio codec driver
   3  *
   4  * Copyright 2013 Realtek Semiconductor Corp.
   5  * Author: Bard Liao <bardliao@realtek.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/moduleparam.h>
  14 #include <linux/init.h>
  15 #include <linux/delay.h>
  16 #include <linux/pm.h>
  17 #include <linux/i2c.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/spi/spi.h>
  20 #include <sound/core.h>
  21 #include <sound/pcm.h>
  22 #include <sound/pcm_params.h>
  23 #include <sound/jack.h>
  24 #include <sound/soc.h>
  25 #include <sound/soc-dapm.h>
  26 #include <sound/initval.h>
  27 #include <sound/tlv.h>
  28
  29 #include "rt5645.h"
  30
  31 #define RT5645_DEVICE_ID 0x6308
  32
  33 #define RT5645_PR_RANGE_BASE (0xff + 1)
  34 #define RT5645_PR_SPACING 0x100
  35
  36 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
  37
  38 static const struct regmap_range_cfg rt5645_ranges[] = {
  39         {
  40                 .name = "PR",
  41                 .range_min = RT5645_PR_BASE,
  42                 .range_max = RT5645_PR_BASE + 0xf8,
  43                 .selector_reg = RT5645_PRIV_INDEX,
  44                 .selector_mask = 0xff,
  45                 .selector_shift = 0x0,
  46                 .window_start = RT5645_PRIV_DATA,
  47                 .window_len = 0x1,
  48         },
  49 };
  50
  51 static const struct reg_default init_list[] = {
  52         {RT5645_PR_BASE + 0x3d, 0x3600},
  53 };
  54 #define RT5645_INIT_REG_LEN ARRAY_SIZE(init_list)
  55
  56 static const struct reg_default rt5645_reg[] = {
  57         { 0x00, 0x0000 },
  58         { 0x01, 0xc8c8 },
  59         { 0x02, 0xc8c8 },
  60         { 0x03, 0xc8c8 },
  61         { 0x0a, 0x0002 },
  62         { 0x0b, 0x2827 },
  63         { 0x0c, 0xe000 },
  64         { 0x0d, 0x0000 },
  65         { 0x0e, 0x0000 },
  66         { 0x0f, 0x0808 },
  67         { 0x14, 0x3333 },
  68         { 0x16, 0x4b00 },
  69         { 0x18, 0x018b },
  70         { 0x19, 0xafaf },
  71         { 0x1a, 0xafaf },
  72         { 0x1b, 0x0001 },
  73         { 0x1c, 0x2f2f },
  74         { 0x1d, 0x2f2f },
  75         { 0x1e, 0x0000 },
  76         { 0x20, 0x0000 },
  77         { 0x27, 0x7060 },
  78         { 0x28, 0x7070 },
  79         { 0x29, 0x8080 },
  80         { 0x2a, 0x5656 },
  81         { 0x2b, 0x5454 },
  82         { 0x2c, 0xaaa0 },
  83         { 0x2f, 0x1002 },
  84         { 0x31, 0x5000 },
  85         { 0x32, 0x0000 },
  86         { 0x33, 0x0000 },
  87         { 0x34, 0x0000 },
  88         { 0x35, 0x0000 },
  89         { 0x3b, 0x0000 },
  90         { 0x3c, 0x007f },
  91         { 0x3d, 0x0000 },
  92         { 0x3e, 0x007f },
  93         { 0x3f, 0x0000 },
  94         { 0x40, 0x001f },
  95         { 0x41, 0x0000 },
  96         { 0x42, 0x001f },
  97         { 0x45, 0x6000 },
  98         { 0x46, 0x003e },
  99         { 0x47, 0x003e },
 100         { 0x48, 0xf807 },
 101         { 0x4a, 0x0004 },
 102         { 0x4d, 0x0000 },
 103         { 0x4e, 0x0000 },
 104         { 0x4f, 0x01ff },
 105         { 0x50, 0x0000 },
 106         { 0x51, 0x0000 },
 107         { 0x52, 0x01ff },
 108         { 0x53, 0xf000 },
 109         { 0x56, 0x0111 },
 110         { 0x57, 0x0064 },
 111         { 0x58, 0xef0e },
 112         { 0x59, 0xf0f0 },
 113         { 0x5a, 0xef0e },
 114         { 0x5b, 0xf0f0 },
 115         { 0x5c, 0xef0e },
 116         { 0x5d, 0xf0f0 },
 117         { 0x5e, 0xf000 },
 118         { 0x5f, 0x0000 },
 119         { 0x61, 0x0300 },
 120         { 0x62, 0x0000 },
 121         { 0x63, 0x00c2 },
 122         { 0x64, 0x0000 },
 123         { 0x65, 0x0000 },
 124         { 0x66, 0x0000 },
 125         { 0x6a, 0x0000 },
 126         { 0x6c, 0x0aaa },
 127         { 0x70, 0x8000 },
 128         { 0x71, 0x8000 },
 129         { 0x72, 0x8000 },
 130         { 0x73, 0x7770 },
 131         { 0x74, 0x3e00 },
 132         { 0x75, 0x2409 },
 133         { 0x76, 0x000a },
 134         { 0x77, 0x0c00 },
 135         { 0x78, 0x0000 },
 136         { 0x80, 0x0000 },
 137         { 0x81, 0x0000 },
 138         { 0x82, 0x0000 },
 139         { 0x83, 0x0000 },
 140         { 0x84, 0x0000 },
 141         { 0x85, 0x0000 },
 142         { 0x8a, 0x0000 },
 143         { 0x8e, 0x0004 },
 144         { 0x8f, 0x1100 },
 145         { 0x90, 0x0646 },
 146         { 0x91, 0x0c06 },
 147         { 0x93, 0x0000 },
 148         { 0x94, 0x0200 },
 149         { 0x95, 0x0000 },
 150         { 0x9a, 0x2184 },
 151         { 0x9b, 0x010a },
 152         { 0x9c, 0x0aea },
 153         { 0x9d, 0x000c },
 154         { 0x9e, 0x0400 },
 155         { 0xa0, 0xa0a8 },
 156         { 0xa1, 0x0059 },
 157         { 0xa2, 0x0001 },
 158         { 0xae, 0x6000 },
 159         { 0xaf, 0x0000 },
 160         { 0xb0, 0x6000 },
 161         { 0xb1, 0x0000 },
 162         { 0xb2, 0x0000 },
 163         { 0xb3, 0x001f },
 164         { 0xb4, 0x020c },
 165         { 0xb5, 0x1f00 },
 166         { 0xb6, 0x0000 },
 167         { 0xbb, 0x0000 },
 168         { 0xbc, 0x0000 },
 169         { 0xbd, 0x0000 },
 170         { 0xbe, 0x0000 },
 171         { 0xbf, 0x3100 },
 172         { 0xc0, 0x0000 },
 173         { 0xc1, 0x0000 },
 174         { 0xc2, 0x0000 },
 175         { 0xc3, 0x2000 },
 176         { 0xcd, 0x0000 },
 177         { 0xce, 0x0000 },
 178         { 0xcf, 0x1813 },
 179         { 0xd0, 0x0690 },
 180         { 0xd1, 0x1c17 },
 181         { 0xd3, 0xb320 },
 182         { 0xd4, 0x0000 },
 183         { 0xd6, 0x0400 },
 184         { 0xd9, 0x0809 },
 185         { 0xda, 0x0000 },
 186         { 0xdb, 0x0003 },
 187         { 0xdc, 0x0049 },
 188         { 0xdd, 0x001b },
 189         { 0xe6, 0x8000 },
 190         { 0xe7, 0x0200 },
 191         { 0xec, 0xb300 },
 192         { 0xed, 0x0000 },
 193         { 0xf0, 0x001f },
 194         { 0xf1, 0x020c },
 195         { 0xf2, 0x1f00 },
 196         { 0xf3, 0x0000 },
 197         { 0xf4, 0x4000 },
 198         { 0xf8, 0x0000 },
 199         { 0xf9, 0x0000 },
 200         { 0xfa, 0x2060 },
 201         { 0xfb, 0x4040 },
 202         { 0xfc, 0x0000 },
 203         { 0xfd, 0x0002 },
 204         { 0xfe, 0x10ec },
 205         { 0xff, 0x6308 },
 206 };
 207
 208 static int rt5645_reset(struct snd_soc_codec *codec)
 209 {
 210         return snd_soc_write(codec, RT5645_RESET, 0);
 211 }
 212
 213 static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
 214 {
 215         int i;
 216
 217         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 218                 if (reg >= rt5645_ranges[i].range_min &&
 219                         reg <= rt5645_ranges[i].range_max) {
 220                         return true;
 221                 }
 222         }
 223
 224         switch (reg) {
 225         case RT5645_RESET:
 226         case RT5645_PRIV_DATA:
 227         case RT5645_IN1_CTRL1:
 228         case RT5645_IN1_CTRL2:
 229         case RT5645_IN1_CTRL3:
 230         case RT5645_A_JD_CTRL1:
 231         case RT5645_ADC_EQ_CTRL1:
 232         case RT5645_EQ_CTRL1:
 233         case RT5645_ALC_CTRL_1:
 234         case RT5645_IRQ_CTRL2:
 235         case RT5645_IRQ_CTRL3:
 236         case RT5645_INT_IRQ_ST:
 237         case RT5645_IL_CMD:
 238         case RT5645_VENDOR_ID:
 239         case RT5645_VENDOR_ID1:
 240         case RT5645_VENDOR_ID2:
 241                 return 1;
 242         default:
 243                 return 0;
 244         }
 245 }
 246
 247 static bool rt5645_readable_register(struct device *dev, unsigned int reg)
 248 {
 249         int i;
 250
 251         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 252                 if (reg >= rt5645_ranges[i].range_min &&
 253                         reg <= rt5645_ranges[i].range_max) {
 254                         return true;
 255                 }
 256         }
 257
 258         switch (reg) {
 259         case RT5645_RESET:
 260         case RT5645_SPK_VOL:
 261         case RT5645_HP_VOL:
 262         case RT5645_LOUT1:
 263         case RT5645_IN1_CTRL1:
 264         case RT5645_IN1_CTRL2:
 265         case RT5645_IN1_CTRL3:
 266         case RT5645_IN2_CTRL:
 267         case RT5645_INL1_INR1_VOL:
 268         case RT5645_SPK_FUNC_LIM:
 269         case RT5645_ADJ_HPF_CTRL:
 270         case RT5645_DAC1_DIG_VOL:
 271         case RT5645_DAC2_DIG_VOL:
 272         case RT5645_DAC_CTRL:
 273         case RT5645_STO1_ADC_DIG_VOL:
 274         case RT5645_MONO_ADC_DIG_VOL:
 275         case RT5645_ADC_BST_VOL1:
 276         case RT5645_ADC_BST_VOL2:
 277         case RT5645_STO1_ADC_MIXER:
 278         case RT5645_MONO_ADC_MIXER:
 279         case RT5645_AD_DA_MIXER:
 280         case RT5645_STO_DAC_MIXER:
 281         case RT5645_MONO_DAC_MIXER:
 282         case RT5645_DIG_MIXER:
 283         case RT5645_DIG_INF1_DATA:
 284         case RT5645_PDM_OUT_CTRL:
 285         case RT5645_REC_L1_MIXER:
 286         case RT5645_REC_L2_MIXER:
 287         case RT5645_REC_R1_MIXER:
 288         case RT5645_REC_R2_MIXER:
 289         case RT5645_HPMIXL_CTRL:
 290         case RT5645_HPOMIXL_CTRL:
 291         case RT5645_HPMIXR_CTRL:
 292         case RT5645_HPOMIXR_CTRL:
 293         case RT5645_HPO_MIXER:
 294         case RT5645_SPK_L_MIXER:
 295         case RT5645_SPK_R_MIXER:
 296         case RT5645_SPO_MIXER:
 297         case RT5645_SPO_CLSD_RATIO:
 298         case RT5645_OUT_L1_MIXER:
 299         case RT5645_OUT_R1_MIXER:
 300         case RT5645_OUT_L_GAIN1:
 301         case RT5645_OUT_L_GAIN2:
 302         case RT5645_OUT_R_GAIN1:
 303         case RT5645_OUT_R_GAIN2:
 304         case RT5645_LOUT_MIXER:
 305         case RT5645_HAPTIC_CTRL1:
 306         case RT5645_HAPTIC_CTRL2:
 307         case RT5645_HAPTIC_CTRL3:
 308         case RT5645_HAPTIC_CTRL4:
 309         case RT5645_HAPTIC_CTRL5:
 310         case RT5645_HAPTIC_CTRL6:
 311         case RT5645_HAPTIC_CTRL7:
 312         case RT5645_HAPTIC_CTRL8:
 313         case RT5645_HAPTIC_CTRL9:
 314         case RT5645_HAPTIC_CTRL10:
 315         case RT5645_PWR_DIG1:
 316         case RT5645_PWR_DIG2:
 317         case RT5645_PWR_ANLG1:
 318         case RT5645_PWR_ANLG2:
 319         case RT5645_PWR_MIXER:
 320         case RT5645_PWR_VOL:
 321         case RT5645_PRIV_INDEX:
 322         case RT5645_PRIV_DATA:
 323         case RT5645_I2S1_SDP:
 324         case RT5645_I2S2_SDP:
 325         case RT5645_ADDA_CLK1:
 326         case RT5645_ADDA_CLK2:
 327         case RT5645_DMIC_CTRL1:
 328         case RT5645_DMIC_CTRL2:
 329         case RT5645_TDM_CTRL_1:
 330         case RT5645_TDM_CTRL_2:
 331         case RT5645_GLB_CLK:
 332         case RT5645_PLL_CTRL1:
 333         case RT5645_PLL_CTRL2:
 334         case RT5645_ASRC_1:
 335         case RT5645_ASRC_2:
 336         case RT5645_ASRC_3:
 337         case RT5645_ASRC_4:
 338         case RT5645_DEPOP_M1:
 339         case RT5645_DEPOP_M2:
 340         case RT5645_DEPOP_M3:
 341         case RT5645_MICBIAS:
 342         case RT5645_A_JD_CTRL1:
 343         case RT5645_VAD_CTRL4:
 344         case RT5645_CLSD_OUT_CTRL:
 345         case RT5645_ADC_EQ_CTRL1:
 346         case RT5645_ADC_EQ_CTRL2:
 347         case RT5645_EQ_CTRL1:
 348         case RT5645_EQ_CTRL2:
 349         case RT5645_ALC_CTRL_1:
 350         case RT5645_ALC_CTRL_2:
 351         case RT5645_ALC_CTRL_3:
 352         case RT5645_ALC_CTRL_4:
 353         case RT5645_ALC_CTRL_5:
 354         case RT5645_JD_CTRL:
 355         case RT5645_IRQ_CTRL1:
 356         case RT5645_IRQ_CTRL2:
 357         case RT5645_IRQ_CTRL3:
 358         case RT5645_INT_IRQ_ST:
 359         case RT5645_GPIO_CTRL1:
 360         case RT5645_GPIO_CTRL2:
 361         case RT5645_GPIO_CTRL3:
 362         case RT5645_BASS_BACK:
 363         case RT5645_MP3_PLUS1:
 364         case RT5645_MP3_PLUS2:
 365         case RT5645_ADJ_HPF1:
 366         case RT5645_ADJ_HPF2:
 367         case RT5645_HP_CALIB_AMP_DET:
 368         case RT5645_SV_ZCD1:
 369         case RT5645_SV_ZCD2:
 370         case RT5645_IL_CMD:
 371         case RT5645_IL_CMD2:
 372         case RT5645_IL_CMD3:
 373         case RT5645_DRC1_HL_CTRL1:
 374         case RT5645_DRC2_HL_CTRL1:
 375         case RT5645_ADC_MONO_HP_CTRL1:
 376         case RT5645_ADC_MONO_HP_CTRL2:
 377         case RT5645_DRC2_CTRL1:
 378         case RT5645_DRC2_CTRL2:
 379         case RT5645_DRC2_CTRL3:
 380         case RT5645_DRC2_CTRL4:
 381         case RT5645_DRC2_CTRL5:
 382         case RT5645_JD_CTRL3:
 383         case RT5645_JD_CTRL4:
 384         case RT5645_GEN_CTRL1:
 385         case RT5645_GEN_CTRL2:
 386         case RT5645_GEN_CTRL3:
 387         case RT5645_VENDOR_ID:
 388         case RT5645_VENDOR_ID1:
 389         case RT5645_VENDOR_ID2:
 390                 return 1;
 391         default:
 392                 return 0;
 393         }
 394 }
 395
 396 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
 397 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
 398 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
 399 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
 400 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
 401
 402 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
 403 static unsigned int bst_tlv[] = {
 404         TLV_DB_RANGE_HEAD(7),
 405         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
 406         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
 407         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
 408         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
 409         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
 410         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
 411         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
 412 };
 413
 414 static const char * const rt5645_tdm_data_swap_select[] = {
 415         "L/R", "R/L", "L/L", "R/R"
 416 };
 417
 418 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
 419         RT5645_TDM_CTRL_1, 6, rt5645_tdm_data_swap_select);
 420
 421 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
 422         RT5645_TDM_CTRL_1, 4, rt5645_tdm_data_swap_select);
 423
 424 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
 425         RT5645_TDM_CTRL_1, 2, rt5645_tdm_data_swap_select);
 426
 427 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot6_7_enum,
 428         RT5645_TDM_CTRL_1, 0, rt5645_tdm_data_swap_select);
 429
 430 static const char * const rt5645_tdm_adc_data_select[] = {
 431         "1/2/R", "2/1/R", "R/1/2", "R/2/1"
 432 };
 433
 434 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_sel_enum,
 435                                 RT5645_TDM_CTRL_1, 8,
 436                                 rt5645_tdm_adc_data_select);
 437
 438 static const struct snd_kcontrol_new rt5645_snd_controls[] = {
 439         /* Speaker Output Volume */
 440         SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
 441                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 442         SOC_DOUBLE_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
 443                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 444
 445         /* Headphone Output Volume */
 446         SOC_DOUBLE("HP Channel Switch", RT5645_HP_VOL,
 447                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 448         SOC_DOUBLE_TLV("HP Playback Volume", RT5645_HP_VOL,
 449                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 450
 451         /* OUTPUT Control */
 452         SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
 453                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 454         SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
 455                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 456         SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
 457                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 458
 459         /* DAC Digital Volume */
 460         SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
 461                 RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
 462         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
 463                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
 464         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
 465                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
 466
 467         /* IN1/IN2 Control */
 468         SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
 469                 RT5645_BST_SFT1, 8, 0, bst_tlv),
 470         SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
 471                 RT5645_BST_SFT2, 8, 0, bst_tlv),
 472
 473         /* INL/INR Volume Control */
 474         SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
 475                 RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
 476
 477         /* ADC Digital Volume Control */
 478         SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
 479                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 480         SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
 481                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
 482         SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
 483                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 484         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
 485                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
 486
 487         /* ADC Boost Volume Control */
 488         SOC_DOUBLE_TLV("STO1 ADC Boost Gain", RT5645_ADC_BST_VOL1,
 489                 RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
 490                 adc_bst_tlv),
 491         SOC_DOUBLE_TLV("STO2 ADC Boost Gain", RT5645_ADC_BST_VOL1,
 492                 RT5645_STO2_ADC_L_BST_SFT, RT5645_STO2_ADC_R_BST_SFT, 3, 0,
 493                 adc_bst_tlv),
 494
 495         /* I2S2 function select */
 496         SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
 497                 1, 1),
 498
 499         /* TDM */
 500         SOC_ENUM("TDM Adc Slot0 1 Data", rt5645_tdm_adc_slot0_1_enum),
 501         SOC_ENUM("TDM Adc Slot2 3 Data", rt5645_tdm_adc_slot2_3_enum),
 502         SOC_ENUM("TDM Adc Slot4 5 Data", rt5645_tdm_adc_slot4_5_enum),
 503         SOC_ENUM("TDM Adc Slot6 7 Data", rt5645_tdm_adc_slot6_7_enum),
 504         SOC_ENUM("TDM IF1 ADC DATA Sel", rt5645_tdm_adc_sel_enum),
 505         SOC_SINGLE("TDM IF1_DAC1_L Sel", RT5645_TDM_CTRL_3, 12, 7, 0),
 506         SOC_SINGLE("TDM IF1_DAC1_R Sel", RT5645_TDM_CTRL_3, 8, 7, 0),
 507         SOC_SINGLE("TDM IF1_DAC2_L Sel", RT5645_TDM_CTRL_3, 4, 7, 0),
 508         SOC_SINGLE("TDM IF1_DAC2_R Sel", RT5645_TDM_CTRL_3, 0, 7, 0),
 509 };
 510
 511 /**
 512  * set_dmic_clk - Set parameter of dmic.
 513  *
 514  * @w: DAPM widget.
 515  * @kcontrol: The kcontrol of this widget.
 516  * @event: Event id.
 517  *
 518  * Choose dmic clock between 1MHz and 3MHz.
 519  * It is better for clock to approximate 3MHz.
 520  */
 521 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
 522         struct snd_kcontrol *kcontrol, int event)
 523 {
 524         struct snd_soc_codec *codec = w->codec;
 525         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
 526         int div[] = {2, 3, 4, 6, 8, 12};
 527         int idx = -EINVAL, i;
 528         int rate, red, bound, temp;
 529
 530         rate = rt5645->sysclk;
 531         red = 3000000 * 12;
 532         for (i = 0; i < ARRAY_SIZE(div); i++) {
 533                 bound = div[i] * 3000000;
 534                 if (rate > bound)
 535                         continue;
 536                 temp = bound - rate;
 537                 if (temp < red) {
 538                         red = temp;
 539                         idx = i;
 540                 }
 541         }
 542
 543         if (idx < 0)
 544                 dev_err(codec->dev, "Failed to set DMIC clock\n");
 545         else
 546                 snd_soc_update_bits(codec, RT5645_DMIC_CTRL1,
 547                         RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
 548         return idx;
 549 }
 550
 551 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
 552                          struct snd_soc_dapm_widget *sink)
 553 {
 554         unsigned int val;
 555
 556         val = snd_soc_read(source->codec, RT5645_GLB_CLK);
 557         val &= RT5645_SCLK_SRC_MASK;
 558         if (val == RT5645_SCLK_SRC_PLL1)
 559                 return 1;
 560         else
 561                 return 0;
 562 }
 563
 564 /* Digital Mixer */
 565 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
 566         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
 567                         RT5645_M_ADC_L1_SFT, 1, 1),
 568         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
 569                         RT5645_M_ADC_L2_SFT, 1, 1),
 570 };
 571
 572 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
 573         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
 574                         RT5645_M_ADC_R1_SFT, 1, 1),
 575         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
 576                         RT5645_M_ADC_R2_SFT, 1, 1),
 577 };
 578
 579 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
 580         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
 581                         RT5645_M_MONO_ADC_L1_SFT, 1, 1),
 582         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
 583                         RT5645_M_MONO_ADC_L2_SFT, 1, 1),
 584 };
 585
 586 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
 587         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
 588                         RT5645_M_MONO_ADC_R1_SFT, 1, 1),
 589         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
 590                         RT5645_M_MONO_ADC_R2_SFT, 1, 1),
 591 };
 592
 593 static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
 594         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
 595                         RT5645_M_ADCMIX_L_SFT, 1, 1),
 596         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
 597                         RT5645_M_DAC1_L_SFT, 1, 1),
 598 };
 599
 600 static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
 601         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
 602                         RT5645_M_ADCMIX_R_SFT, 1, 1),
 603         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
 604                         RT5645_M_DAC1_R_SFT, 1, 1),
 605 };
 606
 607 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
 608         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
 609                         RT5645_M_DAC_L1_SFT, 1, 1),
 610         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
 611                         RT5645_M_DAC_L2_SFT, 1, 1),
 612         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
 613                         RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
 614 };
 615
 616 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
 617         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
 618                         RT5645_M_DAC_R1_SFT, 1, 1),
 619         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
 620                         RT5645_M_DAC_R2_SFT, 1, 1),
 621         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
 622                         RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
 623 };
 624
 625 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
 626         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
 627                         RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
 628         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
 629                         RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
 630         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
 631                         RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
 632 };
 633
 634 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
 635         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
 636                         RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
 637         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
 638                         RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
 639         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
 640                         RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
 641 };
 642
 643 static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
 644         SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
 645                         RT5645_M_STO_L_DAC_L_SFT, 1, 1),
 646         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
 647                         RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
 648         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
 649                         RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
 650 };
 651
 652 static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
 653         SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
 654                         RT5645_M_STO_R_DAC_R_SFT, 1, 1),
 655         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
 656                         RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
 657         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
 658                         RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
 659 };
 660
 661 /* Analog Input Mixer */
 662 static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
 663         SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
 664                         RT5645_M_HP_L_RM_L_SFT, 1, 1),
 665         SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
 666                         RT5645_M_IN_L_RM_L_SFT, 1, 1),
 667         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
 668                         RT5645_M_BST2_RM_L_SFT, 1, 1),
 669         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
 670                         RT5645_M_BST1_RM_L_SFT, 1, 1),
 671         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
 672                         RT5645_M_OM_L_RM_L_SFT, 1, 1),
 673 };
 674
 675 static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
 676         SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
 677                         RT5645_M_HP_R_RM_R_SFT, 1, 1),
 678         SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
 679                         RT5645_M_IN_R_RM_R_SFT, 1, 1),
 680         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
 681                         RT5645_M_BST2_RM_R_SFT, 1, 1),
 682         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
 683                         RT5645_M_BST1_RM_R_SFT, 1, 1),
 684         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
 685                         RT5645_M_OM_R_RM_R_SFT, 1, 1),
 686 };
 687
 688 static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
 689         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
 690                         RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
 691         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
 692                         RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
 693         SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
 694                         RT5645_M_IN_L_SM_L_SFT, 1, 1),
 695         SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
 696                         RT5645_M_BST1_L_SM_L_SFT, 1, 1),
 697 };
 698
 699 static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
 700         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
 701                         RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
 702         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
 703                         RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
 704         SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
 705                         RT5645_M_IN_R_SM_R_SFT, 1, 1),
 706         SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
 707                         RT5645_M_BST2_R_SM_R_SFT, 1, 1),
 708 };
 709
 710 static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
 711         SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
 712                         RT5645_M_BST1_OM_L_SFT, 1, 1),
 713         SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
 714                         RT5645_M_IN_L_OM_L_SFT, 1, 1),
 715         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
 716                         RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
 717         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
 718                         RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
 719 };
 720
 721 static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
 722         SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
 723                         RT5645_M_BST2_OM_R_SFT, 1, 1),
 724         SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
 725                         RT5645_M_IN_R_OM_R_SFT, 1, 1),
 726         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
 727                         RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
 728         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
 729                         RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
 730 };
 731
 732 static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
 733         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
 734                         RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
 735         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
 736                         RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
 737         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
 738                         RT5645_M_SV_R_SPM_L_SFT, 1, 1),
 739         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
 740                         RT5645_M_SV_L_SPM_L_SFT, 1, 1),
 741 };
 742
 743 static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
 744         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
 745                         RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
 746         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
 747                         RT5645_M_SV_R_SPM_R_SFT, 1, 1),
 748 };
 749
 750 static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
 751         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
 752                         RT5645_M_DAC1_HM_SFT, 1, 1),
 753         SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
 754                         RT5645_M_HPVOL_HM_SFT, 1, 1),
 755 };
 756
 757 static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
 758         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
 759                         RT5645_M_DAC1_HV_SFT, 1, 1),
 760         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
 761                         RT5645_M_DAC2_HV_SFT, 1, 1),
 762         SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
 763                         RT5645_M_IN_HV_SFT, 1, 1),
 764         SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
 765                         RT5645_M_BST1_HV_SFT, 1, 1),
 766 };
 767
 768 static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
 769         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
 770                         RT5645_M_DAC1_HV_SFT, 1, 1),
 771         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
 772                         RT5645_M_DAC2_HV_SFT, 1, 1),
 773         SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
 774                         RT5645_M_IN_HV_SFT, 1, 1),
 775         SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
 776                         RT5645_M_BST2_HV_SFT, 1, 1),
 777 };
 778
 779 static const struct snd_kcontrol_new rt5645_lout_mix[] = {
 780         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
 781                         RT5645_M_DAC_L1_LM_SFT, 1, 1),
 782         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
 783                         RT5645_M_DAC_R1_LM_SFT, 1, 1),
 784         SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
 785                         RT5645_M_OV_L_LM_SFT, 1, 1),
 786         SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
 787                         RT5645_M_OV_R_LM_SFT, 1, 1),
 788 };
 789
 790 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
 791 static const char * const rt5645_dac1_src[] = {
 792         "IF1 DAC", "IF2 DAC", "IF3 DAC"
 793 };
 794
 795 static SOC_ENUM_SINGLE_DECL(
 796         rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
 797         RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
 798
 799 static const struct snd_kcontrol_new rt5645_dac1l_mux =
 800         SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
 801
 802 static SOC_ENUM_SINGLE_DECL(
 803         rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
 804         RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
 805
 806 static const struct snd_kcontrol_new rt5645_dac1r_mux =
 807         SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
 808
 809 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
 810 static const char * const rt5645_dac12_src[] = {
 811         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
 812 };
 813
 814 static SOC_ENUM_SINGLE_DECL(
 815         rt5645_dac2l_enum, RT5645_DAC_CTRL,
 816         RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
 817
 818 static const struct snd_kcontrol_new rt5645_dac_l2_mux =
 819         SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
 820
 821 static const char * const rt5645_dacr2_src[] = {
 822         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
 823 };
 824
 825 static SOC_ENUM_SINGLE_DECL(
 826         rt5645_dac2r_enum, RT5645_DAC_CTRL,
 827         RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
 828
 829 static const struct snd_kcontrol_new rt5645_dac_r2_mux =
 830         SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
 831
 832
 833 /* INL/R source */
 834 static const char * const rt5645_inl_src[] = {
 835         "IN2P", "MonoP"
 836 };
 837
 838 static SOC_ENUM_SINGLE_DECL(
 839         rt5645_inl_enum, RT5645_INL1_INR1_VOL,
 840         RT5645_INL_SEL_SFT, rt5645_inl_src);
 841
 842 static const struct snd_kcontrol_new rt5645_inl_mux =
 843         SOC_DAPM_ENUM("INL source", rt5645_inl_enum);
 844
 845 static const char * const rt5645_inr_src[] = {
 846         "IN2N", "MonoN"
 847 };
 848
 849 static SOC_ENUM_SINGLE_DECL(
 850         rt5645_inr_enum, RT5645_INL1_INR1_VOL,
 851         RT5645_INR_SEL_SFT, rt5645_inr_src);
 852
 853 static const struct snd_kcontrol_new rt5645_inr_mux =
 854         SOC_DAPM_ENUM("INR source", rt5645_inr_enum);
 855
 856 /* Stereo1 ADC source */
 857 /* MX-27 [12] */
 858 static const char * const rt5645_stereo_adc1_src[] = {
 859         "DAC MIX", "ADC"
 860 };
 861
 862 static SOC_ENUM_SINGLE_DECL(
 863         rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
 864         RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
 865
 866 static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
 867         SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
 868
 869 /* MX-27 [11] */
 870 static const char * const rt5645_stereo_adc2_src[] = {
 871         "DAC MIX", "DMIC"
 872 };
 873
 874 static SOC_ENUM_SINGLE_DECL(
 875         rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
 876         RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
 877
 878 static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
 879         SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
 880
 881 /* MX-27 [8] */
 882 static const char * const rt5645_stereo_dmic_src[] = {
 883         "DMIC1", "DMIC2"
 884 };
 885
 886 static SOC_ENUM_SINGLE_DECL(
 887         rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
 888         RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
 889
 890 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
 891         SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
 892
 893 /* Mono ADC source */
 894 /* MX-28 [12] */
 895 static const char * const rt5645_mono_adc_l1_src[] = {
 896         "Mono DAC MIXL", "ADC"
 897 };
 898
 899 static SOC_ENUM_SINGLE_DECL(
 900         rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
 901         RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
 902
 903 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
 904         SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
 905 /* MX-28 [11] */
 906 static const char * const rt5645_mono_adc_l2_src[] = {
 907         "Mono DAC MIXL", "DMIC"
 908 };
 909
 910 static SOC_ENUM_SINGLE_DECL(
 911         rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
 912         RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
 913
 914 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
 915         SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
 916
 917 /* MX-28 [8] */
 918 static const char * const rt5645_mono_dmic_src[] = {
 919         "DMIC1", "DMIC2"
 920 };
 921
 922 static SOC_ENUM_SINGLE_DECL(
 923         rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
 924         RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
 925
 926 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
 927         SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
 928 /* MX-28 [1:0] */
 929 static SOC_ENUM_SINGLE_DECL(
 930         rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
 931         RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
 932
 933 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
 934         SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
 935 /* MX-28 [4] */
 936 static const char * const rt5645_mono_adc_r1_src[] = {
 937         "Mono DAC MIXR", "ADC"
 938 };
 939
 940 static SOC_ENUM_SINGLE_DECL(
 941         rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
 942         RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
 943
 944 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
 945         SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
 946 /* MX-28 [3] */
 947 static const char * const rt5645_mono_adc_r2_src[] = {
 948         "Mono DAC MIXR", "DMIC"
 949 };
 950
 951 static SOC_ENUM_SINGLE_DECL(
 952         rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
 953         RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
 954
 955 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
 956         SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
 957
 958 /* MX-77 [9:8] */
 959 static const char * const rt5645_if1_adc_in_src[] = {
 960         "IF_ADC1", "IF_ADC2", "VAD_ADC"
 961 };
 962
 963 static SOC_ENUM_SINGLE_DECL(
 964         rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
 965         RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
 966
 967 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
 968         SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
 969
 970 /* MX-2F [13:12] */
 971 static const char * const rt5645_if2_adc_in_src[] = {
 972         "IF_ADC1", "IF_ADC2", "VAD_ADC"
 973 };
 974
 975 static SOC_ENUM_SINGLE_DECL(
 976         rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
 977         RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
 978
 979 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
 980         SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
 981
 982 /* MX-2F [1:0] */
 983 static const char * const rt5645_if3_adc_in_src[] = {
 984         "IF_ADC1", "IF_ADC2", "VAD_ADC"
 985 };
 986
 987 static SOC_ENUM_SINGLE_DECL(
 988         rt5645_if3_adc_in_enum, RT5645_DIG_INF1_DATA,
 989         RT5645_IF3_ADC_IN_SFT, rt5645_if3_adc_in_src);
 990
 991 static const struct snd_kcontrol_new rt5645_if3_adc_in_mux =
 992         SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum);
 993
 994 /* MX-31 [15] [13] [11] [9] */
 995 static const char * const rt5645_pdm_src[] = {
 996         "Mono DAC", "Stereo DAC"
 997 };
 998
 999 static SOC_ENUM_SINGLE_DECL(
1000         rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
1001         RT5645_PDM1_L_SFT, rt5645_pdm_src);
1002
1003 static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
1004         SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
1005
1006 static SOC_ENUM_SINGLE_DECL(
1007         rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
1008         RT5645_PDM1_R_SFT, rt5645_pdm_src);
1009
1010 static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1011         SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1012
1013 /* MX-9D [9:8] */
1014 static const char * const rt5645_vad_adc_src[] = {
1015         "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1016 };
1017
1018 static SOC_ENUM_SINGLE_DECL(
1019         rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1020         RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1021
1022 static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1023         SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1024
1025 static const struct snd_kcontrol_new spk_l_vol_control =
1026         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1027                 RT5645_L_MUTE_SFT, 1, 1);
1028
1029 static const struct snd_kcontrol_new spk_r_vol_control =
1030         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1031                 RT5645_R_MUTE_SFT, 1, 1);
1032
1033 static const struct snd_kcontrol_new hp_l_vol_control =
1034         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1035                 RT5645_L_MUTE_SFT, 1, 1);
1036
1037 static const struct snd_kcontrol_new hp_r_vol_control =
1038         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1039                 RT5645_R_MUTE_SFT, 1, 1);
1040
1041 static const struct snd_kcontrol_new pdm1_l_vol_control =
1042         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1043                 RT5645_M_PDM1_L, 1, 1);
1044
1045 static const struct snd_kcontrol_new pdm1_r_vol_control =
1046         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1047                 RT5645_M_PDM1_R, 1, 1);
1048
1049 static void hp_amp_power(struct snd_soc_codec *codec, int on)
1050 {
1051         static int hp_amp_power_count;
1052         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1053
1054         if (on) {
1055                 if (hp_amp_power_count <= 0) {
1056                         /* depop parameters */
1057                         snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1058                                 RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1059                         snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d);
1060                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1061                                 RT5645_HP_DCC_INT1, 0x9f01);
1062                         mdelay(150);
1063                         /* headphone amp power on */
1064                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1065                                 RT5645_PWR_FV1 | RT5645_PWR_FV2 , 0);
1066                         snd_soc_update_bits(codec, RT5645_PWR_VOL,
1067                                 RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1068                                 RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1069                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1070                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1071                                 RT5645_PWR_HA,
1072                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1073                                 RT5645_PWR_HA);
1074                         mdelay(5);
1075                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1076                                 RT5645_PWR_FV1 | RT5645_PWR_FV2,
1077                                 RT5645_PWR_FV1 | RT5645_PWR_FV2);
1078
1079                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1080                                 RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1081                                 RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1082                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1083                                 0x14, 0x1aaa);
1084                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1085                                 0x24, 0x0430);
1086                 }
1087                 hp_amp_power_count++;
1088         } else {
1089                 hp_amp_power_count--;
1090                 if (hp_amp_power_count <= 0) {
1091                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1092                                 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1093                                 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1094                                 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1095                         /* headphone amp power down */
1096                         snd_soc_write(codec, RT5645_DEPOP_M1, 0x0000);
1097                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1098                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1099                                 RT5645_PWR_HA, 0);
1100                 }
1101         }
1102 }
1103
1104 static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1105         struct snd_kcontrol *kcontrol, int event)
1106 {
1107         struct snd_soc_codec *codec = w->codec;
1108         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1109
1110         switch (event) {
1111         case SND_SOC_DAPM_POST_PMU:
1112                 hp_amp_power(codec, 1);
1113                 /* headphone unmute sequence */
1114                 snd_soc_update_bits(codec, RT5645_DEPOP_M3, RT5645_CP_FQ1_MASK |
1115                         RT5645_CP_FQ2_MASK | RT5645_CP_FQ3_MASK,
1116                         (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1117                         (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1118                         (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1119                 regmap_write(rt5645->regmap,
1120                         RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1121                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1122                         RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1123                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1124                         RT5645_RSTN_MASK, RT5645_RSTN_EN);
1125                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1126                         RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1127                         RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1128                         RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1129                 msleep(40);
1130                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1131                         RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1132                         RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1133                         RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1134                 break;
1135
1136         case SND_SOC_DAPM_PRE_PMD:
1137                 /* headphone mute sequence */
1138                 snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1139                         RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1140                         RT5645_CP_FQ3_MASK,
1141                         (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1142                         (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1143                         (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1144                 regmap_write(rt5645->regmap,
1145                         RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1146                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1147                         RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1148                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1149                         RT5645_RSTP_MASK, RT5645_RSTP_EN);
1150                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1151                         RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1152                         RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1153                         RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1154                 msleep(30);
1155                 hp_amp_power(codec, 0);
1156                 break;
1157
1158         default:
1159                 return 0;
1160         }
1161
1162         return 0;
1163 }
1164
1165 static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1166         struct snd_kcontrol *kcontrol, int event)
1167 {
1168         struct snd_soc_codec *codec = w->codec;
1169
1170         switch (event) {
1171         case SND_SOC_DAPM_POST_PMU:
1172                 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1173                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1174                         RT5645_PWR_CLS_D_L,
1175                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1176                         RT5645_PWR_CLS_D_L);
1177                 break;
1178
1179         case SND_SOC_DAPM_PRE_PMD:
1180                 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1181                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1182                         RT5645_PWR_CLS_D_L, 0);
1183                 break;
1184
1185         default:
1186                 return 0;
1187         }
1188
1189         return 0;
1190 }
1191
1192 static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1193         struct snd_kcontrol *kcontrol, int event)
1194 {
1195         struct snd_soc_codec *codec = w->codec;
1196
1197         switch (event) {
1198         case SND_SOC_DAPM_POST_PMU:
1199                 hp_amp_power(codec, 1);
1200                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1201                         RT5645_PWR_LM, RT5645_PWR_LM);
1202                 snd_soc_update_bits(codec, RT5645_LOUT1,
1203                         RT5645_L_MUTE | RT5645_R_MUTE, 0);
1204                 break;
1205
1206         case SND_SOC_DAPM_PRE_PMD:
1207                 snd_soc_update_bits(codec, RT5645_LOUT1,
1208                         RT5645_L_MUTE | RT5645_R_MUTE,
1209                         RT5645_L_MUTE | RT5645_R_MUTE);
1210                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1211                         RT5645_PWR_LM, 0);
1212                 hp_amp_power(codec, 0);
1213                 break;
1214
1215         default:
1216                 return 0;
1217         }
1218
1219         return 0;
1220 }
1221
1222 static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1223         struct snd_kcontrol *kcontrol, int event)
1224 {
1225         struct snd_soc_codec *codec = w->codec;
1226
1227         switch (event) {
1228         case SND_SOC_DAPM_POST_PMU:
1229                 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1230                         RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1231                 break;
1232
1233         case SND_SOC_DAPM_PRE_PMD:
1234                 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1235                         RT5645_PWR_BST2_P, 0);
1236                 break;
1237
1238         default:
1239                 return 0;
1240         }
1241
1242         return 0;
1243 }
1244
1245 static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1246         SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1247                 RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1248         SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1249                 RT5645_PWR_PLL_BIT, 0, NULL, 0),
1250
1251         SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1252                 RT5645_PWR_JD1_BIT, 0, NULL, 0),
1253         SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1254                 RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1255
1256         /* Input Side */
1257         /* micbias */
1258         SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2,
1259                         RT5645_PWR_MB1_BIT, 0),
1260         SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2,
1261                         RT5645_PWR_MB2_BIT, 0),
1262         /* Input Lines */
1263         SND_SOC_DAPM_INPUT("DMIC L1"),
1264         SND_SOC_DAPM_INPUT("DMIC R1"),
1265         SND_SOC_DAPM_INPUT("DMIC L2"),
1266         SND_SOC_DAPM_INPUT("DMIC R2"),
1267
1268         SND_SOC_DAPM_INPUT("IN1P"),
1269         SND_SOC_DAPM_INPUT("IN1N"),
1270         SND_SOC_DAPM_INPUT("IN2P"),
1271         SND_SOC_DAPM_INPUT("IN2N"),
1272
1273         SND_SOC_DAPM_INPUT("Haptic Generator"),
1274
1275         SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1276         SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1277         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1278                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1279         SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
1280                 RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
1281         SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
1282                 RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
1283         /* Boost */
1284         SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
1285                 RT5645_PWR_BST1_BIT, 0, NULL, 0),
1286         SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
1287                 RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
1288                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1289         /* Input Volume */
1290         SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
1291                 RT5645_PWR_IN_L_BIT, 0, NULL, 0),
1292         SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
1293                 RT5645_PWR_IN_R_BIT, 0, NULL, 0),
1294         /* REC Mixer */
1295         SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
1296                         0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
1297         SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
1298                         0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
1299         /* ADCs */
1300         SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
1301         SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
1302
1303         SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
1304                 RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
1305         SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
1306                 RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
1307
1308         /* ADC Mux */
1309         SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1310                 &rt5645_sto1_dmic_mux),
1311         SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1312                 &rt5645_sto_adc2_mux),
1313         SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1314                 &rt5645_sto_adc2_mux),
1315         SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1316                 &rt5645_sto_adc1_mux),
1317         SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1318                 &rt5645_sto_adc1_mux),
1319         SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1320                 &rt5645_mono_dmic_l_mux),
1321         SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1322                 &rt5645_mono_dmic_r_mux),
1323         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1324                 &rt5645_mono_adc_l2_mux),
1325         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1326                 &rt5645_mono_adc_l1_mux),
1327         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1328                 &rt5645_mono_adc_r1_mux),
1329         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1330                 &rt5645_mono_adc_r2_mux),
1331         /* ADC Mixer */
1332
1333         SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
1334                 RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
1335         SND_SOC_DAPM_SUPPLY_S("adc stereo2 filter", 1, RT5645_PWR_DIG2,
1336                 RT5645_PWR_ADC_S2F_BIT, 0, NULL, 0),
1337         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
1338                 rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
1339                 NULL, 0),
1340         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
1341                 rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
1342                 NULL, 0),
1343         SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
1344                 RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1345         SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1346                 rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
1347                 NULL, 0),
1348         SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
1349                 RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1350         SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1351                 rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
1352                 NULL, 0),
1353
1354         /* ADC PGA */
1355         SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1356         SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1357         SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1358         SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1359         SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1360         SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1361         SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1362         SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1363         SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1364         SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1365
1366         /* IF1 2 Mux */
1367         SND_SOC_DAPM_MUX("IF1 ADC Mux", SND_SOC_NOPM,
1368                 0, 0, &rt5645_if1_adc_in_mux),
1369         SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
1370                 0, 0, &rt5645_if2_adc_in_mux),
1371
1372         /* Digital Interface */
1373         SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
1374                 RT5645_PWR_I2S1_BIT, 0, NULL, 0),
1375         SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1376         SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1377         SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1378         SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1379         SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1380         SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1381         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1382         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1383         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1384         SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
1385                 RT5645_PWR_I2S2_BIT, 0, NULL, 0),
1386         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1387         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1388         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1389         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1390
1391         /* Digital Interface Select */
1392         SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
1393                 0, 0, &rt5645_vad_adc_mux),
1394
1395         /* Audio Interface */
1396         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1397         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1398         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1399         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1400
1401         /* Output Side */
1402         /* DAC mixer before sound effect  */
1403         SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1404                 rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
1405         SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1406                 rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
1407
1408         /* DAC2 channel Mux */
1409         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
1410         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
1411         SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
1412                 RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
1413         SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
1414                 RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
1415
1416         SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
1417         SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
1418
1419         /* DAC Mixer */
1420         SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
1421                 RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
1422         SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
1423                 RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1424         SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
1425                 RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1426         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1427                 rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
1428         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1429                 rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
1430         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1431                 rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
1432         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1433                 rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
1434         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1435                 rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
1436         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1437                 rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
1438
1439         /* DACs */
1440         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
1441                 0),
1442         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
1443                 0),
1444         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
1445                 0),
1446         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
1447                 0),
1448         /* OUT Mixer */
1449         SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
1450                 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
1451         SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
1452                 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
1453         SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
1454                 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
1455         SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
1456                 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
1457         /* Ouput Volume */
1458         SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
1459                 &spk_l_vol_control),
1460         SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
1461                 &spk_r_vol_control),
1462         SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
1463                 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
1464         SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
1465                 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
1466         SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
1467                 RT5645_PWR_HM_L_BIT, 0, NULL, 0),
1468         SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
1469                 RT5645_PWR_HM_R_BIT, 0, NULL, 0),
1470         SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1471         SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1472         SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1473         SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
1474         SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
1475
1476         /* HPO/LOUT/Mono Mixer */
1477         SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
1478                 ARRAY_SIZE(rt5645_spo_l_mix)),
1479         SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
1480                 ARRAY_SIZE(rt5645_spo_r_mix)),
1481         SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
1482                 ARRAY_SIZE(rt5645_hpo_mix)),
1483         SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
1484                 ARRAY_SIZE(rt5645_lout_mix)),
1485
1486         SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
1487                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1488         SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
1489                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1490         SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
1491                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1492
1493         /* PDM */
1494         SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
1495                 0, NULL, 0),
1496         SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
1497         SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
1498
1499         SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
1500         SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
1501
1502         /* Output Lines */
1503         SND_SOC_DAPM_OUTPUT("HPOL"),
1504         SND_SOC_DAPM_OUTPUT("HPOR"),
1505         SND_SOC_DAPM_OUTPUT("LOUTL"),
1506         SND_SOC_DAPM_OUTPUT("LOUTR"),
1507         SND_SOC_DAPM_OUTPUT("PDM1L"),
1508         SND_SOC_DAPM_OUTPUT("PDM1R"),
1509         SND_SOC_DAPM_OUTPUT("SPOL"),
1510         SND_SOC_DAPM_OUTPUT("SPOR"),
1511 };
1512
1513 static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
1514         { "IN1P", NULL, "LDO2" },
1515         { "IN2P", NULL, "LDO2" },
1516
1517         { "DMIC1", NULL, "DMIC L1" },
1518         { "DMIC1", NULL, "DMIC R1" },
1519         { "DMIC2", NULL, "DMIC L2" },
1520         { "DMIC2", NULL, "DMIC R2" },
1521
1522         { "BST1", NULL, "IN1P" },
1523         { "BST1", NULL, "IN1N" },
1524         { "BST1", NULL, "JD Power" },
1525         { "BST1", NULL, "Mic Det Power" },
1526         { "BST2", NULL, "IN2P" },
1527         { "BST2", NULL, "IN2N" },
1528
1529         { "INL VOL", NULL, "IN2P" },
1530         { "INR VOL", NULL, "IN2N" },
1531
1532         { "RECMIXL", "HPOL Switch", "HPOL" },
1533         { "RECMIXL", "INL Switch", "INL VOL" },
1534         { "RECMIXL", "BST2 Switch", "BST2" },
1535         { "RECMIXL", "BST1 Switch", "BST1" },
1536         { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
1537
1538         { "RECMIXR", "HPOR Switch", "HPOR" },
1539         { "RECMIXR", "INR Switch", "INR VOL" },
1540         { "RECMIXR", "BST2 Switch", "BST2" },
1541         { "RECMIXR", "BST1 Switch", "BST1" },
1542         { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
1543
1544         { "ADC L", NULL, "RECMIXL" },
1545         { "ADC L", NULL, "ADC L power" },
1546         { "ADC R", NULL, "RECMIXR" },
1547         { "ADC R", NULL, "ADC R power" },
1548
1549         {"DMIC L1", NULL, "DMIC CLK"},
1550         {"DMIC L1", NULL, "DMIC1 Power"},
1551         {"DMIC R1", NULL, "DMIC CLK"},
1552         {"DMIC R1", NULL, "DMIC1 Power"},
1553         {"DMIC L2", NULL, "DMIC CLK"},
1554         {"DMIC L2", NULL, "DMIC2 Power"},
1555         {"DMIC R2", NULL, "DMIC CLK"},
1556         {"DMIC R2", NULL, "DMIC2 Power"},
1557
1558         { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
1559         { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
1560
1561         { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
1562         { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
1563
1564         { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
1565         { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
1566
1567         { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1568         { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1569         { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
1570         { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1571
1572         { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
1573         { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1574         { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1575         { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1576
1577         { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
1578         { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1579         { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1580         { "Mono ADC L1 Mux", "ADC", "ADC L" },
1581
1582         { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1583         { "Mono ADC R1 Mux", "ADC", "ADC R" },
1584         { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
1585         { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1586
1587         { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
1588         { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
1589         { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
1590         { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
1591
1592         { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
1593         { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
1594         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1595
1596         { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
1597         { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
1598         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1599
1600         { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
1601         { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
1602         { "Mono ADC MIXL", NULL, "adc mono left filter" },
1603         { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
1604
1605         { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
1606         { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
1607         { "Mono ADC MIXR", NULL, "adc mono right filter" },
1608         { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
1609
1610         { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
1611         { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
1612         { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
1613
1614         { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
1615         { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
1616         { "IF_ADC2", NULL, "Mono ADC MIXL" },
1617         { "IF_ADC2", NULL, "Mono ADC MIXR" },
1618         { "VAD_ADC", NULL, "VAD ADC Mux" },
1619
1620         { "IF1 ADC Mux", "IF_ADC1", "IF_ADC1" },
1621         { "IF1 ADC Mux", "IF_ADC2", "IF_ADC2" },
1622         { "IF1 ADC Mux", "VAD_ADC", "VAD_ADC" },
1623
1624         { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
1625         { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
1626         { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
1627
1628         { "IF1 ADC", NULL, "I2S1" },
1629         { "IF1 ADC", NULL, "IF1 ADC Mux" },
1630         { "IF2 ADC", NULL, "I2S2" },
1631         { "IF2 ADC", NULL, "IF2 ADC Mux" },
1632
1633         { "AIF1TX", NULL, "IF1 ADC" },
1634         { "AIF1TX", NULL, "IF2 ADC" },
1635         { "AIF2TX", NULL, "IF2 ADC" },
1636
1637         { "IF1 DAC1", NULL, "AIF1RX" },
1638         { "IF1 DAC2", NULL, "AIF1RX" },
1639         { "IF2 DAC", NULL, "AIF2RX" },
1640
1641         { "IF1 DAC1", NULL, "I2S1" },
1642         { "IF1 DAC2", NULL, "I2S1" },
1643         { "IF2 DAC", NULL, "I2S2" },
1644
1645         { "IF1 DAC2 L", NULL, "IF1 DAC2" },
1646         { "IF1 DAC2 R", NULL, "IF1 DAC2" },
1647         { "IF1 DAC1 L", NULL, "IF1 DAC1" },
1648         { "IF1 DAC1 R", NULL, "IF1 DAC1" },
1649         { "IF2 DAC L", NULL, "IF2 DAC" },
1650         { "IF2 DAC R", NULL, "IF2 DAC" },
1651
1652         { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
1653         { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
1654
1655         { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
1656         { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
1657
1658         { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
1659         { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
1660         { "DAC1 MIXL", NULL, "dac stereo1 filter" },
1661         { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
1662         { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
1663         { "DAC1 MIXR", NULL, "dac stereo1 filter" },
1664
1665         { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
1666         { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
1667         { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
1668         { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
1669         { "DAC L2 Volume", NULL, "DAC L2 Mux" },
1670         { "DAC L2 Volume", NULL, "dac mono left filter" },
1671
1672         { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
1673         { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
1674         { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
1675         { "DAC R2 Mux", "Haptic", "Haptic Generator" },
1676         { "DAC R2 Volume", NULL, "DAC R2 Mux" },
1677         { "DAC R2 Volume", NULL, "dac mono right filter" },
1678
1679         { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1680         { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
1681         { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1682         { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
1683         { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1684         { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
1685         { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1686         { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
1687
1688         { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1689         { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1690         { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1691         { "Mono DAC MIXL", NULL, "dac mono left filter" },
1692         { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1693         { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1694         { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1695         { "Mono DAC MIXR", NULL, "dac mono right filter" },
1696
1697         { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
1698         { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1699         { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1700         { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
1701         { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1702         { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1703
1704         { "DAC L1", NULL, "Stereo DAC MIXL" },
1705         { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
1706         { "DAC R1", NULL, "Stereo DAC MIXR" },
1707         { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
1708         { "DAC L2", NULL, "Mono DAC MIXL" },
1709         { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
1710         { "DAC R2", NULL, "Mono DAC MIXR" },
1711         { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
1712
1713         { "SPK MIXL", "BST1 Switch", "BST1" },
1714         { "SPK MIXL", "INL Switch", "INL VOL" },
1715         { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
1716         { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
1717         { "SPK MIXR", "BST2 Switch", "BST2" },
1718         { "SPK MIXR", "INR Switch", "INR VOL" },
1719         { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
1720         { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
1721
1722         { "OUT MIXL", "BST1 Switch", "BST1" },
1723         { "OUT MIXL", "INL Switch", "INL VOL" },
1724         { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
1725         { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
1726
1727         { "OUT MIXR", "BST2 Switch", "BST2" },
1728         { "OUT MIXR", "INR Switch", "INR VOL" },
1729         { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
1730         { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
1731
1732         { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
1733         { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
1734         { "HPOVOL MIXL", "INL Switch", "INL VOL" },
1735         { "HPOVOL MIXL", "BST1 Switch", "BST1" },
1736         { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
1737         { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
1738         { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
1739         { "HPOVOL MIXR", "INR Switch", "INR VOL" },
1740         { "HPOVOL MIXR", "BST2 Switch", "BST2" },
1741         { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
1742
1743         { "DAC 2", NULL, "DAC L2" },
1744         { "DAC 2", NULL, "DAC R2" },
1745         { "DAC 1", NULL, "DAC L1" },
1746         { "DAC 1", NULL, "DAC R1" },
1747         { "HPOVOL L", "Switch", "HPOVOL MIXL" },
1748         { "HPOVOL R", "Switch", "HPOVOL MIXR" },
1749         { "HPOVOL", NULL, "HPOVOL L" },
1750         { "HPOVOL", NULL, "HPOVOL R" },
1751         { "HPO MIX", "DAC1 Switch", "DAC 1" },
1752         { "HPO MIX", "HPVOL Switch", "HPOVOL" },
1753
1754         { "SPKVOL L", "Switch", "SPK MIXL" },
1755         { "SPKVOL R", "Switch", "SPK MIXR" },
1756
1757         { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
1758         { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
1759         { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
1760         { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
1761         { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
1762         { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
1763
1764         { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
1765         { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
1766         { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
1767         { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
1768
1769         { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
1770         { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
1771         { "PDM1 L Mux", NULL, "PDM1 Power" },
1772         { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
1773         { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
1774         { "PDM1 R Mux", NULL, "PDM1 Power" },
1775
1776         { "HP amp", NULL, "HPO MIX" },
1777         { "HP amp", NULL, "JD Power" },
1778         { "HP amp", NULL, "Mic Det Power" },
1779         { "HP amp", NULL, "LDO2" },
1780         { "HPOL", NULL, "HP amp" },
1781         { "HPOR", NULL, "HP amp" },
1782
1783         { "LOUT amp", NULL, "LOUT MIX" },
1784         { "LOUTL", NULL, "LOUT amp" },
1785         { "LOUTR", NULL, "LOUT amp" },
1786
1787         { "PDM1 L", "Switch", "PDM1 L Mux" },
1788         { "PDM1 R", "Switch", "PDM1 R Mux" },
1789
1790         { "PDM1L", NULL, "PDM1 L" },
1791         { "PDM1R", NULL, "PDM1 R" },
1792
1793         { "SPK amp", NULL, "SPOL MIX" },
1794         { "SPK amp", NULL, "SPOR MIX" },
1795         { "SPOL", NULL, "SPK amp" },
1796         { "SPOR", NULL, "SPK amp" },
1797 };
1798
1799 static int get_clk_info(int sclk, int rate)
1800 {
1801         int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
1802
1803         if (sclk <= 0 || rate <= 0)
1804                 return -EINVAL;
1805
1806         rate = rate << 8;
1807         for (i = 0; i < ARRAY_SIZE(pd); i++)
1808                 if (sclk == rate * pd[i])
1809                         return i;
1810
1811         return -EINVAL;
1812 }
1813
1814 static int rt5645_hw_params(struct snd_pcm_substream *substream,
1815         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1816 {
1817         struct snd_soc_codec *codec = dai->codec;
1818         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1819         unsigned int val_len = 0, val_clk, mask_clk;
1820         int pre_div, bclk_ms, frame_size;
1821
1822         rt5645->lrck[dai->id] = params_rate(params);
1823         pre_div = get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
1824         if (pre_div < 0) {
1825                 dev_err(codec->dev, "Unsupported clock setting\n");
1826                 return -EINVAL;
1827         }
1828         frame_size = snd_soc_params_to_frame_size(params);
1829         if (frame_size < 0) {
1830                 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1831                 return -EINVAL;
1832         }
1833         bclk_ms = frame_size > 32;
1834         rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
1835
1836         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1837                 rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
1838         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1839                                 bclk_ms, pre_div, dai->id);
1840
1841         switch (params_width(params)) {
1842         case 16:
1843                 break;
1844         case 20:
1845                 val_len |= RT5645_I2S_DL_20;
1846                 break;
1847         case 24:
1848                 val_len |= RT5645_I2S_DL_24;
1849                 break;
1850         case 8:
1851                 val_len |= RT5645_I2S_DL_8;
1852                 break;
1853         default:
1854                 return -EINVAL;
1855         }
1856
1857         switch (dai->id) {
1858         case RT5645_AIF1:
1859                 mask_clk = RT5645_I2S_BCLK_MS1_MASK | RT5645_I2S_PD1_MASK;
1860                 val_clk = bclk_ms << RT5645_I2S_BCLK_MS1_SFT |
1861                         pre_div << RT5645_I2S_PD1_SFT;
1862                 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
1863                         RT5645_I2S_DL_MASK, val_len);
1864                 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
1865                 break;
1866         case  RT5645_AIF2:
1867                 mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
1868                 val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
1869                         pre_div << RT5645_I2S_PD2_SFT;
1870                 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
1871                         RT5645_I2S_DL_MASK, val_len);
1872                 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
1873                 break;
1874         default:
1875                 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
1876                 return -EINVAL;
1877         }
1878
1879         return 0;
1880 }
1881
1882 static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1883 {
1884         struct snd_soc_codec *codec = dai->codec;
1885         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1886         unsigned int reg_val = 0;
1887
1888         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1889         case SND_SOC_DAIFMT_CBM_CFM:
1890                 rt5645->master[dai->id] = 1;
1891                 break;
1892         case SND_SOC_DAIFMT_CBS_CFS:
1893                 reg_val |= RT5645_I2S_MS_S;
1894                 rt5645->master[dai->id] = 0;
1895                 break;
1896         default:
1897                 return -EINVAL;
1898         }
1899
1900         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1901         case SND_SOC_DAIFMT_NB_NF:
1902                 break;
1903         case SND_SOC_DAIFMT_IB_NF:
1904                 reg_val |= RT5645_I2S_BP_INV;
1905                 break;
1906         default:
1907                 return -EINVAL;
1908         }
1909
1910         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1911         case SND_SOC_DAIFMT_I2S:
1912                 break;
1913         case SND_SOC_DAIFMT_LEFT_J:
1914                 reg_val |= RT5645_I2S_DF_LEFT;
1915                 break;
1916         case SND_SOC_DAIFMT_DSP_A:
1917                 reg_val |= RT5645_I2S_DF_PCM_A;
1918                 break;
1919         case SND_SOC_DAIFMT_DSP_B:
1920                 reg_val |= RT5645_I2S_DF_PCM_B;
1921                 break;
1922         default:
1923                 return -EINVAL;
1924         }
1925         switch (dai->id) {
1926         case RT5645_AIF1:
1927                 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
1928                         RT5645_I2S_MS_MASK | RT5645_I2S_BP_MASK |
1929                         RT5645_I2S_DF_MASK, reg_val);
1930                 break;
1931         case  RT5645_AIF2:
1932                 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
1933                         RT5645_I2S_MS_MASK | RT5645_I2S_BP_MASK |
1934                         RT5645_I2S_DF_MASK, reg_val);
1935                 break;
1936         default:
1937                 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
1938                 return -EINVAL;
1939         }
1940         return 0;
1941 }
1942
1943 static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
1944                 int clk_id, unsigned int freq, int dir)
1945 {
1946         struct snd_soc_codec *codec = dai->codec;
1947         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1948         unsigned int reg_val = 0;
1949
1950         if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
1951                 return 0;
1952
1953         switch (clk_id) {
1954         case RT5645_SCLK_S_MCLK:
1955                 reg_val |= RT5645_SCLK_SRC_MCLK;
1956                 break;
1957         case RT5645_SCLK_S_PLL1:
1958                 reg_val |= RT5645_SCLK_SRC_PLL1;
1959                 break;
1960         case RT5645_SCLK_S_RCCLK:
1961                 reg_val |= RT5645_SCLK_SRC_RCCLK;
1962                 break;
1963         default:
1964                 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1965                 return -EINVAL;
1966         }
1967         snd_soc_update_bits(codec, RT5645_GLB_CLK,
1968                 RT5645_SCLK_SRC_MASK, reg_val);
1969         rt5645->sysclk = freq;
1970         rt5645->sysclk_src = clk_id;
1971
1972         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1973
1974         return 0;
1975 }
1976
1977 /**
1978  * rt5645_pll_calc - Calcualte PLL M/N/K code.
1979  * @freq_in: external clock provided to codec.
1980  * @freq_out: target clock which codec works on.
1981  * @pll_code: Pointer to structure with M, N, K and bypass flag.
1982  *
1983  * Calcualte M/N/K code to configure PLL for codec. And K is assigned to 2
1984  * which make calculation more efficiently.
1985  *
1986  * Returns 0 for success or negative error code.
1987  */
1988 static int rt5645_pll_calc(const unsigned int freq_in,
1989         const unsigned int freq_out, struct rt5645_pll_code *pll_code)
1990 {
1991         int max_n = RT5645_PLL_N_MAX, max_m = RT5645_PLL_M_MAX;
1992         int k, n = 0, m = 0, red, n_t, m_t, pll_out, in_t, out_t;
1993         int red_t = abs(freq_out - freq_in);
1994         bool bypass = false;
1995
1996         if (RT5645_PLL_INP_MAX < freq_in || RT5645_PLL_INP_MIN > freq_in)
1997                 return -EINVAL;
1998
1999         k = 100000000 / freq_out - 2;
2000         if (k > RT5645_PLL_K_MAX)
2001                 k = RT5645_PLL_K_MAX;
2002         for (n_t = 0; n_t <= max_n; n_t++) {
2003                 in_t = freq_in / (k + 2);
2004                 pll_out = freq_out / (n_t + 2);
2005                 if (in_t < 0)
2006                         continue;
2007                 if (in_t == pll_out) {
2008                         bypass = true;
2009                         n = n_t;
2010                         goto code_find;
2011                 }
2012                 red = abs(in_t - pll_out);
2013                 if (red < red_t) {
2014                         bypass = true;
2015                         n = n_t;
2016                         m = m_t;
2017                         if (red == 0)
2018                                 goto code_find;
2019                         red_t = red;
2020                 }
2021                 for (m_t = 0; m_t <= max_m; m_t++) {
2022                         out_t = in_t / (m_t + 2);
2023                         red = abs(out_t - pll_out);
2024                         if (red < red_t) {
2025                                 bypass = false;
2026                                 n = n_t;
2027                                 m = m_t;
2028                                 if (red == 0)
2029                                         goto code_find;
2030                                 red_t = red;
2031                         }
2032                 }
2033         }
2034         pr_debug("Only get approximation about PLL\n");
2035
2036 code_find:
2037
2038         pll_code->m_bp = bypass;
2039         pll_code->m_code = m;
2040         pll_code->n_code = n;
2041         pll_code->k_code = k;
2042         return 0;
2043 }
2044
2045 static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2046                         unsigned int freq_in, unsigned int freq_out)
2047 {
2048         struct snd_soc_codec *codec = dai->codec;
2049         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2050         struct rt5645_pll_code pll_code;
2051         int ret;
2052
2053         if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
2054             freq_out == rt5645->pll_out)
2055                 return 0;
2056
2057         if (!freq_in || !freq_out) {
2058                 dev_dbg(codec->dev, "PLL disabled\n");
2059
2060                 rt5645->pll_in = 0;
2061                 rt5645->pll_out = 0;
2062                 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2063                         RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
2064                 return 0;
2065         }
2066
2067         switch (source) {
2068         case RT5645_PLL1_S_MCLK:
2069                 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2070                         RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
2071                 break;
2072         case RT5645_PLL1_S_BCLK1:
2073         case RT5645_PLL1_S_BCLK2:
2074                 switch (dai->id) {
2075                 case RT5645_AIF1:
2076                         snd_soc_update_bits(codec, RT5645_GLB_CLK,
2077                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
2078                         break;
2079                 case  RT5645_AIF2:
2080                         snd_soc_update_bits(codec, RT5645_GLB_CLK,
2081                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
2082                         break;
2083                 default:
2084                         dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2085                         return -EINVAL;
2086                 }
2087                 break;
2088         default:
2089                 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2090                 return -EINVAL;
2091         }
2092
2093         ret = rt5645_pll_calc(freq_in, freq_out, &pll_code);
2094         if (ret < 0) {
2095                 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2096                 return ret;
2097         }
2098
2099         dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2100                 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2101                 pll_code.n_code, pll_code.k_code);
2102
2103         snd_soc_write(codec, RT5645_PLL_CTRL1,
2104                 pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2105         snd_soc_write(codec, RT5645_PLL_CTRL2,
2106                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT |
2107                 pll_code.m_bp << RT5645_PLL_M_BP_SFT);
2108
2109         rt5645->pll_in = freq_in;
2110         rt5645->pll_out = freq_out;
2111         rt5645->pll_src = source;
2112
2113         return 0;
2114 }
2115
2116 static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2117                         unsigned int rx_mask, int slots, int slot_width)
2118 {
2119         struct snd_soc_codec *codec = dai->codec;
2120         unsigned int val = 0;
2121
2122         if (rx_mask || tx_mask)
2123                 val |= (1 << 14);
2124
2125         switch (slots) {
2126         case 4:
2127                 val |= (1 << 12);
2128                 break;
2129         case 6:
2130                 val |= (2 << 12);
2131                 break;
2132         case 8:
2133                 val |= (3 << 12);
2134                 break;
2135         case 2:
2136         default:
2137                 break;
2138         }
2139
2140         switch (slot_width) {
2141         case 20:
2142                 val |= (1 << 10);
2143                 break;
2144         case 24:
2145                 val |= (2 << 10);
2146                 break;
2147         case 32:
2148                 val |= (3 << 10);
2149                 break;
2150         case 16:
2151         default:
2152                 break;
2153         }
2154
2155         snd_soc_update_bits(codec, RT5645_TDM_CTRL_1, 0x7c00, val);
2156
2157         return 0;
2158 }
2159
2160 static int rt5645_set_bias_level(struct snd_soc_codec *codec,
2161                         enum snd_soc_bias_level level)
2162 {
2163         switch (level) {
2164         case SND_SOC_BIAS_STANDBY:
2165                 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
2166                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2167                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2168                                 RT5645_PWR_BG | RT5645_PWR_VREF2,
2169                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2170                                 RT5645_PWR_BG | RT5645_PWR_VREF2);
2171                         mdelay(10);
2172                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2173                                 RT5645_PWR_FV1 | RT5645_PWR_FV2,
2174                                 RT5645_PWR_FV1 | RT5645_PWR_FV2);
2175                         snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2176                                 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
2177                 }
2178                 break;
2179
2180         case SND_SOC_BIAS_OFF:
2181                 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100);
2182                 snd_soc_write(codec, RT5645_GEN_CTRL1, 0x0128);
2183                 snd_soc_write(codec, RT5645_PWR_DIG1, 0x0000);
2184                 snd_soc_write(codec, RT5645_PWR_DIG2, 0x0000);
2185                 snd_soc_write(codec, RT5645_PWR_VOL, 0x0000);
2186                 snd_soc_write(codec, RT5645_PWR_MIXER, 0x0000);
2187                 snd_soc_write(codec, RT5645_PWR_ANLG1, 0x0000);
2188                 snd_soc_write(codec, RT5645_PWR_ANLG2, 0x0000);
2189                 break;
2190
2191         default:
2192                 break;
2193         }
2194         codec->dapm.bias_level = level;
2195
2196         return 0;
2197 }
2198
2199 static int rt5645_probe(struct snd_soc_codec *codec)
2200 {
2201         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2202
2203         rt5645->codec = codec;
2204
2205         rt5645_set_bias_level(codec, SND_SOC_BIAS_OFF);
2206
2207         snd_soc_update_bits(codec, RT5645_CHARGE_PUMP, 0x0300, 0x0200);
2208         snd_soc_write(codec, RT5645_PR_BASE + 0x1c, 0xfd20);
2209         snd_soc_write(codec, RT5645_PR_BASE + 0x20, 0x611f);
2210         snd_soc_write(codec, RT5645_PR_BASE + 0x21, 0x4040);
2211         snd_soc_write(codec, RT5645_PR_BASE + 0x23, 0x0004);
2212
2213         return 0;
2214 }
2215
2216 static int rt5645_remove(struct snd_soc_codec *codec)
2217 {
2218         rt5645_reset(codec);
2219         return 0;
2220 }
2221
2222 #ifdef CONFIG_PM
2223 static int rt5645_suspend(struct snd_soc_codec *codec)
2224 {
2225         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2226
2227         regcache_cache_only(rt5645->regmap, true);
2228         regcache_mark_dirty(rt5645->regmap);
2229
2230         return 0;
2231 }
2232
2233 static int rt5645_resume(struct snd_soc_codec *codec)
2234 {
2235         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2236
2237         regcache_cache_only(rt5645->regmap, false);
2238         snd_soc_cache_sync(codec);
2239
2240         return 0;
2241 }
2242 #else
2243 #define rt5645_suspend NULL
2244 #define rt5645_resume NULL
2245 #endif
2246
2247 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2248 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2249                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2250
2251 static struct snd_soc_dai_ops rt5645_aif_dai_ops = {
2252         .hw_params = rt5645_hw_params,
2253         .set_fmt = rt5645_set_dai_fmt,
2254         .set_sysclk = rt5645_set_dai_sysclk,
2255         .set_tdm_slot = rt5645_set_tdm_slot,
2256         .set_pll = rt5645_set_dai_pll,
2257 };
2258
2259 static struct snd_soc_dai_driver rt5645_dai[] = {
2260         {
2261                 .name = "rt5645-aif1",
2262                 .id = RT5645_AIF1,
2263                 .playback = {
2264                         .stream_name = "AIF1 Playback",
2265                         .channels_min = 1,
2266                         .channels_max = 2,
2267                         .rates = RT5645_STEREO_RATES,
2268                         .formats = RT5645_FORMATS,
2269                 },
2270                 .capture = {
2271                         .stream_name = "AIF1 Capture",
2272                         .channels_min = 1,
2273                         .channels_max = 2,
2274                         .rates = RT5645_STEREO_RATES,
2275                         .formats = RT5645_FORMATS,
2276                 },
2277                 .ops = &rt5645_aif_dai_ops,
2278         },
2279         {
2280                 .name = "rt5645-aif2",
2281                 .id = RT5645_AIF2,
2282                 .playback = {
2283                         .stream_name = "AIF2 Playback",
2284                         .channels_min = 1,
2285                         .channels_max = 2,
2286                         .rates = RT5645_STEREO_RATES,
2287                         .formats = RT5645_FORMATS,
2288                 },
2289                 .capture = {
2290                         .stream_name = "AIF2 Capture",
2291                         .channels_min = 1,
2292                         .channels_max = 2,
2293                         .rates = RT5645_STEREO_RATES,
2294                         .formats = RT5645_FORMATS,
2295                 },
2296                 .ops = &rt5645_aif_dai_ops,
2297         },
2298 };
2299
2300 static struct snd_soc_codec_driver soc_codec_dev_rt5645 = {
2301         .probe = rt5645_probe,
2302         .remove = rt5645_remove,
2303         .suspend = rt5645_suspend,
2304         .resume = rt5645_resume,
2305         .set_bias_level = rt5645_set_bias_level,
2306         .idle_bias_off = true,
2307         .controls = rt5645_snd_controls,
2308         .num_controls = ARRAY_SIZE(rt5645_snd_controls),
2309         .dapm_widgets = rt5645_dapm_widgets,
2310         .num_dapm_widgets = ARRAY_SIZE(rt5645_dapm_widgets),
2311         .dapm_routes = rt5645_dapm_routes,
2312         .num_dapm_routes = ARRAY_SIZE(rt5645_dapm_routes),
2313 };
2314
2315 static const struct regmap_config rt5645_regmap = {
2316         .reg_bits = 8,
2317         .val_bits = 16,
2318
2319         .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
2320                                                RT5645_PR_SPACING),
2321         .volatile_reg = rt5645_volatile_register,
2322         .readable_reg = rt5645_readable_register,
2323
2324         .cache_type = REGCACHE_RBTREE,
2325         .reg_defaults = rt5645_reg,
2326         .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
2327         .ranges = rt5645_ranges,
2328         .num_ranges = ARRAY_SIZE(rt5645_ranges),
2329 };
2330
2331 static const struct i2c_device_id rt5645_i2c_id[] = {
2332         { "rt5645", 0 },
2333         { }
2334 };
2335 MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
2336
2337 static int rt5645_i2c_probe(struct i2c_client *i2c,
2338                     const struct i2c_device_id *id)
2339 {
2340         struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev);
2341         struct rt5645_priv *rt5645;
2342         int ret;
2343         unsigned int val;
2344
2345         rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
2346                                 GFP_KERNEL);
2347         if (rt5645 == NULL)
2348                 return -ENOMEM;
2349
2350         i2c_set_clientdata(i2c, rt5645);
2351
2352         if (pdata)
2353                 rt5645->pdata = *pdata;
2354
2355         rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
2356         if (IS_ERR(rt5645->regmap)) {
2357                 ret = PTR_ERR(rt5645->regmap);
2358                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2359                         ret);
2360                 return ret;
2361         }
2362
2363         regmap_read(rt5645->regmap, RT5645_VENDOR_ID2, &val);
2364         if (val != RT5645_DEVICE_ID) {
2365                 dev_err(&i2c->dev,
2366                         "Device with ID register %x is not rt5645\n", val);
2367                 return -ENODEV;
2368         }
2369
2370         regmap_write(rt5645->regmap, RT5645_RESET, 0);
2371
2372         ret = regmap_register_patch(rt5645->regmap, init_list,
2373                                     ARRAY_SIZE(init_list));
2374         if (ret != 0)
2375                 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2376
2377         if (rt5645->pdata.in2_diff)
2378                 regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
2379                                         RT5645_IN_DF2, RT5645_IN_DF2);
2380
2381         if (rt5645->pdata.dmic_en) {
2382                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2383                         RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
2384
2385                 switch (rt5645->pdata.dmic1_data_pin) {
2386                 case RT5645_DMIC_DATA_IN2N:
2387                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2388                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
2389                         break;
2390
2391                 case RT5645_DMIC_DATA_GPIO5:
2392                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2393                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
2394                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2395                                 RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
2396                         break;
2397
2398                 case RT5645_DMIC_DATA_GPIO11:
2399                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2400                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
2401                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2402                                 RT5645_GP11_PIN_MASK,
2403                                 RT5645_GP11_PIN_DMIC1_SDA);
2404                         break;
2405
2406                 default:
2407                         break;
2408                 }
2409
2410                 switch (rt5645->pdata.dmic2_data_pin) {
2411                 case RT5645_DMIC_DATA_IN2P:
2412                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2413                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
2414                         break;
2415
2416                 case RT5645_DMIC_DATA_GPIO6:
2417                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2418                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
2419                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2420                                 RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
2421                         break;
2422
2423                 case RT5645_DMIC_DATA_GPIO10:
2424                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2425                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
2426                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2427                                 RT5645_GP10_PIN_MASK,
2428                                 RT5645_GP10_PIN_DMIC2_SDA);
2429                         break;
2430
2431                 case RT5645_DMIC_DATA_GPIO12:
2432                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2433                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
2434                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2435                                 RT5645_GP12_PIN_MASK,
2436                                 RT5645_GP12_PIN_DMIC2_SDA);
2437                         break;
2438
2439                 default:
2440                         break;
2441                 }
2442
2443         }
2444
2445         ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5645,
2446                         rt5645_dai, ARRAY_SIZE(rt5645_dai));
2447         if (ret < 0)
2448                 goto err;
2449
2450         return 0;
2451 err:
2452         return ret;
2453 }
2454
2455 static int rt5645_i2c_remove(struct i2c_client *i2c)
2456 {
2457         snd_soc_unregister_codec(&i2c->dev);
2458
2459         return 0;
2460 }
2461
2462 static struct i2c_driver rt5645_i2c_driver = {
2463         .driver = {
2464                 .name = "rt5645",
2465                 .owner = THIS_MODULE,
2466         },
2467         .probe = rt5645_i2c_probe,
2468         .remove   = rt5645_i2c_remove,
2469         .id_table = rt5645_i2c_id,
2470 };
2471 module_i2c_driver(rt5645_i2c_driver);
2472
2473 MODULE_DESCRIPTION("ASoC RT5645 driver");
2474 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
2475 MODULE_LICENSE("GPL v2");