sound/soc/codecs/rt5645.c

   1 /*
   2  * rt5645.c  --  RT5645 ALSA SoC audio codec driver
   3  *
   4  * Copyright 2013 Realtek Semiconductor Corp.
   5  * Author: Bard Liao <bardliao@realtek.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/moduleparam.h>
  14 #include <linux/init.h>
  15 #include <linux/delay.h>
  16 #include <linux/pm.h>
  17 #include <linux/i2c.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/spi/spi.h>
  20 #include <linux/gpio.h>
  21 #include <sound/core.h>
  22 #include <sound/pcm.h>
  23 #include <sound/pcm_params.h>
  24 #include <sound/jack.h>
  25 #include <sound/soc.h>
  26 #include <sound/soc-dapm.h>
  27 #include <sound/initval.h>
  28 #include <sound/tlv.h>
  29
  30 #include "rl6231.h"
  31 #include "rt5645.h"
  32
  33 #define RT5645_DEVICE_ID 0x6308
  34 #define RT5650_DEVICE_ID 0x6419
  35
  36 #define RT5645_PR_RANGE_BASE (0xff + 1)
  37 #define RT5645_PR_SPACING 0x100
  38
  39 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
  40
  41 static const struct regmap_range_cfg rt5645_ranges[] = {
  42         {
  43                 .name = "PR",
  44                 .range_min = RT5645_PR_BASE,
  45                 .range_max = RT5645_PR_BASE + 0xf8,
  46                 .selector_reg = RT5645_PRIV_INDEX,
  47                 .selector_mask = 0xff,
  48                 .selector_shift = 0x0,
  49                 .window_start = RT5645_PRIV_DATA,
  50                 .window_len = 0x1,
  51         },
  52 };
  53
  54 static const struct reg_default init_list[] = {
  55         {RT5645_PR_BASE + 0x3d, 0x3600},
  56         {RT5645_PR_BASE + 0x1c, 0xfd20},
  57         {RT5645_PR_BASE + 0x20, 0x611f},
  58         {RT5645_PR_BASE + 0x21, 0x4040},
  59         {RT5645_PR_BASE + 0x23, 0x0004},
  60 };
  61 #define RT5645_INIT_REG_LEN ARRAY_SIZE(init_list)
  62
  63 static const struct reg_default rt5650_init_list[] = {
  64         {0xf6,  0x0100},
  65 };
  66
  67 static const struct reg_default rt5645_reg[] = {
  68         { 0x00, 0x0000 },
  69         { 0x01, 0xc8c8 },
  70         { 0x02, 0xc8c8 },
  71         { 0x03, 0xc8c8 },
  72         { 0x0a, 0x0002 },
  73         { 0x0b, 0x2827 },
  74         { 0x0c, 0xe000 },
  75         { 0x0d, 0x0000 },
  76         { 0x0e, 0x0000 },
  77         { 0x0f, 0x0808 },
  78         { 0x14, 0x3333 },
  79         { 0x16, 0x4b00 },
  80         { 0x18, 0x018b },
  81         { 0x19, 0xafaf },
  82         { 0x1a, 0xafaf },
  83         { 0x1b, 0x0001 },
  84         { 0x1c, 0x2f2f },
  85         { 0x1d, 0x2f2f },
  86         { 0x1e, 0x0000 },
  87         { 0x20, 0x0000 },
  88         { 0x27, 0x7060 },
  89         { 0x28, 0x7070 },
  90         { 0x29, 0x8080 },
  91         { 0x2a, 0x5656 },
  92         { 0x2b, 0x5454 },
  93         { 0x2c, 0xaaa0 },
  94         { 0x2d, 0x0000 },
  95         { 0x2f, 0x1002 },
  96         { 0x31, 0x5000 },
  97         { 0x32, 0x0000 },
  98         { 0x33, 0x0000 },
  99         { 0x34, 0x0000 },
 100         { 0x35, 0x0000 },
 101         { 0x3b, 0x0000 },
 102         { 0x3c, 0x007f },
 103         { 0x3d, 0x0000 },
 104         { 0x3e, 0x007f },
 105         { 0x3f, 0x0000 },
 106         { 0x40, 0x001f },
 107         { 0x41, 0x0000 },
 108         { 0x42, 0x001f },
 109         { 0x45, 0x6000 },
 110         { 0x46, 0x003e },
 111         { 0x47, 0x003e },
 112         { 0x48, 0xf807 },
 113         { 0x4a, 0x0004 },
 114         { 0x4d, 0x0000 },
 115         { 0x4e, 0x0000 },
 116         { 0x4f, 0x01ff },
 117         { 0x50, 0x0000 },
 118         { 0x51, 0x0000 },
 119         { 0x52, 0x01ff },
 120         { 0x53, 0xf000 },
 121         { 0x56, 0x0111 },
 122         { 0x57, 0x0064 },
 123         { 0x58, 0xef0e },
 124         { 0x59, 0xf0f0 },
 125         { 0x5a, 0xef0e },
 126         { 0x5b, 0xf0f0 },
 127         { 0x5c, 0xef0e },
 128         { 0x5d, 0xf0f0 },
 129         { 0x5e, 0xf000 },
 130         { 0x5f, 0x0000 },
 131         { 0x61, 0x0300 },
 132         { 0x62, 0x0000 },
 133         { 0x63, 0x00c2 },
 134         { 0x64, 0x0000 },
 135         { 0x65, 0x0000 },
 136         { 0x66, 0x0000 },
 137         { 0x6a, 0x0000 },
 138         { 0x6c, 0x0aaa },
 139         { 0x70, 0x8000 },
 140         { 0x71, 0x8000 },
 141         { 0x72, 0x8000 },
 142         { 0x73, 0x7770 },
 143         { 0x74, 0x3e00 },
 144         { 0x75, 0x2409 },
 145         { 0x76, 0x000a },
 146         { 0x77, 0x0c00 },
 147         { 0x78, 0x0000 },
 148         { 0x79, 0x0123 },
 149         { 0x80, 0x0000 },
 150         { 0x81, 0x0000 },
 151         { 0x82, 0x0000 },
 152         { 0x83, 0x0000 },
 153         { 0x84, 0x0000 },
 154         { 0x85, 0x0000 },
 155         { 0x8a, 0x0000 },
 156         { 0x8e, 0x0004 },
 157         { 0x8f, 0x1100 },
 158         { 0x90, 0x0646 },
 159         { 0x91, 0x0c06 },
 160         { 0x93, 0x0000 },
 161         { 0x94, 0x0200 },
 162         { 0x95, 0x0000 },
 163         { 0x9a, 0x2184 },
 164         { 0x9b, 0x010a },
 165         { 0x9c, 0x0aea },
 166         { 0x9d, 0x000c },
 167         { 0x9e, 0x0400 },
 168         { 0xa0, 0xa0a8 },
 169         { 0xa1, 0x0059 },
 170         { 0xa2, 0x0001 },
 171         { 0xae, 0x6000 },
 172         { 0xaf, 0x0000 },
 173         { 0xb0, 0x6000 },
 174         { 0xb1, 0x0000 },
 175         { 0xb2, 0x0000 },
 176         { 0xb3, 0x001f },
 177         { 0xb4, 0x020c },
 178         { 0xb5, 0x1f00 },
 179         { 0xb6, 0x0000 },
 180         { 0xbb, 0x0000 },
 181         { 0xbc, 0x0000 },
 182         { 0xbd, 0x0000 },
 183         { 0xbe, 0x0000 },
 184         { 0xbf, 0x3100 },
 185         { 0xc0, 0x0000 },
 186         { 0xc1, 0x0000 },
 187         { 0xc2, 0x0000 },
 188         { 0xc3, 0x2000 },
 189         { 0xcd, 0x0000 },
 190         { 0xce, 0x0000 },
 191         { 0xcf, 0x1813 },
 192         { 0xd0, 0x0690 },
 193         { 0xd1, 0x1c17 },
 194         { 0xd3, 0xb320 },
 195         { 0xd4, 0x0000 },
 196         { 0xd6, 0x0400 },
 197         { 0xd9, 0x0809 },
 198         { 0xda, 0x0000 },
 199         { 0xdb, 0x0003 },
 200         { 0xdc, 0x0049 },
 201         { 0xdd, 0x001b },
 202         { 0xdf, 0x0008 },
 203         { 0xe0, 0x4000 },
 204         { 0xe6, 0x8000 },
 205         { 0xe7, 0x0200 },
 206         { 0xec, 0xb300 },
 207         { 0xed, 0x0000 },
 208         { 0xf0, 0x001f },
 209         { 0xf1, 0x020c },
 210         { 0xf2, 0x1f00 },
 211         { 0xf3, 0x0000 },
 212         { 0xf4, 0x4000 },
 213         { 0xf8, 0x0000 },
 214         { 0xf9, 0x0000 },
 215         { 0xfa, 0x2060 },
 216         { 0xfb, 0x4040 },
 217         { 0xfc, 0x0000 },
 218         { 0xfd, 0x0002 },
 219         { 0xfe, 0x10ec },
 220         { 0xff, 0x6308 },
 221 };
 222
 223 static int rt5645_reset(struct snd_soc_codec *codec)
 224 {
 225         return snd_soc_write(codec, RT5645_RESET, 0);
 226 }
 227
 228 static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
 229 {
 230         int i;
 231
 232         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 233                 if (reg >= rt5645_ranges[i].range_min &&
 234                         reg <= rt5645_ranges[i].range_max) {
 235                         return true;
 236                 }
 237         }
 238
 239         switch (reg) {
 240         case RT5645_RESET:
 241         case RT5645_PRIV_DATA:
 242         case RT5645_IN1_CTRL1:
 243         case RT5645_IN1_CTRL2:
 244         case RT5645_IN1_CTRL3:
 245         case RT5645_A_JD_CTRL1:
 246         case RT5645_ADC_EQ_CTRL1:
 247         case RT5645_EQ_CTRL1:
 248         case RT5645_ALC_CTRL_1:
 249         case RT5645_IRQ_CTRL2:
 250         case RT5645_IRQ_CTRL3:
 251         case RT5645_INT_IRQ_ST:
 252         case RT5645_IL_CMD:
 253         case RT5650_4BTN_IL_CMD1:
 254         case RT5645_VENDOR_ID:
 255         case RT5645_VENDOR_ID1:
 256         case RT5645_VENDOR_ID2:
 257                 return true;
 258         default:
 259                 return false;
 260         }
 261 }
 262
 263 static bool rt5645_readable_register(struct device *dev, unsigned int reg)
 264 {
 265         int i;
 266
 267         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 268                 if (reg >= rt5645_ranges[i].range_min &&
 269                         reg <= rt5645_ranges[i].range_max) {
 270                         return true;
 271                 }
 272         }
 273
 274         switch (reg) {
 275         case RT5645_RESET:
 276         case RT5645_SPK_VOL:
 277         case RT5645_HP_VOL:
 278         case RT5645_LOUT1:
 279         case RT5645_IN1_CTRL1:
 280         case RT5645_IN1_CTRL2:
 281         case RT5645_IN1_CTRL3:
 282         case RT5645_IN2_CTRL:
 283         case RT5645_INL1_INR1_VOL:
 284         case RT5645_SPK_FUNC_LIM:
 285         case RT5645_ADJ_HPF_CTRL:
 286         case RT5645_DAC1_DIG_VOL:
 287         case RT5645_DAC2_DIG_VOL:
 288         case RT5645_DAC_CTRL:
 289         case RT5645_STO1_ADC_DIG_VOL:
 290         case RT5645_MONO_ADC_DIG_VOL:
 291         case RT5645_ADC_BST_VOL1:
 292         case RT5645_ADC_BST_VOL2:
 293         case RT5645_STO1_ADC_MIXER:
 294         case RT5645_MONO_ADC_MIXER:
 295         case RT5645_AD_DA_MIXER:
 296         case RT5645_STO_DAC_MIXER:
 297         case RT5645_MONO_DAC_MIXER:
 298         case RT5645_DIG_MIXER:
 299         case RT5650_A_DAC_SOUR:
 300         case RT5645_DIG_INF1_DATA:
 301         case RT5645_PDM_OUT_CTRL:
 302         case RT5645_REC_L1_MIXER:
 303         case RT5645_REC_L2_MIXER:
 304         case RT5645_REC_R1_MIXER:
 305         case RT5645_REC_R2_MIXER:
 306         case RT5645_HPMIXL_CTRL:
 307         case RT5645_HPOMIXL_CTRL:
 308         case RT5645_HPMIXR_CTRL:
 309         case RT5645_HPOMIXR_CTRL:
 310         case RT5645_HPO_MIXER:
 311         case RT5645_SPK_L_MIXER:
 312         case RT5645_SPK_R_MIXER:
 313         case RT5645_SPO_MIXER:
 314         case RT5645_SPO_CLSD_RATIO:
 315         case RT5645_OUT_L1_MIXER:
 316         case RT5645_OUT_R1_MIXER:
 317         case RT5645_OUT_L_GAIN1:
 318         case RT5645_OUT_L_GAIN2:
 319         case RT5645_OUT_R_GAIN1:
 320         case RT5645_OUT_R_GAIN2:
 321         case RT5645_LOUT_MIXER:
 322         case RT5645_HAPTIC_CTRL1:
 323         case RT5645_HAPTIC_CTRL2:
 324         case RT5645_HAPTIC_CTRL3:
 325         case RT5645_HAPTIC_CTRL4:
 326         case RT5645_HAPTIC_CTRL5:
 327         case RT5645_HAPTIC_CTRL6:
 328         case RT5645_HAPTIC_CTRL7:
 329         case RT5645_HAPTIC_CTRL8:
 330         case RT5645_HAPTIC_CTRL9:
 331         case RT5645_HAPTIC_CTRL10:
 332         case RT5645_PWR_DIG1:
 333         case RT5645_PWR_DIG2:
 334         case RT5645_PWR_ANLG1:
 335         case RT5645_PWR_ANLG2:
 336         case RT5645_PWR_MIXER:
 337         case RT5645_PWR_VOL:
 338         case RT5645_PRIV_INDEX:
 339         case RT5645_PRIV_DATA:
 340         case RT5645_I2S1_SDP:
 341         case RT5645_I2S2_SDP:
 342         case RT5645_ADDA_CLK1:
 343         case RT5645_ADDA_CLK2:
 344         case RT5645_DMIC_CTRL1:
 345         case RT5645_DMIC_CTRL2:
 346         case RT5645_TDM_CTRL_1:
 347         case RT5645_TDM_CTRL_2:
 348         case RT5645_TDM_CTRL_3:
 349         case RT5645_GLB_CLK:
 350         case RT5645_PLL_CTRL1:
 351         case RT5645_PLL_CTRL2:
 352         case RT5645_ASRC_1:
 353         case RT5645_ASRC_2:
 354         case RT5645_ASRC_3:
 355         case RT5645_ASRC_4:
 356         case RT5645_DEPOP_M1:
 357         case RT5645_DEPOP_M2:
 358         case RT5645_DEPOP_M3:
 359         case RT5645_MICBIAS:
 360         case RT5645_A_JD_CTRL1:
 361         case RT5645_VAD_CTRL4:
 362         case RT5645_CLSD_OUT_CTRL:
 363         case RT5645_ADC_EQ_CTRL1:
 364         case RT5645_ADC_EQ_CTRL2:
 365         case RT5645_EQ_CTRL1:
 366         case RT5645_EQ_CTRL2:
 367         case RT5645_ALC_CTRL_1:
 368         case RT5645_ALC_CTRL_2:
 369         case RT5645_ALC_CTRL_3:
 370         case RT5645_ALC_CTRL_4:
 371         case RT5645_ALC_CTRL_5:
 372         case RT5645_JD_CTRL:
 373         case RT5645_IRQ_CTRL1:
 374         case RT5645_IRQ_CTRL2:
 375         case RT5645_IRQ_CTRL3:
 376         case RT5645_INT_IRQ_ST:
 377         case RT5645_GPIO_CTRL1:
 378         case RT5645_GPIO_CTRL2:
 379         case RT5645_GPIO_CTRL3:
 380         case RT5645_BASS_BACK:
 381         case RT5645_MP3_PLUS1:
 382         case RT5645_MP3_PLUS2:
 383         case RT5645_ADJ_HPF1:
 384         case RT5645_ADJ_HPF2:
 385         case RT5645_HP_CALIB_AMP_DET:
 386         case RT5645_SV_ZCD1:
 387         case RT5645_SV_ZCD2:
 388         case RT5645_IL_CMD:
 389         case RT5645_IL_CMD2:
 390         case RT5645_IL_CMD3:
 391         case RT5650_4BTN_IL_CMD1:
 392         case RT5650_4BTN_IL_CMD2:
 393         case RT5645_DRC1_HL_CTRL1:
 394         case RT5645_DRC2_HL_CTRL1:
 395         case RT5645_ADC_MONO_HP_CTRL1:
 396         case RT5645_ADC_MONO_HP_CTRL2:
 397         case RT5645_DRC2_CTRL1:
 398         case RT5645_DRC2_CTRL2:
 399         case RT5645_DRC2_CTRL3:
 400         case RT5645_DRC2_CTRL4:
 401         case RT5645_DRC2_CTRL5:
 402         case RT5645_JD_CTRL3:
 403         case RT5645_JD_CTRL4:
 404         case RT5645_GEN_CTRL1:
 405         case RT5645_GEN_CTRL2:
 406         case RT5645_GEN_CTRL3:
 407         case RT5645_VENDOR_ID:
 408         case RT5645_VENDOR_ID1:
 409         case RT5645_VENDOR_ID2:
 410                 return true;
 411         default:
 412                 return false;
 413         }
 414 }
 415
 416 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
 417 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
 418 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
 419 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
 420 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
 421
 422 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
 423 static unsigned int bst_tlv[] = {
 424         TLV_DB_RANGE_HEAD(7),
 425         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
 426         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
 427         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
 428         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
 429         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
 430         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
 431         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
 432 };
 433
 434 static const char * const rt5645_tdm_data_swap_select[] = {
 435         "L/R", "R/L", "L/L", "R/R"
 436 };
 437
 438 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
 439         RT5645_TDM_CTRL_1, 6, rt5645_tdm_data_swap_select);
 440
 441 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
 442         RT5645_TDM_CTRL_1, 4, rt5645_tdm_data_swap_select);
 443
 444 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
 445         RT5645_TDM_CTRL_1, 2, rt5645_tdm_data_swap_select);
 446
 447 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot6_7_enum,
 448         RT5645_TDM_CTRL_1, 0, rt5645_tdm_data_swap_select);
 449
 450 static const char * const rt5645_tdm_adc_data_select[] = {
 451         "1/2/R", "2/1/R", "R/1/2", "R/2/1"
 452 };
 453
 454 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_sel_enum,
 455                                 RT5645_TDM_CTRL_1, 8,
 456                                 rt5645_tdm_adc_data_select);
 457
 458 static const struct snd_kcontrol_new rt5645_snd_controls[] = {
 459         /* Speaker Output Volume */
 460         SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
 461                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 462         SOC_DOUBLE_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
 463                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 464
 465         /* Headphone Output Volume */
 466         SOC_DOUBLE("HP Channel Switch", RT5645_HP_VOL,
 467                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 468         SOC_DOUBLE_TLV("HP Playback Volume", RT5645_HP_VOL,
 469                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 470
 471         /* OUTPUT Control */
 472         SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
 473                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 474         SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
 475                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 476         SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
 477                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 478
 479         /* DAC Digital Volume */
 480         SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
 481                 RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
 482         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
 483                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
 484         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
 485                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
 486
 487         /* IN1/IN2 Control */
 488         SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
 489                 RT5645_BST_SFT1, 8, 0, bst_tlv),
 490         SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
 491                 RT5645_BST_SFT2, 8, 0, bst_tlv),
 492
 493         /* INL/INR Volume Control */
 494         SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
 495                 RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
 496
 497         /* ADC Digital Volume Control */
 498         SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
 499                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 500         SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
 501                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
 502         SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
 503                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 504         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
 505                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
 506
 507         /* ADC Boost Volume Control */
 508         SOC_DOUBLE_TLV("STO1 ADC Boost Gain", RT5645_ADC_BST_VOL1,
 509                 RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
 510                 adc_bst_tlv),
 511         SOC_DOUBLE_TLV("STO2 ADC Boost Gain", RT5645_ADC_BST_VOL1,
 512                 RT5645_STO2_ADC_L_BST_SFT, RT5645_STO2_ADC_R_BST_SFT, 3, 0,
 513                 adc_bst_tlv),
 514
 515         /* I2S2 function select */
 516         SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
 517                 1, 1),
 518
 519         /* TDM */
 520         SOC_ENUM("TDM Adc Slot0 1 Data", rt5645_tdm_adc_slot0_1_enum),
 521         SOC_ENUM("TDM Adc Slot2 3 Data", rt5645_tdm_adc_slot2_3_enum),
 522         SOC_ENUM("TDM Adc Slot4 5 Data", rt5645_tdm_adc_slot4_5_enum),
 523         SOC_ENUM("TDM Adc Slot6 7 Data", rt5645_tdm_adc_slot6_7_enum),
 524         SOC_ENUM("TDM IF1 ADC DATA Sel", rt5645_tdm_adc_sel_enum),
 525         SOC_SINGLE("TDM IF1_DAC1_L Sel", RT5645_TDM_CTRL_3, 12, 7, 0),
 526         SOC_SINGLE("TDM IF1_DAC1_R Sel", RT5645_TDM_CTRL_3, 8, 7, 0),
 527         SOC_SINGLE("TDM IF1_DAC2_L Sel", RT5645_TDM_CTRL_3, 4, 7, 0),
 528         SOC_SINGLE("TDM IF1_DAC2_R Sel", RT5645_TDM_CTRL_3, 0, 7, 0),
 529 };
 530
 531 /**
 532  * set_dmic_clk - Set parameter of dmic.
 533  *
 534  * @w: DAPM widget.
 535  * @kcontrol: The kcontrol of this widget.
 536  * @event: Event id.
 537  *
 538  */
 539 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
 540         struct snd_kcontrol *kcontrol, int event)
 541 {
 542         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 543         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
 544         int idx = -EINVAL;
 545
 546         idx = rl6231_calc_dmic_clk(rt5645->sysclk);
 547
 548         if (idx < 0)
 549                 dev_err(codec->dev, "Failed to set DMIC clock\n");
 550         else
 551                 snd_soc_update_bits(codec, RT5645_DMIC_CTRL1,
 552                         RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
 553         return idx;
 554 }
 555
 556 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
 557                          struct snd_soc_dapm_widget *sink)
 558 {
 559         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
 560         unsigned int val;
 561
 562         val = snd_soc_read(codec, RT5645_GLB_CLK);
 563         val &= RT5645_SCLK_SRC_MASK;
 564         if (val == RT5645_SCLK_SRC_PLL1)
 565                 return 1;
 566         else
 567                 return 0;
 568 }
 569
 570 static int is_using_asrc(struct snd_soc_dapm_widget *source,
 571                          struct snd_soc_dapm_widget *sink)
 572 {
 573         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
 574         unsigned int reg, shift, val;
 575
 576         switch (source->shift) {
 577         case 0:
 578                 reg = RT5645_ASRC_3;
 579                 shift = 0;
 580                 break;
 581         case 1:
 582                 reg = RT5645_ASRC_3;
 583                 shift = 4;
 584                 break;
 585         case 3:
 586                 reg = RT5645_ASRC_2;
 587                 shift = 0;
 588                 break;
 589         case 8:
 590                 reg = RT5645_ASRC_2;
 591                 shift = 4;
 592                 break;
 593         case 9:
 594                 reg = RT5645_ASRC_2;
 595                 shift = 8;
 596                 break;
 597         case 10:
 598                 reg = RT5645_ASRC_2;
 599                 shift = 12;
 600                 break;
 601         default:
 602                 return 0;
 603         }
 604
 605         val = (snd_soc_read(codec, reg) >> shift) & 0xf;
 606         switch (val) {
 607         case 1:
 608         case 2:
 609         case 3:
 610         case 4:
 611                 return 1;
 612         default:
 613                 return 0;
 614         }
 615
 616 }
 617
 618 /**
 619  * rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters
 620  * @codec: SoC audio codec device.
 621  * @filter_mask: mask of filters.
 622  * @clk_src: clock source
 623  *
 624  * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can
 625  * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
 626  * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
 627  * ASRC function will track i2s clock and generate a corresponding system clock
 628  * for codec. This function provides an API to select the clock source for a
 629  * set of filters specified by the mask. And the codec driver will turn on ASRC
 630  * for these filters if ASRC is selected as their clock source.
 631  */
 632 int rt5645_sel_asrc_clk_src(struct snd_soc_codec *codec,
 633                 unsigned int filter_mask, unsigned int clk_src)
 634 {
 635         unsigned int asrc2_mask = 0;
 636         unsigned int asrc2_value = 0;
 637         unsigned int asrc3_mask = 0;
 638         unsigned int asrc3_value = 0;
 639
 640         switch (clk_src) {
 641         case RT5645_CLK_SEL_SYS:
 642         case RT5645_CLK_SEL_I2S1_ASRC:
 643         case RT5645_CLK_SEL_I2S2_ASRC:
 644         case RT5645_CLK_SEL_SYS2:
 645                 break;
 646
 647         default:
 648                 return -EINVAL;
 649         }
 650
 651         if (filter_mask & RT5645_DA_STEREO_FILTER) {
 652                 asrc2_mask |= RT5645_DA_STO_CLK_SEL_MASK;
 653                 asrc2_value = (asrc2_value & ~RT5645_DA_STO_CLK_SEL_MASK)
 654                         | (clk_src << RT5645_DA_STO_CLK_SEL_SFT);
 655         }
 656
 657         if (filter_mask & RT5645_DA_MONO_L_FILTER) {
 658                 asrc2_mask |= RT5645_DA_MONOL_CLK_SEL_MASK;
 659                 asrc2_value = (asrc2_value & ~RT5645_DA_MONOL_CLK_SEL_MASK)
 660                         | (clk_src << RT5645_DA_MONOL_CLK_SEL_SFT);
 661         }
 662
 663         if (filter_mask & RT5645_DA_MONO_R_FILTER) {
 664                 asrc2_mask |= RT5645_DA_MONOR_CLK_SEL_MASK;
 665                 asrc2_value = (asrc2_value & ~RT5645_DA_MONOR_CLK_SEL_MASK)
 666                         | (clk_src << RT5645_DA_MONOR_CLK_SEL_SFT);
 667         }
 668
 669         if (filter_mask & RT5645_AD_STEREO_FILTER) {
 670                 asrc2_mask |= RT5645_AD_STO1_CLK_SEL_MASK;
 671                 asrc2_value = (asrc2_value & ~RT5645_AD_STO1_CLK_SEL_MASK)
 672                         | (clk_src << RT5645_AD_STO1_CLK_SEL_SFT);
 673         }
 674
 675         if (filter_mask & RT5645_AD_MONO_L_FILTER) {
 676                 asrc3_mask |= RT5645_AD_MONOL_CLK_SEL_MASK;
 677                 asrc3_value = (asrc3_value & ~RT5645_AD_MONOL_CLK_SEL_MASK)
 678                         | (clk_src << RT5645_AD_MONOL_CLK_SEL_SFT);
 679         }
 680
 681         if (filter_mask & RT5645_AD_MONO_R_FILTER)  {
 682                 asrc3_mask |= RT5645_AD_MONOR_CLK_SEL_MASK;
 683                 asrc3_value = (asrc3_value & ~RT5645_AD_MONOR_CLK_SEL_MASK)
 684                         | (clk_src << RT5645_AD_MONOR_CLK_SEL_SFT);
 685         }
 686
 687         if (asrc2_mask)
 688                 snd_soc_update_bits(codec, RT5645_ASRC_2,
 689                         asrc2_mask, asrc2_value);
 690
 691         if (asrc3_mask)
 692                 snd_soc_update_bits(codec, RT5645_ASRC_3,
 693                         asrc3_mask, asrc3_value);
 694
 695         return 0;
 696 }
 697 EXPORT_SYMBOL_GPL(rt5645_sel_asrc_clk_src);
 698
 699 /* Digital Mixer */
 700 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
 701         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
 702                         RT5645_M_ADC_L1_SFT, 1, 1),
 703         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
 704                         RT5645_M_ADC_L2_SFT, 1, 1),
 705 };
 706
 707 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
 708         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
 709                         RT5645_M_ADC_R1_SFT, 1, 1),
 710         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
 711                         RT5645_M_ADC_R2_SFT, 1, 1),
 712 };
 713
 714 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
 715         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
 716                         RT5645_M_MONO_ADC_L1_SFT, 1, 1),
 717         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
 718                         RT5645_M_MONO_ADC_L2_SFT, 1, 1),
 719 };
 720
 721 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
 722         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
 723                         RT5645_M_MONO_ADC_R1_SFT, 1, 1),
 724         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
 725                         RT5645_M_MONO_ADC_R2_SFT, 1, 1),
 726 };
 727
 728 static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
 729         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
 730                         RT5645_M_ADCMIX_L_SFT, 1, 1),
 731         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
 732                         RT5645_M_DAC1_L_SFT, 1, 1),
 733 };
 734
 735 static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
 736         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
 737                         RT5645_M_ADCMIX_R_SFT, 1, 1),
 738         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
 739                         RT5645_M_DAC1_R_SFT, 1, 1),
 740 };
 741
 742 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
 743         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
 744                         RT5645_M_DAC_L1_SFT, 1, 1),
 745         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
 746                         RT5645_M_DAC_L2_SFT, 1, 1),
 747         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
 748                         RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
 749 };
 750
 751 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
 752         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
 753                         RT5645_M_DAC_R1_SFT, 1, 1),
 754         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
 755                         RT5645_M_DAC_R2_SFT, 1, 1),
 756         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
 757                         RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
 758 };
 759
 760 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
 761         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
 762                         RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
 763         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
 764                         RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
 765         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
 766                         RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
 767 };
 768
 769 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
 770         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
 771                         RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
 772         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
 773                         RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
 774         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
 775                         RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
 776 };
 777
 778 static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
 779         SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
 780                         RT5645_M_STO_L_DAC_L_SFT, 1, 1),
 781         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
 782                         RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
 783         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
 784                         RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
 785 };
 786
 787 static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
 788         SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
 789                         RT5645_M_STO_R_DAC_R_SFT, 1, 1),
 790         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
 791                         RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
 792         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
 793                         RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
 794 };
 795
 796 /* Analog Input Mixer */
 797 static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
 798         SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
 799                         RT5645_M_HP_L_RM_L_SFT, 1, 1),
 800         SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
 801                         RT5645_M_IN_L_RM_L_SFT, 1, 1),
 802         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
 803                         RT5645_M_BST2_RM_L_SFT, 1, 1),
 804         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
 805                         RT5645_M_BST1_RM_L_SFT, 1, 1),
 806         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
 807                         RT5645_M_OM_L_RM_L_SFT, 1, 1),
 808 };
 809
 810 static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
 811         SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
 812                         RT5645_M_HP_R_RM_R_SFT, 1, 1),
 813         SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
 814                         RT5645_M_IN_R_RM_R_SFT, 1, 1),
 815         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
 816                         RT5645_M_BST2_RM_R_SFT, 1, 1),
 817         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
 818                         RT5645_M_BST1_RM_R_SFT, 1, 1),
 819         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
 820                         RT5645_M_OM_R_RM_R_SFT, 1, 1),
 821 };
 822
 823 static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
 824         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
 825                         RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
 826         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
 827                         RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
 828         SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
 829                         RT5645_M_IN_L_SM_L_SFT, 1, 1),
 830         SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
 831                         RT5645_M_BST1_L_SM_L_SFT, 1, 1),
 832 };
 833
 834 static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
 835         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
 836                         RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
 837         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
 838                         RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
 839         SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
 840                         RT5645_M_IN_R_SM_R_SFT, 1, 1),
 841         SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
 842                         RT5645_M_BST2_R_SM_R_SFT, 1, 1),
 843 };
 844
 845 static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
 846         SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
 847                         RT5645_M_BST1_OM_L_SFT, 1, 1),
 848         SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
 849                         RT5645_M_IN_L_OM_L_SFT, 1, 1),
 850         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
 851                         RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
 852         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
 853                         RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
 854 };
 855
 856 static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
 857         SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
 858                         RT5645_M_BST2_OM_R_SFT, 1, 1),
 859         SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
 860                         RT5645_M_IN_R_OM_R_SFT, 1, 1),
 861         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
 862                         RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
 863         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
 864                         RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
 865 };
 866
 867 static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
 868         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
 869                         RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
 870         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
 871                         RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
 872         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
 873                         RT5645_M_SV_R_SPM_L_SFT, 1, 1),
 874         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
 875                         RT5645_M_SV_L_SPM_L_SFT, 1, 1),
 876 };
 877
 878 static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
 879         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
 880                         RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
 881         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
 882                         RT5645_M_SV_R_SPM_R_SFT, 1, 1),
 883 };
 884
 885 static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
 886         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
 887                         RT5645_M_DAC1_HM_SFT, 1, 1),
 888         SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
 889                         RT5645_M_HPVOL_HM_SFT, 1, 1),
 890 };
 891
 892 static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
 893         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
 894                         RT5645_M_DAC1_HV_SFT, 1, 1),
 895         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
 896                         RT5645_M_DAC2_HV_SFT, 1, 1),
 897         SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
 898                         RT5645_M_IN_HV_SFT, 1, 1),
 899         SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
 900                         RT5645_M_BST1_HV_SFT, 1, 1),
 901 };
 902
 903 static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
 904         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
 905                         RT5645_M_DAC1_HV_SFT, 1, 1),
 906         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
 907                         RT5645_M_DAC2_HV_SFT, 1, 1),
 908         SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
 909                         RT5645_M_IN_HV_SFT, 1, 1),
 910         SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
 911                         RT5645_M_BST2_HV_SFT, 1, 1),
 912 };
 913
 914 static const struct snd_kcontrol_new rt5645_lout_mix[] = {
 915         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
 916                         RT5645_M_DAC_L1_LM_SFT, 1, 1),
 917         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
 918                         RT5645_M_DAC_R1_LM_SFT, 1, 1),
 919         SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
 920                         RT5645_M_OV_L_LM_SFT, 1, 1),
 921         SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
 922                         RT5645_M_OV_R_LM_SFT, 1, 1),
 923 };
 924
 925 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
 926 static const char * const rt5645_dac1_src[] = {
 927         "IF1 DAC", "IF2 DAC", "IF3 DAC"
 928 };
 929
 930 static SOC_ENUM_SINGLE_DECL(
 931         rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
 932         RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
 933
 934 static const struct snd_kcontrol_new rt5645_dac1l_mux =
 935         SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
 936
 937 static SOC_ENUM_SINGLE_DECL(
 938         rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
 939         RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
 940
 941 static const struct snd_kcontrol_new rt5645_dac1r_mux =
 942         SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
 943
 944 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
 945 static const char * const rt5645_dac12_src[] = {
 946         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
 947 };
 948
 949 static SOC_ENUM_SINGLE_DECL(
 950         rt5645_dac2l_enum, RT5645_DAC_CTRL,
 951         RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
 952
 953 static const struct snd_kcontrol_new rt5645_dac_l2_mux =
 954         SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
 955
 956 static const char * const rt5645_dacr2_src[] = {
 957         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
 958 };
 959
 960 static SOC_ENUM_SINGLE_DECL(
 961         rt5645_dac2r_enum, RT5645_DAC_CTRL,
 962         RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
 963
 964 static const struct snd_kcontrol_new rt5645_dac_r2_mux =
 965         SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
 966
 967
 968 /* INL/R source */
 969 static const char * const rt5645_inl_src[] = {
 970         "IN2P", "MonoP"
 971 };
 972
 973 static SOC_ENUM_SINGLE_DECL(
 974         rt5645_inl_enum, RT5645_INL1_INR1_VOL,
 975         RT5645_INL_SEL_SFT, rt5645_inl_src);
 976
 977 static const struct snd_kcontrol_new rt5645_inl_mux =
 978         SOC_DAPM_ENUM("INL source", rt5645_inl_enum);
 979
 980 static const char * const rt5645_inr_src[] = {
 981         "IN2N", "MonoN"
 982 };
 983
 984 static SOC_ENUM_SINGLE_DECL(
 985         rt5645_inr_enum, RT5645_INL1_INR1_VOL,
 986         RT5645_INR_SEL_SFT, rt5645_inr_src);
 987
 988 static const struct snd_kcontrol_new rt5645_inr_mux =
 989         SOC_DAPM_ENUM("INR source", rt5645_inr_enum);
 990
 991 /* Stereo1 ADC source */
 992 /* MX-27 [12] */
 993 static const char * const rt5645_stereo_adc1_src[] = {
 994         "DAC MIX", "ADC"
 995 };
 996
 997 static SOC_ENUM_SINGLE_DECL(
 998         rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
 999         RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
1000
1001 static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
1002         SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
1003
1004 /* MX-27 [11] */
1005 static const char * const rt5645_stereo_adc2_src[] = {
1006         "DAC MIX", "DMIC"
1007 };
1008
1009 static SOC_ENUM_SINGLE_DECL(
1010         rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
1011         RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
1012
1013 static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
1014         SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
1015
1016 /* MX-27 [8] */
1017 static const char * const rt5645_stereo_dmic_src[] = {
1018         "DMIC1", "DMIC2"
1019 };
1020
1021 static SOC_ENUM_SINGLE_DECL(
1022         rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
1023         RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
1024
1025 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
1026         SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
1027
1028 /* Mono ADC source */
1029 /* MX-28 [12] */
1030 static const char * const rt5645_mono_adc_l1_src[] = {
1031         "Mono DAC MIXL", "ADC"
1032 };
1033
1034 static SOC_ENUM_SINGLE_DECL(
1035         rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
1036         RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
1037
1038 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
1039         SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
1040 /* MX-28 [11] */
1041 static const char * const rt5645_mono_adc_l2_src[] = {
1042         "Mono DAC MIXL", "DMIC"
1043 };
1044
1045 static SOC_ENUM_SINGLE_DECL(
1046         rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
1047         RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
1048
1049 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
1050         SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
1051
1052 /* MX-28 [8] */
1053 static const char * const rt5645_mono_dmic_src[] = {
1054         "DMIC1", "DMIC2"
1055 };
1056
1057 static SOC_ENUM_SINGLE_DECL(
1058         rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
1059         RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
1060
1061 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
1062         SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
1063 /* MX-28 [1:0] */
1064 static SOC_ENUM_SINGLE_DECL(
1065         rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
1066         RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
1067
1068 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
1069         SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
1070 /* MX-28 [4] */
1071 static const char * const rt5645_mono_adc_r1_src[] = {
1072         "Mono DAC MIXR", "ADC"
1073 };
1074
1075 static SOC_ENUM_SINGLE_DECL(
1076         rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
1077         RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
1078
1079 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
1080         SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
1081 /* MX-28 [3] */
1082 static const char * const rt5645_mono_adc_r2_src[] = {
1083         "Mono DAC MIXR", "DMIC"
1084 };
1085
1086 static SOC_ENUM_SINGLE_DECL(
1087         rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
1088         RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
1089
1090 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
1091         SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
1092
1093 /* MX-77 [9:8] */
1094 static const char * const rt5645_if1_adc_in_src[] = {
1095         "IF_ADC1", "IF_ADC2", "VAD_ADC"
1096 };
1097
1098 static SOC_ENUM_SINGLE_DECL(
1099         rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
1100         RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
1101
1102 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
1103         SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
1104
1105 /* MX-2d [3] [2] */
1106 static const char * const rt5650_a_dac1_src[] = {
1107         "DAC1", "Stereo DAC Mixer"
1108 };
1109
1110 static SOC_ENUM_SINGLE_DECL(
1111         rt5650_a_dac1_l_enum, RT5650_A_DAC_SOUR,
1112         RT5650_A_DAC1_L_IN_SFT, rt5650_a_dac1_src);
1113
1114 static const struct snd_kcontrol_new rt5650_a_dac1_l_mux =
1115         SOC_DAPM_ENUM("A DAC1 L source", rt5650_a_dac1_l_enum);
1116
1117 static SOC_ENUM_SINGLE_DECL(
1118         rt5650_a_dac1_r_enum, RT5650_A_DAC_SOUR,
1119         RT5650_A_DAC1_R_IN_SFT, rt5650_a_dac1_src);
1120
1121 static const struct snd_kcontrol_new rt5650_a_dac1_r_mux =
1122         SOC_DAPM_ENUM("A DAC1 R source", rt5650_a_dac1_r_enum);
1123
1124 /* MX-2d [1] [0] */
1125 static const char * const rt5650_a_dac2_src[] = {
1126         "Stereo DAC Mixer", "Mono DAC Mixer"
1127 };
1128
1129 static SOC_ENUM_SINGLE_DECL(
1130         rt5650_a_dac2_l_enum, RT5650_A_DAC_SOUR,
1131         RT5650_A_DAC2_L_IN_SFT, rt5650_a_dac2_src);
1132
1133 static const struct snd_kcontrol_new rt5650_a_dac2_l_mux =
1134         SOC_DAPM_ENUM("A DAC2 L source", rt5650_a_dac2_l_enum);
1135
1136 static SOC_ENUM_SINGLE_DECL(
1137         rt5650_a_dac2_r_enum, RT5650_A_DAC_SOUR,
1138         RT5650_A_DAC2_R_IN_SFT, rt5650_a_dac2_src);
1139
1140 static const struct snd_kcontrol_new rt5650_a_dac2_r_mux =
1141         SOC_DAPM_ENUM("A DAC2 R source", rt5650_a_dac2_r_enum);
1142
1143 /* MX-2F [13:12] */
1144 static const char * const rt5645_if2_adc_in_src[] = {
1145         "IF_ADC1", "IF_ADC2", "VAD_ADC"
1146 };
1147
1148 static SOC_ENUM_SINGLE_DECL(
1149         rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
1150         RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
1151
1152 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
1153         SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
1154
1155 /* MX-2F [1:0] */
1156 static const char * const rt5645_if3_adc_in_src[] = {
1157         "IF_ADC1", "IF_ADC2", "VAD_ADC"
1158 };
1159
1160 static SOC_ENUM_SINGLE_DECL(
1161         rt5645_if3_adc_in_enum, RT5645_DIG_INF1_DATA,
1162         RT5645_IF3_ADC_IN_SFT, rt5645_if3_adc_in_src);
1163
1164 static const struct snd_kcontrol_new rt5645_if3_adc_in_mux =
1165         SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum);
1166
1167 /* MX-31 [15] [13] [11] [9] */
1168 static const char * const rt5645_pdm_src[] = {
1169         "Mono DAC", "Stereo DAC"
1170 };
1171
1172 static SOC_ENUM_SINGLE_DECL(
1173         rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
1174         RT5645_PDM1_L_SFT, rt5645_pdm_src);
1175
1176 static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
1177         SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
1178
1179 static SOC_ENUM_SINGLE_DECL(
1180         rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
1181         RT5645_PDM1_R_SFT, rt5645_pdm_src);
1182
1183 static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1184         SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1185
1186 /* MX-9D [9:8] */
1187 static const char * const rt5645_vad_adc_src[] = {
1188         "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1189 };
1190
1191 static SOC_ENUM_SINGLE_DECL(
1192         rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1193         RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1194
1195 static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1196         SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1197
1198 static const struct snd_kcontrol_new spk_l_vol_control =
1199         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1200                 RT5645_L_MUTE_SFT, 1, 1);
1201
1202 static const struct snd_kcontrol_new spk_r_vol_control =
1203         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1204                 RT5645_R_MUTE_SFT, 1, 1);
1205
1206 static const struct snd_kcontrol_new hp_l_vol_control =
1207         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1208                 RT5645_L_MUTE_SFT, 1, 1);
1209
1210 static const struct snd_kcontrol_new hp_r_vol_control =
1211         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1212                 RT5645_R_MUTE_SFT, 1, 1);
1213
1214 static const struct snd_kcontrol_new pdm1_l_vol_control =
1215         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1216                 RT5645_M_PDM1_L, 1, 1);
1217
1218 static const struct snd_kcontrol_new pdm1_r_vol_control =
1219         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1220                 RT5645_M_PDM1_R, 1, 1);
1221
1222 static void hp_amp_power(struct snd_soc_codec *codec, int on)
1223 {
1224         static int hp_amp_power_count;
1225         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1226
1227         if (on) {
1228                 if (hp_amp_power_count <= 0) {
1229                         /* depop parameters */
1230                         snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1231                                 RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1232                         snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d);
1233                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1234                                 RT5645_HP_DCC_INT1, 0x9f01);
1235                         mdelay(150);
1236                         /* headphone amp power on */
1237                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1238                                 RT5645_PWR_FV1 | RT5645_PWR_FV2 , 0);
1239                         snd_soc_update_bits(codec, RT5645_PWR_VOL,
1240                                 RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1241                                 RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1242                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1243                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1244                                 RT5645_PWR_HA,
1245                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1246                                 RT5645_PWR_HA);
1247                         mdelay(5);
1248                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1249                                 RT5645_PWR_FV1 | RT5645_PWR_FV2,
1250                                 RT5645_PWR_FV1 | RT5645_PWR_FV2);
1251
1252                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1253                                 RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1254                                 RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1255                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1256                                 0x14, 0x1aaa);
1257                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1258                                 0x24, 0x0430);
1259                 }
1260                 hp_amp_power_count++;
1261         } else {
1262                 hp_amp_power_count--;
1263                 if (hp_amp_power_count <= 0) {
1264                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1265                                 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1266                                 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1267                                 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1268                         /* headphone amp power down */
1269                         snd_soc_write(codec, RT5645_DEPOP_M1, 0x0000);
1270                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1271                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1272                                 RT5645_PWR_HA, 0);
1273                 }
1274         }
1275 }
1276
1277 static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1278         struct snd_kcontrol *kcontrol, int event)
1279 {
1280         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1281         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1282
1283         switch (event) {
1284         case SND_SOC_DAPM_POST_PMU:
1285                 hp_amp_power(codec, 1);
1286                 /* headphone unmute sequence */
1287                 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1288                         snd_soc_write(codec, RT5645_DEPOP_M3, 0x0737);
1289                 } else {
1290                         snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1291                                 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1292                                 RT5645_CP_FQ3_MASK,
1293                                 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1294                                 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1295                                 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1296                 }
1297                 regmap_write(rt5645->regmap,
1298                         RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1299                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1300                         RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1301                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1302                         RT5645_RSTN_MASK, RT5645_RSTN_EN);
1303                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1304                         RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1305                         RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1306                         RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1307                 msleep(40);
1308                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1309                         RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1310                         RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1311                         RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1312                 break;
1313
1314         case SND_SOC_DAPM_PRE_PMD:
1315                 /* headphone mute sequence */
1316                 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1317                         snd_soc_write(codec, RT5645_DEPOP_M3, 0x0737);
1318                 } else {
1319                         snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1320                                 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1321                                 RT5645_CP_FQ3_MASK,
1322                                 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1323                                 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1324                                 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1325                 }
1326                 regmap_write(rt5645->regmap,
1327                         RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1328                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1329                         RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1330                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1331                         RT5645_RSTP_MASK, RT5645_RSTP_EN);
1332                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1333                         RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1334                         RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1335                         RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1336                 msleep(30);
1337                 hp_amp_power(codec, 0);
1338                 break;
1339
1340         default:
1341                 return 0;
1342         }
1343
1344         return 0;
1345 }
1346
1347 static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1348         struct snd_kcontrol *kcontrol, int event)
1349 {
1350         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1351
1352         switch (event) {
1353         case SND_SOC_DAPM_POST_PMU:
1354                 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1355                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1356                         RT5645_PWR_CLS_D_L,
1357                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1358                         RT5645_PWR_CLS_D_L);
1359                 break;
1360
1361         case SND_SOC_DAPM_PRE_PMD:
1362                 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1363                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1364                         RT5645_PWR_CLS_D_L, 0);
1365                 break;
1366
1367         default:
1368                 return 0;
1369         }
1370
1371         return 0;
1372 }
1373
1374 static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1375         struct snd_kcontrol *kcontrol, int event)
1376 {
1377         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1378
1379         switch (event) {
1380         case SND_SOC_DAPM_POST_PMU:
1381                 hp_amp_power(codec, 1);
1382                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1383                         RT5645_PWR_LM, RT5645_PWR_LM);
1384                 snd_soc_update_bits(codec, RT5645_LOUT1,
1385                         RT5645_L_MUTE | RT5645_R_MUTE, 0);
1386                 break;
1387
1388         case SND_SOC_DAPM_PRE_PMD:
1389                 snd_soc_update_bits(codec, RT5645_LOUT1,
1390                         RT5645_L_MUTE | RT5645_R_MUTE,
1391                         RT5645_L_MUTE | RT5645_R_MUTE);
1392                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1393                         RT5645_PWR_LM, 0);
1394                 hp_amp_power(codec, 0);
1395                 break;
1396
1397         default:
1398                 return 0;
1399         }
1400
1401         return 0;
1402 }
1403
1404 static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1405         struct snd_kcontrol *kcontrol, int event)
1406 {
1407         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1408
1409         switch (event) {
1410         case SND_SOC_DAPM_POST_PMU:
1411                 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1412                         RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1413                 break;
1414
1415         case SND_SOC_DAPM_PRE_PMD:
1416                 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1417                         RT5645_PWR_BST2_P, 0);
1418                 break;
1419
1420         default:
1421                 return 0;
1422         }
1423
1424         return 0;
1425 }
1426
1427 static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1428         SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1429                 RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1430         SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1431                 RT5645_PWR_PLL_BIT, 0, NULL, 0),
1432
1433         SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1434                 RT5645_PWR_JD1_BIT, 0, NULL, 0),
1435         SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1436                 RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1437
1438         /* ASRC */
1439         SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1,
1440                               11, 0, NULL, 0),
1441         SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1,
1442                               12, 0, NULL, 0),
1443         SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1,
1444                               10, 0, NULL, 0),
1445         SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1,
1446                               9, 0, NULL, 0),
1447         SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1,
1448                               8, 0, NULL, 0),
1449         SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1,
1450                               7, 0, NULL, 0),
1451         SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1,
1452                               5, 0, NULL, 0),
1453         SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1,
1454                               4, 0, NULL, 0),
1455         SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1,
1456                               3, 0, NULL, 0),
1457         SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1,
1458                               1, 0, NULL, 0),
1459         SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1,
1460                               0, 0, NULL, 0),
1461
1462         /* Input Side */
1463         /* micbias */
1464         SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2,
1465                         RT5645_PWR_MB1_BIT, 0),
1466         SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2,
1467                         RT5645_PWR_MB2_BIT, 0),
1468         /* Input Lines */
1469         SND_SOC_DAPM_INPUT("DMIC L1"),
1470         SND_SOC_DAPM_INPUT("DMIC R1"),
1471         SND_SOC_DAPM_INPUT("DMIC L2"),
1472         SND_SOC_DAPM_INPUT("DMIC R2"),
1473
1474         SND_SOC_DAPM_INPUT("IN1P"),
1475         SND_SOC_DAPM_INPUT("IN1N"),
1476         SND_SOC_DAPM_INPUT("IN2P"),
1477         SND_SOC_DAPM_INPUT("IN2N"),
1478
1479         SND_SOC_DAPM_INPUT("Haptic Generator"),
1480
1481         SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1482         SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1483         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1484                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1485         SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
1486                 RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
1487         SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
1488                 RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
1489         /* Boost */
1490         SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
1491                 RT5645_PWR_BST1_BIT, 0, NULL, 0),
1492         SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
1493                 RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
1494                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1495         /* Input Volume */
1496         SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
1497                 RT5645_PWR_IN_L_BIT, 0, NULL, 0),
1498         SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
1499                 RT5645_PWR_IN_R_BIT, 0, NULL, 0),
1500         /* REC Mixer */
1501         SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
1502                         0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
1503         SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
1504                         0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
1505         /* ADCs */
1506         SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
1507         SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
1508
1509         SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
1510                 RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
1511         SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
1512                 RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
1513
1514         /* ADC Mux */
1515         SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1516                 &rt5645_sto1_dmic_mux),
1517         SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1518                 &rt5645_sto_adc2_mux),
1519         SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1520                 &rt5645_sto_adc2_mux),
1521         SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1522                 &rt5645_sto_adc1_mux),
1523         SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1524                 &rt5645_sto_adc1_mux),
1525         SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1526                 &rt5645_mono_dmic_l_mux),
1527         SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1528                 &rt5645_mono_dmic_r_mux),
1529         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1530                 &rt5645_mono_adc_l2_mux),
1531         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1532                 &rt5645_mono_adc_l1_mux),
1533         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1534                 &rt5645_mono_adc_r1_mux),
1535         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1536                 &rt5645_mono_adc_r2_mux),
1537         /* ADC Mixer */
1538
1539         SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
1540                 RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
1541         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
1542                 rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
1543                 NULL, 0),
1544         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
1545                 rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
1546                 NULL, 0),
1547         SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
1548                 RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1549         SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1550                 rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
1551                 NULL, 0),
1552         SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
1553                 RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1554         SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1555                 rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
1556                 NULL, 0),
1557
1558         /* ADC PGA */
1559         SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1560         SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1561         SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1562         SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1563         SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1564         SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1565         SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1566         SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1567         SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1568         SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1569
1570         /* IF1 2 Mux */
1571         SND_SOC_DAPM_MUX("IF1 ADC Mux", SND_SOC_NOPM,
1572                 0, 0, &rt5645_if1_adc_in_mux),
1573         SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
1574                 0, 0, &rt5645_if2_adc_in_mux),
1575
1576         /* Digital Interface */
1577         SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
1578                 RT5645_PWR_I2S1_BIT, 0, NULL, 0),
1579         SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1580         SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1581         SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1582         SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1583         SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1584         SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1585         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1586         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1587         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1588         SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
1589                 RT5645_PWR_I2S2_BIT, 0, NULL, 0),
1590         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1591         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1592         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1593         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1594
1595         /* Digital Interface Select */
1596         SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
1597                 0, 0, &rt5645_vad_adc_mux),
1598
1599         /* Audio Interface */
1600         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1601         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1602         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1603         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1604
1605         /* Output Side */
1606         /* DAC mixer before sound effect  */
1607         SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1608                 rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
1609         SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1610                 rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
1611
1612         /* DAC2 channel Mux */
1613         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
1614         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
1615         SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
1616                 RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
1617         SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
1618                 RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
1619
1620         SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
1621         SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
1622
1623         /* DAC Mixer */
1624         SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
1625                 RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
1626         SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
1627                 RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1628         SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
1629                 RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1630         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1631                 rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
1632         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1633                 rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
1634         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1635                 rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
1636         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1637                 rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
1638         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1639                 rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
1640         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1641                 rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
1642
1643         /* DACs */
1644         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
1645                 0),
1646         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
1647                 0),
1648         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
1649                 0),
1650         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
1651                 0),
1652         /* OUT Mixer */
1653         SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
1654                 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
1655         SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
1656                 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
1657         SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
1658                 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
1659         SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
1660                 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
1661         /* Ouput Volume */
1662         SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
1663                 &spk_l_vol_control),
1664         SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
1665                 &spk_r_vol_control),
1666         SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
1667                 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
1668         SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
1669                 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
1670         SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
1671                 RT5645_PWR_HM_L_BIT, 0, NULL, 0),
1672         SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
1673                 RT5645_PWR_HM_R_BIT, 0, NULL, 0),
1674         SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1675         SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1676         SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1677         SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
1678         SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
1679
1680         /* HPO/LOUT/Mono Mixer */
1681         SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
1682                 ARRAY_SIZE(rt5645_spo_l_mix)),
1683         SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
1684                 ARRAY_SIZE(rt5645_spo_r_mix)),
1685         SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
1686                 ARRAY_SIZE(rt5645_hpo_mix)),
1687         SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
1688                 ARRAY_SIZE(rt5645_lout_mix)),
1689
1690         SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
1691                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1692         SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
1693                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1694         SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
1695                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1696
1697         /* PDM */
1698         SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
1699                 0, NULL, 0),
1700         SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
1701         SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
1702
1703         SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
1704         SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
1705
1706         /* Output Lines */
1707         SND_SOC_DAPM_OUTPUT("HPOL"),
1708         SND_SOC_DAPM_OUTPUT("HPOR"),
1709         SND_SOC_DAPM_OUTPUT("LOUTL"),
1710         SND_SOC_DAPM_OUTPUT("LOUTR"),
1711         SND_SOC_DAPM_OUTPUT("PDM1L"),
1712         SND_SOC_DAPM_OUTPUT("PDM1R"),
1713         SND_SOC_DAPM_OUTPUT("SPOL"),
1714         SND_SOC_DAPM_OUTPUT("SPOR"),
1715 };
1716
1717 static const struct snd_soc_dapm_widget rt5650_specific_dapm_widgets[] = {
1718         SND_SOC_DAPM_MUX("A DAC1 L Mux", SND_SOC_NOPM,
1719                 0, 0, &rt5650_a_dac1_l_mux),
1720         SND_SOC_DAPM_MUX("A DAC1 R Mux", SND_SOC_NOPM,
1721                 0, 0, &rt5650_a_dac1_r_mux),
1722         SND_SOC_DAPM_MUX("A DAC2 L Mux", SND_SOC_NOPM,
1723                 0, 0, &rt5650_a_dac2_l_mux),
1724         SND_SOC_DAPM_MUX("A DAC2 R Mux", SND_SOC_NOPM,
1725                 0, 0, &rt5650_a_dac2_r_mux),
1726 };
1727
1728 static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
1729         { "adc stereo1 filter", NULL, "ADC STO1 ASRC", is_using_asrc },
1730         { "adc mono left filter", NULL, "ADC MONO L ASRC", is_using_asrc },
1731         { "adc mono right filter", NULL, "ADC MONO R ASRC", is_using_asrc },
1732         { "dac mono left filter", NULL, "DAC MONO L ASRC", is_using_asrc },
1733         { "dac mono right filter", NULL, "DAC MONO R ASRC", is_using_asrc },
1734         { "dac stereo1 filter", NULL, "DAC STO ASRC", is_using_asrc },
1735
1736         { "I2S1", NULL, "I2S1 ASRC" },
1737         { "I2S2", NULL, "I2S2 ASRC" },
1738
1739         { "IN1P", NULL, "LDO2" },
1740         { "IN2P", NULL, "LDO2" },
1741
1742         { "DMIC1", NULL, "DMIC L1" },
1743         { "DMIC1", NULL, "DMIC R1" },
1744         { "DMIC2", NULL, "DMIC L2" },
1745         { "DMIC2", NULL, "DMIC R2" },
1746
1747         { "BST1", NULL, "IN1P" },
1748         { "BST1", NULL, "IN1N" },
1749         { "BST1", NULL, "JD Power" },
1750         { "BST1", NULL, "Mic Det Power" },
1751         { "BST2", NULL, "IN2P" },
1752         { "BST2", NULL, "IN2N" },
1753
1754         { "INL VOL", NULL, "IN2P" },
1755         { "INR VOL", NULL, "IN2N" },
1756
1757         { "RECMIXL", "HPOL Switch", "HPOL" },
1758         { "RECMIXL", "INL Switch", "INL VOL" },
1759         { "RECMIXL", "BST2 Switch", "BST2" },
1760         { "RECMIXL", "BST1 Switch", "BST1" },
1761         { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
1762
1763         { "RECMIXR", "HPOR Switch", "HPOR" },
1764         { "RECMIXR", "INR Switch", "INR VOL" },
1765         { "RECMIXR", "BST2 Switch", "BST2" },
1766         { "RECMIXR", "BST1 Switch", "BST1" },
1767         { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
1768
1769         { "ADC L", NULL, "RECMIXL" },
1770         { "ADC L", NULL, "ADC L power" },
1771         { "ADC R", NULL, "RECMIXR" },
1772         { "ADC R", NULL, "ADC R power" },
1773
1774         {"DMIC L1", NULL, "DMIC CLK"},
1775         {"DMIC L1", NULL, "DMIC1 Power"},
1776         {"DMIC R1", NULL, "DMIC CLK"},
1777         {"DMIC R1", NULL, "DMIC1 Power"},
1778         {"DMIC L2", NULL, "DMIC CLK"},
1779         {"DMIC L2", NULL, "DMIC2 Power"},
1780         {"DMIC R2", NULL, "DMIC CLK"},
1781         {"DMIC R2", NULL, "DMIC2 Power"},
1782
1783         { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
1784         { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
1785         { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC" },
1786
1787         { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
1788         { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
1789         { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC" },
1790
1791         { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
1792         { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
1793         { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC" },
1794
1795         { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1796         { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1797         { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
1798         { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1799
1800         { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
1801         { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1802         { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1803         { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1804
1805         { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
1806         { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1807         { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1808         { "Mono ADC L1 Mux", "ADC", "ADC L" },
1809
1810         { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1811         { "Mono ADC R1 Mux", "ADC", "ADC R" },
1812         { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
1813         { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1814
1815         { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
1816         { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
1817         { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
1818         { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
1819
1820         { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
1821         { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
1822         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1823
1824         { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
1825         { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
1826         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1827
1828         { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
1829         { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
1830         { "Mono ADC MIXL", NULL, "adc mono left filter" },
1831         { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
1832
1833         { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
1834         { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
1835         { "Mono ADC MIXR", NULL, "adc mono right filter" },
1836         { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
1837
1838         { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
1839         { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
1840         { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
1841
1842         { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
1843         { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
1844         { "IF_ADC2", NULL, "Mono ADC MIXL" },
1845         { "IF_ADC2", NULL, "Mono ADC MIXR" },
1846         { "VAD_ADC", NULL, "VAD ADC Mux" },
1847
1848         { "IF1 ADC Mux", "IF_ADC1", "IF_ADC1" },
1849         { "IF1 ADC Mux", "IF_ADC2", "IF_ADC2" },
1850         { "IF1 ADC Mux", "VAD_ADC", "VAD_ADC" },
1851
1852         { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
1853         { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
1854         { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
1855
1856         { "IF1 ADC", NULL, "I2S1" },
1857         { "IF1 ADC", NULL, "IF1 ADC Mux" },
1858         { "IF2 ADC", NULL, "I2S2" },
1859         { "IF2 ADC", NULL, "IF2 ADC Mux" },
1860
1861         { "AIF1TX", NULL, "IF1 ADC" },
1862         { "AIF1TX", NULL, "IF2 ADC" },
1863         { "AIF2TX", NULL, "IF2 ADC" },
1864
1865         { "IF1 DAC1", NULL, "AIF1RX" },
1866         { "IF1 DAC2", NULL, "AIF1RX" },
1867         { "IF2 DAC", NULL, "AIF2RX" },
1868
1869         { "IF1 DAC1", NULL, "I2S1" },
1870         { "IF1 DAC2", NULL, "I2S1" },
1871         { "IF2 DAC", NULL, "I2S2" },
1872
1873         { "IF1 DAC2 L", NULL, "IF1 DAC2" },
1874         { "IF1 DAC2 R", NULL, "IF1 DAC2" },
1875         { "IF1 DAC1 L", NULL, "IF1 DAC1" },
1876         { "IF1 DAC1 R", NULL, "IF1 DAC1" },
1877         { "IF2 DAC L", NULL, "IF2 DAC" },
1878         { "IF2 DAC R", NULL, "IF2 DAC" },
1879
1880         { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
1881         { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
1882
1883         { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
1884         { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
1885
1886         { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
1887         { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
1888         { "DAC1 MIXL", NULL, "dac stereo1 filter" },
1889         { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
1890         { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
1891         { "DAC1 MIXR", NULL, "dac stereo1 filter" },
1892
1893         { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
1894         { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
1895         { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
1896         { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
1897         { "DAC L2 Volume", NULL, "DAC L2 Mux" },
1898         { "DAC L2 Volume", NULL, "dac mono left filter" },
1899
1900         { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
1901         { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
1902         { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
1903         { "DAC R2 Mux", "Haptic", "Haptic Generator" },
1904         { "DAC R2 Volume", NULL, "DAC R2 Mux" },
1905         { "DAC R2 Volume", NULL, "dac mono right filter" },
1906
1907         { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1908         { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
1909         { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1910         { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
1911         { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1912         { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
1913         { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1914         { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
1915
1916         { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1917         { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1918         { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1919         { "Mono DAC MIXL", NULL, "dac mono left filter" },
1920         { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1921         { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1922         { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1923         { "Mono DAC MIXR", NULL, "dac mono right filter" },
1924
1925         { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
1926         { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1927         { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1928         { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
1929         { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1930         { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1931
1932         { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
1933         { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
1934         { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
1935         { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
1936
1937         { "SPK MIXL", "BST1 Switch", "BST1" },
1938         { "SPK MIXL", "INL Switch", "INL VOL" },
1939         { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
1940         { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
1941         { "SPK MIXR", "BST2 Switch", "BST2" },
1942         { "SPK MIXR", "INR Switch", "INR VOL" },
1943         { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
1944         { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
1945
1946         { "OUT MIXL", "BST1 Switch", "BST1" },
1947         { "OUT MIXL", "INL Switch", "INL VOL" },
1948         { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
1949         { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
1950
1951         { "OUT MIXR", "BST2 Switch", "BST2" },
1952         { "OUT MIXR", "INR Switch", "INR VOL" },
1953         { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
1954         { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
1955
1956         { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
1957         { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
1958         { "HPOVOL MIXL", "INL Switch", "INL VOL" },
1959         { "HPOVOL MIXL", "BST1 Switch", "BST1" },
1960         { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
1961         { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
1962         { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
1963         { "HPOVOL MIXR", "INR Switch", "INR VOL" },
1964         { "HPOVOL MIXR", "BST2 Switch", "BST2" },
1965         { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
1966
1967         { "DAC 2", NULL, "DAC L2" },
1968         { "DAC 2", NULL, "DAC R2" },
1969         { "DAC 1", NULL, "DAC L1" },
1970         { "DAC 1", NULL, "DAC R1" },
1971         { "HPOVOL L", "Switch", "HPOVOL MIXL" },
1972         { "HPOVOL R", "Switch", "HPOVOL MIXR" },
1973         { "HPOVOL", NULL, "HPOVOL L" },
1974         { "HPOVOL", NULL, "HPOVOL R" },
1975         { "HPO MIX", "DAC1 Switch", "DAC 1" },
1976         { "HPO MIX", "HPVOL Switch", "HPOVOL" },
1977
1978         { "SPKVOL L", "Switch", "SPK MIXL" },
1979         { "SPKVOL R", "Switch", "SPK MIXR" },
1980
1981         { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
1982         { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
1983         { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
1984         { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
1985         { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
1986         { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
1987
1988         { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
1989         { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
1990         { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
1991         { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
1992
1993         { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
1994         { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
1995         { "PDM1 L Mux", NULL, "PDM1 Power" },
1996         { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
1997         { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
1998         { "PDM1 R Mux", NULL, "PDM1 Power" },
1999
2000         { "HP amp", NULL, "HPO MIX" },
2001         { "HP amp", NULL, "JD Power" },
2002         { "HP amp", NULL, "Mic Det Power" },
2003         { "HP amp", NULL, "LDO2" },
2004         { "HPOL", NULL, "HP amp" },
2005         { "HPOR", NULL, "HP amp" },
2006
2007         { "LOUT amp", NULL, "LOUT MIX" },
2008         { "LOUTL", NULL, "LOUT amp" },
2009         { "LOUTR", NULL, "LOUT amp" },
2010
2011         { "PDM1 L", "Switch", "PDM1 L Mux" },
2012         { "PDM1 R", "Switch", "PDM1 R Mux" },
2013
2014         { "PDM1L", NULL, "PDM1 L" },
2015         { "PDM1R", NULL, "PDM1 R" },
2016
2017         { "SPK amp", NULL, "SPOL MIX" },
2018         { "SPK amp", NULL, "SPOR MIX" },
2019         { "SPOL", NULL, "SPK amp" },
2020         { "SPOR", NULL, "SPK amp" },
2021 };
2022
2023 static const struct snd_soc_dapm_route rt5650_specific_dapm_routes[] = {
2024         { "A DAC1 L Mux", "DAC1",  "DAC1 MIXL"},
2025         { "A DAC1 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2026         { "A DAC1 R Mux", "DAC1",  "DAC1 MIXR"},
2027         { "A DAC1 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2028
2029         { "A DAC2 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2030         { "A DAC2 L Mux", "Mono DAC Mixer", "Mono DAC MIXL"},
2031         { "A DAC2 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2032         { "A DAC2 R Mux", "Mono DAC Mixer", "Mono DAC MIXR"},
2033
2034         { "DAC L1", NULL, "A DAC1 L Mux" },
2035         { "DAC R1", NULL, "A DAC1 R Mux" },
2036         { "DAC L2", NULL, "A DAC2 L Mux" },
2037         { "DAC R2", NULL, "A DAC2 R Mux" },
2038 };
2039
2040 static const struct snd_soc_dapm_route rt5645_specific_dapm_routes[] = {
2041         { "DAC L1", NULL, "Stereo DAC MIXL" },
2042         { "DAC R1", NULL, "Stereo DAC MIXR" },
2043         { "DAC L2", NULL, "Mono DAC MIXL" },
2044         { "DAC R2", NULL, "Mono DAC MIXR" },
2045 };
2046
2047 static int rt5645_hw_params(struct snd_pcm_substream *substream,
2048         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2049 {
2050         struct snd_soc_codec *codec = dai->codec;
2051         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2052         unsigned int val_len = 0, val_clk, mask_clk, dl_sft;
2053         int pre_div, bclk_ms, frame_size;
2054
2055         rt5645->lrck[dai->id] = params_rate(params);
2056         pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
2057         if (pre_div < 0) {
2058                 dev_err(codec->dev, "Unsupported clock setting\n");
2059                 return -EINVAL;
2060         }
2061         frame_size = snd_soc_params_to_frame_size(params);
2062         if (frame_size < 0) {
2063                 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2064                 return -EINVAL;
2065         }
2066
2067         switch (rt5645->codec_type) {
2068         case CODEC_TYPE_RT5650:
2069                 dl_sft = 4;
2070                 break;
2071         default:
2072                 dl_sft = 2;
2073                 break;
2074         }
2075
2076         bclk_ms = frame_size > 32;
2077         rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
2078
2079         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2080                 rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
2081         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2082                                 bclk_ms, pre_div, dai->id);
2083
2084         switch (params_width(params)) {
2085         case 16:
2086                 break;
2087         case 20:
2088                 val_len = 0x1;
2089                 break;
2090         case 24:
2091                 val_len = 0x2;
2092                 break;
2093         case 8:
2094                 val_len = 0x3;
2095                 break;
2096         default:
2097                 return -EINVAL;
2098         }
2099
2100         switch (dai->id) {
2101         case RT5645_AIF1:
2102                 mask_clk = RT5645_I2S_BCLK_MS1_MASK | RT5645_I2S_PD1_MASK;
2103                 val_clk = bclk_ms << RT5645_I2S_BCLK_MS1_SFT |
2104                         pre_div << RT5645_I2S_PD1_SFT;
2105                 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
2106                         (0x3 << dl_sft), (val_len << dl_sft));
2107                 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
2108                 break;
2109         case  RT5645_AIF2:
2110                 mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
2111                 val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
2112                         pre_div << RT5645_I2S_PD2_SFT;
2113                 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
2114                         (0x3 << dl_sft), (val_len << dl_sft));
2115                 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
2116                 break;
2117         default:
2118                 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2119                 return -EINVAL;
2120         }
2121
2122         return 0;
2123 }
2124
2125 static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2126 {
2127         struct snd_soc_codec *codec = dai->codec;
2128         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2129         unsigned int reg_val = 0, pol_sft;
2130
2131         switch (rt5645->codec_type) {
2132         case CODEC_TYPE_RT5650:
2133                 pol_sft = 8;
2134                 break;
2135         default:
2136                 pol_sft = 7;
2137                 break;
2138         }
2139
2140         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2141         case SND_SOC_DAIFMT_CBM_CFM:
2142                 rt5645->master[dai->id] = 1;
2143                 break;
2144         case SND_SOC_DAIFMT_CBS_CFS:
2145                 reg_val |= RT5645_I2S_MS_S;
2146                 rt5645->master[dai->id] = 0;
2147                 break;
2148         default:
2149                 return -EINVAL;
2150         }
2151
2152         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2153         case SND_SOC_DAIFMT_NB_NF:
2154                 break;
2155         case SND_SOC_DAIFMT_IB_NF:
2156                 reg_val |= (1 << pol_sft);
2157                 break;
2158         default:
2159                 return -EINVAL;
2160         }
2161
2162         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2163         case SND_SOC_DAIFMT_I2S:
2164                 break;
2165         case SND_SOC_DAIFMT_LEFT_J:
2166                 reg_val |= RT5645_I2S_DF_LEFT;
2167                 break;
2168         case SND_SOC_DAIFMT_DSP_A:
2169                 reg_val |= RT5645_I2S_DF_PCM_A;
2170                 break;
2171         case SND_SOC_DAIFMT_DSP_B:
2172                 reg_val |= RT5645_I2S_DF_PCM_B;
2173                 break;
2174         default:
2175                 return -EINVAL;
2176         }
2177         switch (dai->id) {
2178         case RT5645_AIF1:
2179                 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
2180                         RT5645_I2S_MS_MASK | (1 << pol_sft) |
2181                         RT5645_I2S_DF_MASK, reg_val);
2182                 break;
2183         case RT5645_AIF2:
2184                 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
2185                         RT5645_I2S_MS_MASK | (1 << pol_sft) |
2186                         RT5645_I2S_DF_MASK, reg_val);
2187                 break;
2188         default:
2189                 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2190                 return -EINVAL;
2191         }
2192         return 0;
2193 }
2194
2195 static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
2196                 int clk_id, unsigned int freq, int dir)
2197 {
2198         struct snd_soc_codec *codec = dai->codec;
2199         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2200         unsigned int reg_val = 0;
2201
2202         if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
2203                 return 0;
2204
2205         switch (clk_id) {
2206         case RT5645_SCLK_S_MCLK:
2207                 reg_val |= RT5645_SCLK_SRC_MCLK;
2208                 break;
2209         case RT5645_SCLK_S_PLL1:
2210                 reg_val |= RT5645_SCLK_SRC_PLL1;
2211                 break;
2212         case RT5645_SCLK_S_RCCLK:
2213                 reg_val |= RT5645_SCLK_SRC_RCCLK;
2214                 break;
2215         default:
2216                 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2217                 return -EINVAL;
2218         }
2219         snd_soc_update_bits(codec, RT5645_GLB_CLK,
2220                 RT5645_SCLK_SRC_MASK, reg_val);
2221         rt5645->sysclk = freq;
2222         rt5645->sysclk_src = clk_id;
2223
2224         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2225
2226         return 0;
2227 }
2228
2229 static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2230                         unsigned int freq_in, unsigned int freq_out)
2231 {
2232         struct snd_soc_codec *codec = dai->codec;
2233         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2234         struct rl6231_pll_code pll_code;
2235         int ret;
2236
2237         if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
2238             freq_out == rt5645->pll_out)
2239                 return 0;
2240
2241         if (!freq_in || !freq_out) {
2242                 dev_dbg(codec->dev, "PLL disabled\n");
2243
2244                 rt5645->pll_in = 0;
2245                 rt5645->pll_out = 0;
2246                 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2247                         RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
2248                 return 0;
2249         }
2250
2251         switch (source) {
2252         case RT5645_PLL1_S_MCLK:
2253                 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2254                         RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
2255                 break;
2256         case RT5645_PLL1_S_BCLK1:
2257         case RT5645_PLL1_S_BCLK2:
2258                 switch (dai->id) {
2259                 case RT5645_AIF1:
2260                         snd_soc_update_bits(codec, RT5645_GLB_CLK,
2261                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
2262                         break;
2263                 case  RT5645_AIF2:
2264                         snd_soc_update_bits(codec, RT5645_GLB_CLK,
2265                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
2266                         break;
2267                 default:
2268                         dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2269                         return -EINVAL;
2270                 }
2271                 break;
2272         default:
2273                 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2274                 return -EINVAL;
2275         }
2276
2277         ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2278         if (ret < 0) {
2279                 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2280                 return ret;
2281         }
2282
2283         dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2284                 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2285                 pll_code.n_code, pll_code.k_code);
2286
2287         snd_soc_write(codec, RT5645_PLL_CTRL1,
2288                 pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2289         snd_soc_write(codec, RT5645_PLL_CTRL2,
2290                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT |
2291                 pll_code.m_bp << RT5645_PLL_M_BP_SFT);
2292
2293         rt5645->pll_in = freq_in;
2294         rt5645->pll_out = freq_out;
2295         rt5645->pll_src = source;
2296
2297         return 0;
2298 }
2299
2300 static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2301                         unsigned int rx_mask, int slots, int slot_width)
2302 {
2303         struct snd_soc_codec *codec = dai->codec;
2304         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2305         unsigned int i_slot_sft, o_slot_sft, i_width_sht, o_width_sht, en_sft;
2306         unsigned int mask, val = 0;
2307
2308         switch (rt5645->codec_type) {
2309         case CODEC_TYPE_RT5650:
2310                 en_sft = 15;
2311                 i_slot_sft = 10;
2312                 o_slot_sft = 8;
2313                 i_width_sht = 6;
2314                 o_width_sht = 4;
2315                 mask = 0x8ff0;
2316                 break;
2317         default:
2318                 en_sft = 14;
2319                 i_slot_sft = o_slot_sft = 12;
2320                 i_width_sht = o_width_sht = 10;
2321                 mask = 0x7c00;
2322                 break;
2323         }
2324         if (rx_mask || tx_mask) {
2325                 val |= (1 << en_sft);
2326                 if (rt5645->codec_type == CODEC_TYPE_RT5645)
2327                         snd_soc_update_bits(codec, RT5645_BASS_BACK,
2328                                 RT5645_G_BB_BST_MASK, RT5645_G_BB_BST_25DB);
2329         }
2330
2331         switch (slots) {
2332         case 4:
2333                 val |= (1 << i_slot_sft) | (1 << o_slot_sft);
2334                 break;
2335         case 6:
2336                 val |= (2 << i_slot_sft) | (2 << o_slot_sft);
2337                 break;
2338         case 8:
2339                 val |= (3 << i_slot_sft) | (3 << o_slot_sft);
2340                 break;
2341         case 2:
2342         default:
2343                 break;
2344         }
2345
2346         switch (slot_width) {
2347         case 20:
2348                 val |= (1 << i_width_sht) | (1 << o_width_sht);
2349                 break;
2350         case 24:
2351                 val |= (2 << i_width_sht) | (2 << o_width_sht);
2352                 break;
2353         case 32:
2354                 val |= (3 << i_width_sht) | (3 << o_width_sht);
2355                 break;
2356         case 16:
2357         default:
2358                 break;
2359         }
2360
2361         snd_soc_update_bits(codec, RT5645_TDM_CTRL_1, mask, val);
2362
2363         return 0;
2364 }
2365
2366 static int rt5645_set_bias_level(struct snd_soc_codec *codec,
2367                         enum snd_soc_bias_level level)
2368 {
2369         switch (level) {
2370         case SND_SOC_BIAS_PREPARE:
2371                 if (SND_SOC_BIAS_STANDBY == codec->dapm.bias_level) {
2372                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2373                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2374                                 RT5645_PWR_BG | RT5645_PWR_VREF2,
2375                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2376                                 RT5645_PWR_BG | RT5645_PWR_VREF2);
2377                         mdelay(10);
2378                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2379                                 RT5645_PWR_FV1 | RT5645_PWR_FV2,
2380                                 RT5645_PWR_FV1 | RT5645_PWR_FV2);
2381                         snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2382                                 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
2383                 }
2384                 break;
2385
2386         case SND_SOC_BIAS_STANDBY:
2387                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2388                         RT5645_PWR_VREF1 | RT5645_PWR_MB |
2389                         RT5645_PWR_BG | RT5645_PWR_VREF2,
2390                         RT5645_PWR_VREF1 | RT5645_PWR_MB |
2391                         RT5645_PWR_BG | RT5645_PWR_VREF2);
2392                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2393                         RT5645_PWR_FV1 | RT5645_PWR_FV2,
2394                         RT5645_PWR_FV1 | RT5645_PWR_FV2);
2395                 break;
2396
2397         case SND_SOC_BIAS_OFF:
2398                 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100);
2399                 snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2400                                 RT5645_DIG_GATE_CTRL, 0);
2401                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2402                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2403                                 RT5645_PWR_BG | RT5645_PWR_VREF2 |
2404                                 RT5645_PWR_FV1 | RT5645_PWR_FV2, 0x0);
2405                 break;
2406
2407         default:
2408                 break;
2409         }
2410         codec->dapm.bias_level = level;
2411
2412         return 0;
2413 }
2414
2415 static int rt5645_jack_detect(struct snd_soc_codec *codec)
2416 {
2417         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2418         int gpio_state, jack_type = 0;
2419         unsigned int val;
2420
2421         if (!gpio_is_valid(rt5645->pdata.hp_det_gpio)) {
2422                 dev_err(codec->dev, "invalid gpio\n");
2423                 return -EINVAL;
2424         }
2425         gpio_state = gpio_get_value(rt5645->pdata.hp_det_gpio);
2426
2427         dev_dbg(codec->dev, "gpio = %d(%d)\n", rt5645->pdata.hp_det_gpio,
2428                 gpio_state);
2429
2430         if ((rt5645->pdata.gpio_hp_det_active_high && gpio_state) ||
2431                 (!rt5645->pdata.gpio_hp_det_active_high && !gpio_state)) {
2432                 snd_soc_dapm_force_enable_pin(&codec->dapm, "micbias1");
2433                 snd_soc_dapm_force_enable_pin(&codec->dapm, "micbias2");
2434                 snd_soc_dapm_force_enable_pin(&codec->dapm, "LDO2");
2435                 snd_soc_dapm_force_enable_pin(&codec->dapm, "Mic Det Power");
2436                 snd_soc_dapm_sync(&codec->dapm);
2437
2438                 snd_soc_write(codec, RT5645_IN1_CTRL1, 0x0006);
2439                 snd_soc_write(codec, RT5645_JD_CTRL3, 0x00b0);
2440
2441                 snd_soc_update_bits(codec, RT5645_IN1_CTRL2,
2442                         RT5645_CBJ_MN_JD, 0);
2443                 snd_soc_update_bits(codec, RT5645_IN1_CTRL2,
2444                         RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
2445
2446                 msleep(400);
2447                 val = snd_soc_read(codec, RT5645_IN1_CTRL3) & 0x7;
2448                 dev_dbg(codec->dev, "val = %d\n", val);
2449
2450                 if (val == 1 || val == 2)
2451                         jack_type = SND_JACK_HEADSET;
2452                 else
2453                         jack_type = SND_JACK_HEADPHONE;
2454
2455                 snd_soc_dapm_disable_pin(&codec->dapm, "micbias1");
2456                 snd_soc_dapm_disable_pin(&codec->dapm, "micbias2");
2457                 if (rt5645->pdata.jd_mode == 0)
2458                         snd_soc_dapm_disable_pin(&codec->dapm, "LDO2");
2459                 snd_soc_dapm_disable_pin(&codec->dapm, "Mic Det Power");
2460                 snd_soc_dapm_sync(&codec->dapm);
2461         }
2462
2463         snd_soc_jack_report(rt5645->hp_jack, jack_type, SND_JACK_HEADPHONE);
2464         snd_soc_jack_report(rt5645->mic_jack, jack_type, SND_JACK_MICROPHONE);
2465         return 0;
2466 }
2467
2468 int rt5645_set_jack_detect(struct snd_soc_codec *codec,
2469         struct snd_soc_jack *hp_jack, struct snd_soc_jack *mic_jack)
2470 {
2471         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2472
2473         rt5645->hp_jack = hp_jack;
2474         rt5645->mic_jack = mic_jack;
2475         rt5645_jack_detect(codec);
2476
2477         return 0;
2478 }
2479 EXPORT_SYMBOL_GPL(rt5645_set_jack_detect);
2480
2481 static void rt5645_jack_detect_work(struct work_struct *work)
2482 {
2483         struct rt5645_priv *rt5645 =
2484                 container_of(work, struct rt5645_priv, jack_detect_work.work);
2485
2486         rt5645_jack_detect(rt5645->codec);
2487 }
2488
2489 static irqreturn_t rt5645_irq(int irq, void *data)
2490 {
2491         struct rt5645_priv *rt5645 = data;
2492
2493         queue_delayed_work(system_power_efficient_wq,
2494                            &rt5645->jack_detect_work, msecs_to_jiffies(250));
2495
2496         return IRQ_HANDLED;
2497 }
2498
2499 static int rt5645_probe(struct snd_soc_codec *codec)
2500 {
2501         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2502
2503         rt5645->codec = codec;
2504
2505         switch (rt5645->codec_type) {
2506         case CODEC_TYPE_RT5645:
2507                 snd_soc_dapm_add_routes(&codec->dapm,
2508                         rt5645_specific_dapm_routes,
2509                         ARRAY_SIZE(rt5645_specific_dapm_routes));
2510                 break;
2511         case CODEC_TYPE_RT5650:
2512                 snd_soc_dapm_new_controls(&codec->dapm,
2513                         rt5650_specific_dapm_widgets,
2514                         ARRAY_SIZE(rt5650_specific_dapm_widgets));
2515                 snd_soc_dapm_add_routes(&codec->dapm,
2516                         rt5650_specific_dapm_routes,
2517                         ARRAY_SIZE(rt5650_specific_dapm_routes));
2518                 break;
2519         }
2520
2521         rt5645_set_bias_level(codec, SND_SOC_BIAS_OFF);
2522
2523         snd_soc_update_bits(codec, RT5645_CHARGE_PUMP, 0x0300, 0x0200);
2524
2525         /* for JD function */
2526         if (rt5645->pdata.en_jd_func) {
2527                 snd_soc_dapm_force_enable_pin(&codec->dapm, "JD Power");
2528                 snd_soc_dapm_force_enable_pin(&codec->dapm, "LDO2");
2529                 snd_soc_dapm_sync(&codec->dapm);
2530         }
2531
2532         return 0;
2533 }
2534
2535 static int rt5645_remove(struct snd_soc_codec *codec)
2536 {
2537         rt5645_reset(codec);
2538         return 0;
2539 }
2540
2541 #ifdef CONFIG_PM
2542 static int rt5645_suspend(struct snd_soc_codec *codec)
2543 {
2544         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2545
2546         regcache_cache_only(rt5645->regmap, true);
2547         regcache_mark_dirty(rt5645->regmap);
2548
2549         return 0;
2550 }
2551
2552 static int rt5645_resume(struct snd_soc_codec *codec)
2553 {
2554         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2555
2556         regcache_cache_only(rt5645->regmap, false);
2557         regcache_sync(rt5645->regmap);
2558
2559         return 0;
2560 }
2561 #else
2562 #define rt5645_suspend NULL
2563 #define rt5645_resume NULL
2564 #endif
2565
2566 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2567 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2568                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2569
2570 static struct snd_soc_dai_ops rt5645_aif_dai_ops = {
2571         .hw_params = rt5645_hw_params,
2572         .set_fmt = rt5645_set_dai_fmt,
2573         .set_sysclk = rt5645_set_dai_sysclk,
2574         .set_tdm_slot = rt5645_set_tdm_slot,
2575         .set_pll = rt5645_set_dai_pll,
2576 };
2577
2578 static struct snd_soc_dai_driver rt5645_dai[] = {
2579         {
2580                 .name = "rt5645-aif1",
2581                 .id = RT5645_AIF1,
2582                 .playback = {
2583                         .stream_name = "AIF1 Playback",
2584                         .channels_min = 1,
2585                         .channels_max = 2,
2586                         .rates = RT5645_STEREO_RATES,
2587                         .formats = RT5645_FORMATS,
2588                 },
2589                 .capture = {
2590                         .stream_name = "AIF1 Capture",
2591                         .channels_min = 1,
2592                         .channels_max = 2,
2593                         .rates = RT5645_STEREO_RATES,
2594                         .formats = RT5645_FORMATS,
2595                 },
2596                 .ops = &rt5645_aif_dai_ops,
2597         },
2598         {
2599                 .name = "rt5645-aif2",
2600                 .id = RT5645_AIF2,
2601                 .playback = {
2602                         .stream_name = "AIF2 Playback",
2603                         .channels_min = 1,
2604                         .channels_max = 2,
2605                         .rates = RT5645_STEREO_RATES,
2606                         .formats = RT5645_FORMATS,
2607                 },
2608                 .capture = {
2609                         .stream_name = "AIF2 Capture",
2610                         .channels_min = 1,
2611                         .channels_max = 2,
2612                         .rates = RT5645_STEREO_RATES,
2613                         .formats = RT5645_FORMATS,
2614                 },
2615                 .ops = &rt5645_aif_dai_ops,
2616         },
2617 };
2618
2619 static struct snd_soc_codec_driver soc_codec_dev_rt5645 = {
2620         .probe = rt5645_probe,
2621         .remove = rt5645_remove,
2622         .suspend = rt5645_suspend,
2623         .resume = rt5645_resume,
2624         .set_bias_level = rt5645_set_bias_level,
2625         .idle_bias_off = true,
2626         .controls = rt5645_snd_controls,
2627         .num_controls = ARRAY_SIZE(rt5645_snd_controls),
2628         .dapm_widgets = rt5645_dapm_widgets,
2629         .num_dapm_widgets = ARRAY_SIZE(rt5645_dapm_widgets),
2630         .dapm_routes = rt5645_dapm_routes,
2631         .num_dapm_routes = ARRAY_SIZE(rt5645_dapm_routes),
2632 };
2633
2634 static const struct regmap_config rt5645_regmap = {
2635         .reg_bits = 8,
2636         .val_bits = 16,
2637         .use_single_rw = true,
2638         .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
2639                                                RT5645_PR_SPACING),
2640         .volatile_reg = rt5645_volatile_register,
2641         .readable_reg = rt5645_readable_register,
2642
2643         .cache_type = REGCACHE_RBTREE,
2644         .reg_defaults = rt5645_reg,
2645         .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
2646         .ranges = rt5645_ranges,
2647         .num_ranges = ARRAY_SIZE(rt5645_ranges),
2648 };
2649
2650 static const struct i2c_device_id rt5645_i2c_id[] = {
2651         { "rt5645", 0 },
2652         { "rt5650", 0 },
2653         { }
2654 };
2655 MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
2656
2657 static int rt5645_i2c_probe(struct i2c_client *i2c,
2658                     const struct i2c_device_id *id)
2659 {
2660         struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev);
2661         struct rt5645_priv *rt5645;
2662         int ret;
2663         unsigned int val;
2664
2665         rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
2666                                 GFP_KERNEL);
2667         if (rt5645 == NULL)
2668                 return -ENOMEM;
2669
2670         rt5645->i2c = i2c;
2671         i2c_set_clientdata(i2c, rt5645);
2672
2673         if (pdata)
2674                 rt5645->pdata = *pdata;
2675
2676         rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
2677         if (IS_ERR(rt5645->regmap)) {
2678                 ret = PTR_ERR(rt5645->regmap);
2679                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2680                         ret);
2681                 return ret;
2682         }
2683
2684         regmap_read(rt5645->regmap, RT5645_VENDOR_ID2, &val);
2685
2686         switch (val) {
2687         case RT5645_DEVICE_ID:
2688                 rt5645->codec_type = CODEC_TYPE_RT5645;
2689                 break;
2690         case RT5650_DEVICE_ID:
2691                 rt5645->codec_type = CODEC_TYPE_RT5650;
2692                 break;
2693         default:
2694                 dev_err(&i2c->dev,
2695                         "Device with ID register %x is not rt5645 or rt5650\n",
2696                         val);
2697                 return -ENODEV;
2698         }
2699
2700         regmap_write(rt5645->regmap, RT5645_RESET, 0);
2701
2702         ret = regmap_register_patch(rt5645->regmap, init_list,
2703                                     ARRAY_SIZE(init_list));
2704         if (ret != 0)
2705                 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2706
2707         if (rt5645->codec_type == CODEC_TYPE_RT5650) {
2708                 ret = regmap_register_patch(rt5645->regmap, rt5650_init_list,
2709                                     ARRAY_SIZE(rt5650_init_list));
2710                 if (ret != 0)
2711                         dev_warn(&i2c->dev, "Apply rt5650 patch failed: %d\n",
2712                                            ret);
2713         }
2714
2715         if (rt5645->pdata.in2_diff)
2716                 regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
2717                                         RT5645_IN_DF2, RT5645_IN_DF2);
2718
2719         if (rt5645->pdata.dmic_en) {
2720                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2721                         RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
2722
2723                 switch (rt5645->pdata.dmic1_data_pin) {
2724                 case RT5645_DMIC_DATA_IN2N:
2725                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2726                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
2727                         break;
2728
2729                 case RT5645_DMIC_DATA_GPIO5:
2730                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2731                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
2732                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2733                                 RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
2734                         break;
2735
2736                 case RT5645_DMIC_DATA_GPIO11:
2737                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2738                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
2739                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2740                                 RT5645_GP11_PIN_MASK,
2741                                 RT5645_GP11_PIN_DMIC1_SDA);
2742                         break;
2743
2744                 default:
2745                         break;
2746                 }
2747
2748                 switch (rt5645->pdata.dmic2_data_pin) {
2749                 case RT5645_DMIC_DATA_IN2P:
2750                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2751                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
2752                         break;
2753
2754                 case RT5645_DMIC_DATA_GPIO6:
2755                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2756                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
2757                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2758                                 RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
2759                         break;
2760
2761                 case RT5645_DMIC_DATA_GPIO10:
2762                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2763                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
2764                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2765                                 RT5645_GP10_PIN_MASK,
2766                                 RT5645_GP10_PIN_DMIC2_SDA);
2767                         break;
2768
2769                 case RT5645_DMIC_DATA_GPIO12:
2770                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2771                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
2772                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2773                                 RT5645_GP12_PIN_MASK,
2774                                 RT5645_GP12_PIN_DMIC2_SDA);
2775                         break;
2776
2777                 default:
2778                         break;
2779                 }
2780
2781         }
2782
2783         if (rt5645->pdata.en_jd_func) {
2784                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
2785                         RT5645_IRQ_CLK_GATE_CTRL | RT5645_MICINDET_MANU,
2786                         RT5645_IRQ_CLK_GATE_CTRL | RT5645_MICINDET_MANU);
2787                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
2788                         RT5645_CBJ_BST1_EN, RT5645_CBJ_BST1_EN);
2789                 regmap_update_bits(rt5645->regmap, RT5645_JD_CTRL3,
2790                         RT5645_JD_CBJ_EN | RT5645_JD_CBJ_POL,
2791                         RT5645_JD_CBJ_EN | RT5645_JD_CBJ_POL);
2792                 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
2793                         RT5645_IRQ_CLK_INT, RT5645_IRQ_CLK_INT);
2794         }
2795
2796         if (rt5645->pdata.jd_mode) {
2797                 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
2798                                    RT5645_IRQ_JD_1_1_EN, RT5645_IRQ_JD_1_1_EN);
2799                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
2800                                    RT5645_JD_PSV_MODE, RT5645_JD_PSV_MODE);
2801                 regmap_update_bits(rt5645->regmap, RT5645_HPO_MIXER,
2802                                    RT5645_IRQ_PSV_MODE, RT5645_IRQ_PSV_MODE);
2803                 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
2804                                    RT5645_MIC2_OVCD_EN, RT5645_MIC2_OVCD_EN);
2805                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2806                                    RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
2807                 switch (rt5645->pdata.jd_mode) {
2808                 case 1:
2809                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
2810                                            RT5645_JD1_MODE_MASK,
2811                                            RT5645_JD1_MODE_0);
2812                         break;
2813                 case 2:
2814                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
2815                                            RT5645_JD1_MODE_MASK,
2816                                            RT5645_JD1_MODE_1);
2817                         break;
2818                 case 3:
2819                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
2820                                            RT5645_JD1_MODE_MASK,
2821                                            RT5645_JD1_MODE_2);
2822                         break;
2823                 default:
2824                         break;
2825                 }
2826         }
2827
2828         if (rt5645->i2c->irq) {
2829                 ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq,
2830                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
2831                         | IRQF_ONESHOT, "rt5645", rt5645);
2832                 if (ret)
2833                         dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
2834         }
2835
2836         if (gpio_is_valid(rt5645->pdata.hp_det_gpio)) {
2837                 ret = gpio_request(rt5645->pdata.hp_det_gpio, "rt5645");
2838                 if (ret)
2839                         dev_err(&i2c->dev, "Fail gpio_request hp_det_gpio\n");
2840
2841                 ret = gpio_direction_input(rt5645->pdata.hp_det_gpio);
2842                 if (ret)
2843                         dev_err(&i2c->dev, "Fail gpio_direction hp_det_gpio\n");
2844         }
2845
2846         INIT_DELAYED_WORK(&rt5645->jack_detect_work, rt5645_jack_detect_work);
2847
2848         return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5645,
2849                                       rt5645_dai, ARRAY_SIZE(rt5645_dai));
2850 }
2851
2852 static int rt5645_i2c_remove(struct i2c_client *i2c)
2853 {
2854         struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
2855
2856         if (i2c->irq)
2857                 free_irq(i2c->irq, rt5645);
2858
2859         cancel_delayed_work_sync(&rt5645->jack_detect_work);
2860
2861         if (gpio_is_valid(rt5645->pdata.hp_det_gpio))
2862                 gpio_free(rt5645->pdata.hp_det_gpio);
2863
2864         snd_soc_unregister_codec(&i2c->dev);
2865
2866         return 0;
2867 }
2868
2869 static struct i2c_driver rt5645_i2c_driver = {
2870         .driver = {
2871                 .name = "rt5645",
2872                 .owner = THIS_MODULE,
2873         },
2874         .probe = rt5645_i2c_probe,
2875         .remove   = rt5645_i2c_remove,
2876         .id_table = rt5645_i2c_id,
2877 };
2878 module_i2c_driver(rt5645_i2c_driver);
2879
2880 MODULE_DESCRIPTION("ASoC RT5645 driver");
2881 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
2882 MODULE_LICENSE("GPL v2");