sound/soc/codecs/rt5645.c

   1 /*
   2  * rt5645.c  --  RT5645 ALSA SoC audio codec driver
   3  *
   4  * Copyright 2013 Realtek Semiconductor Corp.
   5  * Author: Bard Liao <bardliao@realtek.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/moduleparam.h>
  14 #include <linux/init.h>
  15 #include <linux/delay.h>
  16 #include <linux/pm.h>
  17 #include <linux/i2c.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/spi/spi.h>
  20 #include <linux/gpio.h>
  21 #include <linux/acpi.h>
  22 #include <linux/dmi.h>
  23 #include <sound/core.h>
  24 #include <sound/pcm.h>
  25 #include <sound/pcm_params.h>
  26 #include <sound/jack.h>
  27 #include <sound/soc.h>
  28 #include <sound/soc-dapm.h>
  29 #include <sound/initval.h>
  30 #include <sound/tlv.h>
  31
  32 #include "rl6231.h"
  33 #include "rt5645.h"
  34
  35 #define RT5645_DEVICE_ID 0x6308
  36 #define RT5650_DEVICE_ID 0x6419
  37
  38 #define RT5645_PR_RANGE_BASE (0xff + 1)
  39 #define RT5645_PR_SPACING 0x100
  40
  41 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
  42
  43 static const struct regmap_range_cfg rt5645_ranges[] = {
  44         {
  45                 .name = "PR",
  46                 .range_min = RT5645_PR_BASE,
  47                 .range_max = RT5645_PR_BASE + 0xf8,
  48                 .selector_reg = RT5645_PRIV_INDEX,
  49                 .selector_mask = 0xff,
  50                 .selector_shift = 0x0,
  51                 .window_start = RT5645_PRIV_DATA,
  52                 .window_len = 0x1,
  53         },
  54 };
  55
  56 static const struct reg_default init_list[] = {
  57         {RT5645_PR_BASE + 0x3d, 0x3600},
  58         {RT5645_PR_BASE + 0x1c, 0xfd20},
  59         {RT5645_PR_BASE + 0x20, 0x611f},
  60         {RT5645_PR_BASE + 0x21, 0x4040},
  61         {RT5645_PR_BASE + 0x23, 0x0004},
  62 };
  63 #define RT5645_INIT_REG_LEN ARRAY_SIZE(init_list)
  64
  65 static const struct reg_default rt5650_init_list[] = {
  66         {0xf6,  0x0100},
  67 };
  68
  69 static const struct reg_default rt5645_reg[] = {
  70         { 0x00, 0x0000 },
  71         { 0x01, 0xc8c8 },
  72         { 0x02, 0xc8c8 },
  73         { 0x03, 0xc8c8 },
  74         { 0x0a, 0x0002 },
  75         { 0x0b, 0x2827 },
  76         { 0x0c, 0xe000 },
  77         { 0x0d, 0x0000 },
  78         { 0x0e, 0x0000 },
  79         { 0x0f, 0x0808 },
  80         { 0x14, 0x3333 },
  81         { 0x16, 0x4b00 },
  82         { 0x18, 0x018b },
  83         { 0x19, 0xafaf },
  84         { 0x1a, 0xafaf },
  85         { 0x1b, 0x0001 },
  86         { 0x1c, 0x2f2f },
  87         { 0x1d, 0x2f2f },
  88         { 0x1e, 0x0000 },
  89         { 0x20, 0x0000 },
  90         { 0x27, 0x7060 },
  91         { 0x28, 0x7070 },
  92         { 0x29, 0x8080 },
  93         { 0x2a, 0x5656 },
  94         { 0x2b, 0x5454 },
  95         { 0x2c, 0xaaa0 },
  96         { 0x2d, 0x0000 },
  97         { 0x2f, 0x1002 },
  98         { 0x31, 0x5000 },
  99         { 0x32, 0x0000 },
 100         { 0x33, 0x0000 },
 101         { 0x34, 0x0000 },
 102         { 0x35, 0x0000 },
 103         { 0x3b, 0x0000 },
 104         { 0x3c, 0x007f },
 105         { 0x3d, 0x0000 },
 106         { 0x3e, 0x007f },
 107         { 0x3f, 0x0000 },
 108         { 0x40, 0x001f },
 109         { 0x41, 0x0000 },
 110         { 0x42, 0x001f },
 111         { 0x45, 0x6000 },
 112         { 0x46, 0x003e },
 113         { 0x47, 0x003e },
 114         { 0x48, 0xf807 },
 115         { 0x4a, 0x0004 },
 116         { 0x4d, 0x0000 },
 117         { 0x4e, 0x0000 },
 118         { 0x4f, 0x01ff },
 119         { 0x50, 0x0000 },
 120         { 0x51, 0x0000 },
 121         { 0x52, 0x01ff },
 122         { 0x53, 0xf000 },
 123         { 0x56, 0x0111 },
 124         { 0x57, 0x0064 },
 125         { 0x58, 0xef0e },
 126         { 0x59, 0xf0f0 },
 127         { 0x5a, 0xef0e },
 128         { 0x5b, 0xf0f0 },
 129         { 0x5c, 0xef0e },
 130         { 0x5d, 0xf0f0 },
 131         { 0x5e, 0xf000 },
 132         { 0x5f, 0x0000 },
 133         { 0x61, 0x0300 },
 134         { 0x62, 0x0000 },
 135         { 0x63, 0x00c2 },
 136         { 0x64, 0x0000 },
 137         { 0x65, 0x0000 },
 138         { 0x66, 0x0000 },
 139         { 0x6a, 0x0000 },
 140         { 0x6c, 0x0aaa },
 141         { 0x70, 0x8000 },
 142         { 0x71, 0x8000 },
 143         { 0x72, 0x8000 },
 144         { 0x73, 0x7770 },
 145         { 0x74, 0x3e00 },
 146         { 0x75, 0x2409 },
 147         { 0x76, 0x000a },
 148         { 0x77, 0x0c00 },
 149         { 0x78, 0x0000 },
 150         { 0x79, 0x0123 },
 151         { 0x80, 0x0000 },
 152         { 0x81, 0x0000 },
 153         { 0x82, 0x0000 },
 154         { 0x83, 0x0000 },
 155         { 0x84, 0x0000 },
 156         { 0x85, 0x0000 },
 157         { 0x8a, 0x0000 },
 158         { 0x8e, 0x0004 },
 159         { 0x8f, 0x1100 },
 160         { 0x90, 0x0646 },
 161         { 0x91, 0x0c06 },
 162         { 0x93, 0x0000 },
 163         { 0x94, 0x0200 },
 164         { 0x95, 0x0000 },
 165         { 0x9a, 0x2184 },
 166         { 0x9b, 0x010a },
 167         { 0x9c, 0x0aea },
 168         { 0x9d, 0x000c },
 169         { 0x9e, 0x0400 },
 170         { 0xa0, 0xa0a8 },
 171         { 0xa1, 0x0059 },
 172         { 0xa2, 0x0001 },
 173         { 0xae, 0x6000 },
 174         { 0xaf, 0x0000 },
 175         { 0xb0, 0x6000 },
 176         { 0xb1, 0x0000 },
 177         { 0xb2, 0x0000 },
 178         { 0xb3, 0x001f },
 179         { 0xb4, 0x020c },
 180         { 0xb5, 0x1f00 },
 181         { 0xb6, 0x0000 },
 182         { 0xbb, 0x0000 },
 183         { 0xbc, 0x0000 },
 184         { 0xbd, 0x0000 },
 185         { 0xbe, 0x0000 },
 186         { 0xbf, 0x3100 },
 187         { 0xc0, 0x0000 },
 188         { 0xc1, 0x0000 },
 189         { 0xc2, 0x0000 },
 190         { 0xc3, 0x2000 },
 191         { 0xcd, 0x0000 },
 192         { 0xce, 0x0000 },
 193         { 0xcf, 0x1813 },
 194         { 0xd0, 0x0690 },
 195         { 0xd1, 0x1c17 },
 196         { 0xd3, 0xb320 },
 197         { 0xd4, 0x0000 },
 198         { 0xd6, 0x0400 },
 199         { 0xd9, 0x0809 },
 200         { 0xda, 0x0000 },
 201         { 0xdb, 0x0003 },
 202         { 0xdc, 0x0049 },
 203         { 0xdd, 0x001b },
 204         { 0xdf, 0x0008 },
 205         { 0xe0, 0x4000 },
 206         { 0xe6, 0x8000 },
 207         { 0xe7, 0x0200 },
 208         { 0xec, 0xb300 },
 209         { 0xed, 0x0000 },
 210         { 0xf0, 0x001f },
 211         { 0xf1, 0x020c },
 212         { 0xf2, 0x1f00 },
 213         { 0xf3, 0x0000 },
 214         { 0xf4, 0x4000 },
 215         { 0xf8, 0x0000 },
 216         { 0xf9, 0x0000 },
 217         { 0xfa, 0x2060 },
 218         { 0xfb, 0x4040 },
 219         { 0xfc, 0x0000 },
 220         { 0xfd, 0x0002 },
 221         { 0xfe, 0x10ec },
 222         { 0xff, 0x6308 },
 223 };
 224
 225 static int rt5645_reset(struct snd_soc_codec *codec)
 226 {
 227         return snd_soc_write(codec, RT5645_RESET, 0);
 228 }
 229
 230 static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
 231 {
 232         int i;
 233
 234         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 235                 if (reg >= rt5645_ranges[i].range_min &&
 236                         reg <= rt5645_ranges[i].range_max) {
 237                         return true;
 238                 }
 239         }
 240
 241         switch (reg) {
 242         case RT5645_RESET:
 243         case RT5645_PRIV_DATA:
 244         case RT5645_IN1_CTRL1:
 245         case RT5645_IN1_CTRL2:
 246         case RT5645_IN1_CTRL3:
 247         case RT5645_A_JD_CTRL1:
 248         case RT5645_ADC_EQ_CTRL1:
 249         case RT5645_EQ_CTRL1:
 250         case RT5645_ALC_CTRL_1:
 251         case RT5645_IRQ_CTRL2:
 252         case RT5645_IRQ_CTRL3:
 253         case RT5645_INT_IRQ_ST:
 254         case RT5645_IL_CMD:
 255         case RT5650_4BTN_IL_CMD1:
 256         case RT5645_VENDOR_ID:
 257         case RT5645_VENDOR_ID1:
 258         case RT5645_VENDOR_ID2:
 259                 return true;
 260         default:
 261                 return false;
 262         }
 263 }
 264
 265 static bool rt5645_readable_register(struct device *dev, unsigned int reg)
 266 {
 267         int i;
 268
 269         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 270                 if (reg >= rt5645_ranges[i].range_min &&
 271                         reg <= rt5645_ranges[i].range_max) {
 272                         return true;
 273                 }
 274         }
 275
 276         switch (reg) {
 277         case RT5645_RESET:
 278         case RT5645_SPK_VOL:
 279         case RT5645_HP_VOL:
 280         case RT5645_LOUT1:
 281         case RT5645_IN1_CTRL1:
 282         case RT5645_IN1_CTRL2:
 283         case RT5645_IN1_CTRL3:
 284         case RT5645_IN2_CTRL:
 285         case RT5645_INL1_INR1_VOL:
 286         case RT5645_SPK_FUNC_LIM:
 287         case RT5645_ADJ_HPF_CTRL:
 288         case RT5645_DAC1_DIG_VOL:
 289         case RT5645_DAC2_DIG_VOL:
 290         case RT5645_DAC_CTRL:
 291         case RT5645_STO1_ADC_DIG_VOL:
 292         case RT5645_MONO_ADC_DIG_VOL:
 293         case RT5645_ADC_BST_VOL1:
 294         case RT5645_ADC_BST_VOL2:
 295         case RT5645_STO1_ADC_MIXER:
 296         case RT5645_MONO_ADC_MIXER:
 297         case RT5645_AD_DA_MIXER:
 298         case RT5645_STO_DAC_MIXER:
 299         case RT5645_MONO_DAC_MIXER:
 300         case RT5645_DIG_MIXER:
 301         case RT5650_A_DAC_SOUR:
 302         case RT5645_DIG_INF1_DATA:
 303         case RT5645_PDM_OUT_CTRL:
 304         case RT5645_REC_L1_MIXER:
 305         case RT5645_REC_L2_MIXER:
 306         case RT5645_REC_R1_MIXER:
 307         case RT5645_REC_R2_MIXER:
 308         case RT5645_HPMIXL_CTRL:
 309         case RT5645_HPOMIXL_CTRL:
 310         case RT5645_HPMIXR_CTRL:
 311         case RT5645_HPOMIXR_CTRL:
 312         case RT5645_HPO_MIXER:
 313         case RT5645_SPK_L_MIXER:
 314         case RT5645_SPK_R_MIXER:
 315         case RT5645_SPO_MIXER:
 316         case RT5645_SPO_CLSD_RATIO:
 317         case RT5645_OUT_L1_MIXER:
 318         case RT5645_OUT_R1_MIXER:
 319         case RT5645_OUT_L_GAIN1:
 320         case RT5645_OUT_L_GAIN2:
 321         case RT5645_OUT_R_GAIN1:
 322         case RT5645_OUT_R_GAIN2:
 323         case RT5645_LOUT_MIXER:
 324         case RT5645_HAPTIC_CTRL1:
 325         case RT5645_HAPTIC_CTRL2:
 326         case RT5645_HAPTIC_CTRL3:
 327         case RT5645_HAPTIC_CTRL4:
 328         case RT5645_HAPTIC_CTRL5:
 329         case RT5645_HAPTIC_CTRL6:
 330         case RT5645_HAPTIC_CTRL7:
 331         case RT5645_HAPTIC_CTRL8:
 332         case RT5645_HAPTIC_CTRL9:
 333         case RT5645_HAPTIC_CTRL10:
 334         case RT5645_PWR_DIG1:
 335         case RT5645_PWR_DIG2:
 336         case RT5645_PWR_ANLG1:
 337         case RT5645_PWR_ANLG2:
 338         case RT5645_PWR_MIXER:
 339         case RT5645_PWR_VOL:
 340         case RT5645_PRIV_INDEX:
 341         case RT5645_PRIV_DATA:
 342         case RT5645_I2S1_SDP:
 343         case RT5645_I2S2_SDP:
 344         case RT5645_ADDA_CLK1:
 345         case RT5645_ADDA_CLK2:
 346         case RT5645_DMIC_CTRL1:
 347         case RT5645_DMIC_CTRL2:
 348         case RT5645_TDM_CTRL_1:
 349         case RT5645_TDM_CTRL_2:
 350         case RT5645_TDM_CTRL_3:
 351         case RT5645_GLB_CLK:
 352         case RT5645_PLL_CTRL1:
 353         case RT5645_PLL_CTRL2:
 354         case RT5645_ASRC_1:
 355         case RT5645_ASRC_2:
 356         case RT5645_ASRC_3:
 357         case RT5645_ASRC_4:
 358         case RT5645_DEPOP_M1:
 359         case RT5645_DEPOP_M2:
 360         case RT5645_DEPOP_M3:
 361         case RT5645_MICBIAS:
 362         case RT5645_A_JD_CTRL1:
 363         case RT5645_VAD_CTRL4:
 364         case RT5645_CLSD_OUT_CTRL:
 365         case RT5645_ADC_EQ_CTRL1:
 366         case RT5645_ADC_EQ_CTRL2:
 367         case RT5645_EQ_CTRL1:
 368         case RT5645_EQ_CTRL2:
 369         case RT5645_ALC_CTRL_1:
 370         case RT5645_ALC_CTRL_2:
 371         case RT5645_ALC_CTRL_3:
 372         case RT5645_ALC_CTRL_4:
 373         case RT5645_ALC_CTRL_5:
 374         case RT5645_JD_CTRL:
 375         case RT5645_IRQ_CTRL1:
 376         case RT5645_IRQ_CTRL2:
 377         case RT5645_IRQ_CTRL3:
 378         case RT5645_INT_IRQ_ST:
 379         case RT5645_GPIO_CTRL1:
 380         case RT5645_GPIO_CTRL2:
 381         case RT5645_GPIO_CTRL3:
 382         case RT5645_BASS_BACK:
 383         case RT5645_MP3_PLUS1:
 384         case RT5645_MP3_PLUS2:
 385         case RT5645_ADJ_HPF1:
 386         case RT5645_ADJ_HPF2:
 387         case RT5645_HP_CALIB_AMP_DET:
 388         case RT5645_SV_ZCD1:
 389         case RT5645_SV_ZCD2:
 390         case RT5645_IL_CMD:
 391         case RT5645_IL_CMD2:
 392         case RT5645_IL_CMD3:
 393         case RT5650_4BTN_IL_CMD1:
 394         case RT5650_4BTN_IL_CMD2:
 395         case RT5645_DRC1_HL_CTRL1:
 396         case RT5645_DRC2_HL_CTRL1:
 397         case RT5645_ADC_MONO_HP_CTRL1:
 398         case RT5645_ADC_MONO_HP_CTRL2:
 399         case RT5645_DRC2_CTRL1:
 400         case RT5645_DRC2_CTRL2:
 401         case RT5645_DRC2_CTRL3:
 402         case RT5645_DRC2_CTRL4:
 403         case RT5645_DRC2_CTRL5:
 404         case RT5645_JD_CTRL3:
 405         case RT5645_JD_CTRL4:
 406         case RT5645_GEN_CTRL1:
 407         case RT5645_GEN_CTRL2:
 408         case RT5645_GEN_CTRL3:
 409         case RT5645_VENDOR_ID:
 410         case RT5645_VENDOR_ID1:
 411         case RT5645_VENDOR_ID2:
 412                 return true;
 413         default:
 414                 return false;
 415         }
 416 }
 417
 418 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
 419 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
 420 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
 421 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
 422 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
 423
 424 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
 425 static unsigned int bst_tlv[] = {
 426         TLV_DB_RANGE_HEAD(7),
 427         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
 428         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
 429         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
 430         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
 431         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
 432         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
 433         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
 434 };
 435
 436 static const char * const rt5645_tdm_data_swap_select[] = {
 437         "L/R", "R/L", "L/L", "R/R"
 438 };
 439
 440 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
 441         RT5645_TDM_CTRL_1, 6, rt5645_tdm_data_swap_select);
 442
 443 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
 444         RT5645_TDM_CTRL_1, 4, rt5645_tdm_data_swap_select);
 445
 446 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
 447         RT5645_TDM_CTRL_1, 2, rt5645_tdm_data_swap_select);
 448
 449 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot6_7_enum,
 450         RT5645_TDM_CTRL_1, 0, rt5645_tdm_data_swap_select);
 451
 452 static const char * const rt5645_tdm_adc_data_select[] = {
 453         "1/2/R", "2/1/R", "R/1/2", "R/2/1"
 454 };
 455
 456 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_sel_enum,
 457                                 RT5645_TDM_CTRL_1, 8,
 458                                 rt5645_tdm_adc_data_select);
 459
 460 static const struct snd_kcontrol_new rt5645_snd_controls[] = {
 461         /* Speaker Output Volume */
 462         SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
 463                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 464         SOC_DOUBLE_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
 465                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 466
 467         /* Headphone Output Volume */
 468         SOC_DOUBLE("HP Channel Switch", RT5645_HP_VOL,
 469                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 470         SOC_DOUBLE_TLV("HP Playback Volume", RT5645_HP_VOL,
 471                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 472
 473         /* OUTPUT Control */
 474         SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
 475                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 476         SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
 477                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 478         SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
 479                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 480
 481         /* DAC Digital Volume */
 482         SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
 483                 RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
 484         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
 485                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
 486         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
 487                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
 488
 489         /* IN1/IN2 Control */
 490         SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
 491                 RT5645_BST_SFT1, 8, 0, bst_tlv),
 492         SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
 493                 RT5645_BST_SFT2, 8, 0, bst_tlv),
 494
 495         /* INL/INR Volume Control */
 496         SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
 497                 RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
 498
 499         /* ADC Digital Volume Control */
 500         SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
 501                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 502         SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
 503                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
 504         SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
 505                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 506         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
 507                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
 508
 509         /* ADC Boost Volume Control */
 510         SOC_DOUBLE_TLV("STO1 ADC Boost Gain", RT5645_ADC_BST_VOL1,
 511                 RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
 512                 adc_bst_tlv),
 513         SOC_DOUBLE_TLV("STO2 ADC Boost Gain", RT5645_ADC_BST_VOL1,
 514                 RT5645_STO2_ADC_L_BST_SFT, RT5645_STO2_ADC_R_BST_SFT, 3, 0,
 515                 adc_bst_tlv),
 516
 517         /* I2S2 function select */
 518         SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
 519                 1, 1),
 520
 521         /* TDM */
 522         SOC_ENUM("TDM Adc Slot0 1 Data", rt5645_tdm_adc_slot0_1_enum),
 523         SOC_ENUM("TDM Adc Slot2 3 Data", rt5645_tdm_adc_slot2_3_enum),
 524         SOC_ENUM("TDM Adc Slot4 5 Data", rt5645_tdm_adc_slot4_5_enum),
 525         SOC_ENUM("TDM Adc Slot6 7 Data", rt5645_tdm_adc_slot6_7_enum),
 526         SOC_ENUM("TDM IF1 ADC DATA Sel", rt5645_tdm_adc_sel_enum),
 527         SOC_SINGLE("TDM IF1_DAC1_L Sel", RT5645_TDM_CTRL_3, 12, 7, 0),
 528         SOC_SINGLE("TDM IF1_DAC1_R Sel", RT5645_TDM_CTRL_3, 8, 7, 0),
 529         SOC_SINGLE("TDM IF1_DAC2_L Sel", RT5645_TDM_CTRL_3, 4, 7, 0),
 530         SOC_SINGLE("TDM IF1_DAC2_R Sel", RT5645_TDM_CTRL_3, 0, 7, 0),
 531 };
 532
 533 /**
 534  * set_dmic_clk - Set parameter of dmic.
 535  *
 536  * @w: DAPM widget.
 537  * @kcontrol: The kcontrol of this widget.
 538  * @event: Event id.
 539  *
 540  */
 541 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
 542         struct snd_kcontrol *kcontrol, int event)
 543 {
 544         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 545         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
 546         int idx = -EINVAL;
 547
 548         idx = rl6231_calc_dmic_clk(rt5645->sysclk);
 549
 550         if (idx < 0)
 551                 dev_err(codec->dev, "Failed to set DMIC clock\n");
 552         else
 553                 snd_soc_update_bits(codec, RT5645_DMIC_CTRL1,
 554                         RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
 555         return idx;
 556 }
 557
 558 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
 559                          struct snd_soc_dapm_widget *sink)
 560 {
 561         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
 562         unsigned int val;
 563
 564         val = snd_soc_read(codec, RT5645_GLB_CLK);
 565         val &= RT5645_SCLK_SRC_MASK;
 566         if (val == RT5645_SCLK_SRC_PLL1)
 567                 return 1;
 568         else
 569                 return 0;
 570 }
 571
 572 static int is_using_asrc(struct snd_soc_dapm_widget *source,
 573                          struct snd_soc_dapm_widget *sink)
 574 {
 575         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
 576         unsigned int reg, shift, val;
 577
 578         switch (source->shift) {
 579         case 0:
 580                 reg = RT5645_ASRC_3;
 581                 shift = 0;
 582                 break;
 583         case 1:
 584                 reg = RT5645_ASRC_3;
 585                 shift = 4;
 586                 break;
 587         case 3:
 588                 reg = RT5645_ASRC_2;
 589                 shift = 0;
 590                 break;
 591         case 8:
 592                 reg = RT5645_ASRC_2;
 593                 shift = 4;
 594                 break;
 595         case 9:
 596                 reg = RT5645_ASRC_2;
 597                 shift = 8;
 598                 break;
 599         case 10:
 600                 reg = RT5645_ASRC_2;
 601                 shift = 12;
 602                 break;
 603         default:
 604                 return 0;
 605         }
 606
 607         val = (snd_soc_read(codec, reg) >> shift) & 0xf;
 608         switch (val) {
 609         case 1:
 610         case 2:
 611         case 3:
 612         case 4:
 613                 return 1;
 614         default:
 615                 return 0;
 616         }
 617
 618 }
 619
 620 /**
 621  * rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters
 622  * @codec: SoC audio codec device.
 623  * @filter_mask: mask of filters.
 624  * @clk_src: clock source
 625  *
 626  * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can
 627  * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
 628  * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
 629  * ASRC function will track i2s clock and generate a corresponding system clock
 630  * for codec. This function provides an API to select the clock source for a
 631  * set of filters specified by the mask. And the codec driver will turn on ASRC
 632  * for these filters if ASRC is selected as their clock source.
 633  */
 634 int rt5645_sel_asrc_clk_src(struct snd_soc_codec *codec,
 635                 unsigned int filter_mask, unsigned int clk_src)
 636 {
 637         unsigned int asrc2_mask = 0;
 638         unsigned int asrc2_value = 0;
 639         unsigned int asrc3_mask = 0;
 640         unsigned int asrc3_value = 0;
 641
 642         switch (clk_src) {
 643         case RT5645_CLK_SEL_SYS:
 644         case RT5645_CLK_SEL_I2S1_ASRC:
 645         case RT5645_CLK_SEL_I2S2_ASRC:
 646         case RT5645_CLK_SEL_SYS2:
 647                 break;
 648
 649         default:
 650                 return -EINVAL;
 651         }
 652
 653         if (filter_mask & RT5645_DA_STEREO_FILTER) {
 654                 asrc2_mask |= RT5645_DA_STO_CLK_SEL_MASK;
 655                 asrc2_value = (asrc2_value & ~RT5645_DA_STO_CLK_SEL_MASK)
 656                         | (clk_src << RT5645_DA_STO_CLK_SEL_SFT);
 657         }
 658
 659         if (filter_mask & RT5645_DA_MONO_L_FILTER) {
 660                 asrc2_mask |= RT5645_DA_MONOL_CLK_SEL_MASK;
 661                 asrc2_value = (asrc2_value & ~RT5645_DA_MONOL_CLK_SEL_MASK)
 662                         | (clk_src << RT5645_DA_MONOL_CLK_SEL_SFT);
 663         }
 664
 665         if (filter_mask & RT5645_DA_MONO_R_FILTER) {
 666                 asrc2_mask |= RT5645_DA_MONOR_CLK_SEL_MASK;
 667                 asrc2_value = (asrc2_value & ~RT5645_DA_MONOR_CLK_SEL_MASK)
 668                         | (clk_src << RT5645_DA_MONOR_CLK_SEL_SFT);
 669         }
 670
 671         if (filter_mask & RT5645_AD_STEREO_FILTER) {
 672                 asrc2_mask |= RT5645_AD_STO1_CLK_SEL_MASK;
 673                 asrc2_value = (asrc2_value & ~RT5645_AD_STO1_CLK_SEL_MASK)
 674                         | (clk_src << RT5645_AD_STO1_CLK_SEL_SFT);
 675         }
 676
 677         if (filter_mask & RT5645_AD_MONO_L_FILTER) {
 678                 asrc3_mask |= RT5645_AD_MONOL_CLK_SEL_MASK;
 679                 asrc3_value = (asrc3_value & ~RT5645_AD_MONOL_CLK_SEL_MASK)
 680                         | (clk_src << RT5645_AD_MONOL_CLK_SEL_SFT);
 681         }
 682
 683         if (filter_mask & RT5645_AD_MONO_R_FILTER)  {
 684                 asrc3_mask |= RT5645_AD_MONOR_CLK_SEL_MASK;
 685                 asrc3_value = (asrc3_value & ~RT5645_AD_MONOR_CLK_SEL_MASK)
 686                         | (clk_src << RT5645_AD_MONOR_CLK_SEL_SFT);
 687         }
 688
 689         if (asrc2_mask)
 690                 snd_soc_update_bits(codec, RT5645_ASRC_2,
 691                         asrc2_mask, asrc2_value);
 692
 693         if (asrc3_mask)
 694                 snd_soc_update_bits(codec, RT5645_ASRC_3,
 695                         asrc3_mask, asrc3_value);
 696
 697         return 0;
 698 }
 699 EXPORT_SYMBOL_GPL(rt5645_sel_asrc_clk_src);
 700
 701 /* Digital Mixer */
 702 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
 703         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
 704                         RT5645_M_ADC_L1_SFT, 1, 1),
 705         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
 706                         RT5645_M_ADC_L2_SFT, 1, 1),
 707 };
 708
 709 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
 710         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
 711                         RT5645_M_ADC_R1_SFT, 1, 1),
 712         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
 713                         RT5645_M_ADC_R2_SFT, 1, 1),
 714 };
 715
 716 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
 717         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
 718                         RT5645_M_MONO_ADC_L1_SFT, 1, 1),
 719         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
 720                         RT5645_M_MONO_ADC_L2_SFT, 1, 1),
 721 };
 722
 723 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
 724         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
 725                         RT5645_M_MONO_ADC_R1_SFT, 1, 1),
 726         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
 727                         RT5645_M_MONO_ADC_R2_SFT, 1, 1),
 728 };
 729
 730 static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
 731         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
 732                         RT5645_M_ADCMIX_L_SFT, 1, 1),
 733         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
 734                         RT5645_M_DAC1_L_SFT, 1, 1),
 735 };
 736
 737 static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
 738         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
 739                         RT5645_M_ADCMIX_R_SFT, 1, 1),
 740         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
 741                         RT5645_M_DAC1_R_SFT, 1, 1),
 742 };
 743
 744 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
 745         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
 746                         RT5645_M_DAC_L1_SFT, 1, 1),
 747         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
 748                         RT5645_M_DAC_L2_SFT, 1, 1),
 749         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
 750                         RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
 751 };
 752
 753 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
 754         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
 755                         RT5645_M_DAC_R1_SFT, 1, 1),
 756         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
 757                         RT5645_M_DAC_R2_SFT, 1, 1),
 758         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
 759                         RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
 760 };
 761
 762 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
 763         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
 764                         RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
 765         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
 766                         RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
 767         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
 768                         RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
 769 };
 770
 771 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
 772         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
 773                         RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
 774         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
 775                         RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
 776         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
 777                         RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
 778 };
 779
 780 static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
 781         SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
 782                         RT5645_M_STO_L_DAC_L_SFT, 1, 1),
 783         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
 784                         RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
 785         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
 786                         RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
 787 };
 788
 789 static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
 790         SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
 791                         RT5645_M_STO_R_DAC_R_SFT, 1, 1),
 792         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
 793                         RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
 794         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
 795                         RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
 796 };
 797
 798 /* Analog Input Mixer */
 799 static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
 800         SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
 801                         RT5645_M_HP_L_RM_L_SFT, 1, 1),
 802         SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
 803                         RT5645_M_IN_L_RM_L_SFT, 1, 1),
 804         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
 805                         RT5645_M_BST2_RM_L_SFT, 1, 1),
 806         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
 807                         RT5645_M_BST1_RM_L_SFT, 1, 1),
 808         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
 809                         RT5645_M_OM_L_RM_L_SFT, 1, 1),
 810 };
 811
 812 static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
 813         SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
 814                         RT5645_M_HP_R_RM_R_SFT, 1, 1),
 815         SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
 816                         RT5645_M_IN_R_RM_R_SFT, 1, 1),
 817         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
 818                         RT5645_M_BST2_RM_R_SFT, 1, 1),
 819         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
 820                         RT5645_M_BST1_RM_R_SFT, 1, 1),
 821         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
 822                         RT5645_M_OM_R_RM_R_SFT, 1, 1),
 823 };
 824
 825 static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
 826         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
 827                         RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
 828         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
 829                         RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
 830         SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
 831                         RT5645_M_IN_L_SM_L_SFT, 1, 1),
 832         SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
 833                         RT5645_M_BST1_L_SM_L_SFT, 1, 1),
 834 };
 835
 836 static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
 837         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
 838                         RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
 839         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
 840                         RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
 841         SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
 842                         RT5645_M_IN_R_SM_R_SFT, 1, 1),
 843         SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
 844                         RT5645_M_BST2_R_SM_R_SFT, 1, 1),
 845 };
 846
 847 static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
 848         SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
 849                         RT5645_M_BST1_OM_L_SFT, 1, 1),
 850         SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
 851                         RT5645_M_IN_L_OM_L_SFT, 1, 1),
 852         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
 853                         RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
 854         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
 855                         RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
 856 };
 857
 858 static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
 859         SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
 860                         RT5645_M_BST2_OM_R_SFT, 1, 1),
 861         SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
 862                         RT5645_M_IN_R_OM_R_SFT, 1, 1),
 863         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
 864                         RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
 865         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
 866                         RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
 867 };
 868
 869 static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
 870         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
 871                         RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
 872         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
 873                         RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
 874         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
 875                         RT5645_M_SV_R_SPM_L_SFT, 1, 1),
 876         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
 877                         RT5645_M_SV_L_SPM_L_SFT, 1, 1),
 878 };
 879
 880 static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
 881         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
 882                         RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
 883         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
 884                         RT5645_M_SV_R_SPM_R_SFT, 1, 1),
 885 };
 886
 887 static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
 888         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
 889                         RT5645_M_DAC1_HM_SFT, 1, 1),
 890         SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
 891                         RT5645_M_HPVOL_HM_SFT, 1, 1),
 892 };
 893
 894 static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
 895         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
 896                         RT5645_M_DAC1_HV_SFT, 1, 1),
 897         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
 898                         RT5645_M_DAC2_HV_SFT, 1, 1),
 899         SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
 900                         RT5645_M_IN_HV_SFT, 1, 1),
 901         SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
 902                         RT5645_M_BST1_HV_SFT, 1, 1),
 903 };
 904
 905 static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
 906         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
 907                         RT5645_M_DAC1_HV_SFT, 1, 1),
 908         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
 909                         RT5645_M_DAC2_HV_SFT, 1, 1),
 910         SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
 911                         RT5645_M_IN_HV_SFT, 1, 1),
 912         SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
 913                         RT5645_M_BST2_HV_SFT, 1, 1),
 914 };
 915
 916 static const struct snd_kcontrol_new rt5645_lout_mix[] = {
 917         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
 918                         RT5645_M_DAC_L1_LM_SFT, 1, 1),
 919         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
 920                         RT5645_M_DAC_R1_LM_SFT, 1, 1),
 921         SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
 922                         RT5645_M_OV_L_LM_SFT, 1, 1),
 923         SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
 924                         RT5645_M_OV_R_LM_SFT, 1, 1),
 925 };
 926
 927 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
 928 static const char * const rt5645_dac1_src[] = {
 929         "IF1 DAC", "IF2 DAC", "IF3 DAC"
 930 };
 931
 932 static SOC_ENUM_SINGLE_DECL(
 933         rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
 934         RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
 935
 936 static const struct snd_kcontrol_new rt5645_dac1l_mux =
 937         SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
 938
 939 static SOC_ENUM_SINGLE_DECL(
 940         rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
 941         RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
 942
 943 static const struct snd_kcontrol_new rt5645_dac1r_mux =
 944         SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
 945
 946 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
 947 static const char * const rt5645_dac12_src[] = {
 948         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
 949 };
 950
 951 static SOC_ENUM_SINGLE_DECL(
 952         rt5645_dac2l_enum, RT5645_DAC_CTRL,
 953         RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
 954
 955 static const struct snd_kcontrol_new rt5645_dac_l2_mux =
 956         SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
 957
 958 static const char * const rt5645_dacr2_src[] = {
 959         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
 960 };
 961
 962 static SOC_ENUM_SINGLE_DECL(
 963         rt5645_dac2r_enum, RT5645_DAC_CTRL,
 964         RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
 965
 966 static const struct snd_kcontrol_new rt5645_dac_r2_mux =
 967         SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
 968
 969
 970 /* INL/R source */
 971 static const char * const rt5645_inl_src[] = {
 972         "IN2P", "MonoP"
 973 };
 974
 975 static SOC_ENUM_SINGLE_DECL(
 976         rt5645_inl_enum, RT5645_INL1_INR1_VOL,
 977         RT5645_INL_SEL_SFT, rt5645_inl_src);
 978
 979 static const struct snd_kcontrol_new rt5645_inl_mux =
 980         SOC_DAPM_ENUM("INL source", rt5645_inl_enum);
 981
 982 static const char * const rt5645_inr_src[] = {
 983         "IN2N", "MonoN"
 984 };
 985
 986 static SOC_ENUM_SINGLE_DECL(
 987         rt5645_inr_enum, RT5645_INL1_INR1_VOL,
 988         RT5645_INR_SEL_SFT, rt5645_inr_src);
 989
 990 static const struct snd_kcontrol_new rt5645_inr_mux =
 991         SOC_DAPM_ENUM("INR source", rt5645_inr_enum);
 992
 993 /* Stereo1 ADC source */
 994 /* MX-27 [12] */
 995 static const char * const rt5645_stereo_adc1_src[] = {
 996         "DAC MIX", "ADC"
 997 };
 998
 999 static SOC_ENUM_SINGLE_DECL(
1000         rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
1001         RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
1002
1003 static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
1004         SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
1005
1006 /* MX-27 [11] */
1007 static const char * const rt5645_stereo_adc2_src[] = {
1008         "DAC MIX", "DMIC"
1009 };
1010
1011 static SOC_ENUM_SINGLE_DECL(
1012         rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
1013         RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
1014
1015 static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
1016         SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
1017
1018 /* MX-27 [8] */
1019 static const char * const rt5645_stereo_dmic_src[] = {
1020         "DMIC1", "DMIC2"
1021 };
1022
1023 static SOC_ENUM_SINGLE_DECL(
1024         rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
1025         RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
1026
1027 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
1028         SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
1029
1030 /* Mono ADC source */
1031 /* MX-28 [12] */
1032 static const char * const rt5645_mono_adc_l1_src[] = {
1033         "Mono DAC MIXL", "ADC"
1034 };
1035
1036 static SOC_ENUM_SINGLE_DECL(
1037         rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
1038         RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
1039
1040 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
1041         SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
1042 /* MX-28 [11] */
1043 static const char * const rt5645_mono_adc_l2_src[] = {
1044         "Mono DAC MIXL", "DMIC"
1045 };
1046
1047 static SOC_ENUM_SINGLE_DECL(
1048         rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
1049         RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
1050
1051 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
1052         SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
1053
1054 /* MX-28 [8] */
1055 static const char * const rt5645_mono_dmic_src[] = {
1056         "DMIC1", "DMIC2"
1057 };
1058
1059 static SOC_ENUM_SINGLE_DECL(
1060         rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
1061         RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
1062
1063 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
1064         SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
1065 /* MX-28 [1:0] */
1066 static SOC_ENUM_SINGLE_DECL(
1067         rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
1068         RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
1069
1070 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
1071         SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
1072 /* MX-28 [4] */
1073 static const char * const rt5645_mono_adc_r1_src[] = {
1074         "Mono DAC MIXR", "ADC"
1075 };
1076
1077 static SOC_ENUM_SINGLE_DECL(
1078         rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
1079         RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
1080
1081 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
1082         SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
1083 /* MX-28 [3] */
1084 static const char * const rt5645_mono_adc_r2_src[] = {
1085         "Mono DAC MIXR", "DMIC"
1086 };
1087
1088 static SOC_ENUM_SINGLE_DECL(
1089         rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
1090         RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
1091
1092 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
1093         SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
1094
1095 /* MX-77 [9:8] */
1096 static const char * const rt5645_if1_adc_in_src[] = {
1097         "IF_ADC1", "IF_ADC2", "VAD_ADC"
1098 };
1099
1100 static SOC_ENUM_SINGLE_DECL(
1101         rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
1102         RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
1103
1104 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
1105         SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
1106
1107 /* MX-2d [3] [2] */
1108 static const char * const rt5650_a_dac1_src[] = {
1109         "DAC1", "Stereo DAC Mixer"
1110 };
1111
1112 static SOC_ENUM_SINGLE_DECL(
1113         rt5650_a_dac1_l_enum, RT5650_A_DAC_SOUR,
1114         RT5650_A_DAC1_L_IN_SFT, rt5650_a_dac1_src);
1115
1116 static const struct snd_kcontrol_new rt5650_a_dac1_l_mux =
1117         SOC_DAPM_ENUM("A DAC1 L source", rt5650_a_dac1_l_enum);
1118
1119 static SOC_ENUM_SINGLE_DECL(
1120         rt5650_a_dac1_r_enum, RT5650_A_DAC_SOUR,
1121         RT5650_A_DAC1_R_IN_SFT, rt5650_a_dac1_src);
1122
1123 static const struct snd_kcontrol_new rt5650_a_dac1_r_mux =
1124         SOC_DAPM_ENUM("A DAC1 R source", rt5650_a_dac1_r_enum);
1125
1126 /* MX-2d [1] [0] */
1127 static const char * const rt5650_a_dac2_src[] = {
1128         "Stereo DAC Mixer", "Mono DAC Mixer"
1129 };
1130
1131 static SOC_ENUM_SINGLE_DECL(
1132         rt5650_a_dac2_l_enum, RT5650_A_DAC_SOUR,
1133         RT5650_A_DAC2_L_IN_SFT, rt5650_a_dac2_src);
1134
1135 static const struct snd_kcontrol_new rt5650_a_dac2_l_mux =
1136         SOC_DAPM_ENUM("A DAC2 L source", rt5650_a_dac2_l_enum);
1137
1138 static SOC_ENUM_SINGLE_DECL(
1139         rt5650_a_dac2_r_enum, RT5650_A_DAC_SOUR,
1140         RT5650_A_DAC2_R_IN_SFT, rt5650_a_dac2_src);
1141
1142 static const struct snd_kcontrol_new rt5650_a_dac2_r_mux =
1143         SOC_DAPM_ENUM("A DAC2 R source", rt5650_a_dac2_r_enum);
1144
1145 /* MX-2F [13:12] */
1146 static const char * const rt5645_if2_adc_in_src[] = {
1147         "IF_ADC1", "IF_ADC2", "VAD_ADC"
1148 };
1149
1150 static SOC_ENUM_SINGLE_DECL(
1151         rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
1152         RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
1153
1154 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
1155         SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
1156
1157 /* MX-2F [1:0] */
1158 static const char * const rt5645_if3_adc_in_src[] = {
1159         "IF_ADC1", "IF_ADC2", "VAD_ADC"
1160 };
1161
1162 static SOC_ENUM_SINGLE_DECL(
1163         rt5645_if3_adc_in_enum, RT5645_DIG_INF1_DATA,
1164         RT5645_IF3_ADC_IN_SFT, rt5645_if3_adc_in_src);
1165
1166 static const struct snd_kcontrol_new rt5645_if3_adc_in_mux =
1167         SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum);
1168
1169 /* MX-31 [15] [13] [11] [9] */
1170 static const char * const rt5645_pdm_src[] = {
1171         "Mono DAC", "Stereo DAC"
1172 };
1173
1174 static SOC_ENUM_SINGLE_DECL(
1175         rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
1176         RT5645_PDM1_L_SFT, rt5645_pdm_src);
1177
1178 static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
1179         SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
1180
1181 static SOC_ENUM_SINGLE_DECL(
1182         rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
1183         RT5645_PDM1_R_SFT, rt5645_pdm_src);
1184
1185 static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1186         SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1187
1188 /* MX-9D [9:8] */
1189 static const char * const rt5645_vad_adc_src[] = {
1190         "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1191 };
1192
1193 static SOC_ENUM_SINGLE_DECL(
1194         rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1195         RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1196
1197 static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1198         SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1199
1200 static const struct snd_kcontrol_new spk_l_vol_control =
1201         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1202                 RT5645_L_MUTE_SFT, 1, 1);
1203
1204 static const struct snd_kcontrol_new spk_r_vol_control =
1205         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1206                 RT5645_R_MUTE_SFT, 1, 1);
1207
1208 static const struct snd_kcontrol_new hp_l_vol_control =
1209         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1210                 RT5645_L_MUTE_SFT, 1, 1);
1211
1212 static const struct snd_kcontrol_new hp_r_vol_control =
1213         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1214                 RT5645_R_MUTE_SFT, 1, 1);
1215
1216 static const struct snd_kcontrol_new pdm1_l_vol_control =
1217         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1218                 RT5645_M_PDM1_L, 1, 1);
1219
1220 static const struct snd_kcontrol_new pdm1_r_vol_control =
1221         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1222                 RT5645_M_PDM1_R, 1, 1);
1223
1224 static void hp_amp_power(struct snd_soc_codec *codec, int on)
1225 {
1226         static int hp_amp_power_count;
1227         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1228
1229         if (on) {
1230                 if (hp_amp_power_count <= 0) {
1231                         /* depop parameters */
1232                         snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1233                                 RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1234                         snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d);
1235                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1236                                 RT5645_HP_DCC_INT1, 0x9f01);
1237                         mdelay(150);
1238                         /* headphone amp power on */
1239                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1240                                 RT5645_PWR_FV1 | RT5645_PWR_FV2 , 0);
1241                         snd_soc_update_bits(codec, RT5645_PWR_VOL,
1242                                 RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1243                                 RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1244                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1245                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1246                                 RT5645_PWR_HA,
1247                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1248                                 RT5645_PWR_HA);
1249                         mdelay(5);
1250                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1251                                 RT5645_PWR_FV1 | RT5645_PWR_FV2,
1252                                 RT5645_PWR_FV1 | RT5645_PWR_FV2);
1253
1254                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1255                                 RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1256                                 RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1257                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1258                                 0x14, 0x1aaa);
1259                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1260                                 0x24, 0x0430);
1261                 }
1262                 hp_amp_power_count++;
1263         } else {
1264                 hp_amp_power_count--;
1265                 if (hp_amp_power_count <= 0) {
1266                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1267                                 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1268                                 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1269                                 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1270                         /* headphone amp power down */
1271                         snd_soc_write(codec, RT5645_DEPOP_M1, 0x0000);
1272                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1273                                 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1274                                 RT5645_PWR_HA, 0);
1275                         snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1276                                 RT5645_DEPOP_MASK, 0);
1277                 }
1278         }
1279 }
1280
1281 static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1282         struct snd_kcontrol *kcontrol, int event)
1283 {
1284         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1285         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1286
1287         switch (event) {
1288         case SND_SOC_DAPM_POST_PMU:
1289                 hp_amp_power(codec, 1);
1290                 /* headphone unmute sequence */
1291                 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1292                         snd_soc_write(codec, RT5645_DEPOP_M3, 0x0737);
1293                 } else {
1294                         snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1295                                 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1296                                 RT5645_CP_FQ3_MASK,
1297                                 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1298                                 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1299                                 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1300                 }
1301                 regmap_write(rt5645->regmap,
1302                         RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1303                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1304                         RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1305                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1306                         RT5645_RSTN_MASK, RT5645_RSTN_EN);
1307                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1308                         RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1309                         RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1310                         RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1311                 msleep(40);
1312                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1313                         RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1314                         RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1315                         RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1316                 break;
1317
1318         case SND_SOC_DAPM_PRE_PMD:
1319                 /* headphone mute sequence */
1320                 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1321                         snd_soc_write(codec, RT5645_DEPOP_M3, 0x0737);
1322                 } else {
1323                         snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1324                                 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1325                                 RT5645_CP_FQ3_MASK,
1326                                 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1327                                 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1328                                 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1329                 }
1330                 regmap_write(rt5645->regmap,
1331                         RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1332                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1333                         RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1334                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1335                         RT5645_RSTP_MASK, RT5645_RSTP_EN);
1336                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1337                         RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1338                         RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1339                         RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1340                 msleep(30);
1341                 hp_amp_power(codec, 0);
1342                 break;
1343
1344         default:
1345                 return 0;
1346         }
1347
1348         return 0;
1349 }
1350
1351 static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1352         struct snd_kcontrol *kcontrol, int event)
1353 {
1354         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1355
1356         switch (event) {
1357         case SND_SOC_DAPM_POST_PMU:
1358                 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1359                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1360                         RT5645_PWR_CLS_D_L,
1361                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1362                         RT5645_PWR_CLS_D_L);
1363                 break;
1364
1365         case SND_SOC_DAPM_PRE_PMD:
1366                 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1367                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1368                         RT5645_PWR_CLS_D_L, 0);
1369                 break;
1370
1371         default:
1372                 return 0;
1373         }
1374
1375         return 0;
1376 }
1377
1378 static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1379         struct snd_kcontrol *kcontrol, int event)
1380 {
1381         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1382
1383         switch (event) {
1384         case SND_SOC_DAPM_POST_PMU:
1385                 hp_amp_power(codec, 1);
1386                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1387                         RT5645_PWR_LM, RT5645_PWR_LM);
1388                 snd_soc_update_bits(codec, RT5645_LOUT1,
1389                         RT5645_L_MUTE | RT5645_R_MUTE, 0);
1390                 break;
1391
1392         case SND_SOC_DAPM_PRE_PMD:
1393                 snd_soc_update_bits(codec, RT5645_LOUT1,
1394                         RT5645_L_MUTE | RT5645_R_MUTE,
1395                         RT5645_L_MUTE | RT5645_R_MUTE);
1396                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1397                         RT5645_PWR_LM, 0);
1398                 hp_amp_power(codec, 0);
1399                 break;
1400
1401         default:
1402                 return 0;
1403         }
1404
1405         return 0;
1406 }
1407
1408 static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1409         struct snd_kcontrol *kcontrol, int event)
1410 {
1411         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1412
1413         switch (event) {
1414         case SND_SOC_DAPM_POST_PMU:
1415                 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1416                         RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1417                 break;
1418
1419         case SND_SOC_DAPM_PRE_PMD:
1420                 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1421                         RT5645_PWR_BST2_P, 0);
1422                 break;
1423
1424         default:
1425                 return 0;
1426         }
1427
1428         return 0;
1429 }
1430
1431 static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1432         SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1433                 RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1434         SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1435                 RT5645_PWR_PLL_BIT, 0, NULL, 0),
1436
1437         SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1438                 RT5645_PWR_JD1_BIT, 0, NULL, 0),
1439         SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1440                 RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1441
1442         /* ASRC */
1443         SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1,
1444                               11, 0, NULL, 0),
1445         SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1,
1446                               12, 0, NULL, 0),
1447         SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1,
1448                               10, 0, NULL, 0),
1449         SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1,
1450                               9, 0, NULL, 0),
1451         SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1,
1452                               8, 0, NULL, 0),
1453         SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1,
1454                               7, 0, NULL, 0),
1455         SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1,
1456                               5, 0, NULL, 0),
1457         SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1,
1458                               4, 0, NULL, 0),
1459         SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1,
1460                               3, 0, NULL, 0),
1461         SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1,
1462                               1, 0, NULL, 0),
1463         SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1,
1464                               0, 0, NULL, 0),
1465
1466         /* Input Side */
1467         /* micbias */
1468         SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2,
1469                         RT5645_PWR_MB1_BIT, 0),
1470         SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2,
1471                         RT5645_PWR_MB2_BIT, 0),
1472         /* Input Lines */
1473         SND_SOC_DAPM_INPUT("DMIC L1"),
1474         SND_SOC_DAPM_INPUT("DMIC R1"),
1475         SND_SOC_DAPM_INPUT("DMIC L2"),
1476         SND_SOC_DAPM_INPUT("DMIC R2"),
1477
1478         SND_SOC_DAPM_INPUT("IN1P"),
1479         SND_SOC_DAPM_INPUT("IN1N"),
1480         SND_SOC_DAPM_INPUT("IN2P"),
1481         SND_SOC_DAPM_INPUT("IN2N"),
1482
1483         SND_SOC_DAPM_INPUT("Haptic Generator"),
1484
1485         SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1486         SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1487         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1488                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1489         SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
1490                 RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
1491         SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
1492                 RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
1493         /* Boost */
1494         SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
1495                 RT5645_PWR_BST1_BIT, 0, NULL, 0),
1496         SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
1497                 RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
1498                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1499         /* Input Volume */
1500         SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
1501                 RT5645_PWR_IN_L_BIT, 0, NULL, 0),
1502         SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
1503                 RT5645_PWR_IN_R_BIT, 0, NULL, 0),
1504         /* REC Mixer */
1505         SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
1506                         0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
1507         SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
1508                         0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
1509         /* ADCs */
1510         SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
1511         SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
1512
1513         SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
1514                 RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
1515         SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
1516                 RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
1517
1518         /* ADC Mux */
1519         SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1520                 &rt5645_sto1_dmic_mux),
1521         SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1522                 &rt5645_sto_adc2_mux),
1523         SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1524                 &rt5645_sto_adc2_mux),
1525         SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1526                 &rt5645_sto_adc1_mux),
1527         SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1528                 &rt5645_sto_adc1_mux),
1529         SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1530                 &rt5645_mono_dmic_l_mux),
1531         SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1532                 &rt5645_mono_dmic_r_mux),
1533         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1534                 &rt5645_mono_adc_l2_mux),
1535         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1536                 &rt5645_mono_adc_l1_mux),
1537         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1538                 &rt5645_mono_adc_r1_mux),
1539         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1540                 &rt5645_mono_adc_r2_mux),
1541         /* ADC Mixer */
1542
1543         SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
1544                 RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
1545         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
1546                 rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
1547                 NULL, 0),
1548         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
1549                 rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
1550                 NULL, 0),
1551         SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
1552                 RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1553         SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1554                 rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
1555                 NULL, 0),
1556         SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
1557                 RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1558         SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1559                 rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
1560                 NULL, 0),
1561
1562         /* ADC PGA */
1563         SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1564         SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1565         SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1566         SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1567         SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1568         SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1569         SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1570         SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1571         SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1572         SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1573
1574         /* IF1 2 Mux */
1575         SND_SOC_DAPM_MUX("IF1 ADC Mux", SND_SOC_NOPM,
1576                 0, 0, &rt5645_if1_adc_in_mux),
1577         SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
1578                 0, 0, &rt5645_if2_adc_in_mux),
1579
1580         /* Digital Interface */
1581         SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
1582                 RT5645_PWR_I2S1_BIT, 0, NULL, 0),
1583         SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1584         SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1585         SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1586         SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1587         SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1588         SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1589         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1590         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1591         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1592         SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
1593                 RT5645_PWR_I2S2_BIT, 0, NULL, 0),
1594         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1595         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1596         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1597         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1598
1599         /* Digital Interface Select */
1600         SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
1601                 0, 0, &rt5645_vad_adc_mux),
1602
1603         /* Audio Interface */
1604         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1605         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1606         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1607         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1608
1609         /* Output Side */
1610         /* DAC mixer before sound effect  */
1611         SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1612                 rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
1613         SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1614                 rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
1615
1616         /* DAC2 channel Mux */
1617         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
1618         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
1619         SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
1620                 RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
1621         SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
1622                 RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
1623
1624         SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
1625         SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
1626
1627         /* DAC Mixer */
1628         SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
1629                 RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
1630         SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
1631                 RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1632         SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
1633                 RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1634         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1635                 rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
1636         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1637                 rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
1638         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1639                 rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
1640         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1641                 rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
1642         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1643                 rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
1644         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1645                 rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
1646
1647         /* DACs */
1648         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
1649                 0),
1650         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
1651                 0),
1652         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
1653                 0),
1654         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
1655                 0),
1656         /* OUT Mixer */
1657         SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
1658                 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
1659         SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
1660                 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
1661         SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
1662                 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
1663         SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
1664                 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
1665         /* Ouput Volume */
1666         SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
1667                 &spk_l_vol_control),
1668         SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
1669                 &spk_r_vol_control),
1670         SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
1671                 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
1672         SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
1673                 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
1674         SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
1675                 RT5645_PWR_HM_L_BIT, 0, NULL, 0),
1676         SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
1677                 RT5645_PWR_HM_R_BIT, 0, NULL, 0),
1678         SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1679         SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1680         SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1681         SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
1682         SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
1683
1684         /* HPO/LOUT/Mono Mixer */
1685         SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
1686                 ARRAY_SIZE(rt5645_spo_l_mix)),
1687         SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
1688                 ARRAY_SIZE(rt5645_spo_r_mix)),
1689         SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
1690                 ARRAY_SIZE(rt5645_hpo_mix)),
1691         SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
1692                 ARRAY_SIZE(rt5645_lout_mix)),
1693
1694         SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
1695                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1696         SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
1697                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1698         SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
1699                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1700
1701         /* PDM */
1702         SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
1703                 0, NULL, 0),
1704         SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
1705         SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
1706
1707         SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
1708         SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
1709
1710         /* Output Lines */
1711         SND_SOC_DAPM_OUTPUT("HPOL"),
1712         SND_SOC_DAPM_OUTPUT("HPOR"),
1713         SND_SOC_DAPM_OUTPUT("LOUTL"),
1714         SND_SOC_DAPM_OUTPUT("LOUTR"),
1715         SND_SOC_DAPM_OUTPUT("PDM1L"),
1716         SND_SOC_DAPM_OUTPUT("PDM1R"),
1717         SND_SOC_DAPM_OUTPUT("SPOL"),
1718         SND_SOC_DAPM_OUTPUT("SPOR"),
1719 };
1720
1721 static const struct snd_soc_dapm_widget rt5650_specific_dapm_widgets[] = {
1722         SND_SOC_DAPM_MUX("A DAC1 L Mux", SND_SOC_NOPM,
1723                 0, 0, &rt5650_a_dac1_l_mux),
1724         SND_SOC_DAPM_MUX("A DAC1 R Mux", SND_SOC_NOPM,
1725                 0, 0, &rt5650_a_dac1_r_mux),
1726         SND_SOC_DAPM_MUX("A DAC2 L Mux", SND_SOC_NOPM,
1727                 0, 0, &rt5650_a_dac2_l_mux),
1728         SND_SOC_DAPM_MUX("A DAC2 R Mux", SND_SOC_NOPM,
1729                 0, 0, &rt5650_a_dac2_r_mux),
1730 };
1731
1732 static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
1733         { "adc stereo1 filter", NULL, "ADC STO1 ASRC", is_using_asrc },
1734         { "adc mono left filter", NULL, "ADC MONO L ASRC", is_using_asrc },
1735         { "adc mono right filter", NULL, "ADC MONO R ASRC", is_using_asrc },
1736         { "dac mono left filter", NULL, "DAC MONO L ASRC", is_using_asrc },
1737         { "dac mono right filter", NULL, "DAC MONO R ASRC", is_using_asrc },
1738         { "dac stereo1 filter", NULL, "DAC STO ASRC", is_using_asrc },
1739
1740         { "I2S1", NULL, "I2S1 ASRC" },
1741         { "I2S2", NULL, "I2S2 ASRC" },
1742
1743         { "IN1P", NULL, "LDO2" },
1744         { "IN2P", NULL, "LDO2" },
1745
1746         { "DMIC1", NULL, "DMIC L1" },
1747         { "DMIC1", NULL, "DMIC R1" },
1748         { "DMIC2", NULL, "DMIC L2" },
1749         { "DMIC2", NULL, "DMIC R2" },
1750
1751         { "BST1", NULL, "IN1P" },
1752         { "BST1", NULL, "IN1N" },
1753         { "BST1", NULL, "JD Power" },
1754         { "BST1", NULL, "Mic Det Power" },
1755         { "BST2", NULL, "IN2P" },
1756         { "BST2", NULL, "IN2N" },
1757
1758         { "INL VOL", NULL, "IN2P" },
1759         { "INR VOL", NULL, "IN2N" },
1760
1761         { "RECMIXL", "HPOL Switch", "HPOL" },
1762         { "RECMIXL", "INL Switch", "INL VOL" },
1763         { "RECMIXL", "BST2 Switch", "BST2" },
1764         { "RECMIXL", "BST1 Switch", "BST1" },
1765         { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
1766
1767         { "RECMIXR", "HPOR Switch", "HPOR" },
1768         { "RECMIXR", "INR Switch", "INR VOL" },
1769         { "RECMIXR", "BST2 Switch", "BST2" },
1770         { "RECMIXR", "BST1 Switch", "BST1" },
1771         { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
1772
1773         { "ADC L", NULL, "RECMIXL" },
1774         { "ADC L", NULL, "ADC L power" },
1775         { "ADC R", NULL, "RECMIXR" },
1776         { "ADC R", NULL, "ADC R power" },
1777
1778         {"DMIC L1", NULL, "DMIC CLK"},
1779         {"DMIC L1", NULL, "DMIC1 Power"},
1780         {"DMIC R1", NULL, "DMIC CLK"},
1781         {"DMIC R1", NULL, "DMIC1 Power"},
1782         {"DMIC L2", NULL, "DMIC CLK"},
1783         {"DMIC L2", NULL, "DMIC2 Power"},
1784         {"DMIC R2", NULL, "DMIC CLK"},
1785         {"DMIC R2", NULL, "DMIC2 Power"},
1786
1787         { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
1788         { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
1789         { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC" },
1790
1791         { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
1792         { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
1793         { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC" },
1794
1795         { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
1796         { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
1797         { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC" },
1798
1799         { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1800         { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1801         { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
1802         { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1803
1804         { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
1805         { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1806         { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1807         { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1808
1809         { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
1810         { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1811         { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1812         { "Mono ADC L1 Mux", "ADC", "ADC L" },
1813
1814         { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1815         { "Mono ADC R1 Mux", "ADC", "ADC R" },
1816         { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
1817         { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1818
1819         { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
1820         { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
1821         { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
1822         { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
1823
1824         { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
1825         { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
1826         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1827
1828         { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
1829         { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
1830         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1831
1832         { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
1833         { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
1834         { "Mono ADC MIXL", NULL, "adc mono left filter" },
1835         { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
1836
1837         { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
1838         { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
1839         { "Mono ADC MIXR", NULL, "adc mono right filter" },
1840         { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
1841
1842         { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
1843         { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
1844         { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
1845
1846         { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
1847         { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
1848         { "IF_ADC2", NULL, "Mono ADC MIXL" },
1849         { "IF_ADC2", NULL, "Mono ADC MIXR" },
1850         { "VAD_ADC", NULL, "VAD ADC Mux" },
1851
1852         { "IF1 ADC Mux", "IF_ADC1", "IF_ADC1" },
1853         { "IF1 ADC Mux", "IF_ADC2", "IF_ADC2" },
1854         { "IF1 ADC Mux", "VAD_ADC", "VAD_ADC" },
1855
1856         { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
1857         { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
1858         { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
1859
1860         { "IF1 ADC", NULL, "I2S1" },
1861         { "IF1 ADC", NULL, "IF1 ADC Mux" },
1862         { "IF2 ADC", NULL, "I2S2" },
1863         { "IF2 ADC", NULL, "IF2 ADC Mux" },
1864
1865         { "AIF1TX", NULL, "IF1 ADC" },
1866         { "AIF1TX", NULL, "IF2 ADC" },
1867         { "AIF2TX", NULL, "IF2 ADC" },
1868
1869         { "IF1 DAC1", NULL, "AIF1RX" },
1870         { "IF1 DAC2", NULL, "AIF1RX" },
1871         { "IF2 DAC", NULL, "AIF2RX" },
1872
1873         { "IF1 DAC1", NULL, "I2S1" },
1874         { "IF1 DAC2", NULL, "I2S1" },
1875         { "IF2 DAC", NULL, "I2S2" },
1876
1877         { "IF1 DAC2 L", NULL, "IF1 DAC2" },
1878         { "IF1 DAC2 R", NULL, "IF1 DAC2" },
1879         { "IF1 DAC1 L", NULL, "IF1 DAC1" },
1880         { "IF1 DAC1 R", NULL, "IF1 DAC1" },
1881         { "IF2 DAC L", NULL, "IF2 DAC" },
1882         { "IF2 DAC R", NULL, "IF2 DAC" },
1883
1884         { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
1885         { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
1886
1887         { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
1888         { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
1889
1890         { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
1891         { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
1892         { "DAC1 MIXL", NULL, "dac stereo1 filter" },
1893         { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
1894         { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
1895         { "DAC1 MIXR", NULL, "dac stereo1 filter" },
1896
1897         { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
1898         { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
1899         { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
1900         { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
1901         { "DAC L2 Volume", NULL, "DAC L2 Mux" },
1902         { "DAC L2 Volume", NULL, "dac mono left filter" },
1903
1904         { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
1905         { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
1906         { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
1907         { "DAC R2 Mux", "Haptic", "Haptic Generator" },
1908         { "DAC R2 Volume", NULL, "DAC R2 Mux" },
1909         { "DAC R2 Volume", NULL, "dac mono right filter" },
1910
1911         { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1912         { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
1913         { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1914         { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
1915         { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1916         { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
1917         { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1918         { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
1919
1920         { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1921         { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1922         { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1923         { "Mono DAC MIXL", NULL, "dac mono left filter" },
1924         { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1925         { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1926         { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1927         { "Mono DAC MIXR", NULL, "dac mono right filter" },
1928
1929         { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
1930         { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1931         { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1932         { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
1933         { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1934         { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1935
1936         { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
1937         { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
1938         { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
1939         { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
1940
1941         { "SPK MIXL", "BST1 Switch", "BST1" },
1942         { "SPK MIXL", "INL Switch", "INL VOL" },
1943         { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
1944         { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
1945         { "SPK MIXR", "BST2 Switch", "BST2" },
1946         { "SPK MIXR", "INR Switch", "INR VOL" },
1947         { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
1948         { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
1949
1950         { "OUT MIXL", "BST1 Switch", "BST1" },
1951         { "OUT MIXL", "INL Switch", "INL VOL" },
1952         { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
1953         { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
1954
1955         { "OUT MIXR", "BST2 Switch", "BST2" },
1956         { "OUT MIXR", "INR Switch", "INR VOL" },
1957         { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
1958         { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
1959
1960         { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
1961         { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
1962         { "HPOVOL MIXL", "INL Switch", "INL VOL" },
1963         { "HPOVOL MIXL", "BST1 Switch", "BST1" },
1964         { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
1965         { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
1966         { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
1967         { "HPOVOL MIXR", "INR Switch", "INR VOL" },
1968         { "HPOVOL MIXR", "BST2 Switch", "BST2" },
1969         { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
1970
1971         { "DAC 2", NULL, "DAC L2" },
1972         { "DAC 2", NULL, "DAC R2" },
1973         { "DAC 1", NULL, "DAC L1" },
1974         { "DAC 1", NULL, "DAC R1" },
1975         { "HPOVOL L", "Switch", "HPOVOL MIXL" },
1976         { "HPOVOL R", "Switch", "HPOVOL MIXR" },
1977         { "HPOVOL", NULL, "HPOVOL L" },
1978         { "HPOVOL", NULL, "HPOVOL R" },
1979         { "HPO MIX", "DAC1 Switch", "DAC 1" },
1980         { "HPO MIX", "HPVOL Switch", "HPOVOL" },
1981
1982         { "SPKVOL L", "Switch", "SPK MIXL" },
1983         { "SPKVOL R", "Switch", "SPK MIXR" },
1984
1985         { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
1986         { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
1987         { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
1988         { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
1989         { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
1990         { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
1991
1992         { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
1993         { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
1994         { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
1995         { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
1996
1997         { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
1998         { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
1999         { "PDM1 L Mux", NULL, "PDM1 Power" },
2000         { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2001         { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2002         { "PDM1 R Mux", NULL, "PDM1 Power" },
2003
2004         { "HP amp", NULL, "HPO MIX" },
2005         { "HP amp", NULL, "JD Power" },
2006         { "HP amp", NULL, "Mic Det Power" },
2007         { "HP amp", NULL, "LDO2" },
2008         { "HPOL", NULL, "HP amp" },
2009         { "HPOR", NULL, "HP amp" },
2010
2011         { "LOUT amp", NULL, "LOUT MIX" },
2012         { "LOUTL", NULL, "LOUT amp" },
2013         { "LOUTR", NULL, "LOUT amp" },
2014
2015         { "PDM1 L", "Switch", "PDM1 L Mux" },
2016         { "PDM1 R", "Switch", "PDM1 R Mux" },
2017
2018         { "PDM1L", NULL, "PDM1 L" },
2019         { "PDM1R", NULL, "PDM1 R" },
2020
2021         { "SPK amp", NULL, "SPOL MIX" },
2022         { "SPK amp", NULL, "SPOR MIX" },
2023         { "SPOL", NULL, "SPK amp" },
2024         { "SPOR", NULL, "SPK amp" },
2025 };
2026
2027 static const struct snd_soc_dapm_route rt5650_specific_dapm_routes[] = {
2028         { "A DAC1 L Mux", "DAC1",  "DAC1 MIXL"},
2029         { "A DAC1 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2030         { "A DAC1 R Mux", "DAC1",  "DAC1 MIXR"},
2031         { "A DAC1 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2032
2033         { "A DAC2 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2034         { "A DAC2 L Mux", "Mono DAC Mixer", "Mono DAC MIXL"},
2035         { "A DAC2 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2036         { "A DAC2 R Mux", "Mono DAC Mixer", "Mono DAC MIXR"},
2037
2038         { "DAC L1", NULL, "A DAC1 L Mux" },
2039         { "DAC R1", NULL, "A DAC1 R Mux" },
2040         { "DAC L2", NULL, "A DAC2 L Mux" },
2041         { "DAC R2", NULL, "A DAC2 R Mux" },
2042 };
2043
2044 static const struct snd_soc_dapm_route rt5645_specific_dapm_routes[] = {
2045         { "DAC L1", NULL, "Stereo DAC MIXL" },
2046         { "DAC R1", NULL, "Stereo DAC MIXR" },
2047         { "DAC L2", NULL, "Mono DAC MIXL" },
2048         { "DAC R2", NULL, "Mono DAC MIXR" },
2049 };
2050
2051 static int rt5645_hw_params(struct snd_pcm_substream *substream,
2052         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2053 {
2054         struct snd_soc_codec *codec = dai->codec;
2055         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2056         unsigned int val_len = 0, val_clk, mask_clk, dl_sft;
2057         int pre_div, bclk_ms, frame_size;
2058
2059         rt5645->lrck[dai->id] = params_rate(params);
2060         pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
2061         if (pre_div < 0) {
2062                 dev_err(codec->dev, "Unsupported clock setting\n");
2063                 return -EINVAL;
2064         }
2065         frame_size = snd_soc_params_to_frame_size(params);
2066         if (frame_size < 0) {
2067                 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2068                 return -EINVAL;
2069         }
2070
2071         switch (rt5645->codec_type) {
2072         case CODEC_TYPE_RT5650:
2073                 dl_sft = 4;
2074                 break;
2075         default:
2076                 dl_sft = 2;
2077                 break;
2078         }
2079
2080         bclk_ms = frame_size > 32;
2081         rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
2082
2083         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2084                 rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
2085         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2086                                 bclk_ms, pre_div, dai->id);
2087
2088         switch (params_width(params)) {
2089         case 16:
2090                 break;
2091         case 20:
2092                 val_len = 0x1;
2093                 break;
2094         case 24:
2095                 val_len = 0x2;
2096                 break;
2097         case 8:
2098                 val_len = 0x3;
2099                 break;
2100         default:
2101                 return -EINVAL;
2102         }
2103
2104         switch (dai->id) {
2105         case RT5645_AIF1:
2106                 mask_clk = RT5645_I2S_BCLK_MS1_MASK | RT5645_I2S_PD1_MASK;
2107                 val_clk = bclk_ms << RT5645_I2S_BCLK_MS1_SFT |
2108                         pre_div << RT5645_I2S_PD1_SFT;
2109                 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
2110                         (0x3 << dl_sft), (val_len << dl_sft));
2111                 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
2112                 break;
2113         case  RT5645_AIF2:
2114                 mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
2115                 val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
2116                         pre_div << RT5645_I2S_PD2_SFT;
2117                 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
2118                         (0x3 << dl_sft), (val_len << dl_sft));
2119                 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
2120                 break;
2121         default:
2122                 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2123                 return -EINVAL;
2124         }
2125
2126         return 0;
2127 }
2128
2129 static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2130 {
2131         struct snd_soc_codec *codec = dai->codec;
2132         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2133         unsigned int reg_val = 0, pol_sft;
2134
2135         switch (rt5645->codec_type) {
2136         case CODEC_TYPE_RT5650:
2137                 pol_sft = 8;
2138                 break;
2139         default:
2140                 pol_sft = 7;
2141                 break;
2142         }
2143
2144         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2145         case SND_SOC_DAIFMT_CBM_CFM:
2146                 rt5645->master[dai->id] = 1;
2147                 break;
2148         case SND_SOC_DAIFMT_CBS_CFS:
2149                 reg_val |= RT5645_I2S_MS_S;
2150                 rt5645->master[dai->id] = 0;
2151                 break;
2152         default:
2153                 return -EINVAL;
2154         }
2155
2156         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2157         case SND_SOC_DAIFMT_NB_NF:
2158                 break;
2159         case SND_SOC_DAIFMT_IB_NF:
2160                 reg_val |= (1 << pol_sft);
2161                 break;
2162         default:
2163                 return -EINVAL;
2164         }
2165
2166         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2167         case SND_SOC_DAIFMT_I2S:
2168                 break;
2169         case SND_SOC_DAIFMT_LEFT_J:
2170                 reg_val |= RT5645_I2S_DF_LEFT;
2171                 break;
2172         case SND_SOC_DAIFMT_DSP_A:
2173                 reg_val |= RT5645_I2S_DF_PCM_A;
2174                 break;
2175         case SND_SOC_DAIFMT_DSP_B:
2176                 reg_val |= RT5645_I2S_DF_PCM_B;
2177                 break;
2178         default:
2179                 return -EINVAL;
2180         }
2181         switch (dai->id) {
2182         case RT5645_AIF1:
2183                 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
2184                         RT5645_I2S_MS_MASK | (1 << pol_sft) |
2185                         RT5645_I2S_DF_MASK, reg_val);
2186                 break;
2187         case RT5645_AIF2:
2188                 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
2189                         RT5645_I2S_MS_MASK | (1 << pol_sft) |
2190                         RT5645_I2S_DF_MASK, reg_val);
2191                 break;
2192         default:
2193                 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2194                 return -EINVAL;
2195         }
2196         return 0;
2197 }
2198
2199 static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
2200                 int clk_id, unsigned int freq, int dir)
2201 {
2202         struct snd_soc_codec *codec = dai->codec;
2203         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2204         unsigned int reg_val = 0;
2205
2206         if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
2207                 return 0;
2208
2209         switch (clk_id) {
2210         case RT5645_SCLK_S_MCLK:
2211                 reg_val |= RT5645_SCLK_SRC_MCLK;
2212                 break;
2213         case RT5645_SCLK_S_PLL1:
2214                 reg_val |= RT5645_SCLK_SRC_PLL1;
2215                 break;
2216         case RT5645_SCLK_S_RCCLK:
2217                 reg_val |= RT5645_SCLK_SRC_RCCLK;
2218                 break;
2219         default:
2220                 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2221                 return -EINVAL;
2222         }
2223         snd_soc_update_bits(codec, RT5645_GLB_CLK,
2224                 RT5645_SCLK_SRC_MASK, reg_val);
2225         rt5645->sysclk = freq;
2226         rt5645->sysclk_src = clk_id;
2227
2228         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2229
2230         return 0;
2231 }
2232
2233 static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2234                         unsigned int freq_in, unsigned int freq_out)
2235 {
2236         struct snd_soc_codec *codec = dai->codec;
2237         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2238         struct rl6231_pll_code pll_code;
2239         int ret;
2240
2241         if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
2242             freq_out == rt5645->pll_out)
2243                 return 0;
2244
2245         if (!freq_in || !freq_out) {
2246                 dev_dbg(codec->dev, "PLL disabled\n");
2247
2248                 rt5645->pll_in = 0;
2249                 rt5645->pll_out = 0;
2250                 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2251                         RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
2252                 return 0;
2253         }
2254
2255         switch (source) {
2256         case RT5645_PLL1_S_MCLK:
2257                 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2258                         RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
2259                 break;
2260         case RT5645_PLL1_S_BCLK1:
2261         case RT5645_PLL1_S_BCLK2:
2262                 switch (dai->id) {
2263                 case RT5645_AIF1:
2264                         snd_soc_update_bits(codec, RT5645_GLB_CLK,
2265                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
2266                         break;
2267                 case  RT5645_AIF2:
2268                         snd_soc_update_bits(codec, RT5645_GLB_CLK,
2269                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
2270                         break;
2271                 default:
2272                         dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2273                         return -EINVAL;
2274                 }
2275                 break;
2276         default:
2277                 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2278                 return -EINVAL;
2279         }
2280
2281         ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2282         if (ret < 0) {
2283                 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2284                 return ret;
2285         }
2286
2287         dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2288                 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2289                 pll_code.n_code, pll_code.k_code);
2290
2291         snd_soc_write(codec, RT5645_PLL_CTRL1,
2292                 pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2293         snd_soc_write(codec, RT5645_PLL_CTRL2,
2294                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT |
2295                 pll_code.m_bp << RT5645_PLL_M_BP_SFT);
2296
2297         rt5645->pll_in = freq_in;
2298         rt5645->pll_out = freq_out;
2299         rt5645->pll_src = source;
2300
2301         return 0;
2302 }
2303
2304 static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2305                         unsigned int rx_mask, int slots, int slot_width)
2306 {
2307         struct snd_soc_codec *codec = dai->codec;
2308         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2309         unsigned int i_slot_sft, o_slot_sft, i_width_sht, o_width_sht, en_sft;
2310         unsigned int mask, val = 0;
2311
2312         switch (rt5645->codec_type) {
2313         case CODEC_TYPE_RT5650:
2314                 en_sft = 15;
2315                 i_slot_sft = 10;
2316                 o_slot_sft = 8;
2317                 i_width_sht = 6;
2318                 o_width_sht = 4;
2319                 mask = 0x8ff0;
2320                 break;
2321         default:
2322                 en_sft = 14;
2323                 i_slot_sft = o_slot_sft = 12;
2324                 i_width_sht = o_width_sht = 10;
2325                 mask = 0x7c00;
2326                 break;
2327         }
2328         if (rx_mask || tx_mask) {
2329                 val |= (1 << en_sft);
2330                 if (rt5645->codec_type == CODEC_TYPE_RT5645)
2331                         snd_soc_update_bits(codec, RT5645_BASS_BACK,
2332                                 RT5645_G_BB_BST_MASK, RT5645_G_BB_BST_25DB);
2333         }
2334
2335         switch (slots) {
2336         case 4:
2337                 val |= (1 << i_slot_sft) | (1 << o_slot_sft);
2338                 break;
2339         case 6:
2340                 val |= (2 << i_slot_sft) | (2 << o_slot_sft);
2341                 break;
2342         case 8:
2343                 val |= (3 << i_slot_sft) | (3 << o_slot_sft);
2344                 break;
2345         case 2:
2346         default:
2347                 break;
2348         }
2349
2350         switch (slot_width) {
2351         case 20:
2352                 val |= (1 << i_width_sht) | (1 << o_width_sht);
2353                 break;
2354         case 24:
2355                 val |= (2 << i_width_sht) | (2 << o_width_sht);
2356                 break;
2357         case 32:
2358                 val |= (3 << i_width_sht) | (3 << o_width_sht);
2359                 break;
2360         case 16:
2361         default:
2362                 break;
2363         }
2364
2365         snd_soc_update_bits(codec, RT5645_TDM_CTRL_1, mask, val);
2366
2367         return 0;
2368 }
2369
2370 static int rt5645_set_bias_level(struct snd_soc_codec *codec,
2371                         enum snd_soc_bias_level level)
2372 {
2373         switch (level) {
2374         case SND_SOC_BIAS_PREPARE:
2375                 if (SND_SOC_BIAS_STANDBY == codec->dapm.bias_level) {
2376                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2377                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2378                                 RT5645_PWR_BG | RT5645_PWR_VREF2,
2379                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2380                                 RT5645_PWR_BG | RT5645_PWR_VREF2);
2381                         mdelay(10);
2382                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2383                                 RT5645_PWR_FV1 | RT5645_PWR_FV2,
2384                                 RT5645_PWR_FV1 | RT5645_PWR_FV2);
2385                         snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2386                                 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
2387                 }
2388                 break;
2389
2390         case SND_SOC_BIAS_STANDBY:
2391                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2392                         RT5645_PWR_VREF1 | RT5645_PWR_MB |
2393                         RT5645_PWR_BG | RT5645_PWR_VREF2,
2394                         RT5645_PWR_VREF1 | RT5645_PWR_MB |
2395                         RT5645_PWR_BG | RT5645_PWR_VREF2);
2396                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2397                         RT5645_PWR_FV1 | RT5645_PWR_FV2,
2398                         RT5645_PWR_FV1 | RT5645_PWR_FV2);
2399                 break;
2400
2401         case SND_SOC_BIAS_OFF:
2402                 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100);
2403                 snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2404                                 RT5645_DIG_GATE_CTRL, 0);
2405                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2406                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2407                                 RT5645_PWR_BG | RT5645_PWR_VREF2 |
2408                                 RT5645_PWR_FV1 | RT5645_PWR_FV2, 0x0);
2409                 break;
2410
2411         default:
2412                 break;
2413         }
2414         codec->dapm.bias_level = level;
2415
2416         return 0;
2417 }
2418
2419 static int rt5645_jack_detect(struct snd_soc_codec *codec)
2420 {
2421         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2422         int gpio_state, jack_type = 0;
2423         unsigned int val;
2424
2425         if (!gpio_is_valid(rt5645->pdata.hp_det_gpio)) {
2426                 dev_err(codec->dev, "invalid gpio\n");
2427                 return -EINVAL;
2428         }
2429         gpio_state = gpio_get_value(rt5645->pdata.hp_det_gpio);
2430
2431         dev_dbg(codec->dev, "gpio = %d(%d)\n", rt5645->pdata.hp_det_gpio,
2432                 gpio_state);
2433
2434         if ((rt5645->pdata.gpio_hp_det_active_high && gpio_state) ||
2435                 (!rt5645->pdata.gpio_hp_det_active_high && !gpio_state)) {
2436                 snd_soc_dapm_force_enable_pin(&codec->dapm, "micbias1");
2437                 snd_soc_dapm_force_enable_pin(&codec->dapm, "micbias2");
2438                 snd_soc_dapm_force_enable_pin(&codec->dapm, "LDO2");
2439                 snd_soc_dapm_force_enable_pin(&codec->dapm, "Mic Det Power");
2440                 snd_soc_dapm_sync(&codec->dapm);
2441
2442                 snd_soc_write(codec, RT5645_IN1_CTRL1, 0x0006);
2443                 snd_soc_write(codec, RT5645_JD_CTRL3, 0x00b0);
2444
2445                 snd_soc_update_bits(codec, RT5645_IN1_CTRL2,
2446                         RT5645_CBJ_MN_JD, 0);
2447                 snd_soc_update_bits(codec, RT5645_IN1_CTRL2,
2448                         RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
2449
2450                 msleep(400);
2451                 val = snd_soc_read(codec, RT5645_IN1_CTRL3) & 0x7;
2452                 dev_dbg(codec->dev, "val = %d\n", val);
2453
2454                 if (val == 1 || val == 2)
2455                         jack_type = SND_JACK_HEADSET;
2456                 else
2457                         jack_type = SND_JACK_HEADPHONE;
2458
2459                 snd_soc_dapm_disable_pin(&codec->dapm, "micbias1");
2460                 snd_soc_dapm_disable_pin(&codec->dapm, "micbias2");
2461                 if (rt5645->pdata.jd_mode == 0)
2462                         snd_soc_dapm_disable_pin(&codec->dapm, "LDO2");
2463                 snd_soc_dapm_disable_pin(&codec->dapm, "Mic Det Power");
2464                 snd_soc_dapm_sync(&codec->dapm);
2465         }
2466
2467         snd_soc_jack_report(rt5645->hp_jack, jack_type, SND_JACK_HEADPHONE);
2468         snd_soc_jack_report(rt5645->mic_jack, jack_type, SND_JACK_MICROPHONE);
2469         return 0;
2470 }
2471
2472 int rt5645_set_jack_detect(struct snd_soc_codec *codec,
2473         struct snd_soc_jack *hp_jack, struct snd_soc_jack *mic_jack)
2474 {
2475         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2476
2477         rt5645->hp_jack = hp_jack;
2478         rt5645->mic_jack = mic_jack;
2479         rt5645_jack_detect(codec);
2480
2481         return 0;
2482 }
2483 EXPORT_SYMBOL_GPL(rt5645_set_jack_detect);
2484
2485 static void rt5645_jack_detect_work(struct work_struct *work)
2486 {
2487         struct rt5645_priv *rt5645 =
2488                 container_of(work, struct rt5645_priv, jack_detect_work.work);
2489
2490         rt5645_jack_detect(rt5645->codec);
2491 }
2492
2493 static irqreturn_t rt5645_irq(int irq, void *data)
2494 {
2495         struct rt5645_priv *rt5645 = data;
2496
2497         queue_delayed_work(system_power_efficient_wq,
2498                            &rt5645->jack_detect_work, msecs_to_jiffies(250));
2499
2500         return IRQ_HANDLED;
2501 }
2502
2503 static int rt5645_probe(struct snd_soc_codec *codec)
2504 {
2505         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2506
2507         rt5645->codec = codec;
2508
2509         switch (rt5645->codec_type) {
2510         case CODEC_TYPE_RT5645:
2511                 snd_soc_dapm_add_routes(&codec->dapm,
2512                         rt5645_specific_dapm_routes,
2513                         ARRAY_SIZE(rt5645_specific_dapm_routes));
2514                 break;
2515         case CODEC_TYPE_RT5650:
2516                 snd_soc_dapm_new_controls(&codec->dapm,
2517                         rt5650_specific_dapm_widgets,
2518                         ARRAY_SIZE(rt5650_specific_dapm_widgets));
2519                 snd_soc_dapm_add_routes(&codec->dapm,
2520                         rt5650_specific_dapm_routes,
2521                         ARRAY_SIZE(rt5650_specific_dapm_routes));
2522                 break;
2523         }
2524
2525         rt5645_set_bias_level(codec, SND_SOC_BIAS_OFF);
2526
2527         snd_soc_update_bits(codec, RT5645_CHARGE_PUMP, 0x0300, 0x0200);
2528
2529         /* for JD function */
2530         if (rt5645->pdata.en_jd_func) {
2531                 snd_soc_dapm_force_enable_pin(&codec->dapm, "JD Power");
2532                 snd_soc_dapm_force_enable_pin(&codec->dapm, "LDO2");
2533                 snd_soc_dapm_sync(&codec->dapm);
2534         }
2535
2536         return 0;
2537 }
2538
2539 static int rt5645_remove(struct snd_soc_codec *codec)
2540 {
2541         rt5645_reset(codec);
2542         return 0;
2543 }
2544
2545 #ifdef CONFIG_PM
2546 static int rt5645_suspend(struct snd_soc_codec *codec)
2547 {
2548         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2549
2550         regcache_cache_only(rt5645->regmap, true);
2551         regcache_mark_dirty(rt5645->regmap);
2552
2553         return 0;
2554 }
2555
2556 static int rt5645_resume(struct snd_soc_codec *codec)
2557 {
2558         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2559
2560         regcache_cache_only(rt5645->regmap, false);
2561         regcache_sync(rt5645->regmap);
2562
2563         return 0;
2564 }
2565 #else
2566 #define rt5645_suspend NULL
2567 #define rt5645_resume NULL
2568 #endif
2569
2570 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2571 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2572                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2573
2574 static struct snd_soc_dai_ops rt5645_aif_dai_ops = {
2575         .hw_params = rt5645_hw_params,
2576         .set_fmt = rt5645_set_dai_fmt,
2577         .set_sysclk = rt5645_set_dai_sysclk,
2578         .set_tdm_slot = rt5645_set_tdm_slot,
2579         .set_pll = rt5645_set_dai_pll,
2580 };
2581
2582 static struct snd_soc_dai_driver rt5645_dai[] = {
2583         {
2584                 .name = "rt5645-aif1",
2585                 .id = RT5645_AIF1,
2586                 .playback = {
2587                         .stream_name = "AIF1 Playback",
2588                         .channels_min = 1,
2589                         .channels_max = 2,
2590                         .rates = RT5645_STEREO_RATES,
2591                         .formats = RT5645_FORMATS,
2592                 },
2593                 .capture = {
2594                         .stream_name = "AIF1 Capture",
2595                         .channels_min = 1,
2596                         .channels_max = 2,
2597                         .rates = RT5645_STEREO_RATES,
2598                         .formats = RT5645_FORMATS,
2599                 },
2600                 .ops = &rt5645_aif_dai_ops,
2601         },
2602         {
2603                 .name = "rt5645-aif2",
2604                 .id = RT5645_AIF2,
2605                 .playback = {
2606                         .stream_name = "AIF2 Playback",
2607                         .channels_min = 1,
2608                         .channels_max = 2,
2609                         .rates = RT5645_STEREO_RATES,
2610                         .formats = RT5645_FORMATS,
2611                 },
2612                 .capture = {
2613                         .stream_name = "AIF2 Capture",
2614                         .channels_min = 1,
2615                         .channels_max = 2,
2616                         .rates = RT5645_STEREO_RATES,
2617                         .formats = RT5645_FORMATS,
2618                 },
2619                 .ops = &rt5645_aif_dai_ops,
2620         },
2621 };
2622
2623 static struct snd_soc_codec_driver soc_codec_dev_rt5645 = {
2624         .probe = rt5645_probe,
2625         .remove = rt5645_remove,
2626         .suspend = rt5645_suspend,
2627         .resume = rt5645_resume,
2628         .set_bias_level = rt5645_set_bias_level,
2629         .idle_bias_off = true,
2630         .controls = rt5645_snd_controls,
2631         .num_controls = ARRAY_SIZE(rt5645_snd_controls),
2632         .dapm_widgets = rt5645_dapm_widgets,
2633         .num_dapm_widgets = ARRAY_SIZE(rt5645_dapm_widgets),
2634         .dapm_routes = rt5645_dapm_routes,
2635         .num_dapm_routes = ARRAY_SIZE(rt5645_dapm_routes),
2636 };
2637
2638 static const struct regmap_config rt5645_regmap = {
2639         .reg_bits = 8,
2640         .val_bits = 16,
2641         .use_single_rw = true,
2642         .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
2643                                                RT5645_PR_SPACING),
2644         .volatile_reg = rt5645_volatile_register,
2645         .readable_reg = rt5645_readable_register,
2646
2647         .cache_type = REGCACHE_RBTREE,
2648         .reg_defaults = rt5645_reg,
2649         .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
2650         .ranges = rt5645_ranges,
2651         .num_ranges = ARRAY_SIZE(rt5645_ranges),
2652 };
2653
2654 static const struct i2c_device_id rt5645_i2c_id[] = {
2655         { "rt5645", 0 },
2656         { "rt5650", 0 },
2657         { }
2658 };
2659 MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
2660
2661 #ifdef CONFIG_ACPI
2662 static struct acpi_device_id rt5645_acpi_match[] = {
2663         { "10EC5645", 0 },
2664         { "10EC5650", 0 },
2665         {},
2666 };
2667 MODULE_DEVICE_TABLE(acpi, rt5645_acpi_match);
2668 #endif
2669
2670 static struct rt5645_platform_data *rt5645_pdata;
2671
2672 static struct rt5645_platform_data strago_platform_data = {
2673         .dmic_en = true,
2674         .dmic1_data_pin = -1,
2675         .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
2676         .en_jd_func = true,
2677         .jd_mode = 3,
2678 };
2679
2680 static int strago_quirk_cb(const struct dmi_system_id *id)
2681 {
2682         rt5645_pdata = &strago_platform_data;
2683
2684         return 1;
2685 }
2686
2687 static struct dmi_system_id dmi_platform_intel_braswell[] __initdata = {
2688         {
2689                 .ident = "Intel Strago",
2690                 .callback = strago_quirk_cb,
2691                 .matches = {
2692                         DMI_MATCH(DMI_PRODUCT_NAME, "Strago"),
2693                 },
2694         },
2695         { }
2696 };
2697
2698 static int rt5645_i2c_probe(struct i2c_client *i2c,
2699                     const struct i2c_device_id *id)
2700 {
2701         struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev);
2702         struct rt5645_priv *rt5645;
2703         int ret;
2704         unsigned int val;
2705         struct gpio_desc *gpiod;
2706
2707         rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
2708                                 GFP_KERNEL);
2709         if (rt5645 == NULL)
2710                 return -ENOMEM;
2711
2712         rt5645->i2c = i2c;
2713         i2c_set_clientdata(i2c, rt5645);
2714
2715         if (pdata) {
2716                 rt5645->pdata = *pdata;
2717         } else {
2718                 if (dmi_check_system(dmi_platform_intel_braswell)) {
2719                         rt5645->pdata = *rt5645_pdata;
2720                         gpiod = devm_gpiod_get_index(&i2c->dev, "rt5645", 0);
2721
2722                         if (IS_ERR(gpiod) || gpiod_direction_input(gpiod)) {
2723                                 rt5645->pdata.hp_det_gpio = -1;
2724                                 dev_err(&i2c->dev, "failed to initialize gpiod\n");
2725                         } else {
2726                                 rt5645->pdata.hp_det_gpio = desc_to_gpio(gpiod);
2727                                 rt5645->pdata.gpio_hp_det_active_high
2728                                                 = !gpiod_is_active_low(gpiod);
2729                         }
2730                 }
2731         }
2732
2733         rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
2734         if (IS_ERR(rt5645->regmap)) {
2735                 ret = PTR_ERR(rt5645->regmap);
2736                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2737                         ret);
2738                 return ret;
2739         }
2740
2741         regmap_read(rt5645->regmap, RT5645_VENDOR_ID2, &val);
2742
2743         switch (val) {
2744         case RT5645_DEVICE_ID:
2745                 rt5645->codec_type = CODEC_TYPE_RT5645;
2746                 break;
2747         case RT5650_DEVICE_ID:
2748                 rt5645->codec_type = CODEC_TYPE_RT5650;
2749                 break;
2750         default:
2751                 dev_err(&i2c->dev,
2752                         "Device with ID register %x is not rt5645 or rt5650\n",
2753                         val);
2754                 return -ENODEV;
2755         }
2756
2757         regmap_write(rt5645->regmap, RT5645_RESET, 0);
2758
2759         ret = regmap_register_patch(rt5645->regmap, init_list,
2760                                     ARRAY_SIZE(init_list));
2761         if (ret != 0)
2762                 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2763
2764         if (rt5645->codec_type == CODEC_TYPE_RT5650) {
2765                 ret = regmap_register_patch(rt5645->regmap, rt5650_init_list,
2766                                     ARRAY_SIZE(rt5650_init_list));
2767                 if (ret != 0)
2768                         dev_warn(&i2c->dev, "Apply rt5650 patch failed: %d\n",
2769                                            ret);
2770         }
2771
2772         if (rt5645->pdata.in2_diff)
2773                 regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
2774                                         RT5645_IN_DF2, RT5645_IN_DF2);
2775
2776         if (rt5645->pdata.dmic_en) {
2777                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2778                         RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
2779
2780                 switch (rt5645->pdata.dmic1_data_pin) {
2781                 case RT5645_DMIC_DATA_IN2N:
2782                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2783                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
2784                         break;
2785
2786                 case RT5645_DMIC_DATA_GPIO5:
2787                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2788                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
2789                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2790                                 RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
2791                         break;
2792
2793                 case RT5645_DMIC_DATA_GPIO11:
2794                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2795                                 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
2796                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2797                                 RT5645_GP11_PIN_MASK,
2798                                 RT5645_GP11_PIN_DMIC1_SDA);
2799                         break;
2800
2801                 default:
2802                         break;
2803                 }
2804
2805                 switch (rt5645->pdata.dmic2_data_pin) {
2806                 case RT5645_DMIC_DATA_IN2P:
2807                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2808                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
2809                         break;
2810
2811                 case RT5645_DMIC_DATA_GPIO6:
2812                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2813                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
2814                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2815                                 RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
2816                         break;
2817
2818                 case RT5645_DMIC_DATA_GPIO10:
2819                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2820                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
2821                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2822                                 RT5645_GP10_PIN_MASK,
2823                                 RT5645_GP10_PIN_DMIC2_SDA);
2824                         break;
2825
2826                 case RT5645_DMIC_DATA_GPIO12:
2827                         regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2828                                 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
2829                         regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2830                                 RT5645_GP12_PIN_MASK,
2831                                 RT5645_GP12_PIN_DMIC2_SDA);
2832                         break;
2833
2834                 default:
2835                         break;
2836                 }
2837
2838         }
2839
2840         if (rt5645->pdata.en_jd_func) {
2841                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
2842                         RT5645_IRQ_CLK_GATE_CTRL | RT5645_MICINDET_MANU,
2843                         RT5645_IRQ_CLK_GATE_CTRL | RT5645_MICINDET_MANU);
2844                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
2845                         RT5645_CBJ_BST1_EN, RT5645_CBJ_BST1_EN);
2846                 regmap_update_bits(rt5645->regmap, RT5645_JD_CTRL3,
2847                         RT5645_JD_CBJ_EN | RT5645_JD_CBJ_POL,
2848                         RT5645_JD_CBJ_EN | RT5645_JD_CBJ_POL);
2849                 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
2850                         RT5645_IRQ_CLK_INT, RT5645_IRQ_CLK_INT);
2851         }
2852
2853         if (rt5645->pdata.jd_mode) {
2854                 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
2855                                    RT5645_IRQ_JD_1_1_EN, RT5645_IRQ_JD_1_1_EN);
2856                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
2857                                    RT5645_JD_PSV_MODE, RT5645_JD_PSV_MODE);
2858                 regmap_update_bits(rt5645->regmap, RT5645_HPO_MIXER,
2859                                    RT5645_IRQ_PSV_MODE, RT5645_IRQ_PSV_MODE);
2860                 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
2861                                    RT5645_MIC2_OVCD_EN, RT5645_MIC2_OVCD_EN);
2862                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2863                                    RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
2864                 switch (rt5645->pdata.jd_mode) {
2865                 case 1:
2866                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
2867                                            RT5645_JD1_MODE_MASK,
2868                                            RT5645_JD1_MODE_0);
2869                         break;
2870                 case 2:
2871                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
2872                                            RT5645_JD1_MODE_MASK,
2873                                            RT5645_JD1_MODE_1);
2874                         break;
2875                 case 3:
2876                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
2877                                            RT5645_JD1_MODE_MASK,
2878                                            RT5645_JD1_MODE_2);
2879                         break;
2880                 default:
2881                         break;
2882                 }
2883         }
2884
2885         if (rt5645->i2c->irq) {
2886                 ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq,
2887                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
2888                         | IRQF_ONESHOT, "rt5645", rt5645);
2889                 if (ret)
2890                         dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
2891         }
2892
2893         if (gpio_is_valid(rt5645->pdata.hp_det_gpio)) {
2894                 ret = gpio_request(rt5645->pdata.hp_det_gpio, "rt5645");
2895                 if (ret)
2896                         dev_err(&i2c->dev, "Fail gpio_request hp_det_gpio\n");
2897
2898                 ret = gpio_direction_input(rt5645->pdata.hp_det_gpio);
2899                 if (ret)
2900                         dev_err(&i2c->dev, "Fail gpio_direction hp_det_gpio\n");
2901         }
2902
2903         INIT_DELAYED_WORK(&rt5645->jack_detect_work, rt5645_jack_detect_work);
2904
2905         return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5645,
2906                                       rt5645_dai, ARRAY_SIZE(rt5645_dai));
2907 }
2908
2909 static int rt5645_i2c_remove(struct i2c_client *i2c)
2910 {
2911         struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
2912
2913         if (i2c->irq)
2914                 free_irq(i2c->irq, rt5645);
2915
2916         cancel_delayed_work_sync(&rt5645->jack_detect_work);
2917
2918         if (gpio_is_valid(rt5645->pdata.hp_det_gpio))
2919                 gpio_free(rt5645->pdata.hp_det_gpio);
2920
2921         snd_soc_unregister_codec(&i2c->dev);
2922
2923         return 0;
2924 }
2925
2926 static struct i2c_driver rt5645_i2c_driver = {
2927         .driver = {
2928                 .name = "rt5645",
2929                 .owner = THIS_MODULE,
2930                 .acpi_match_table = ACPI_PTR(rt5645_acpi_match),
2931         },
2932         .probe = rt5645_i2c_probe,
2933         .remove   = rt5645_i2c_remove,
2934         .id_table = rt5645_i2c_id,
2935 };
2936 module_i2c_driver(rt5645_i2c_driver);
2937
2938 MODULE_DESCRIPTION("ASoC RT5645 driver");
2939 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
2940 MODULE_LICENSE("GPL v2");