2 * linux/sound/soc/codecs/tlv320aic326x.h
4 * Copyright (C) 2011 TI Solutions Pvt Ltd.
6 * Based on sound/soc/codecs/tlv320aic3262.c
8 * This package is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
13 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
14 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
16 * The TLV320AIC3262 is a flexible, low-power, low-voltage stereo audio
17 * codec with digital microphone inputs and programmable outputs.
21 * Rev 0.1 ASoC driver support TI 20-01-2011
23 * The AIC325x ASoC driver is ported for the codec AIC3262.
24 * Rev 0.2 ASoC driver support TI 21-03-2011
25 * The AIC326x ASoC driver is updated for linux 2.6.32 Kernel.
26 * Rev 0.3 ASoC driver support TI 20-04-2011
27 * The AIC326x ASoC driver is ported to 2.6.35 omap4 kernel
30 #ifndef _TLV320AIC3262_H
31 #define _TLV320AIC3262_H
32 #include "aic3xxx_cfw.h"
33 #include "aic3xxx_cfw_ops.h"
34 #include <linux/switch.h>
37 #define dprintk(x...) printk(x)
38 #define DBG(x...) printk(x)
45 #define AUDIO_NAME "aic3262"
46 #define AIC3262_VERSION "1.1"
47 /* Macro to enable the inclusion of tiload kernel driver */
48 #define AIC3262_TiLoad
52 //#define AIC3262_SYNC_MODE
53 #undef AIC3262_SYNC_MODE
55 #define AIC3262_ASI1_MASTER
56 //#undef AIC3262_ASI1_MASTER
57 //#define AIC3262_ASI2_MASTER
58 #undef AIC3262_ASI2_MASTER
59 //#define AIC3262_ASI3_MASTER
60 #undef AIC3262_ASI3_MASTER
61 /* Macro for McBsp master / slave configuration */
62 #define AIC3262_MCBSP_SLAVE /*3262 master*/
63 //#undef AIC3262_MCBSP_SLAVE
65 /* Enable this macro allow for different ASI formats */
66 //#define ASI_MULTI_FMT
68 /* Enable register caching on write */
69 //#define EN_REG_CACHE
72 /* Enable or disable controls to have Input routing*/
73 //#define FULL_IN_CNTL
75 /* AIC3262 supported sample rate are 8k to 192k */
76 #define AIC3262_RATES SNDRV_PCM_RATE_8000_192000
78 /* AIC3262 supports the word formats 16bits, 20bits, 24bits and 32 bits */
79 #define AIC3262_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE \
80 | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE)
82 #define AIC3262_FREQ_11289600 11289600
83 #define AIC3262_FREQ_12000000 12000000
84 #define AIC3262_FREQ_19200000 19200000
85 #define AIC3262_FREQ_24000000 24000000
86 #define AIC3262_FREQ_38400000 38400000
87 /* Audio data word length = 16-bits (default setting) */
88 #define AIC3262_WORD_LEN_16BITS 0x00
89 #define AIC3262_WORD_LEN_20BITS 0x01
90 #define AIC3262_WORD_LEN_24BITS 0x02
91 #define AIC3262_WORD_LEN_32BITS 0x03
93 /* sink: name of target widget */
94 #define AIC3262_WIDGET_NAME 0
95 /* control: mixer control name */
96 #define AIC3262_CONTROL_NAME 1
97 /* source: name of source name */
98 #define AIC3262_SOURCE_NAME 2
100 /* D15..D8 aic3262 register offset */
101 #define AIC3262_REG_OFFSET_INDEX 0
102 /* D7...D0 register data */
103 #define AIC3262_REG_DATA_INDEX 1
105 /* Serial data bus uses I2S mode (Default mode) */
106 #define AIC3262_I2S_MODE 0x00
107 #define AIC3262_DSP_MODE 0x01
108 #define AIC3262_RIGHT_JUSTIFIED_MODE 0x02
109 #define AIC3262_LEFT_JUSTIFIED_MODE 0x03
111 /* 8 bit mask value */
112 #define AIC3262_8BITS_MASK 0xFF
114 /* shift value for CLK_REG_3 register */
115 #define CLK_REG_3_SHIFT 6
116 /* shift value for DAC_OSR_MSB register */
117 #define DAC_OSR_MSB_SHIFT 4
119 /* number of codec specific register for configuration */
120 #define NO_FEATURE_REGS 2
122 /* AIC3262 register space */
123 #define AIC3262_CACHEREGNUM 1024 /* Updated from 256 to support Page 3 registers */
127 #define DSP_NON_SYNC_MODE(state) (!( (state & 0x03) && (state & 0x30) ))
129 *----------------------------------------------------------------------------
130 * @struct aic3262_setup_data |
131 * i2c specific data setup for AIC3262.
132 * @field unsigned short |i2c_address |
133 * Unsigned short for i2c address.
134 *----------------------------------------------------------------------------
136 /*struct aic3262_setup_data {
137 unsigned short i2c_address;
139 struct aic3262_jack_data {
140 struct snd_soc_jack *jack;
142 struct switch_dev sdev;
145 * AIC3262 initialization data which has register offset and register
147 * @field u8 | book_no |
148 * AIC3262 Book Number Offsets required for initialization..
149 * @field u16 | reg_offset |
150 * AIC3262 Register offsets required for initialization..
151 * @field u8 | reg_val |
152 * value to set the AIC3262 register to initialize the AIC3262.
153 *----------------------------------------------------------------------------
155 struct aic3262_priv {
163 int current_dac_config[2];
164 int current_adc_config[2];
165 struct aic3262_jack_data hs_jack;
166 struct workqueue_struct *workqueue;
167 struct delayed_work delayed_work;
168 struct snd_soc_codec *codec;
170 struct mutex cfw_mutex;
171 struct cfw_state cfw_ps;
172 struct cfw_state *cfw_p;
173 struct aic3262_pdata *pdata;
174 int mute_asi; // Bit 0 -> ASI1, Bit 1-> ASI2, Bit 2 -> ASI3
176 const struct firmware *cur_fw;
179 /*struct aic3262_configs {
186 *----------------------------------------------------------------------------
187 * @struct aic3262_rate_divs |
188 * Setting up the values to get different freqencies
190 * @field u32 | mclk |
192 * @field u32 | rate |
194 * @field u8 | p_val |
196 * @field u32 | pll_j |
198 * @field u32 | pll_d |
200 * @field u32 | dosr |
201 * value to store dosr
202 * @field u32 | ndac |
204 * @field u32 | mdac |
206 * @field u32 | aosr |
208 * @field u32 | nadc |
210 * @field u32 | madc |
212 * @field u32 | blck_N |
214 * @field u32 | aic3262_configs |
215 * configurations for aic3262 register value
216 *----------------------------------------------------------------------------
218 struct aic3262_rate_divs {
231 // struct aic3262_configs codec_specific_regs[NO_FEATURE_REGS];
235 *----------------------------------------------------------------------------
236 * @struct snd_soc_codec_dai |
237 * It is SoC Codec DAI structure which has DAI capabilities viz.,
238 * playback and capture, DAI runtime information viz. state of DAI
239 * and pop wait state, and DAI private data.
240 *----------------------------------------------------------------------------
242 extern struct snd_soc_dai tlv320aic3262_dai;
245 *----------------------------------------------------------------------------
246 nt aic3262_write(struct snd_soc_codec *codec, unsigned int reg, unsigned int value)
247 * @struct snd_soc_codec_device |
248 * This structure is soc audio codec device sturecute which pointer
249 * to basic functions aic3262_probe(), aic3262_remove(),
250 * aic3262_suspend() and aic3262_resume()
253 extern struct snd_soc_codec_device soc_codec_dev_aic3262;
254 extern const aic3xxx_codec_ops aic3262_cfw_codec_ops;
255 void aic3262_hs_jack_detect(struct snd_soc_codec *codec,
256 struct snd_soc_jack *jack, int report);
258 unsigned int aic3262_read(struct snd_soc_codec *codec, unsigned int reg);
259 int aic3262_write(struct snd_soc_codec *codec, unsigned int reg, unsigned int value);
260 #endif /* _TLV320AIC3262_H */